1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=3 < %s | FileCheck --check-prefix=GFX8V3 %s 3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=4 < %s | FileCheck --check-prefix=GFX8V4 %s 4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=5 < %s | FileCheck --check-prefix=GFX8V5 %s 5 6; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 --amdhsa-code-object-version=3 < %s | FileCheck --check-prefixes=GFX9V3 %s 7; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 --amdhsa-code-object-version=4 < %s | FileCheck --check-prefixes=GFX9V4 %s 8; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 --amdhsa-code-object-version=5 < %s | FileCheck --check-prefixes=GFX9V5 %s 9 10define amdgpu_kernel void @addrspacecast(i32 addrspace(5)* %ptr.private, i32 addrspace(3)* %ptr.local) { 11; GFX8V3-LABEL: addrspacecast: 12; GFX8V3: ; %bb.0: 13; GFX8V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 14; GFX8V3-NEXT: s_load_dword s3, s[4:5], 0x44 15; GFX8V3-NEXT: s_load_dword s5, s[4:5], 0x40 16; GFX8V3-NEXT: v_mov_b32_e32 v2, 1 17; GFX8V3-NEXT: s_waitcnt lgkmcnt(0) 18; GFX8V3-NEXT: s_mov_b32 s2, s0 19; GFX8V3-NEXT: s_cmp_lg_u32 s0, -1 20; GFX8V3-NEXT: s_cselect_b64 s[2:3], s[2:3], 0 21; GFX8V3-NEXT: s_mov_b32 s4, s1 22; GFX8V3-NEXT: s_cmp_lg_u32 s1, -1 23; GFX8V3-NEXT: v_mov_b32_e32 v0, s2 24; GFX8V3-NEXT: s_cselect_b64 s[0:1], s[4:5], 0 25; GFX8V3-NEXT: v_mov_b32_e32 v1, s3 26; GFX8V3-NEXT: flat_store_dword v[0:1], v2 27; GFX8V3-NEXT: s_waitcnt vmcnt(0) 28; GFX8V3-NEXT: v_mov_b32_e32 v0, s0 29; GFX8V3-NEXT: v_mov_b32_e32 v2, 2 30; GFX8V3-NEXT: v_mov_b32_e32 v1, s1 31; GFX8V3-NEXT: flat_store_dword v[0:1], v2 32; GFX8V3-NEXT: s_waitcnt vmcnt(0) 33; GFX8V3-NEXT: s_endpgm 34; 35; GFX8V4-LABEL: addrspacecast: 36; GFX8V4: ; %bb.0: 37; GFX8V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 38; GFX8V4-NEXT: s_load_dword s3, s[4:5], 0x44 39; GFX8V4-NEXT: s_load_dword s5, s[4:5], 0x40 40; GFX8V4-NEXT: v_mov_b32_e32 v2, 1 41; GFX8V4-NEXT: s_waitcnt lgkmcnt(0) 42; GFX8V4-NEXT: s_mov_b32 s2, s0 43; GFX8V4-NEXT: s_cmp_lg_u32 s0, -1 44; GFX8V4-NEXT: s_cselect_b64 s[2:3], s[2:3], 0 45; GFX8V4-NEXT: s_mov_b32 s4, s1 46; GFX8V4-NEXT: s_cmp_lg_u32 s1, -1 47; GFX8V4-NEXT: v_mov_b32_e32 v0, s2 48; GFX8V4-NEXT: s_cselect_b64 s[0:1], s[4:5], 0 49; GFX8V4-NEXT: v_mov_b32_e32 v1, s3 50; GFX8V4-NEXT: flat_store_dword v[0:1], v2 51; GFX8V4-NEXT: s_waitcnt vmcnt(0) 52; GFX8V4-NEXT: v_mov_b32_e32 v0, s0 53; GFX8V4-NEXT: v_mov_b32_e32 v2, 2 54; GFX8V4-NEXT: v_mov_b32_e32 v1, s1 55; GFX8V4-NEXT: flat_store_dword v[0:1], v2 56; GFX8V4-NEXT: s_waitcnt vmcnt(0) 57; GFX8V4-NEXT: s_endpgm 58; 59; GFX8V5-LABEL: addrspacecast: 60; GFX8V5: ; %bb.0: 61; GFX8V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 62; GFX8V5-NEXT: s_load_dword s3, s[4:5], 0xc8 63; GFX8V5-NEXT: s_load_dword s5, s[4:5], 0xcc 64; GFX8V5-NEXT: v_mov_b32_e32 v2, 1 65; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 66; GFX8V5-NEXT: s_mov_b32 s2, s0 67; GFX8V5-NEXT: s_cmp_lg_u32 s0, -1 68; GFX8V5-NEXT: s_cselect_b64 s[2:3], s[2:3], 0 69; GFX8V5-NEXT: s_mov_b32 s4, s1 70; GFX8V5-NEXT: s_cmp_lg_u32 s1, -1 71; GFX8V5-NEXT: v_mov_b32_e32 v0, s2 72; GFX8V5-NEXT: s_cselect_b64 s[0:1], s[4:5], 0 73; GFX8V5-NEXT: v_mov_b32_e32 v1, s3 74; GFX8V5-NEXT: flat_store_dword v[0:1], v2 75; GFX8V5-NEXT: s_waitcnt vmcnt(0) 76; GFX8V5-NEXT: v_mov_b32_e32 v0, s0 77; GFX8V5-NEXT: v_mov_b32_e32 v2, 2 78; GFX8V5-NEXT: v_mov_b32_e32 v1, s1 79; GFX8V5-NEXT: flat_store_dword v[0:1], v2 80; GFX8V5-NEXT: s_waitcnt vmcnt(0) 81; GFX8V5-NEXT: s_endpgm 82; 83; GFX9V3-LABEL: addrspacecast: 84; GFX9V3: ; %bb.0: 85; GFX9V3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 86; GFX9V3-NEXT: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES, 0, 16) 87; GFX9V3-NEXT: s_lshl_b32 s3, s2, 16 88; GFX9V3-NEXT: s_getreg_b32 s4, hwreg(HW_REG_SH_MEM_BASES, 16, 16) 89; GFX9V3-NEXT: v_mov_b32_e32 v2, 1 90; GFX9V3-NEXT: s_waitcnt lgkmcnt(0) 91; GFX9V3-NEXT: s_mov_b32 s2, s0 92; GFX9V3-NEXT: s_cmp_lg_u32 s0, -1 93; GFX9V3-NEXT: s_cselect_b64 s[2:3], s[2:3], 0 94; GFX9V3-NEXT: s_lshl_b32 s5, s4, 16 95; GFX9V3-NEXT: s_mov_b32 s4, s1 96; GFX9V3-NEXT: s_cmp_lg_u32 s1, -1 97; GFX9V3-NEXT: v_mov_b32_e32 v0, s2 98; GFX9V3-NEXT: s_cselect_b64 s[0:1], s[4:5], 0 99; GFX9V3-NEXT: v_mov_b32_e32 v1, s3 100; GFX9V3-NEXT: flat_store_dword v[0:1], v2 101; GFX9V3-NEXT: s_waitcnt vmcnt(0) 102; GFX9V3-NEXT: v_mov_b32_e32 v0, s0 103; GFX9V3-NEXT: v_mov_b32_e32 v2, 2 104; GFX9V3-NEXT: v_mov_b32_e32 v1, s1 105; GFX9V3-NEXT: flat_store_dword v[0:1], v2 106; GFX9V3-NEXT: s_waitcnt vmcnt(0) 107; GFX9V3-NEXT: s_endpgm 108; 109; GFX9V4-LABEL: addrspacecast: 110; GFX9V4: ; %bb.0: 111; GFX9V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 112; GFX9V4-NEXT: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES, 0, 16) 113; GFX9V4-NEXT: s_lshl_b32 s3, s2, 16 114; GFX9V4-NEXT: s_getreg_b32 s4, hwreg(HW_REG_SH_MEM_BASES, 16, 16) 115; GFX9V4-NEXT: v_mov_b32_e32 v2, 1 116; GFX9V4-NEXT: s_waitcnt lgkmcnt(0) 117; GFX9V4-NEXT: s_mov_b32 s2, s0 118; GFX9V4-NEXT: s_cmp_lg_u32 s0, -1 119; GFX9V4-NEXT: s_cselect_b64 s[2:3], s[2:3], 0 120; GFX9V4-NEXT: s_lshl_b32 s5, s4, 16 121; GFX9V4-NEXT: s_mov_b32 s4, s1 122; GFX9V4-NEXT: s_cmp_lg_u32 s1, -1 123; GFX9V4-NEXT: v_mov_b32_e32 v0, s2 124; GFX9V4-NEXT: s_cselect_b64 s[0:1], s[4:5], 0 125; GFX9V4-NEXT: v_mov_b32_e32 v1, s3 126; GFX9V4-NEXT: flat_store_dword v[0:1], v2 127; GFX9V4-NEXT: s_waitcnt vmcnt(0) 128; GFX9V4-NEXT: v_mov_b32_e32 v0, s0 129; GFX9V4-NEXT: v_mov_b32_e32 v2, 2 130; GFX9V4-NEXT: v_mov_b32_e32 v1, s1 131; GFX9V4-NEXT: flat_store_dword v[0:1], v2 132; GFX9V4-NEXT: s_waitcnt vmcnt(0) 133; GFX9V4-NEXT: s_endpgm 134; 135; GFX9V5-LABEL: addrspacecast: 136; GFX9V5: ; %bb.0: 137; GFX9V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 138; GFX9V5-NEXT: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES, 0, 16) 139; GFX9V5-NEXT: s_lshl_b32 s3, s2, 16 140; GFX9V5-NEXT: s_getreg_b32 s4, hwreg(HW_REG_SH_MEM_BASES, 16, 16) 141; GFX9V5-NEXT: v_mov_b32_e32 v2, 1 142; GFX9V5-NEXT: s_waitcnt lgkmcnt(0) 143; GFX9V5-NEXT: s_mov_b32 s2, s0 144; GFX9V5-NEXT: s_cmp_lg_u32 s0, -1 145; GFX9V5-NEXT: s_cselect_b64 s[2:3], s[2:3], 0 146; GFX9V5-NEXT: s_lshl_b32 s5, s4, 16 147; GFX9V5-NEXT: s_mov_b32 s4, s1 148; GFX9V5-NEXT: s_cmp_lg_u32 s1, -1 149; GFX9V5-NEXT: v_mov_b32_e32 v0, s2 150; GFX9V5-NEXT: s_cselect_b64 s[0:1], s[4:5], 0 151; GFX9V5-NEXT: v_mov_b32_e32 v1, s3 152; GFX9V5-NEXT: flat_store_dword v[0:1], v2 153; GFX9V5-NEXT: s_waitcnt vmcnt(0) 154; GFX9V5-NEXT: v_mov_b32_e32 v0, s0 155; GFX9V5-NEXT: v_mov_b32_e32 v2, 2 156; GFX9V5-NEXT: v_mov_b32_e32 v1, s1 157; GFX9V5-NEXT: flat_store_dword v[0:1], v2 158; GFX9V5-NEXT: s_waitcnt vmcnt(0) 159; GFX9V5-NEXT: s_endpgm 160 %flat.private = addrspacecast i32 addrspace(5)* %ptr.private to i32* 161 %flat.local = addrspacecast i32 addrspace(3)* %ptr.local to i32* 162 store volatile i32 1, i32* %flat.private 163 store volatile i32 2, i32* %flat.local 164 ret void 165} 166 167define amdgpu_kernel void @llvm_amdgcn_is_shared(i8* %ptr) { 168; GFX8V3-LABEL: llvm_amdgcn_is_shared: 169; GFX8V3: ; %bb.0: 170; GFX8V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 171; GFX8V3-NEXT: s_waitcnt lgkmcnt(0) 172; GFX8V3-NEXT: s_load_dword s0, s[4:5], 0x40 173; GFX8V3-NEXT: s_waitcnt lgkmcnt(0) 174; GFX8V3-NEXT: s_cmp_eq_u32 s1, s0 175; GFX8V3-NEXT: s_cselect_b32 s0, 1, 0 176; GFX8V3-NEXT: v_mov_b32_e32 v0, s0 177; GFX8V3-NEXT: flat_store_dword v[0:1], v0 178; GFX8V3-NEXT: s_waitcnt vmcnt(0) 179; GFX8V3-NEXT: s_endpgm 180; 181; GFX8V4-LABEL: llvm_amdgcn_is_shared: 182; GFX8V4: ; %bb.0: 183; GFX8V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 184; GFX8V4-NEXT: s_waitcnt lgkmcnt(0) 185; GFX8V4-NEXT: s_load_dword s0, s[4:5], 0x40 186; GFX8V4-NEXT: s_waitcnt lgkmcnt(0) 187; GFX8V4-NEXT: s_cmp_eq_u32 s1, s0 188; GFX8V4-NEXT: s_cselect_b32 s0, 1, 0 189; GFX8V4-NEXT: v_mov_b32_e32 v0, s0 190; GFX8V4-NEXT: flat_store_dword v[0:1], v0 191; GFX8V4-NEXT: s_waitcnt vmcnt(0) 192; GFX8V4-NEXT: s_endpgm 193; 194; GFX8V5-LABEL: llvm_amdgcn_is_shared: 195; GFX8V5: ; %bb.0: 196; GFX8V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 197; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 198; GFX8V5-NEXT: s_load_dword s0, s[4:5], 0xcc 199; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 200; GFX8V5-NEXT: s_cmp_eq_u32 s1, s0 201; GFX8V5-NEXT: s_cselect_b32 s0, 1, 0 202; GFX8V5-NEXT: v_mov_b32_e32 v0, s0 203; GFX8V5-NEXT: flat_store_dword v[0:1], v0 204; GFX8V5-NEXT: s_waitcnt vmcnt(0) 205; GFX8V5-NEXT: s_endpgm 206; 207; GFX9V3-LABEL: llvm_amdgcn_is_shared: 208; GFX9V3: ; %bb.0: 209; GFX9V3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 210; GFX9V3-NEXT: s_waitcnt lgkmcnt(0) 211; GFX9V3-NEXT: s_getreg_b32 s0, hwreg(HW_REG_SH_MEM_BASES, 16, 16) 212; GFX9V3-NEXT: s_lshl_b32 s0, s0, 16 213; GFX9V3-NEXT: s_cmp_eq_u32 s1, s0 214; GFX9V3-NEXT: s_cselect_b32 s0, 1, 0 215; GFX9V3-NEXT: v_mov_b32_e32 v0, s0 216; GFX9V3-NEXT: global_store_dword v[0:1], v0, off 217; GFX9V3-NEXT: s_waitcnt vmcnt(0) 218; GFX9V3-NEXT: s_endpgm 219; 220; GFX9V4-LABEL: llvm_amdgcn_is_shared: 221; GFX9V4: ; %bb.0: 222; GFX9V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 223; GFX9V4-NEXT: s_waitcnt lgkmcnt(0) 224; GFX9V4-NEXT: s_getreg_b32 s0, hwreg(HW_REG_SH_MEM_BASES, 16, 16) 225; GFX9V4-NEXT: s_lshl_b32 s0, s0, 16 226; GFX9V4-NEXT: s_cmp_eq_u32 s1, s0 227; GFX9V4-NEXT: s_cselect_b32 s0, 1, 0 228; GFX9V4-NEXT: v_mov_b32_e32 v0, s0 229; GFX9V4-NEXT: global_store_dword v[0:1], v0, off 230; GFX9V4-NEXT: s_waitcnt vmcnt(0) 231; GFX9V4-NEXT: s_endpgm 232; 233; GFX9V5-LABEL: llvm_amdgcn_is_shared: 234; GFX9V5: ; %bb.0: 235; GFX9V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 236; GFX9V5-NEXT: s_waitcnt lgkmcnt(0) 237; GFX9V5-NEXT: s_getreg_b32 s0, hwreg(HW_REG_SH_MEM_BASES, 16, 16) 238; GFX9V5-NEXT: s_lshl_b32 s0, s0, 16 239; GFX9V5-NEXT: s_cmp_eq_u32 s1, s0 240; GFX9V5-NEXT: s_cselect_b32 s0, 1, 0 241; GFX9V5-NEXT: v_mov_b32_e32 v0, s0 242; GFX9V5-NEXT: global_store_dword v[0:1], v0, off 243; GFX9V5-NEXT: s_waitcnt vmcnt(0) 244; GFX9V5-NEXT: s_endpgm 245 %is.shared = call i1 @llvm.amdgcn.is.shared(i8* %ptr) 246 %zext = zext i1 %is.shared to i32 247 store volatile i32 %zext, i32 addrspace(1)* undef 248 ret void 249} 250 251define amdgpu_kernel void @llvm_amdgcn_is_private(i8* %ptr) { 252; GFX8V3-LABEL: llvm_amdgcn_is_private: 253; GFX8V3: ; %bb.0: 254; GFX8V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 255; GFX8V3-NEXT: s_waitcnt lgkmcnt(0) 256; GFX8V3-NEXT: s_load_dword s0, s[4:5], 0x44 257; GFX8V3-NEXT: s_waitcnt lgkmcnt(0) 258; GFX8V3-NEXT: s_cmp_eq_u32 s1, s0 259; GFX8V3-NEXT: s_cselect_b32 s0, 1, 0 260; GFX8V3-NEXT: v_mov_b32_e32 v0, s0 261; GFX8V3-NEXT: flat_store_dword v[0:1], v0 262; GFX8V3-NEXT: s_waitcnt vmcnt(0) 263; GFX8V3-NEXT: s_endpgm 264; 265; GFX8V4-LABEL: llvm_amdgcn_is_private: 266; GFX8V4: ; %bb.0: 267; GFX8V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 268; GFX8V4-NEXT: s_waitcnt lgkmcnt(0) 269; GFX8V4-NEXT: s_load_dword s0, s[4:5], 0x44 270; GFX8V4-NEXT: s_waitcnt lgkmcnt(0) 271; GFX8V4-NEXT: s_cmp_eq_u32 s1, s0 272; GFX8V4-NEXT: s_cselect_b32 s0, 1, 0 273; GFX8V4-NEXT: v_mov_b32_e32 v0, s0 274; GFX8V4-NEXT: flat_store_dword v[0:1], v0 275; GFX8V4-NEXT: s_waitcnt vmcnt(0) 276; GFX8V4-NEXT: s_endpgm 277; 278; GFX8V5-LABEL: llvm_amdgcn_is_private: 279; GFX8V5: ; %bb.0: 280; GFX8V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 281; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 282; GFX8V5-NEXT: s_load_dword s0, s[4:5], 0xc8 283; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 284; GFX8V5-NEXT: s_cmp_eq_u32 s1, s0 285; GFX8V5-NEXT: s_cselect_b32 s0, 1, 0 286; GFX8V5-NEXT: v_mov_b32_e32 v0, s0 287; GFX8V5-NEXT: flat_store_dword v[0:1], v0 288; GFX8V5-NEXT: s_waitcnt vmcnt(0) 289; GFX8V5-NEXT: s_endpgm 290; 291; GFX9V3-LABEL: llvm_amdgcn_is_private: 292; GFX9V3: ; %bb.0: 293; GFX9V3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 294; GFX9V3-NEXT: s_waitcnt lgkmcnt(0) 295; GFX9V3-NEXT: s_getreg_b32 s0, hwreg(HW_REG_SH_MEM_BASES, 0, 16) 296; GFX9V3-NEXT: s_lshl_b32 s0, s0, 16 297; GFX9V3-NEXT: s_cmp_eq_u32 s1, s0 298; GFX9V3-NEXT: s_cselect_b32 s0, 1, 0 299; GFX9V3-NEXT: v_mov_b32_e32 v0, s0 300; GFX9V3-NEXT: global_store_dword v[0:1], v0, off 301; GFX9V3-NEXT: s_waitcnt vmcnt(0) 302; GFX9V3-NEXT: s_endpgm 303; 304; GFX9V4-LABEL: llvm_amdgcn_is_private: 305; GFX9V4: ; %bb.0: 306; GFX9V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 307; GFX9V4-NEXT: s_waitcnt lgkmcnt(0) 308; GFX9V4-NEXT: s_getreg_b32 s0, hwreg(HW_REG_SH_MEM_BASES, 0, 16) 309; GFX9V4-NEXT: s_lshl_b32 s0, s0, 16 310; GFX9V4-NEXT: s_cmp_eq_u32 s1, s0 311; GFX9V4-NEXT: s_cselect_b32 s0, 1, 0 312; GFX9V4-NEXT: v_mov_b32_e32 v0, s0 313; GFX9V4-NEXT: global_store_dword v[0:1], v0, off 314; GFX9V4-NEXT: s_waitcnt vmcnt(0) 315; GFX9V4-NEXT: s_endpgm 316; 317; GFX9V5-LABEL: llvm_amdgcn_is_private: 318; GFX9V5: ; %bb.0: 319; GFX9V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 320; GFX9V5-NEXT: s_waitcnt lgkmcnt(0) 321; GFX9V5-NEXT: s_getreg_b32 s0, hwreg(HW_REG_SH_MEM_BASES, 0, 16) 322; GFX9V5-NEXT: s_lshl_b32 s0, s0, 16 323; GFX9V5-NEXT: s_cmp_eq_u32 s1, s0 324; GFX9V5-NEXT: s_cselect_b32 s0, 1, 0 325; GFX9V5-NEXT: v_mov_b32_e32 v0, s0 326; GFX9V5-NEXT: global_store_dword v[0:1], v0, off 327; GFX9V5-NEXT: s_waitcnt vmcnt(0) 328; GFX9V5-NEXT: s_endpgm 329 %is.private = call i1 @llvm.amdgcn.is.private(i8* %ptr) 330 %zext = zext i1 %is.private to i32 331 store volatile i32 %zext, i32 addrspace(1)* undef 332 ret void 333} 334 335define amdgpu_kernel void @llvm_trap() { 336; GFX8V3-LABEL: llvm_trap: 337; GFX8V3: ; %bb.0: 338; GFX8V3-NEXT: s_mov_b64 s[0:1], s[4:5] 339; GFX8V3-NEXT: s_trap 2 340; 341; GFX8V4-LABEL: llvm_trap: 342; GFX8V4: ; %bb.0: 343; GFX8V4-NEXT: s_mov_b64 s[0:1], s[4:5] 344; GFX8V4-NEXT: s_trap 2 345; 346; GFX8V5-LABEL: llvm_trap: 347; GFX8V5: ; %bb.0: 348; GFX8V5-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xc8 349; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 350; GFX8V5-NEXT: s_trap 2 351; 352; GFX9V3-LABEL: llvm_trap: 353; GFX9V3: ; %bb.0: 354; GFX9V3-NEXT: s_mov_b64 s[0:1], s[4:5] 355; GFX9V3-NEXT: s_trap 2 356; 357; GFX9V4-LABEL: llvm_trap: 358; GFX9V4: ; %bb.0: 359; GFX9V4-NEXT: s_trap 2 360; 361; GFX9V5-LABEL: llvm_trap: 362; GFX9V5: ; %bb.0: 363; GFX9V5-NEXT: s_trap 2 364 call void @llvm.trap() 365 unreachable 366} 367 368define amdgpu_kernel void @llvm_debugtrap() { 369; GFX8V3-LABEL: llvm_debugtrap: 370; GFX8V3: ; %bb.0: 371; GFX8V3-NEXT: s_trap 3 372; 373; GFX8V4-LABEL: llvm_debugtrap: 374; GFX8V4: ; %bb.0: 375; GFX8V4-NEXT: s_trap 3 376; 377; GFX8V5-LABEL: llvm_debugtrap: 378; GFX8V5: ; %bb.0: 379; GFX8V5-NEXT: s_trap 3 380; 381; GFX9V3-LABEL: llvm_debugtrap: 382; GFX9V3: ; %bb.0: 383; GFX9V3-NEXT: s_trap 3 384; 385; GFX9V4-LABEL: llvm_debugtrap: 386; GFX9V4: ; %bb.0: 387; GFX9V4-NEXT: s_trap 3 388; 389; GFX9V5-LABEL: llvm_debugtrap: 390; GFX9V5: ; %bb.0: 391; GFX9V5-NEXT: s_trap 3 392 call void @llvm.debugtrap() 393 unreachable 394} 395 396define amdgpu_kernel void @llvm_amdgcn_queue_ptr(i64 addrspace(1)* %ptr) { 397; GFX8V3-LABEL: llvm_amdgcn_queue_ptr: 398; GFX8V3: ; %bb.0: 399; GFX8V3-NEXT: v_mov_b32_e32 v0, s6 400; GFX8V3-NEXT: v_mov_b32_e32 v1, s7 401; GFX8V3-NEXT: s_add_u32 s0, s8, 8 402; GFX8V3-NEXT: flat_load_ubyte v0, v[0:1] glc 403; GFX8V3-NEXT: s_addc_u32 s1, s9, 0 404; GFX8V3-NEXT: s_waitcnt vmcnt(0) 405; GFX8V3-NEXT: v_mov_b32_e32 v0, s0 406; GFX8V3-NEXT: v_mov_b32_e32 v1, s1 407; GFX8V3-NEXT: flat_load_ubyte v0, v[0:1] glc 408; GFX8V3-NEXT: s_waitcnt vmcnt(0) 409; GFX8V3-NEXT: v_mov_b32_e32 v0, s4 410; GFX8V3-NEXT: v_mov_b32_e32 v1, s5 411; GFX8V3-NEXT: flat_load_ubyte v0, v[0:1] glc 412; GFX8V3-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0 413; GFX8V3-NEXT: s_waitcnt vmcnt(0) 414; GFX8V3-NEXT: v_mov_b32_e32 v0, s10 415; GFX8V3-NEXT: v_mov_b32_e32 v1, s11 416; GFX8V3-NEXT: s_waitcnt lgkmcnt(0) 417; GFX8V3-NEXT: v_mov_b32_e32 v3, s1 418; GFX8V3-NEXT: v_mov_b32_e32 v2, s0 419; GFX8V3-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 420; GFX8V3-NEXT: s_waitcnt vmcnt(0) 421; GFX8V3-NEXT: s_endpgm 422; 423; GFX8V4-LABEL: llvm_amdgcn_queue_ptr: 424; GFX8V4: ; %bb.0: 425; GFX8V4-NEXT: v_mov_b32_e32 v0, s6 426; GFX8V4-NEXT: v_mov_b32_e32 v1, s7 427; GFX8V4-NEXT: s_add_u32 s0, s8, 8 428; GFX8V4-NEXT: flat_load_ubyte v0, v[0:1] glc 429; GFX8V4-NEXT: s_addc_u32 s1, s9, 0 430; GFX8V4-NEXT: s_waitcnt vmcnt(0) 431; GFX8V4-NEXT: v_mov_b32_e32 v0, s0 432; GFX8V4-NEXT: v_mov_b32_e32 v1, s1 433; GFX8V4-NEXT: flat_load_ubyte v0, v[0:1] glc 434; GFX8V4-NEXT: s_waitcnt vmcnt(0) 435; GFX8V4-NEXT: v_mov_b32_e32 v0, s4 436; GFX8V4-NEXT: v_mov_b32_e32 v1, s5 437; GFX8V4-NEXT: flat_load_ubyte v0, v[0:1] glc 438; GFX8V4-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0 439; GFX8V4-NEXT: s_waitcnt vmcnt(0) 440; GFX8V4-NEXT: v_mov_b32_e32 v0, s10 441; GFX8V4-NEXT: v_mov_b32_e32 v1, s11 442; GFX8V4-NEXT: s_waitcnt lgkmcnt(0) 443; GFX8V4-NEXT: v_mov_b32_e32 v3, s1 444; GFX8V4-NEXT: v_mov_b32_e32 v2, s0 445; GFX8V4-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 446; GFX8V4-NEXT: s_waitcnt vmcnt(0) 447; GFX8V4-NEXT: s_endpgm 448; 449; GFX8V5-LABEL: llvm_amdgcn_queue_ptr: 450; GFX8V5: ; %bb.0: 451; GFX8V5-NEXT: s_add_u32 s0, s6, 8 452; GFX8V5-NEXT: flat_load_ubyte v0, v[0:1] glc 453; GFX8V5-NEXT: s_addc_u32 s1, s7, 0 454; GFX8V5-NEXT: s_waitcnt vmcnt(0) 455; GFX8V5-NEXT: v_mov_b32_e32 v0, s0 456; GFX8V5-NEXT: v_mov_b32_e32 v1, s1 457; GFX8V5-NEXT: flat_load_ubyte v0, v[0:1] glc 458; GFX8V5-NEXT: s_waitcnt vmcnt(0) 459; GFX8V5-NEXT: v_mov_b32_e32 v0, s4 460; GFX8V5-NEXT: v_mov_b32_e32 v1, s5 461; GFX8V5-NEXT: flat_load_ubyte v0, v[0:1] glc 462; GFX8V5-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 463; GFX8V5-NEXT: s_waitcnt vmcnt(0) 464; GFX8V5-NEXT: v_mov_b32_e32 v0, s8 465; GFX8V5-NEXT: v_mov_b32_e32 v1, s9 466; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) 467; GFX8V5-NEXT: v_mov_b32_e32 v3, s1 468; GFX8V5-NEXT: v_mov_b32_e32 v2, s0 469; GFX8V5-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 470; GFX8V5-NEXT: s_waitcnt vmcnt(0) 471; GFX8V5-NEXT: s_endpgm 472; 473; GFX9V3-LABEL: llvm_amdgcn_queue_ptr: 474; GFX9V3: ; %bb.0: 475; GFX9V3-NEXT: v_mov_b32_e32 v2, 0 476; GFX9V3-NEXT: global_load_ubyte v0, v2, s[6:7] glc 477; GFX9V3-NEXT: s_waitcnt vmcnt(0) 478; GFX9V3-NEXT: global_load_ubyte v0, v2, s[8:9] offset:8 glc 479; GFX9V3-NEXT: s_waitcnt vmcnt(0) 480; GFX9V3-NEXT: global_load_ubyte v0, v2, s[4:5] glc 481; GFX9V3-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0 482; GFX9V3-NEXT: s_waitcnt vmcnt(0) 483; GFX9V3-NEXT: v_mov_b32_e32 v0, s10 484; GFX9V3-NEXT: v_mov_b32_e32 v1, s11 485; GFX9V3-NEXT: ; kill: killed $sgpr6_sgpr7 486; GFX9V3-NEXT: ; kill: killed $sgpr4_sgpr5 487; GFX9V3-NEXT: s_waitcnt lgkmcnt(0) 488; GFX9V3-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 489; GFX9V3-NEXT: s_waitcnt vmcnt(0) 490; GFX9V3-NEXT: s_endpgm 491; 492; GFX9V4-LABEL: llvm_amdgcn_queue_ptr: 493; GFX9V4: ; %bb.0: 494; GFX9V4-NEXT: v_mov_b32_e32 v2, 0 495; GFX9V4-NEXT: global_load_ubyte v0, v2, s[6:7] glc 496; GFX9V4-NEXT: s_waitcnt vmcnt(0) 497; GFX9V4-NEXT: global_load_ubyte v0, v2, s[8:9] offset:8 glc 498; GFX9V4-NEXT: s_waitcnt vmcnt(0) 499; GFX9V4-NEXT: global_load_ubyte v0, v2, s[4:5] glc 500; GFX9V4-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0 501; GFX9V4-NEXT: s_waitcnt vmcnt(0) 502; GFX9V4-NEXT: v_mov_b32_e32 v0, s10 503; GFX9V4-NEXT: v_mov_b32_e32 v1, s11 504; GFX9V4-NEXT: ; kill: killed $sgpr6_sgpr7 505; GFX9V4-NEXT: ; kill: killed $sgpr4_sgpr5 506; GFX9V4-NEXT: s_waitcnt lgkmcnt(0) 507; GFX9V4-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 508; GFX9V4-NEXT: s_waitcnt vmcnt(0) 509; GFX9V4-NEXT: s_endpgm 510; 511; GFX9V5-LABEL: llvm_amdgcn_queue_ptr: 512; GFX9V5: ; %bb.0: 513; GFX9V5-NEXT: v_mov_b32_e32 v2, 0 514; GFX9V5-NEXT: global_load_ubyte v0, v[0:1], off glc 515; GFX9V5-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 516; GFX9V5-NEXT: s_waitcnt vmcnt(0) 517; GFX9V5-NEXT: global_load_ubyte v0, v2, s[6:7] offset:8 glc 518; GFX9V5-NEXT: s_waitcnt vmcnt(0) 519; GFX9V5-NEXT: global_load_ubyte v0, v2, s[4:5] glc 520; GFX9V5-NEXT: s_waitcnt vmcnt(0) 521; GFX9V5-NEXT: v_mov_b32_e32 v0, s8 522; GFX9V5-NEXT: v_mov_b32_e32 v1, s9 523; GFX9V5-NEXT: ; kill: killed $sgpr4_sgpr5 524; GFX9V5-NEXT: s_waitcnt lgkmcnt(0) 525; GFX9V5-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 526; GFX9V5-NEXT: s_waitcnt vmcnt(0) 527; GFX9V5-NEXT: s_endpgm 528 %queue.ptr = call i8 addrspace(4)* @llvm.amdgcn.queue.ptr() 529 %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() 530 %dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr() 531 %dispatch.id = call i64 @llvm.amdgcn.dispatch.id() 532 %queue.load = load volatile i8, i8 addrspace(4)* %queue.ptr 533 %implicitarg.load = load volatile i8, i8 addrspace(4)* %implicitarg.ptr 534 %dispatch.load = load volatile i8, i8 addrspace(4)* %dispatch.ptr 535 store volatile i64 %dispatch.id, i64 addrspace(1)* %ptr 536 ret void 537} 538 539declare noalias i8 addrspace(4)* @llvm.amdgcn.queue.ptr() 540declare noalias i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() 541declare i64 @llvm.amdgcn.dispatch.id() 542declare noalias i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr() 543declare i1 @llvm.amdgcn.is.shared(i8*) 544declare i1 @llvm.amdgcn.is.private(i8*) 545declare void @llvm.trap() 546declare void @llvm.debugtrap() 547