1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -verify-machineinstrs -o - %s | FileCheck %s 3 4; Make sure the waterfall loop does not fail the verifier after regalloc fast 5define <4 x float> @waterfall_loop(<8 x i32> %vgpr_srd) { 6; CHECK-LABEL: waterfall_loop: 7; CHECK: ; %bb.0: ; %bb 8; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 9; CHECK-NEXT: s_waitcnt_vscnt null, 0x0 10; CHECK-NEXT: s_or_saveexec_b32 s4, -1 11; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill 12; CHECK-NEXT: s_mov_b32 exec_lo, s4 13; CHECK-NEXT: v_mov_b32_e32 v14, v1 14; CHECK-NEXT: v_mov_b32_e32 v13, v2 15; CHECK-NEXT: v_mov_b32_e32 v12, v3 16; CHECK-NEXT: v_mov_b32_e32 v11, v4 17; CHECK-NEXT: v_mov_b32_e32 v10, v5 18; CHECK-NEXT: v_mov_b32_e32 v9, v6 19; CHECK-NEXT: v_mov_b32_e32 v8, v7 20; CHECK-NEXT: ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 killed $exec 21; CHECK-NEXT: v_mov_b32_e32 v1, v14 22; CHECK-NEXT: v_mov_b32_e32 v2, v13 23; CHECK-NEXT: v_mov_b32_e32 v3, v12 24; CHECK-NEXT: v_mov_b32_e32 v4, v11 25; CHECK-NEXT: v_mov_b32_e32 v5, v10 26; CHECK-NEXT: v_mov_b32_e32 v6, v9 27; CHECK-NEXT: v_mov_b32_e32 v7, v8 28; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill 29; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill 30; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill 31; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill 32; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill 33; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill 34; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill 35; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill 36; CHECK-NEXT: v_writelane_b32 v15, s30, 0 37; CHECK-NEXT: v_writelane_b32 v15, s31, 1 38; CHECK-NEXT: s_mov_b32 s8, 0 39; CHECK-NEXT: s_mov_b32 s4, s8 40; CHECK-NEXT: s_mov_b32 s5, s8 41; CHECK-NEXT: s_mov_b32 s6, s8 42; CHECK-NEXT: s_mov_b32 s7, s8 43; CHECK-NEXT: v_writelane_b32 v15, s4, 2 44; CHECK-NEXT: v_writelane_b32 v15, s5, 3 45; CHECK-NEXT: v_writelane_b32 v15, s6, 4 46; CHECK-NEXT: v_writelane_b32 v15, s7, 5 47; CHECK-NEXT: s_mov_b32 s6, 0 48; CHECK-NEXT: s_mov_b32 s4, s6 49; CHECK-NEXT: s_mov_b32 s5, s6 50; CHECK-NEXT: v_mov_b32_e32 v9, s5 51; CHECK-NEXT: v_mov_b32_e32 v8, s4 52; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill 53; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill 54; CHECK-NEXT: v_mov_b32_e32 v9, v1 55; CHECK-NEXT: v_mov_b32_e32 v8, v0 56; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill 57; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill 58; CHECK-NEXT: v_mov_b32_e32 v9, v3 59; CHECK-NEXT: v_mov_b32_e32 v8, v2 60; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill 61; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill 62; CHECK-NEXT: v_mov_b32_e32 v9, v5 63; CHECK-NEXT: v_mov_b32_e32 v8, v4 64; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill 65; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill 66; CHECK-NEXT: v_mov_b32_e32 v0, v6 67; CHECK-NEXT: v_mov_b32_e32 v1, v7 68; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 ; 4-byte Folded Spill 69; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill 70; CHECK-NEXT: s_mov_b32 s4, exec_lo 71; CHECK-NEXT: v_writelane_b32 v15, s4, 6 72; CHECK-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 73; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload 74; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload 75; CHECK-NEXT: v_readlane_b32 s16, v15, 2 76; CHECK-NEXT: v_readlane_b32 s17, v15, 3 77; CHECK-NEXT: v_readlane_b32 s18, v15, 4 78; CHECK-NEXT: v_readlane_b32 s19, v15, 5 79; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; 4-byte Folded Reload 80; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload 81; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload 82; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload 83; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload 84; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload 85; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload 86; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload 87; CHECK-NEXT: s_waitcnt vmcnt(0) 88; CHECK-NEXT: v_readfirstlane_b32 s8, v8 89; CHECK-NEXT: v_readfirstlane_b32 s23, v9 90; CHECK-NEXT: s_mov_b32 s4, s8 91; CHECK-NEXT: s_mov_b32 s5, s23 92; CHECK-NEXT: v_writelane_b32 v15, s4, 7 93; CHECK-NEXT: v_writelane_b32 v15, s5, 8 94; CHECK-NEXT: v_cmp_eq_u64_e64 s5, s[4:5], v[8:9] 95; CHECK-NEXT: v_readfirstlane_b32 s22, v6 96; CHECK-NEXT: v_readfirstlane_b32 s21, v7 97; CHECK-NEXT: s_mov_b32 s6, s22 98; CHECK-NEXT: s_mov_b32 s7, s21 99; CHECK-NEXT: v_writelane_b32 v15, s6, 9 100; CHECK-NEXT: v_writelane_b32 v15, s7, 10 101; CHECK-NEXT: v_cmp_eq_u64_e64 s4, s[6:7], v[6:7] 102; CHECK-NEXT: s_and_b32 s5, s4, s5 103; CHECK-NEXT: v_readfirstlane_b32 s20, v4 104; CHECK-NEXT: v_readfirstlane_b32 s7, v5 105; CHECK-NEXT: s_mov_b32 s10, s20 106; CHECK-NEXT: s_mov_b32 s11, s7 107; CHECK-NEXT: v_writelane_b32 v15, s10, 11 108; CHECK-NEXT: v_writelane_b32 v15, s11, 12 109; CHECK-NEXT: v_cmp_eq_u64_e64 s4, s[10:11], v[4:5] 110; CHECK-NEXT: s_and_b32 s9, s4, s5 111; CHECK-NEXT: v_readfirstlane_b32 s6, v2 112; CHECK-NEXT: v_readfirstlane_b32 s5, v3 113; CHECK-NEXT: s_mov_b32 s10, s6 114; CHECK-NEXT: s_mov_b32 s11, s5 115; CHECK-NEXT: v_writelane_b32 v15, s10, 13 116; CHECK-NEXT: v_writelane_b32 v15, s11, 14 117; CHECK-NEXT: v_cmp_eq_u64_e64 s4, s[10:11], v[2:3] 118; CHECK-NEXT: s_and_b32 s4, s4, s9 119; CHECK-NEXT: ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 120; CHECK-NEXT: s_mov_b32 s9, s23 121; CHECK-NEXT: s_mov_b32 s10, s22 122; CHECK-NEXT: s_mov_b32 s11, s21 123; CHECK-NEXT: s_mov_b32 s12, s20 124; CHECK-NEXT: s_mov_b32 s13, s7 125; CHECK-NEXT: s_mov_b32 s14, s6 126; CHECK-NEXT: s_mov_b32 s15, s5 127; CHECK-NEXT: v_writelane_b32 v15, s8, 15 128; CHECK-NEXT: v_writelane_b32 v15, s9, 16 129; CHECK-NEXT: v_writelane_b32 v15, s10, 17 130; CHECK-NEXT: v_writelane_b32 v15, s11, 18 131; CHECK-NEXT: v_writelane_b32 v15, s12, 19 132; CHECK-NEXT: v_writelane_b32 v15, s13, 20 133; CHECK-NEXT: v_writelane_b32 v15, s14, 21 134; CHECK-NEXT: v_writelane_b32 v15, s15, 22 135; CHECK-NEXT: s_and_saveexec_b32 s4, s4 136; CHECK-NEXT: image_sample v0, v[0:1], s[8:15], s[16:19] dmask:0x1 dim:SQ_RSRC_IMG_2D 137; CHECK-NEXT: s_waitcnt vmcnt(0) 138; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill 139; CHECK-NEXT: s_xor_b32 exec_lo, exec_lo, s4 140; CHECK-NEXT: s_cbranch_execnz .LBB0_1 141; CHECK-NEXT: ; %bb.2: 142; CHECK-NEXT: v_readlane_b32 s4, v15, 6 143; CHECK-NEXT: s_mov_b32 exec_lo, s4 144; CHECK-NEXT: ; %bb.3: 145; CHECK-NEXT: v_readlane_b32 s4, v15, 0 146; CHECK-NEXT: v_readlane_b32 s5, v15, 1 147; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload 148; CHECK-NEXT: ; implicit-def: $sgpr6 149; CHECK-NEXT: v_mov_b32_e32 v1, s6 150; CHECK-NEXT: v_mov_b32_e32 v2, s6 151; CHECK-NEXT: v_mov_b32_e32 v3, s6 152; CHECK-NEXT: s_or_saveexec_b32 s6, -1 153; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload 154; CHECK-NEXT: s_mov_b32 exec_lo, s6 155; CHECK-NEXT: s_waitcnt vmcnt(0) 156; CHECK-NEXT: s_waitcnt_vscnt null, 0x0 157; CHECK-NEXT: s_setpc_b64 s[4:5] 158bb: 159 %ret = tail call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 1, float 0.000000e+00, float 0.000000e+00, <8 x i32> %vgpr_srd, <4 x i32> zeroinitializer, i1 false, i32 0, i32 0) 160 ret <4 x float> %ret 161} 162 163declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 immarg, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0 164 165attributes #0 = { nounwind readonly willreturn } 166