1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GPRIDX %s 3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=MOVREL %s 4 5define float @dyn_extract_v8f32_const_s_v(i32 %sel) { 6; GPRIDX-LABEL: dyn_extract_v8f32_const_s_v: 7; GPRIDX: ; %bb.0: ; %entry 8; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 9; GPRIDX-NEXT: s_mov_b32 s11, 0x41000000 10; GPRIDX-NEXT: s_mov_b32 s10, 0x40e00000 11; GPRIDX-NEXT: s_mov_b32 s9, 0x40c00000 12; GPRIDX-NEXT: s_mov_b32 s8, 0x40a00000 13; GPRIDX-NEXT: s_mov_b32 s7, 4.0 14; GPRIDX-NEXT: s_mov_b32 s6, 0x40400000 15; GPRIDX-NEXT: s_mov_b32 s5, 2.0 16; GPRIDX-NEXT: s_mov_b32 s4, 1.0 17; GPRIDX-NEXT: s_mov_b64 s[12:13], exec 18; GPRIDX-NEXT: BB0_1: ; =>This Inner Loop Header: Depth=1 19; GPRIDX-NEXT: v_readfirstlane_b32 s14, v0 20; GPRIDX-NEXT: s_mov_b32 m0, s14 21; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s14, v0 22; GPRIDX-NEXT: s_movrels_b32 s14, s4 23; GPRIDX-NEXT: v_mov_b32_e32 v1, s14 24; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 25; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 26; GPRIDX-NEXT: s_cbranch_execnz BB0_1 27; GPRIDX-NEXT: ; %bb.2: 28; GPRIDX-NEXT: s_mov_b64 exec, s[12:13] 29; GPRIDX-NEXT: v_mov_b32_e32 v0, v1 30; GPRIDX-NEXT: s_setpc_b64 s[30:31] 31; 32; MOVREL-LABEL: dyn_extract_v8f32_const_s_v: 33; MOVREL: ; %bb.0: ; %entry 34; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 35; MOVREL-NEXT: s_mov_b32 s11, 0x41000000 36; MOVREL-NEXT: s_mov_b32 s10, 0x40e00000 37; MOVREL-NEXT: s_mov_b32 s9, 0x40c00000 38; MOVREL-NEXT: s_mov_b32 s8, 0x40a00000 39; MOVREL-NEXT: s_mov_b32 s7, 4.0 40; MOVREL-NEXT: s_mov_b32 s6, 0x40400000 41; MOVREL-NEXT: s_mov_b32 s5, 2.0 42; MOVREL-NEXT: s_mov_b32 s4, 1.0 43; MOVREL-NEXT: s_mov_b64 s[12:13], exec 44; MOVREL-NEXT: BB0_1: ; =>This Inner Loop Header: Depth=1 45; MOVREL-NEXT: v_readfirstlane_b32 s14, v0 46; MOVREL-NEXT: s_mov_b32 m0, s14 47; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s14, v0 48; MOVREL-NEXT: s_movrels_b32 s14, s4 49; MOVREL-NEXT: v_mov_b32_e32 v1, s14 50; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 51; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 52; MOVREL-NEXT: s_cbranch_execnz BB0_1 53; MOVREL-NEXT: ; %bb.2: 54; MOVREL-NEXT: s_mov_b64 exec, s[12:13] 55; MOVREL-NEXT: v_mov_b32_e32 v0, v1 56; MOVREL-NEXT: s_setpc_b64 s[30:31] 57entry: 58 %ext = extractelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, i32 %sel 59 ret float %ext 60} 61 62define amdgpu_ps float @dyn_extract_v8f32_const_s_s(i32 inreg %sel) { 63; GPRIDX-LABEL: dyn_extract_v8f32_const_s_s: 64; GPRIDX: ; %bb.0: ; %entry 65; GPRIDX-NEXT: s_mov_b32 s4, 1.0 66; GPRIDX-NEXT: s_mov_b32 m0, s2 67; GPRIDX-NEXT: s_mov_b32 s11, 0x41000000 68; GPRIDX-NEXT: s_mov_b32 s10, 0x40e00000 69; GPRIDX-NEXT: s_mov_b32 s9, 0x40c00000 70; GPRIDX-NEXT: s_mov_b32 s8, 0x40a00000 71; GPRIDX-NEXT: s_mov_b32 s7, 4.0 72; GPRIDX-NEXT: s_mov_b32 s6, 0x40400000 73; GPRIDX-NEXT: s_mov_b32 s5, 2.0 74; GPRIDX-NEXT: s_movrels_b32 s0, s4 75; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 76; GPRIDX-NEXT: ; return to shader part epilog 77; 78; MOVREL-LABEL: dyn_extract_v8f32_const_s_s: 79; MOVREL: ; %bb.0: ; %entry 80; MOVREL-NEXT: s_mov_b32 s4, 1.0 81; MOVREL-NEXT: s_mov_b32 m0, s2 82; MOVREL-NEXT: s_mov_b32 s11, 0x41000000 83; MOVREL-NEXT: s_mov_b32 s10, 0x40e00000 84; MOVREL-NEXT: s_mov_b32 s9, 0x40c00000 85; MOVREL-NEXT: s_mov_b32 s8, 0x40a00000 86; MOVREL-NEXT: s_mov_b32 s7, 4.0 87; MOVREL-NEXT: s_mov_b32 s6, 0x40400000 88; MOVREL-NEXT: s_mov_b32 s5, 2.0 89; MOVREL-NEXT: s_movrels_b32 s0, s4 90; MOVREL-NEXT: v_mov_b32_e32 v0, s0 91; MOVREL-NEXT: ; return to shader part epilog 92entry: 93 %ext = extractelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, i32 %sel 94 ret float %ext 95} 96 97define amdgpu_ps float @dyn_extract_v8f32_s_v(<8 x float> inreg %vec, i32 %sel) { 98; GPRIDX-LABEL: dyn_extract_v8f32_s_v: 99; GPRIDX: ; %bb.0: ; %entry 100; GPRIDX-NEXT: s_mov_b32 s0, s2 101; GPRIDX-NEXT: s_mov_b32 s1, s3 102; GPRIDX-NEXT: s_mov_b32 s2, s4 103; GPRIDX-NEXT: s_mov_b32 s3, s5 104; GPRIDX-NEXT: s_mov_b32 s4, s6 105; GPRIDX-NEXT: s_mov_b32 s5, s7 106; GPRIDX-NEXT: s_mov_b32 s6, s8 107; GPRIDX-NEXT: s_mov_b32 s7, s9 108; GPRIDX-NEXT: s_mov_b64 s[8:9], exec 109; GPRIDX-NEXT: BB2_1: ; =>This Inner Loop Header: Depth=1 110; GPRIDX-NEXT: v_readfirstlane_b32 s10, v0 111; GPRIDX-NEXT: s_mov_b32 m0, s10 112; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s10, v0 113; GPRIDX-NEXT: s_movrels_b32 s10, s0 114; GPRIDX-NEXT: v_mov_b32_e32 v1, s10 115; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 116; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 117; GPRIDX-NEXT: s_cbranch_execnz BB2_1 118; GPRIDX-NEXT: ; %bb.2: 119; GPRIDX-NEXT: s_mov_b64 exec, s[8:9] 120; GPRIDX-NEXT: v_mov_b32_e32 v0, v1 121; GPRIDX-NEXT: ; return to shader part epilog 122; 123; MOVREL-LABEL: dyn_extract_v8f32_s_v: 124; MOVREL: ; %bb.0: ; %entry 125; MOVREL-NEXT: s_mov_b32 s0, s2 126; MOVREL-NEXT: s_mov_b32 s1, s3 127; MOVREL-NEXT: s_mov_b32 s2, s4 128; MOVREL-NEXT: s_mov_b32 s3, s5 129; MOVREL-NEXT: s_mov_b32 s4, s6 130; MOVREL-NEXT: s_mov_b32 s5, s7 131; MOVREL-NEXT: s_mov_b32 s6, s8 132; MOVREL-NEXT: s_mov_b32 s7, s9 133; MOVREL-NEXT: s_mov_b64 s[8:9], exec 134; MOVREL-NEXT: BB2_1: ; =>This Inner Loop Header: Depth=1 135; MOVREL-NEXT: v_readfirstlane_b32 s10, v0 136; MOVREL-NEXT: s_mov_b32 m0, s10 137; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s10, v0 138; MOVREL-NEXT: s_movrels_b32 s10, s0 139; MOVREL-NEXT: v_mov_b32_e32 v1, s10 140; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 141; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 142; MOVREL-NEXT: s_cbranch_execnz BB2_1 143; MOVREL-NEXT: ; %bb.2: 144; MOVREL-NEXT: s_mov_b64 exec, s[8:9] 145; MOVREL-NEXT: v_mov_b32_e32 v0, v1 146; MOVREL-NEXT: ; return to shader part epilog 147entry: 148 %ext = extractelement <8 x float> %vec, i32 %sel 149 ret float %ext 150} 151 152define float @dyn_extract_v8f32_v_v(<8 x float> %vec, i32 %sel) { 153; GPRIDX-LABEL: dyn_extract_v8f32_v_v: 154; GPRIDX: ; %bb.0: ; %entry 155; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 156; GPRIDX-NEXT: s_mov_b64 s[4:5], exec 157; GPRIDX-NEXT: BB3_1: ; =>This Inner Loop Header: Depth=1 158; GPRIDX-NEXT: v_readfirstlane_b32 s6, v8 159; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s6, v8 160; GPRIDX-NEXT: s_set_gpr_idx_on s6, gpr_idx(SRC0) 161; GPRIDX-NEXT: v_mov_b32_e32 v9, v0 162; GPRIDX-NEXT: s_set_gpr_idx_off 163; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 164; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 165; GPRIDX-NEXT: s_cbranch_execnz BB3_1 166; GPRIDX-NEXT: ; %bb.2: 167; GPRIDX-NEXT: s_mov_b64 exec, s[4:5] 168; GPRIDX-NEXT: v_mov_b32_e32 v0, v9 169; GPRIDX-NEXT: s_setpc_b64 s[30:31] 170; 171; MOVREL-LABEL: dyn_extract_v8f32_v_v: 172; MOVREL: ; %bb.0: ; %entry 173; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 174; MOVREL-NEXT: s_mov_b64 s[4:5], exec 175; MOVREL-NEXT: BB3_1: ; =>This Inner Loop Header: Depth=1 176; MOVREL-NEXT: v_readfirstlane_b32 s6, v8 177; MOVREL-NEXT: s_mov_b32 m0, s6 178; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s6, v8 179; MOVREL-NEXT: v_movrels_b32_e32 v9, v0 180; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 181; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 182; MOVREL-NEXT: s_cbranch_execnz BB3_1 183; MOVREL-NEXT: ; %bb.2: 184; MOVREL-NEXT: s_mov_b64 exec, s[4:5] 185; MOVREL-NEXT: v_mov_b32_e32 v0, v9 186; MOVREL-NEXT: s_setpc_b64 s[30:31] 187entry: 188 %ext = extractelement <8 x float> %vec, i32 %sel 189 ret float %ext 190} 191 192define amdgpu_ps float @dyn_extract_v8f32_v_s(<8 x float> %vec, i32 inreg %sel) { 193; GPRIDX-LABEL: dyn_extract_v8f32_v_s: 194; GPRIDX: ; %bb.0: ; %entry 195; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0) 196; GPRIDX-NEXT: v_mov_b32_e32 v0, v0 197; GPRIDX-NEXT: s_set_gpr_idx_off 198; GPRIDX-NEXT: ; return to shader part epilog 199; 200; MOVREL-LABEL: dyn_extract_v8f32_v_s: 201; MOVREL: ; %bb.0: ; %entry 202; MOVREL-NEXT: s_mov_b32 m0, s2 203; MOVREL-NEXT: v_movrels_b32_e32 v0, v0 204; MOVREL-NEXT: ; return to shader part epilog 205entry: 206 %ext = extractelement <8 x float> %vec, i32 %sel 207 ret float %ext 208} 209 210define amdgpu_ps float @dyn_extract_v8f32_s_s(<8 x float> inreg %vec, i32 inreg %sel) { 211; GPRIDX-LABEL: dyn_extract_v8f32_s_s: 212; GPRIDX: ; %bb.0: ; %entry 213; GPRIDX-NEXT: s_mov_b32 s0, s2 214; GPRIDX-NEXT: s_mov_b32 m0, s10 215; GPRIDX-NEXT: s_mov_b32 s1, s3 216; GPRIDX-NEXT: s_mov_b32 s2, s4 217; GPRIDX-NEXT: s_mov_b32 s3, s5 218; GPRIDX-NEXT: s_mov_b32 s4, s6 219; GPRIDX-NEXT: s_mov_b32 s5, s7 220; GPRIDX-NEXT: s_mov_b32 s6, s8 221; GPRIDX-NEXT: s_mov_b32 s7, s9 222; GPRIDX-NEXT: s_movrels_b32 s0, s0 223; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 224; GPRIDX-NEXT: ; return to shader part epilog 225; 226; MOVREL-LABEL: dyn_extract_v8f32_s_s: 227; MOVREL: ; %bb.0: ; %entry 228; MOVREL-NEXT: s_mov_b32 s0, s2 229; MOVREL-NEXT: s_mov_b32 m0, s10 230; MOVREL-NEXT: s_mov_b32 s1, s3 231; MOVREL-NEXT: s_mov_b32 s2, s4 232; MOVREL-NEXT: s_mov_b32 s3, s5 233; MOVREL-NEXT: s_mov_b32 s4, s6 234; MOVREL-NEXT: s_mov_b32 s5, s7 235; MOVREL-NEXT: s_mov_b32 s6, s8 236; MOVREL-NEXT: s_mov_b32 s7, s9 237; MOVREL-NEXT: s_movrels_b32 s0, s0 238; MOVREL-NEXT: v_mov_b32_e32 v0, s0 239; MOVREL-NEXT: ; return to shader part epilog 240entry: 241 %ext = extractelement <8 x float> %vec, i32 %sel 242 ret float %ext 243} 244 245define i64 @dyn_extract_v8i64_const_s_v(i32 %sel) { 246; GPRIDX-LABEL: dyn_extract_v8i64_const_s_v: 247; GPRIDX: ; %bb.0: ; %entry 248; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 249; GPRIDX-NEXT: s_mov_b64 s[18:19], 8 250; GPRIDX-NEXT: s_mov_b64 s[16:17], 7 251; GPRIDX-NEXT: s_mov_b64 s[14:15], 6 252; GPRIDX-NEXT: s_mov_b64 s[12:13], 5 253; GPRIDX-NEXT: s_mov_b64 s[10:11], 4 254; GPRIDX-NEXT: s_mov_b64 s[8:9], 3 255; GPRIDX-NEXT: s_mov_b64 s[6:7], 2 256; GPRIDX-NEXT: s_mov_b64 s[4:5], 1 257; GPRIDX-NEXT: s_mov_b64 s[20:21], exec 258; GPRIDX-NEXT: BB6_1: ; =>This Inner Loop Header: Depth=1 259; GPRIDX-NEXT: v_readfirstlane_b32 s22, v0 260; GPRIDX-NEXT: s_lshl_b32 m0, s22, 1 261; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s22, v0 262; GPRIDX-NEXT: s_movrels_b32 s22, s4 263; GPRIDX-NEXT: s_movrels_b32 s23, s5 264; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 265; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 266; GPRIDX-NEXT: s_cbranch_execnz BB6_1 267; GPRIDX-NEXT: ; %bb.2: 268; GPRIDX-NEXT: s_mov_b64 exec, s[20:21] 269; GPRIDX-NEXT: v_mov_b32_e32 v0, s22 270; GPRIDX-NEXT: v_mov_b32_e32 v1, s23 271; GPRIDX-NEXT: s_setpc_b64 s[30:31] 272; 273; MOVREL-LABEL: dyn_extract_v8i64_const_s_v: 274; MOVREL: ; %bb.0: ; %entry 275; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 276; MOVREL-NEXT: s_mov_b64 s[18:19], 8 277; MOVREL-NEXT: s_mov_b64 s[16:17], 7 278; MOVREL-NEXT: s_mov_b64 s[14:15], 6 279; MOVREL-NEXT: s_mov_b64 s[12:13], 5 280; MOVREL-NEXT: s_mov_b64 s[10:11], 4 281; MOVREL-NEXT: s_mov_b64 s[8:9], 3 282; MOVREL-NEXT: s_mov_b64 s[6:7], 2 283; MOVREL-NEXT: s_mov_b64 s[4:5], 1 284; MOVREL-NEXT: s_mov_b64 s[20:21], exec 285; MOVREL-NEXT: BB6_1: ; =>This Inner Loop Header: Depth=1 286; MOVREL-NEXT: v_readfirstlane_b32 s22, v0 287; MOVREL-NEXT: s_lshl_b32 m0, s22, 1 288; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s22, v0 289; MOVREL-NEXT: s_movrels_b32 s22, s4 290; MOVREL-NEXT: s_movrels_b32 s23, s5 291; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 292; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 293; MOVREL-NEXT: s_cbranch_execnz BB6_1 294; MOVREL-NEXT: ; %bb.2: 295; MOVREL-NEXT: s_mov_b64 exec, s[20:21] 296; MOVREL-NEXT: v_mov_b32_e32 v0, s22 297; MOVREL-NEXT: v_mov_b32_e32 v1, s23 298; MOVREL-NEXT: s_setpc_b64 s[30:31] 299entry: 300 %ext = extractelement <8 x i64> <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8>, i32 %sel 301 ret i64 %ext 302} 303 304define amdgpu_ps void @dyn_extract_v8i64_const_s_s(i32 inreg %sel) { 305; GPRIDX-LABEL: dyn_extract_v8i64_const_s_s: 306; GPRIDX: ; %bb.0: ; %entry 307; GPRIDX-NEXT: s_mov_b64 s[4:5], 1 308; GPRIDX-NEXT: s_mov_b32 m0, s2 309; GPRIDX-NEXT: s_mov_b64 s[18:19], 8 310; GPRIDX-NEXT: s_mov_b64 s[16:17], 7 311; GPRIDX-NEXT: s_mov_b64 s[14:15], 6 312; GPRIDX-NEXT: s_mov_b64 s[12:13], 5 313; GPRIDX-NEXT: s_mov_b64 s[10:11], 4 314; GPRIDX-NEXT: s_mov_b64 s[8:9], 3 315; GPRIDX-NEXT: s_mov_b64 s[6:7], 2 316; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[4:5] 317; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 318; GPRIDX-NEXT: v_mov_b32_e32 v1, s1 319; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off 320; GPRIDX-NEXT: s_endpgm 321; 322; MOVREL-LABEL: dyn_extract_v8i64_const_s_s: 323; MOVREL: ; %bb.0: ; %entry 324; MOVREL-NEXT: s_mov_b64 s[4:5], 1 325; MOVREL-NEXT: s_mov_b32 m0, s2 326; MOVREL-NEXT: s_mov_b64 s[18:19], 8 327; MOVREL-NEXT: s_mov_b64 s[16:17], 7 328; MOVREL-NEXT: s_mov_b64 s[14:15], 6 329; MOVREL-NEXT: s_mov_b64 s[12:13], 5 330; MOVREL-NEXT: s_mov_b64 s[10:11], 4 331; MOVREL-NEXT: s_mov_b64 s[8:9], 3 332; MOVREL-NEXT: s_mov_b64 s[6:7], 2 333; MOVREL-NEXT: s_movrels_b64 s[0:1], s[4:5] 334; MOVREL-NEXT: v_mov_b32_e32 v0, s0 335; MOVREL-NEXT: v_mov_b32_e32 v1, s1 336; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1] 337; MOVREL-NEXT: s_endpgm 338entry: 339 %ext = extractelement <8 x i64> <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8>, i32 %sel 340 store i64 %ext, i64 addrspace(1)* undef 341 ret void 342} 343 344define amdgpu_ps void @dyn_extract_v8i64_s_v(<8 x i64> inreg %vec, i32 %sel) { 345; GPRIDX-LABEL: dyn_extract_v8i64_s_v: 346; GPRIDX: ; %bb.0: ; %entry 347; GPRIDX-NEXT: s_mov_b32 s0, s2 348; GPRIDX-NEXT: s_mov_b32 s1, s3 349; GPRIDX-NEXT: s_mov_b32 s2, s4 350; GPRIDX-NEXT: s_mov_b32 s3, s5 351; GPRIDX-NEXT: s_mov_b32 s4, s6 352; GPRIDX-NEXT: s_mov_b32 s5, s7 353; GPRIDX-NEXT: s_mov_b32 s6, s8 354; GPRIDX-NEXT: s_mov_b32 s7, s9 355; GPRIDX-NEXT: s_mov_b32 s8, s10 356; GPRIDX-NEXT: s_mov_b32 s9, s11 357; GPRIDX-NEXT: s_mov_b32 s10, s12 358; GPRIDX-NEXT: s_mov_b32 s11, s13 359; GPRIDX-NEXT: s_mov_b32 s12, s14 360; GPRIDX-NEXT: s_mov_b32 s13, s15 361; GPRIDX-NEXT: s_mov_b32 s14, s16 362; GPRIDX-NEXT: s_mov_b32 s15, s17 363; GPRIDX-NEXT: s_mov_b64 s[16:17], exec 364; GPRIDX-NEXT: BB8_1: ; =>This Inner Loop Header: Depth=1 365; GPRIDX-NEXT: v_readfirstlane_b32 s18, v0 366; GPRIDX-NEXT: s_lshl_b32 m0, s18, 1 367; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s18, v0 368; GPRIDX-NEXT: s_movrels_b32 s18, s0 369; GPRIDX-NEXT: s_movrels_b32 s19, s1 370; GPRIDX-NEXT: v_mov_b32_e32 v1, s18 371; GPRIDX-NEXT: v_mov_b32_e32 v2, s19 372; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 373; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 374; GPRIDX-NEXT: s_cbranch_execnz BB8_1 375; GPRIDX-NEXT: ; %bb.2: 376; GPRIDX-NEXT: s_mov_b64 exec, s[16:17] 377; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[1:2], off 378; GPRIDX-NEXT: s_endpgm 379; 380; MOVREL-LABEL: dyn_extract_v8i64_s_v: 381; MOVREL: ; %bb.0: ; %entry 382; MOVREL-NEXT: s_mov_b32 s0, s2 383; MOVREL-NEXT: s_mov_b32 s1, s3 384; MOVREL-NEXT: s_mov_b32 s2, s4 385; MOVREL-NEXT: s_mov_b32 s3, s5 386; MOVREL-NEXT: s_mov_b32 s4, s6 387; MOVREL-NEXT: s_mov_b32 s5, s7 388; MOVREL-NEXT: s_mov_b32 s6, s8 389; MOVREL-NEXT: s_mov_b32 s7, s9 390; MOVREL-NEXT: s_mov_b32 s8, s10 391; MOVREL-NEXT: s_mov_b32 s9, s11 392; MOVREL-NEXT: s_mov_b32 s10, s12 393; MOVREL-NEXT: s_mov_b32 s11, s13 394; MOVREL-NEXT: s_mov_b32 s12, s14 395; MOVREL-NEXT: s_mov_b32 s13, s15 396; MOVREL-NEXT: s_mov_b32 s14, s16 397; MOVREL-NEXT: s_mov_b32 s15, s17 398; MOVREL-NEXT: s_mov_b64 s[16:17], exec 399; MOVREL-NEXT: BB8_1: ; =>This Inner Loop Header: Depth=1 400; MOVREL-NEXT: v_readfirstlane_b32 s18, v0 401; MOVREL-NEXT: s_lshl_b32 m0, s18, 1 402; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s18, v0 403; MOVREL-NEXT: s_movrels_b32 s18, s0 404; MOVREL-NEXT: s_movrels_b32 s19, s1 405; MOVREL-NEXT: v_mov_b32_e32 v1, s18 406; MOVREL-NEXT: v_mov_b32_e32 v2, s19 407; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 408; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 409; MOVREL-NEXT: s_cbranch_execnz BB8_1 410; MOVREL-NEXT: ; %bb.2: 411; MOVREL-NEXT: s_mov_b64 exec, s[16:17] 412; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[1:2] 413; MOVREL-NEXT: s_endpgm 414entry: 415 %ext = extractelement <8 x i64> %vec, i32 %sel 416 store i64 %ext, i64 addrspace(1)* undef 417 ret void 418} 419 420define i64 @dyn_extract_v8i64_v_v(<8 x i64> %vec, i32 %sel) { 421; GPRIDX-LABEL: dyn_extract_v8i64_v_v: 422; GPRIDX: ; %bb.0: ; %entry 423; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 424; GPRIDX-NEXT: s_mov_b64 s[4:5], exec 425; GPRIDX-NEXT: BB9_1: ; =>This Inner Loop Header: Depth=1 426; GPRIDX-NEXT: v_readfirstlane_b32 s6, v16 427; GPRIDX-NEXT: s_lshl_b32 s7, s6, 1 428; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s6, v16 429; GPRIDX-NEXT: s_set_gpr_idx_on s7, gpr_idx(SRC0) 430; GPRIDX-NEXT: v_mov_b32_e32 v17, v0 431; GPRIDX-NEXT: v_mov_b32_e32 v18, v1 432; GPRIDX-NEXT: s_set_gpr_idx_off 433; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 434; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 435; GPRIDX-NEXT: s_cbranch_execnz BB9_1 436; GPRIDX-NEXT: ; %bb.2: 437; GPRIDX-NEXT: s_mov_b64 exec, s[4:5] 438; GPRIDX-NEXT: v_mov_b32_e32 v0, v17 439; GPRIDX-NEXT: v_mov_b32_e32 v1, v18 440; GPRIDX-NEXT: s_setpc_b64 s[30:31] 441; 442; MOVREL-LABEL: dyn_extract_v8i64_v_v: 443; MOVREL: ; %bb.0: ; %entry 444; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 445; MOVREL-NEXT: s_mov_b64 s[4:5], exec 446; MOVREL-NEXT: BB9_1: ; =>This Inner Loop Header: Depth=1 447; MOVREL-NEXT: v_readfirstlane_b32 s6, v16 448; MOVREL-NEXT: s_lshl_b32 m0, s6, 1 449; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s6, v16 450; MOVREL-NEXT: v_movrels_b32_e32 v17, v0 451; MOVREL-NEXT: v_movrels_b32_e32 v18, v1 452; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 453; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 454; MOVREL-NEXT: s_cbranch_execnz BB9_1 455; MOVREL-NEXT: ; %bb.2: 456; MOVREL-NEXT: s_mov_b64 exec, s[4:5] 457; MOVREL-NEXT: v_mov_b32_e32 v0, v17 458; MOVREL-NEXT: v_mov_b32_e32 v1, v18 459; MOVREL-NEXT: s_setpc_b64 s[30:31] 460entry: 461 %ext = extractelement <8 x i64> %vec, i32 %sel 462 ret i64 %ext 463} 464 465define amdgpu_ps void @dyn_extract_v8i64_v_s(<8 x i64> %vec, i32 inreg %sel) { 466; GPRIDX-LABEL: dyn_extract_v8i64_v_s: 467; GPRIDX: ; %bb.0: ; %entry 468; GPRIDX-NEXT: s_lshl_b32 s0, s2, 1 469; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0) 470; GPRIDX-NEXT: v_mov_b32_e32 v16, v0 471; GPRIDX-NEXT: v_mov_b32_e32 v17, v1 472; GPRIDX-NEXT: s_set_gpr_idx_off 473; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[16:17], off 474; GPRIDX-NEXT: s_endpgm 475; 476; MOVREL-LABEL: dyn_extract_v8i64_v_s: 477; MOVREL: ; %bb.0: ; %entry 478; MOVREL-NEXT: s_lshl_b32 m0, s2, 1 479; MOVREL-NEXT: v_movrels_b32_e32 v16, v0 480; MOVREL-NEXT: v_movrels_b32_e32 v17, v1 481; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[16:17] 482; MOVREL-NEXT: s_endpgm 483entry: 484 %ext = extractelement <8 x i64> %vec, i32 %sel 485 store i64 %ext, i64 addrspace(1)* undef 486 ret void 487} 488 489define amdgpu_ps void @dyn_extract_v8i64_s_s(<8 x i64> inreg %vec, i32 inreg %sel) { 490; GPRIDX-LABEL: dyn_extract_v8i64_s_s: 491; GPRIDX: ; %bb.0: ; %entry 492; GPRIDX-NEXT: s_mov_b32 s0, s2 493; GPRIDX-NEXT: s_mov_b32 s1, s3 494; GPRIDX-NEXT: s_mov_b32 m0, s18 495; GPRIDX-NEXT: s_mov_b32 s2, s4 496; GPRIDX-NEXT: s_mov_b32 s3, s5 497; GPRIDX-NEXT: s_mov_b32 s4, s6 498; GPRIDX-NEXT: s_mov_b32 s5, s7 499; GPRIDX-NEXT: s_mov_b32 s6, s8 500; GPRIDX-NEXT: s_mov_b32 s7, s9 501; GPRIDX-NEXT: s_mov_b32 s8, s10 502; GPRIDX-NEXT: s_mov_b32 s9, s11 503; GPRIDX-NEXT: s_mov_b32 s10, s12 504; GPRIDX-NEXT: s_mov_b32 s11, s13 505; GPRIDX-NEXT: s_mov_b32 s12, s14 506; GPRIDX-NEXT: s_mov_b32 s13, s15 507; GPRIDX-NEXT: s_mov_b32 s14, s16 508; GPRIDX-NEXT: s_mov_b32 s15, s17 509; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[0:1] 510; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 511; GPRIDX-NEXT: v_mov_b32_e32 v1, s1 512; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off 513; GPRIDX-NEXT: s_endpgm 514; 515; MOVREL-LABEL: dyn_extract_v8i64_s_s: 516; MOVREL: ; %bb.0: ; %entry 517; MOVREL-NEXT: s_mov_b32 s0, s2 518; MOVREL-NEXT: s_mov_b32 s1, s3 519; MOVREL-NEXT: s_mov_b32 m0, s18 520; MOVREL-NEXT: s_mov_b32 s2, s4 521; MOVREL-NEXT: s_mov_b32 s3, s5 522; MOVREL-NEXT: s_mov_b32 s4, s6 523; MOVREL-NEXT: s_mov_b32 s5, s7 524; MOVREL-NEXT: s_mov_b32 s6, s8 525; MOVREL-NEXT: s_mov_b32 s7, s9 526; MOVREL-NEXT: s_mov_b32 s8, s10 527; MOVREL-NEXT: s_mov_b32 s9, s11 528; MOVREL-NEXT: s_mov_b32 s10, s12 529; MOVREL-NEXT: s_mov_b32 s11, s13 530; MOVREL-NEXT: s_mov_b32 s12, s14 531; MOVREL-NEXT: s_mov_b32 s13, s15 532; MOVREL-NEXT: s_mov_b32 s14, s16 533; MOVREL-NEXT: s_mov_b32 s15, s17 534; MOVREL-NEXT: s_movrels_b64 s[0:1], s[0:1] 535; MOVREL-NEXT: v_mov_b32_e32 v0, s0 536; MOVREL-NEXT: v_mov_b32_e32 v1, s1 537; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1] 538; MOVREL-NEXT: s_endpgm 539entry: 540 %ext = extractelement <8 x i64> %vec, i32 %sel 541 store i64 %ext, i64 addrspace(1)* undef 542 ret void 543} 544 545define amdgpu_ps float @dyn_extract_v8f32_s_s_offset3(<8 x float> inreg %vec, i32 inreg %sel) { 546; GPRIDX-LABEL: dyn_extract_v8f32_s_s_offset3: 547; GPRIDX: ; %bb.0: ; %entry 548; GPRIDX-NEXT: s_mov_b32 s0, s2 549; GPRIDX-NEXT: s_mov_b32 s1, s3 550; GPRIDX-NEXT: s_mov_b32 s3, s5 551; GPRIDX-NEXT: s_mov_b32 m0, s10 552; GPRIDX-NEXT: s_mov_b32 s2, s4 553; GPRIDX-NEXT: s_mov_b32 s4, s6 554; GPRIDX-NEXT: s_mov_b32 s5, s7 555; GPRIDX-NEXT: s_mov_b32 s6, s8 556; GPRIDX-NEXT: s_mov_b32 s7, s9 557; GPRIDX-NEXT: s_movrels_b32 s0, s3 558; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 559; GPRIDX-NEXT: ; return to shader part epilog 560; 561; MOVREL-LABEL: dyn_extract_v8f32_s_s_offset3: 562; MOVREL: ; %bb.0: ; %entry 563; MOVREL-NEXT: s_mov_b32 s0, s2 564; MOVREL-NEXT: s_mov_b32 s1, s3 565; MOVREL-NEXT: s_mov_b32 s3, s5 566; MOVREL-NEXT: s_mov_b32 m0, s10 567; MOVREL-NEXT: s_mov_b32 s2, s4 568; MOVREL-NEXT: s_mov_b32 s4, s6 569; MOVREL-NEXT: s_mov_b32 s5, s7 570; MOVREL-NEXT: s_mov_b32 s6, s8 571; MOVREL-NEXT: s_mov_b32 s7, s9 572; MOVREL-NEXT: s_movrels_b32 s0, s3 573; MOVREL-NEXT: v_mov_b32_e32 v0, s0 574; MOVREL-NEXT: ; return to shader part epilog 575entry: 576 %add = add i32 %sel, 3 577 %ext = extractelement <8 x float> %vec, i32 %add 578 ret float %ext 579} 580 581define float @dyn_extract_v8f32_v_v_offset3(<8 x float> %vec, i32 %sel) { 582; GPRIDX-LABEL: dyn_extract_v8f32_v_v_offset3: 583; GPRIDX: ; %bb.0: ; %entry 584; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 585; GPRIDX-NEXT: s_mov_b64 s[4:5], exec 586; GPRIDX-NEXT: BB13_1: ; =>This Inner Loop Header: Depth=1 587; GPRIDX-NEXT: v_readfirstlane_b32 s6, v8 588; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s6, v8 589; GPRIDX-NEXT: s_set_gpr_idx_on s6, gpr_idx(SRC0) 590; GPRIDX-NEXT: v_mov_b32_e32 v9, v3 591; GPRIDX-NEXT: s_set_gpr_idx_off 592; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 593; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 594; GPRIDX-NEXT: s_cbranch_execnz BB13_1 595; GPRIDX-NEXT: ; %bb.2: 596; GPRIDX-NEXT: s_mov_b64 exec, s[4:5] 597; GPRIDX-NEXT: v_mov_b32_e32 v0, v9 598; GPRIDX-NEXT: s_setpc_b64 s[30:31] 599; 600; MOVREL-LABEL: dyn_extract_v8f32_v_v_offset3: 601; MOVREL: ; %bb.0: ; %entry 602; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 603; MOVREL-NEXT: s_mov_b64 s[4:5], exec 604; MOVREL-NEXT: BB13_1: ; =>This Inner Loop Header: Depth=1 605; MOVREL-NEXT: v_readfirstlane_b32 s6, v8 606; MOVREL-NEXT: s_mov_b32 m0, s6 607; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s6, v8 608; MOVREL-NEXT: v_movrels_b32_e32 v9, v3 609; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 610; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 611; MOVREL-NEXT: s_cbranch_execnz BB13_1 612; MOVREL-NEXT: ; %bb.2: 613; MOVREL-NEXT: s_mov_b64 exec, s[4:5] 614; MOVREL-NEXT: v_mov_b32_e32 v0, v9 615; MOVREL-NEXT: s_setpc_b64 s[30:31] 616entry: 617 %add = add i32 %sel, 3 618 %ext = extractelement <8 x float> %vec, i32 %add 619 ret float %ext 620} 621 622define amdgpu_ps double @dyn_extract_v8f64_s_s_offset1(<8 x double> inreg %vec, i32 inreg %sel) { 623; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset1: 624; GPRIDX: ; %bb.0: ; %entry 625; GPRIDX-NEXT: s_mov_b32 s0, s2 626; GPRIDX-NEXT: s_mov_b32 s1, s3 627; GPRIDX-NEXT: s_mov_b32 s2, s4 628; GPRIDX-NEXT: s_mov_b32 s3, s5 629; GPRIDX-NEXT: s_mov_b32 m0, s18 630; GPRIDX-NEXT: s_mov_b32 s4, s6 631; GPRIDX-NEXT: s_mov_b32 s5, s7 632; GPRIDX-NEXT: s_mov_b32 s6, s8 633; GPRIDX-NEXT: s_mov_b32 s7, s9 634; GPRIDX-NEXT: s_mov_b32 s8, s10 635; GPRIDX-NEXT: s_mov_b32 s9, s11 636; GPRIDX-NEXT: s_mov_b32 s10, s12 637; GPRIDX-NEXT: s_mov_b32 s11, s13 638; GPRIDX-NEXT: s_mov_b32 s12, s14 639; GPRIDX-NEXT: s_mov_b32 s13, s15 640; GPRIDX-NEXT: s_mov_b32 s14, s16 641; GPRIDX-NEXT: s_mov_b32 s15, s17 642; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[2:3] 643; GPRIDX-NEXT: ; return to shader part epilog 644; 645; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset1: 646; MOVREL: ; %bb.0: ; %entry 647; MOVREL-NEXT: s_mov_b32 s0, s2 648; MOVREL-NEXT: s_mov_b32 s1, s3 649; MOVREL-NEXT: s_mov_b32 s2, s4 650; MOVREL-NEXT: s_mov_b32 s3, s5 651; MOVREL-NEXT: s_mov_b32 m0, s18 652; MOVREL-NEXT: s_mov_b32 s4, s6 653; MOVREL-NEXT: s_mov_b32 s5, s7 654; MOVREL-NEXT: s_mov_b32 s6, s8 655; MOVREL-NEXT: s_mov_b32 s7, s9 656; MOVREL-NEXT: s_mov_b32 s8, s10 657; MOVREL-NEXT: s_mov_b32 s9, s11 658; MOVREL-NEXT: s_mov_b32 s10, s12 659; MOVREL-NEXT: s_mov_b32 s11, s13 660; MOVREL-NEXT: s_mov_b32 s12, s14 661; MOVREL-NEXT: s_mov_b32 s13, s15 662; MOVREL-NEXT: s_mov_b32 s14, s16 663; MOVREL-NEXT: s_mov_b32 s15, s17 664; MOVREL-NEXT: s_movrels_b64 s[0:1], s[2:3] 665; MOVREL-NEXT: ; return to shader part epilog 666entry: 667 %add = add i32 %sel, 1 668 %ext = extractelement <8 x double> %vec, i32 %add 669 ret double %ext 670} 671 672define amdgpu_ps double @dyn_extract_v8f64_s_s_offset2(<8 x double> inreg %vec, i32 inreg %sel) { 673; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset2: 674; GPRIDX: ; %bb.0: ; %entry 675; GPRIDX-NEXT: s_mov_b32 s0, s2 676; GPRIDX-NEXT: s_mov_b32 s1, s3 677; GPRIDX-NEXT: s_mov_b32 s2, s4 678; GPRIDX-NEXT: s_mov_b32 s3, s5 679; GPRIDX-NEXT: s_mov_b32 s4, s6 680; GPRIDX-NEXT: s_mov_b32 s5, s7 681; GPRIDX-NEXT: s_mov_b32 m0, s18 682; GPRIDX-NEXT: s_mov_b32 s6, s8 683; GPRIDX-NEXT: s_mov_b32 s7, s9 684; GPRIDX-NEXT: s_mov_b32 s8, s10 685; GPRIDX-NEXT: s_mov_b32 s9, s11 686; GPRIDX-NEXT: s_mov_b32 s10, s12 687; GPRIDX-NEXT: s_mov_b32 s11, s13 688; GPRIDX-NEXT: s_mov_b32 s12, s14 689; GPRIDX-NEXT: s_mov_b32 s13, s15 690; GPRIDX-NEXT: s_mov_b32 s14, s16 691; GPRIDX-NEXT: s_mov_b32 s15, s17 692; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[4:5] 693; GPRIDX-NEXT: ; return to shader part epilog 694; 695; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset2: 696; MOVREL: ; %bb.0: ; %entry 697; MOVREL-NEXT: s_mov_b32 s0, s2 698; MOVREL-NEXT: s_mov_b32 s1, s3 699; MOVREL-NEXT: s_mov_b32 s2, s4 700; MOVREL-NEXT: s_mov_b32 s3, s5 701; MOVREL-NEXT: s_mov_b32 s4, s6 702; MOVREL-NEXT: s_mov_b32 s5, s7 703; MOVREL-NEXT: s_mov_b32 m0, s18 704; MOVREL-NEXT: s_mov_b32 s6, s8 705; MOVREL-NEXT: s_mov_b32 s7, s9 706; MOVREL-NEXT: s_mov_b32 s8, s10 707; MOVREL-NEXT: s_mov_b32 s9, s11 708; MOVREL-NEXT: s_mov_b32 s10, s12 709; MOVREL-NEXT: s_mov_b32 s11, s13 710; MOVREL-NEXT: s_mov_b32 s12, s14 711; MOVREL-NEXT: s_mov_b32 s13, s15 712; MOVREL-NEXT: s_mov_b32 s14, s16 713; MOVREL-NEXT: s_mov_b32 s15, s17 714; MOVREL-NEXT: s_movrels_b64 s[0:1], s[4:5] 715; MOVREL-NEXT: ; return to shader part epilog 716entry: 717 %add = add i32 %sel, 2 718 %ext = extractelement <8 x double> %vec, i32 %add 719 ret double %ext 720} 721 722define amdgpu_ps double @dyn_extract_v8f64_s_s_offset3(<8 x double> inreg %vec, i32 inreg %sel) { 723; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset3: 724; GPRIDX: ; %bb.0: ; %entry 725; GPRIDX-NEXT: s_mov_b32 s0, s2 726; GPRIDX-NEXT: s_mov_b32 s1, s3 727; GPRIDX-NEXT: s_mov_b32 s2, s4 728; GPRIDX-NEXT: s_mov_b32 s3, s5 729; GPRIDX-NEXT: s_mov_b32 s4, s6 730; GPRIDX-NEXT: s_mov_b32 s5, s7 731; GPRIDX-NEXT: s_mov_b32 s6, s8 732; GPRIDX-NEXT: s_mov_b32 s7, s9 733; GPRIDX-NEXT: s_mov_b32 m0, s18 734; GPRIDX-NEXT: s_mov_b32 s8, s10 735; GPRIDX-NEXT: s_mov_b32 s9, s11 736; GPRIDX-NEXT: s_mov_b32 s10, s12 737; GPRIDX-NEXT: s_mov_b32 s11, s13 738; GPRIDX-NEXT: s_mov_b32 s12, s14 739; GPRIDX-NEXT: s_mov_b32 s13, s15 740; GPRIDX-NEXT: s_mov_b32 s14, s16 741; GPRIDX-NEXT: s_mov_b32 s15, s17 742; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[6:7] 743; GPRIDX-NEXT: ; return to shader part epilog 744; 745; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset3: 746; MOVREL: ; %bb.0: ; %entry 747; MOVREL-NEXT: s_mov_b32 s0, s2 748; MOVREL-NEXT: s_mov_b32 s1, s3 749; MOVREL-NEXT: s_mov_b32 s2, s4 750; MOVREL-NEXT: s_mov_b32 s3, s5 751; MOVREL-NEXT: s_mov_b32 s4, s6 752; MOVREL-NEXT: s_mov_b32 s5, s7 753; MOVREL-NEXT: s_mov_b32 s6, s8 754; MOVREL-NEXT: s_mov_b32 s7, s9 755; MOVREL-NEXT: s_mov_b32 m0, s18 756; MOVREL-NEXT: s_mov_b32 s8, s10 757; MOVREL-NEXT: s_mov_b32 s9, s11 758; MOVREL-NEXT: s_mov_b32 s10, s12 759; MOVREL-NEXT: s_mov_b32 s11, s13 760; MOVREL-NEXT: s_mov_b32 s12, s14 761; MOVREL-NEXT: s_mov_b32 s13, s15 762; MOVREL-NEXT: s_mov_b32 s14, s16 763; MOVREL-NEXT: s_mov_b32 s15, s17 764; MOVREL-NEXT: s_movrels_b64 s[0:1], s[6:7] 765; MOVREL-NEXT: ; return to shader part epilog 766entry: 767 %add = add i32 %sel, 3 768 %ext = extractelement <8 x double> %vec, i32 %add 769 ret double %ext 770} 771 772define amdgpu_ps double @dyn_extract_v8f64_s_s_offset4(<8 x double> inreg %vec, i32 inreg %sel) { 773; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset4: 774; GPRIDX: ; %bb.0: ; %entry 775; GPRIDX-NEXT: s_mov_b32 s0, s2 776; GPRIDX-NEXT: s_mov_b32 s1, s3 777; GPRIDX-NEXT: s_mov_b32 s2, s4 778; GPRIDX-NEXT: s_mov_b32 s3, s5 779; GPRIDX-NEXT: s_mov_b32 s4, s6 780; GPRIDX-NEXT: s_mov_b32 s5, s7 781; GPRIDX-NEXT: s_mov_b32 s6, s8 782; GPRIDX-NEXT: s_mov_b32 s7, s9 783; GPRIDX-NEXT: s_mov_b32 s8, s10 784; GPRIDX-NEXT: s_mov_b32 s9, s11 785; GPRIDX-NEXT: s_mov_b32 m0, s18 786; GPRIDX-NEXT: s_mov_b32 s10, s12 787; GPRIDX-NEXT: s_mov_b32 s11, s13 788; GPRIDX-NEXT: s_mov_b32 s12, s14 789; GPRIDX-NEXT: s_mov_b32 s13, s15 790; GPRIDX-NEXT: s_mov_b32 s14, s16 791; GPRIDX-NEXT: s_mov_b32 s15, s17 792; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[8:9] 793; GPRIDX-NEXT: ; return to shader part epilog 794; 795; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset4: 796; MOVREL: ; %bb.0: ; %entry 797; MOVREL-NEXT: s_mov_b32 s0, s2 798; MOVREL-NEXT: s_mov_b32 s1, s3 799; MOVREL-NEXT: s_mov_b32 s2, s4 800; MOVREL-NEXT: s_mov_b32 s3, s5 801; MOVREL-NEXT: s_mov_b32 s4, s6 802; MOVREL-NEXT: s_mov_b32 s5, s7 803; MOVREL-NEXT: s_mov_b32 s6, s8 804; MOVREL-NEXT: s_mov_b32 s7, s9 805; MOVREL-NEXT: s_mov_b32 s8, s10 806; MOVREL-NEXT: s_mov_b32 s9, s11 807; MOVREL-NEXT: s_mov_b32 m0, s18 808; MOVREL-NEXT: s_mov_b32 s10, s12 809; MOVREL-NEXT: s_mov_b32 s11, s13 810; MOVREL-NEXT: s_mov_b32 s12, s14 811; MOVREL-NEXT: s_mov_b32 s13, s15 812; MOVREL-NEXT: s_mov_b32 s14, s16 813; MOVREL-NEXT: s_mov_b32 s15, s17 814; MOVREL-NEXT: s_movrels_b64 s[0:1], s[8:9] 815; MOVREL-NEXT: ; return to shader part epilog 816entry: 817 %add = add i32 %sel, 4 818 %ext = extractelement <8 x double> %vec, i32 %add 819 ret double %ext 820} 821 822define amdgpu_ps double @dyn_extract_v8f64_s_s_offset5(<8 x double> inreg %vec, i32 inreg %sel) { 823; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset5: 824; GPRIDX: ; %bb.0: ; %entry 825; GPRIDX-NEXT: s_mov_b32 s0, s2 826; GPRIDX-NEXT: s_mov_b32 s1, s3 827; GPRIDX-NEXT: s_mov_b32 s2, s4 828; GPRIDX-NEXT: s_mov_b32 s3, s5 829; GPRIDX-NEXT: s_mov_b32 s4, s6 830; GPRIDX-NEXT: s_mov_b32 s5, s7 831; GPRIDX-NEXT: s_mov_b32 s6, s8 832; GPRIDX-NEXT: s_mov_b32 s7, s9 833; GPRIDX-NEXT: s_mov_b32 s8, s10 834; GPRIDX-NEXT: s_mov_b32 s9, s11 835; GPRIDX-NEXT: s_mov_b32 s10, s12 836; GPRIDX-NEXT: s_mov_b32 s11, s13 837; GPRIDX-NEXT: s_mov_b32 m0, s18 838; GPRIDX-NEXT: s_mov_b32 s12, s14 839; GPRIDX-NEXT: s_mov_b32 s13, s15 840; GPRIDX-NEXT: s_mov_b32 s14, s16 841; GPRIDX-NEXT: s_mov_b32 s15, s17 842; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[10:11] 843; GPRIDX-NEXT: ; return to shader part epilog 844; 845; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset5: 846; MOVREL: ; %bb.0: ; %entry 847; MOVREL-NEXT: s_mov_b32 s0, s2 848; MOVREL-NEXT: s_mov_b32 s1, s3 849; MOVREL-NEXT: s_mov_b32 s2, s4 850; MOVREL-NEXT: s_mov_b32 s3, s5 851; MOVREL-NEXT: s_mov_b32 s4, s6 852; MOVREL-NEXT: s_mov_b32 s5, s7 853; MOVREL-NEXT: s_mov_b32 s6, s8 854; MOVREL-NEXT: s_mov_b32 s7, s9 855; MOVREL-NEXT: s_mov_b32 s8, s10 856; MOVREL-NEXT: s_mov_b32 s9, s11 857; MOVREL-NEXT: s_mov_b32 s10, s12 858; MOVREL-NEXT: s_mov_b32 s11, s13 859; MOVREL-NEXT: s_mov_b32 m0, s18 860; MOVREL-NEXT: s_mov_b32 s12, s14 861; MOVREL-NEXT: s_mov_b32 s13, s15 862; MOVREL-NEXT: s_mov_b32 s14, s16 863; MOVREL-NEXT: s_mov_b32 s15, s17 864; MOVREL-NEXT: s_movrels_b64 s[0:1], s[10:11] 865; MOVREL-NEXT: ; return to shader part epilog 866entry: 867 %add = add i32 %sel, 5 868 %ext = extractelement <8 x double> %vec, i32 %add 869 ret double %ext 870} 871 872define amdgpu_ps double @dyn_extract_v8f64_s_s_offset6(<8 x double> inreg %vec, i32 inreg %sel) { 873; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset6: 874; GPRIDX: ; %bb.0: ; %entry 875; GPRIDX-NEXT: s_mov_b32 s0, s2 876; GPRIDX-NEXT: s_mov_b32 s1, s3 877; GPRIDX-NEXT: s_mov_b32 s2, s4 878; GPRIDX-NEXT: s_mov_b32 s3, s5 879; GPRIDX-NEXT: s_mov_b32 s4, s6 880; GPRIDX-NEXT: s_mov_b32 s5, s7 881; GPRIDX-NEXT: s_mov_b32 s6, s8 882; GPRIDX-NEXT: s_mov_b32 s7, s9 883; GPRIDX-NEXT: s_mov_b32 s8, s10 884; GPRIDX-NEXT: s_mov_b32 s9, s11 885; GPRIDX-NEXT: s_mov_b32 s10, s12 886; GPRIDX-NEXT: s_mov_b32 s11, s13 887; GPRIDX-NEXT: s_mov_b32 s12, s14 888; GPRIDX-NEXT: s_mov_b32 s13, s15 889; GPRIDX-NEXT: s_mov_b32 m0, s18 890; GPRIDX-NEXT: s_mov_b32 s14, s16 891; GPRIDX-NEXT: s_mov_b32 s15, s17 892; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[12:13] 893; GPRIDX-NEXT: ; return to shader part epilog 894; 895; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset6: 896; MOVREL: ; %bb.0: ; %entry 897; MOVREL-NEXT: s_mov_b32 s0, s2 898; MOVREL-NEXT: s_mov_b32 s1, s3 899; MOVREL-NEXT: s_mov_b32 s2, s4 900; MOVREL-NEXT: s_mov_b32 s3, s5 901; MOVREL-NEXT: s_mov_b32 s4, s6 902; MOVREL-NEXT: s_mov_b32 s5, s7 903; MOVREL-NEXT: s_mov_b32 s6, s8 904; MOVREL-NEXT: s_mov_b32 s7, s9 905; MOVREL-NEXT: s_mov_b32 s8, s10 906; MOVREL-NEXT: s_mov_b32 s9, s11 907; MOVREL-NEXT: s_mov_b32 s10, s12 908; MOVREL-NEXT: s_mov_b32 s11, s13 909; MOVREL-NEXT: s_mov_b32 s12, s14 910; MOVREL-NEXT: s_mov_b32 s13, s15 911; MOVREL-NEXT: s_mov_b32 m0, s18 912; MOVREL-NEXT: s_mov_b32 s14, s16 913; MOVREL-NEXT: s_mov_b32 s15, s17 914; MOVREL-NEXT: s_movrels_b64 s[0:1], s[12:13] 915; MOVREL-NEXT: ; return to shader part epilog 916entry: 917 %add = add i32 %sel, 6 918 %ext = extractelement <8 x double> %vec, i32 %add 919 ret double %ext 920} 921 922define amdgpu_ps double @dyn_extract_v8f64_s_s_offset7(<8 x double> inreg %vec, i32 inreg %sel) { 923; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset7: 924; GPRIDX: ; %bb.0: ; %entry 925; GPRIDX-NEXT: s_mov_b32 s0, s2 926; GPRIDX-NEXT: s_mov_b32 s1, s3 927; GPRIDX-NEXT: s_mov_b32 s2, s4 928; GPRIDX-NEXT: s_mov_b32 s3, s5 929; GPRIDX-NEXT: s_mov_b32 s4, s6 930; GPRIDX-NEXT: s_mov_b32 s5, s7 931; GPRIDX-NEXT: s_mov_b32 s6, s8 932; GPRIDX-NEXT: s_mov_b32 s7, s9 933; GPRIDX-NEXT: s_mov_b32 s8, s10 934; GPRIDX-NEXT: s_mov_b32 s9, s11 935; GPRIDX-NEXT: s_mov_b32 s10, s12 936; GPRIDX-NEXT: s_mov_b32 s11, s13 937; GPRIDX-NEXT: s_mov_b32 s12, s14 938; GPRIDX-NEXT: s_mov_b32 s13, s15 939; GPRIDX-NEXT: s_mov_b32 s14, s16 940; GPRIDX-NEXT: s_mov_b32 s15, s17 941; GPRIDX-NEXT: s_mov_b32 m0, s18 942; GPRIDX-NEXT: s_nop 0 943; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[14:15] 944; GPRIDX-NEXT: ; return to shader part epilog 945; 946; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset7: 947; MOVREL: ; %bb.0: ; %entry 948; MOVREL-NEXT: s_mov_b32 s0, s2 949; MOVREL-NEXT: s_mov_b32 s1, s3 950; MOVREL-NEXT: s_mov_b32 s2, s4 951; MOVREL-NEXT: s_mov_b32 s3, s5 952; MOVREL-NEXT: s_mov_b32 s4, s6 953; MOVREL-NEXT: s_mov_b32 s5, s7 954; MOVREL-NEXT: s_mov_b32 s6, s8 955; MOVREL-NEXT: s_mov_b32 s7, s9 956; MOVREL-NEXT: s_mov_b32 s8, s10 957; MOVREL-NEXT: s_mov_b32 s9, s11 958; MOVREL-NEXT: s_mov_b32 s10, s12 959; MOVREL-NEXT: s_mov_b32 s11, s13 960; MOVREL-NEXT: s_mov_b32 s12, s14 961; MOVREL-NEXT: s_mov_b32 s13, s15 962; MOVREL-NEXT: s_mov_b32 s14, s16 963; MOVREL-NEXT: s_mov_b32 s15, s17 964; MOVREL-NEXT: s_mov_b32 m0, s18 965; MOVREL-NEXT: s_movrels_b64 s[0:1], s[14:15] 966; MOVREL-NEXT: ; return to shader part epilog 967entry: 968 %add = add i32 %sel, 7 969 %ext = extractelement <8 x double> %vec, i32 %add 970 ret double %ext 971} 972 973define amdgpu_ps double @dyn_extract_v8f64_s_s_offsetm1(<8 x double> inreg %vec, i32 inreg %sel) { 974; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offsetm1: 975; GPRIDX: ; %bb.0: ; %entry 976; GPRIDX-NEXT: s_mov_b32 s0, s2 977; GPRIDX-NEXT: s_mov_b32 s1, s3 978; GPRIDX-NEXT: s_add_i32 m0, s18, -1 979; GPRIDX-NEXT: s_mov_b32 s2, s4 980; GPRIDX-NEXT: s_mov_b32 s3, s5 981; GPRIDX-NEXT: s_mov_b32 s4, s6 982; GPRIDX-NEXT: s_mov_b32 s5, s7 983; GPRIDX-NEXT: s_mov_b32 s6, s8 984; GPRIDX-NEXT: s_mov_b32 s7, s9 985; GPRIDX-NEXT: s_mov_b32 s8, s10 986; GPRIDX-NEXT: s_mov_b32 s9, s11 987; GPRIDX-NEXT: s_mov_b32 s10, s12 988; GPRIDX-NEXT: s_mov_b32 s11, s13 989; GPRIDX-NEXT: s_mov_b32 s12, s14 990; GPRIDX-NEXT: s_mov_b32 s13, s15 991; GPRIDX-NEXT: s_mov_b32 s14, s16 992; GPRIDX-NEXT: s_mov_b32 s15, s17 993; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[0:1] 994; GPRIDX-NEXT: ; return to shader part epilog 995; 996; MOVREL-LABEL: dyn_extract_v8f64_s_s_offsetm1: 997; MOVREL: ; %bb.0: ; %entry 998; MOVREL-NEXT: s_mov_b32 s0, s2 999; MOVREL-NEXT: s_mov_b32 s1, s3 1000; MOVREL-NEXT: s_add_i32 m0, s18, -1 1001; MOVREL-NEXT: s_mov_b32 s2, s4 1002; MOVREL-NEXT: s_mov_b32 s3, s5 1003; MOVREL-NEXT: s_mov_b32 s4, s6 1004; MOVREL-NEXT: s_mov_b32 s5, s7 1005; MOVREL-NEXT: s_mov_b32 s6, s8 1006; MOVREL-NEXT: s_mov_b32 s7, s9 1007; MOVREL-NEXT: s_mov_b32 s8, s10 1008; MOVREL-NEXT: s_mov_b32 s9, s11 1009; MOVREL-NEXT: s_mov_b32 s10, s12 1010; MOVREL-NEXT: s_mov_b32 s11, s13 1011; MOVREL-NEXT: s_mov_b32 s12, s14 1012; MOVREL-NEXT: s_mov_b32 s13, s15 1013; MOVREL-NEXT: s_mov_b32 s14, s16 1014; MOVREL-NEXT: s_mov_b32 s15, s17 1015; MOVREL-NEXT: s_movrels_b64 s[0:1], s[0:1] 1016; MOVREL-NEXT: ; return to shader part epilog 1017entry: 1018 %add = add i32 %sel, -1 1019 %ext = extractelement <8 x double> %vec, i32 %add 1020 ret double %ext 1021} 1022 1023define double @dyn_extract_v8f64_v_v_offset3(<8 x double> %vec, i32 %sel) { 1024; GPRIDX-LABEL: dyn_extract_v8f64_v_v_offset3: 1025; GPRIDX: ; %bb.0: ; %entry 1026; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1027; GPRIDX-NEXT: s_mov_b64 s[4:5], exec 1028; GPRIDX-NEXT: BB22_1: ; =>This Inner Loop Header: Depth=1 1029; GPRIDX-NEXT: v_readfirstlane_b32 s6, v16 1030; GPRIDX-NEXT: s_add_i32 s7, s6, 3 1031; GPRIDX-NEXT: s_lshl_b32 s7, s7, 1 1032; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s6, v16 1033; GPRIDX-NEXT: s_set_gpr_idx_on s7, gpr_idx(SRC0) 1034; GPRIDX-NEXT: v_mov_b32_e32 v17, v0 1035; GPRIDX-NEXT: v_mov_b32_e32 v18, v1 1036; GPRIDX-NEXT: s_set_gpr_idx_off 1037; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 1038; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 1039; GPRIDX-NEXT: s_cbranch_execnz BB22_1 1040; GPRIDX-NEXT: ; %bb.2: 1041; GPRIDX-NEXT: s_mov_b64 exec, s[4:5] 1042; GPRIDX-NEXT: v_mov_b32_e32 v0, v17 1043; GPRIDX-NEXT: v_mov_b32_e32 v1, v18 1044; GPRIDX-NEXT: s_setpc_b64 s[30:31] 1045; 1046; MOVREL-LABEL: dyn_extract_v8f64_v_v_offset3: 1047; MOVREL: ; %bb.0: ; %entry 1048; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1049; MOVREL-NEXT: s_mov_b64 s[4:5], exec 1050; MOVREL-NEXT: BB22_1: ; =>This Inner Loop Header: Depth=1 1051; MOVREL-NEXT: v_readfirstlane_b32 s6, v16 1052; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s6, v16 1053; MOVREL-NEXT: s_add_i32 s6, s6, 3 1054; MOVREL-NEXT: s_lshl_b32 m0, s6, 1 1055; MOVREL-NEXT: v_movrels_b32_e32 v17, v0 1056; MOVREL-NEXT: v_movrels_b32_e32 v18, v1 1057; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 1058; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 1059; MOVREL-NEXT: s_cbranch_execnz BB22_1 1060; MOVREL-NEXT: ; %bb.2: 1061; MOVREL-NEXT: s_mov_b64 exec, s[4:5] 1062; MOVREL-NEXT: v_mov_b32_e32 v0, v17 1063; MOVREL-NEXT: v_mov_b32_e32 v1, v18 1064; MOVREL-NEXT: s_setpc_b64 s[30:31] 1065entry: 1066 %add = add i32 %sel, 3 1067 %ext = extractelement <8 x double> %vec, i32 %add 1068 ret double %ext 1069} 1070 1071define i8 addrspace(3)* @dyn_extract_v8p3_v_v(<8 x i8 addrspace(3)*> %vec, i32 %idx) { 1072; GPRIDX-LABEL: dyn_extract_v8p3_v_v: 1073; GPRIDX: ; %bb.0: ; %entry 1074; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1075; GPRIDX-NEXT: s_mov_b64 s[4:5], exec 1076; GPRIDX-NEXT: BB23_1: ; =>This Inner Loop Header: Depth=1 1077; GPRIDX-NEXT: v_readfirstlane_b32 s6, v8 1078; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s6, v8 1079; GPRIDX-NEXT: s_set_gpr_idx_on s6, gpr_idx(SRC0) 1080; GPRIDX-NEXT: v_mov_b32_e32 v9, v0 1081; GPRIDX-NEXT: s_set_gpr_idx_off 1082; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 1083; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 1084; GPRIDX-NEXT: s_cbranch_execnz BB23_1 1085; GPRIDX-NEXT: ; %bb.2: 1086; GPRIDX-NEXT: s_mov_b64 exec, s[4:5] 1087; GPRIDX-NEXT: v_mov_b32_e32 v0, v9 1088; GPRIDX-NEXT: s_setpc_b64 s[30:31] 1089; 1090; MOVREL-LABEL: dyn_extract_v8p3_v_v: 1091; MOVREL: ; %bb.0: ; %entry 1092; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1093; MOVREL-NEXT: s_mov_b64 s[4:5], exec 1094; MOVREL-NEXT: BB23_1: ; =>This Inner Loop Header: Depth=1 1095; MOVREL-NEXT: v_readfirstlane_b32 s6, v8 1096; MOVREL-NEXT: s_mov_b32 m0, s6 1097; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s6, v8 1098; MOVREL-NEXT: v_movrels_b32_e32 v9, v0 1099; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 1100; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 1101; MOVREL-NEXT: s_cbranch_execnz BB23_1 1102; MOVREL-NEXT: ; %bb.2: 1103; MOVREL-NEXT: s_mov_b64 exec, s[4:5] 1104; MOVREL-NEXT: v_mov_b32_e32 v0, v9 1105; MOVREL-NEXT: s_setpc_b64 s[30:31] 1106entry: 1107 %ext = extractelement <8 x i8 addrspace(3)*> %vec, i32 %idx 1108 ret i8 addrspace(3)* %ext 1109} 1110 1111define amdgpu_ps void @dyn_extract_v8p3_s_s(<8 x i8 addrspace(3)*> inreg %vec, i32 inreg %idx) { 1112; GPRIDX-LABEL: dyn_extract_v8p3_s_s: 1113; GPRIDX: ; %bb.0: ; %entry 1114; GPRIDX-NEXT: s_mov_b32 s0, s2 1115; GPRIDX-NEXT: s_mov_b32 m0, s10 1116; GPRIDX-NEXT: s_mov_b32 s1, s3 1117; GPRIDX-NEXT: s_mov_b32 s2, s4 1118; GPRIDX-NEXT: s_mov_b32 s3, s5 1119; GPRIDX-NEXT: s_mov_b32 s4, s6 1120; GPRIDX-NEXT: s_mov_b32 s5, s7 1121; GPRIDX-NEXT: s_mov_b32 s6, s8 1122; GPRIDX-NEXT: s_mov_b32 s7, s9 1123; GPRIDX-NEXT: s_movrels_b32 s0, s0 1124; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 1125; GPRIDX-NEXT: ds_write_b32 v0, v0 1126; GPRIDX-NEXT: s_endpgm 1127; 1128; MOVREL-LABEL: dyn_extract_v8p3_s_s: 1129; MOVREL: ; %bb.0: ; %entry 1130; MOVREL-NEXT: s_mov_b32 s0, s2 1131; MOVREL-NEXT: s_mov_b32 m0, s10 1132; MOVREL-NEXT: s_mov_b32 s1, s3 1133; MOVREL-NEXT: s_mov_b32 s2, s4 1134; MOVREL-NEXT: s_mov_b32 s3, s5 1135; MOVREL-NEXT: s_mov_b32 s4, s6 1136; MOVREL-NEXT: s_mov_b32 s5, s7 1137; MOVREL-NEXT: s_mov_b32 s6, s8 1138; MOVREL-NEXT: s_mov_b32 s7, s9 1139; MOVREL-NEXT: s_movrels_b32 s0, s0 1140; MOVREL-NEXT: v_mov_b32_e32 v0, s0 1141; MOVREL-NEXT: s_mov_b32 m0, -1 1142; MOVREL-NEXT: ds_write_b32 v0, v0 1143; MOVREL-NEXT: s_endpgm 1144entry: 1145 %ext = extractelement <8 x i8 addrspace(3)*> %vec, i32 %idx 1146 store i8 addrspace(3)* %ext, i8 addrspace(3)* addrspace(3)* undef 1147 ret void 1148} 1149 1150define i8 addrspace(1)* @dyn_extract_v8p1_v_v(<8 x i8 addrspace(1)*> %vec, i32 %idx) { 1151; GPRIDX-LABEL: dyn_extract_v8p1_v_v: 1152; GPRIDX: ; %bb.0: ; %entry 1153; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1154; GPRIDX-NEXT: s_mov_b64 s[4:5], exec 1155; GPRIDX-NEXT: BB25_1: ; =>This Inner Loop Header: Depth=1 1156; GPRIDX-NEXT: v_readfirstlane_b32 s6, v16 1157; GPRIDX-NEXT: s_lshl_b32 s7, s6, 1 1158; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, s6, v16 1159; GPRIDX-NEXT: s_set_gpr_idx_on s7, gpr_idx(SRC0) 1160; GPRIDX-NEXT: v_mov_b32_e32 v17, v0 1161; GPRIDX-NEXT: v_mov_b32_e32 v18, v1 1162; GPRIDX-NEXT: s_set_gpr_idx_off 1163; GPRIDX-NEXT: s_and_saveexec_b64 vcc, vcc 1164; GPRIDX-NEXT: s_xor_b64 exec, exec, vcc 1165; GPRIDX-NEXT: s_cbranch_execnz BB25_1 1166; GPRIDX-NEXT: ; %bb.2: 1167; GPRIDX-NEXT: s_mov_b64 exec, s[4:5] 1168; GPRIDX-NEXT: v_mov_b32_e32 v0, v17 1169; GPRIDX-NEXT: v_mov_b32_e32 v1, v18 1170; GPRIDX-NEXT: s_setpc_b64 s[30:31] 1171; 1172; MOVREL-LABEL: dyn_extract_v8p1_v_v: 1173; MOVREL: ; %bb.0: ; %entry 1174; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1175; MOVREL-NEXT: s_mov_b64 s[4:5], exec 1176; MOVREL-NEXT: BB25_1: ; =>This Inner Loop Header: Depth=1 1177; MOVREL-NEXT: v_readfirstlane_b32 s6, v16 1178; MOVREL-NEXT: s_lshl_b32 m0, s6, 1 1179; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, s6, v16 1180; MOVREL-NEXT: v_movrels_b32_e32 v17, v0 1181; MOVREL-NEXT: v_movrels_b32_e32 v18, v1 1182; MOVREL-NEXT: s_and_saveexec_b64 vcc, vcc 1183; MOVREL-NEXT: s_xor_b64 exec, exec, vcc 1184; MOVREL-NEXT: s_cbranch_execnz BB25_1 1185; MOVREL-NEXT: ; %bb.2: 1186; MOVREL-NEXT: s_mov_b64 exec, s[4:5] 1187; MOVREL-NEXT: v_mov_b32_e32 v0, v17 1188; MOVREL-NEXT: v_mov_b32_e32 v1, v18 1189; MOVREL-NEXT: s_setpc_b64 s[30:31] 1190entry: 1191 %ext = extractelement <8 x i8 addrspace(1)*> %vec, i32 %idx 1192 ret i8 addrspace(1)* %ext 1193} 1194 1195define amdgpu_ps void @dyn_extract_v8p1_s_s(<8 x i8 addrspace(1)*> inreg %vec, i32 inreg %idx) { 1196; GPRIDX-LABEL: dyn_extract_v8p1_s_s: 1197; GPRIDX: ; %bb.0: ; %entry 1198; GPRIDX-NEXT: s_mov_b32 s0, s2 1199; GPRIDX-NEXT: s_mov_b32 s1, s3 1200; GPRIDX-NEXT: s_mov_b32 m0, s18 1201; GPRIDX-NEXT: s_mov_b32 s2, s4 1202; GPRIDX-NEXT: s_mov_b32 s3, s5 1203; GPRIDX-NEXT: s_mov_b32 s4, s6 1204; GPRIDX-NEXT: s_mov_b32 s5, s7 1205; GPRIDX-NEXT: s_mov_b32 s6, s8 1206; GPRIDX-NEXT: s_mov_b32 s7, s9 1207; GPRIDX-NEXT: s_mov_b32 s8, s10 1208; GPRIDX-NEXT: s_mov_b32 s9, s11 1209; GPRIDX-NEXT: s_mov_b32 s10, s12 1210; GPRIDX-NEXT: s_mov_b32 s11, s13 1211; GPRIDX-NEXT: s_mov_b32 s12, s14 1212; GPRIDX-NEXT: s_mov_b32 s13, s15 1213; GPRIDX-NEXT: s_mov_b32 s14, s16 1214; GPRIDX-NEXT: s_mov_b32 s15, s17 1215; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[0:1] 1216; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 1217; GPRIDX-NEXT: v_mov_b32_e32 v1, s1 1218; GPRIDX-NEXT: global_store_dwordx2 v[0:1], v[0:1], off 1219; GPRIDX-NEXT: s_endpgm 1220; 1221; MOVREL-LABEL: dyn_extract_v8p1_s_s: 1222; MOVREL: ; %bb.0: ; %entry 1223; MOVREL-NEXT: s_mov_b32 s0, s2 1224; MOVREL-NEXT: s_mov_b32 s1, s3 1225; MOVREL-NEXT: s_mov_b32 m0, s18 1226; MOVREL-NEXT: s_mov_b32 s2, s4 1227; MOVREL-NEXT: s_mov_b32 s3, s5 1228; MOVREL-NEXT: s_mov_b32 s4, s6 1229; MOVREL-NEXT: s_mov_b32 s5, s7 1230; MOVREL-NEXT: s_mov_b32 s6, s8 1231; MOVREL-NEXT: s_mov_b32 s7, s9 1232; MOVREL-NEXT: s_mov_b32 s8, s10 1233; MOVREL-NEXT: s_mov_b32 s9, s11 1234; MOVREL-NEXT: s_mov_b32 s10, s12 1235; MOVREL-NEXT: s_mov_b32 s11, s13 1236; MOVREL-NEXT: s_mov_b32 s12, s14 1237; MOVREL-NEXT: s_mov_b32 s13, s15 1238; MOVREL-NEXT: s_mov_b32 s14, s16 1239; MOVREL-NEXT: s_mov_b32 s15, s17 1240; MOVREL-NEXT: s_movrels_b64 s[0:1], s[0:1] 1241; MOVREL-NEXT: v_mov_b32_e32 v0, s0 1242; MOVREL-NEXT: v_mov_b32_e32 v1, s1 1243; MOVREL-NEXT: flat_store_dwordx2 v[0:1], v[0:1] 1244; MOVREL-NEXT: s_endpgm 1245entry: 1246 %ext = extractelement <8 x i8 addrspace(1)*> %vec, i32 %idx 1247 store i8 addrspace(1)* %ext, i8 addrspace(1)* addrspace(1)* undef 1248 ret void 1249} 1250 1251define amdgpu_ps float @dyn_extract_v16f32_v_s(<16 x float> %vec, i32 inreg %sel) { 1252; GPRIDX-LABEL: dyn_extract_v16f32_v_s: 1253; GPRIDX: ; %bb.0: ; %entry 1254; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0) 1255; GPRIDX-NEXT: v_mov_b32_e32 v0, v0 1256; GPRIDX-NEXT: s_set_gpr_idx_off 1257; GPRIDX-NEXT: ; return to shader part epilog 1258; 1259; MOVREL-LABEL: dyn_extract_v16f32_v_s: 1260; MOVREL: ; %bb.0: ; %entry 1261; MOVREL-NEXT: s_mov_b32 m0, s2 1262; MOVREL-NEXT: v_movrels_b32_e32 v0, v0 1263; MOVREL-NEXT: ; return to shader part epilog 1264entry: 1265 %ext = extractelement <16 x float> %vec, i32 %sel 1266 ret float %ext 1267} 1268 1269define amdgpu_ps float @dyn_extract_v32f32_v_s(<32 x float> %vec, i32 inreg %sel) { 1270; GPRIDX-LABEL: dyn_extract_v32f32_v_s: 1271; GPRIDX: ; %bb.0: ; %entry 1272; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0) 1273; GPRIDX-NEXT: v_mov_b32_e32 v0, v0 1274; GPRIDX-NEXT: s_set_gpr_idx_off 1275; GPRIDX-NEXT: ; return to shader part epilog 1276; 1277; MOVREL-LABEL: dyn_extract_v32f32_v_s: 1278; MOVREL: ; %bb.0: ; %entry 1279; MOVREL-NEXT: s_mov_b32 m0, s2 1280; MOVREL-NEXT: v_movrels_b32_e32 v0, v0 1281; MOVREL-NEXT: ; return to shader part epilog 1282entry: 1283 %ext = extractelement <32 x float> %vec, i32 %sel 1284 ret float %ext 1285} 1286 1287define amdgpu_ps double @dyn_extract_v16f64_v_s(<16 x double> %vec, i32 inreg %sel) { 1288; GPRIDX-LABEL: dyn_extract_v16f64_v_s: 1289; GPRIDX: ; %bb.0: ; %entry 1290; GPRIDX-NEXT: s_lshl_b32 s0, s2, 1 1291; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0) 1292; GPRIDX-NEXT: v_mov_b32_e32 v32, v0 1293; GPRIDX-NEXT: v_mov_b32_e32 v0, v1 1294; GPRIDX-NEXT: s_set_gpr_idx_off 1295; GPRIDX-NEXT: v_readfirstlane_b32 s0, v32 1296; GPRIDX-NEXT: v_readfirstlane_b32 s1, v0 1297; GPRIDX-NEXT: ; return to shader part epilog 1298; 1299; MOVREL-LABEL: dyn_extract_v16f64_v_s: 1300; MOVREL: ; %bb.0: ; %entry 1301; MOVREL-NEXT: s_lshl_b32 m0, s2, 1 1302; MOVREL-NEXT: v_movrels_b32_e32 v32, v0 1303; MOVREL-NEXT: v_movrels_b32_e32 v0, v1 1304; MOVREL-NEXT: v_readfirstlane_b32 s0, v32 1305; MOVREL-NEXT: v_readfirstlane_b32 s1, v0 1306; MOVREL-NEXT: ; return to shader part epilog 1307entry: 1308 %ext = extractelement <16 x double> %vec, i32 %sel 1309 ret double %ext 1310} 1311 1312define amdgpu_ps float @dyn_extract_v16f32_s_s(i32 inreg %sel) { 1313; GPRIDX-LABEL: dyn_extract_v16f32_s_s: 1314; GPRIDX: ; %bb.0: ; %entry 1315; GPRIDX-NEXT: s_mov_b32 s4, 1.0 1316; GPRIDX-NEXT: s_mov_b32 m0, s2 1317; GPRIDX-NEXT: s_mov_b32 s19, 0x41800000 1318; GPRIDX-NEXT: s_mov_b32 s18, 0x41700000 1319; GPRIDX-NEXT: s_mov_b32 s17, 0x41600000 1320; GPRIDX-NEXT: s_mov_b32 s16, 0x41500000 1321; GPRIDX-NEXT: s_mov_b32 s15, 0x41400000 1322; GPRIDX-NEXT: s_mov_b32 s14, 0x41300000 1323; GPRIDX-NEXT: s_mov_b32 s13, 0x41200000 1324; GPRIDX-NEXT: s_mov_b32 s12, 0x41100000 1325; GPRIDX-NEXT: s_mov_b32 s11, 0x41000000 1326; GPRIDX-NEXT: s_mov_b32 s10, 0x40e00000 1327; GPRIDX-NEXT: s_mov_b32 s9, 0x40c00000 1328; GPRIDX-NEXT: s_mov_b32 s8, 0x40a00000 1329; GPRIDX-NEXT: s_mov_b32 s7, 4.0 1330; GPRIDX-NEXT: s_mov_b32 s6, 0x40400000 1331; GPRIDX-NEXT: s_mov_b32 s5, 2.0 1332; GPRIDX-NEXT: s_movrels_b32 s0, s4 1333; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 1334; GPRIDX-NEXT: ; return to shader part epilog 1335; 1336; MOVREL-LABEL: dyn_extract_v16f32_s_s: 1337; MOVREL: ; %bb.0: ; %entry 1338; MOVREL-NEXT: s_mov_b32 s4, 1.0 1339; MOVREL-NEXT: s_mov_b32 m0, s2 1340; MOVREL-NEXT: s_mov_b32 s19, 0x41800000 1341; MOVREL-NEXT: s_mov_b32 s18, 0x41700000 1342; MOVREL-NEXT: s_mov_b32 s17, 0x41600000 1343; MOVREL-NEXT: s_mov_b32 s16, 0x41500000 1344; MOVREL-NEXT: s_mov_b32 s15, 0x41400000 1345; MOVREL-NEXT: s_mov_b32 s14, 0x41300000 1346; MOVREL-NEXT: s_mov_b32 s13, 0x41200000 1347; MOVREL-NEXT: s_mov_b32 s12, 0x41100000 1348; MOVREL-NEXT: s_mov_b32 s11, 0x41000000 1349; MOVREL-NEXT: s_mov_b32 s10, 0x40e00000 1350; MOVREL-NEXT: s_mov_b32 s9, 0x40c00000 1351; MOVREL-NEXT: s_mov_b32 s8, 0x40a00000 1352; MOVREL-NEXT: s_mov_b32 s7, 4.0 1353; MOVREL-NEXT: s_mov_b32 s6, 0x40400000 1354; MOVREL-NEXT: s_mov_b32 s5, 2.0 1355; MOVREL-NEXT: s_movrels_b32 s0, s4 1356; MOVREL-NEXT: v_mov_b32_e32 v0, s0 1357; MOVREL-NEXT: ; return to shader part epilog 1358entry: 1359 %ext = extractelement <16 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0>, i32 %sel 1360 ret float %ext 1361} 1362 1363define amdgpu_ps float @dyn_extract_v32f32_s_s(i32 inreg %sel) { 1364; GPRIDX-LABEL: dyn_extract_v32f32_s_s: 1365; GPRIDX: ; %bb.0: ; %entry 1366; GPRIDX-NEXT: s_mov_b32 s36, 1.0 1367; GPRIDX-NEXT: s_mov_b32 m0, s2 1368; GPRIDX-NEXT: s_mov_b32 s67, 0x42000000 1369; GPRIDX-NEXT: s_mov_b32 s66, 0x41f80000 1370; GPRIDX-NEXT: s_mov_b32 s65, 0x41f00000 1371; GPRIDX-NEXT: s_mov_b32 s64, 0x41e80000 1372; GPRIDX-NEXT: s_mov_b32 s63, 0x41e00000 1373; GPRIDX-NEXT: s_mov_b32 s62, 0x41d80000 1374; GPRIDX-NEXT: s_mov_b32 s61, 0x41d00000 1375; GPRIDX-NEXT: s_mov_b32 s60, 0x41c80000 1376; GPRIDX-NEXT: s_mov_b32 s59, 0x41c00000 1377; GPRIDX-NEXT: s_mov_b32 s58, 0x41b80000 1378; GPRIDX-NEXT: s_mov_b32 s57, 0x41b00000 1379; GPRIDX-NEXT: s_mov_b32 s56, 0x41a80000 1380; GPRIDX-NEXT: s_mov_b32 s55, 0x41a00000 1381; GPRIDX-NEXT: s_mov_b32 s54, 0x41980000 1382; GPRIDX-NEXT: s_mov_b32 s53, 0x41900000 1383; GPRIDX-NEXT: s_mov_b32 s52, 0x41880000 1384; GPRIDX-NEXT: s_mov_b32 s51, 0x41800000 1385; GPRIDX-NEXT: s_mov_b32 s50, 0x41700000 1386; GPRIDX-NEXT: s_mov_b32 s49, 0x41600000 1387; GPRIDX-NEXT: s_mov_b32 s48, 0x41500000 1388; GPRIDX-NEXT: s_mov_b32 s47, 0x41400000 1389; GPRIDX-NEXT: s_mov_b32 s46, 0x41300000 1390; GPRIDX-NEXT: s_mov_b32 s45, 0x41200000 1391; GPRIDX-NEXT: s_mov_b32 s44, 0x41100000 1392; GPRIDX-NEXT: s_mov_b32 s43, 0x41000000 1393; GPRIDX-NEXT: s_mov_b32 s42, 0x40e00000 1394; GPRIDX-NEXT: s_mov_b32 s41, 0x40c00000 1395; GPRIDX-NEXT: s_mov_b32 s40, 0x40a00000 1396; GPRIDX-NEXT: s_mov_b32 s39, 4.0 1397; GPRIDX-NEXT: s_mov_b32 s38, 0x40400000 1398; GPRIDX-NEXT: s_mov_b32 s37, 2.0 1399; GPRIDX-NEXT: s_movrels_b32 s0, s36 1400; GPRIDX-NEXT: v_mov_b32_e32 v0, s0 1401; GPRIDX-NEXT: ; return to shader part epilog 1402; 1403; MOVREL-LABEL: dyn_extract_v32f32_s_s: 1404; MOVREL: ; %bb.0: ; %entry 1405; MOVREL-NEXT: s_mov_b32 s36, 1.0 1406; MOVREL-NEXT: s_mov_b32 m0, s2 1407; MOVREL-NEXT: s_mov_b32 s67, 0x42000000 1408; MOVREL-NEXT: s_mov_b32 s66, 0x41f80000 1409; MOVREL-NEXT: s_mov_b32 s65, 0x41f00000 1410; MOVREL-NEXT: s_mov_b32 s64, 0x41e80000 1411; MOVREL-NEXT: s_mov_b32 s63, 0x41e00000 1412; MOVREL-NEXT: s_mov_b32 s62, 0x41d80000 1413; MOVREL-NEXT: s_mov_b32 s61, 0x41d00000 1414; MOVREL-NEXT: s_mov_b32 s60, 0x41c80000 1415; MOVREL-NEXT: s_mov_b32 s59, 0x41c00000 1416; MOVREL-NEXT: s_mov_b32 s58, 0x41b80000 1417; MOVREL-NEXT: s_mov_b32 s57, 0x41b00000 1418; MOVREL-NEXT: s_mov_b32 s56, 0x41a80000 1419; MOVREL-NEXT: s_mov_b32 s55, 0x41a00000 1420; MOVREL-NEXT: s_mov_b32 s54, 0x41980000 1421; MOVREL-NEXT: s_mov_b32 s53, 0x41900000 1422; MOVREL-NEXT: s_mov_b32 s52, 0x41880000 1423; MOVREL-NEXT: s_mov_b32 s51, 0x41800000 1424; MOVREL-NEXT: s_mov_b32 s50, 0x41700000 1425; MOVREL-NEXT: s_mov_b32 s49, 0x41600000 1426; MOVREL-NEXT: s_mov_b32 s48, 0x41500000 1427; MOVREL-NEXT: s_mov_b32 s47, 0x41400000 1428; MOVREL-NEXT: s_mov_b32 s46, 0x41300000 1429; MOVREL-NEXT: s_mov_b32 s45, 0x41200000 1430; MOVREL-NEXT: s_mov_b32 s44, 0x41100000 1431; MOVREL-NEXT: s_mov_b32 s43, 0x41000000 1432; MOVREL-NEXT: s_mov_b32 s42, 0x40e00000 1433; MOVREL-NEXT: s_mov_b32 s41, 0x40c00000 1434; MOVREL-NEXT: s_mov_b32 s40, 0x40a00000 1435; MOVREL-NEXT: s_mov_b32 s39, 4.0 1436; MOVREL-NEXT: s_mov_b32 s38, 0x40400000 1437; MOVREL-NEXT: s_mov_b32 s37, 2.0 1438; MOVREL-NEXT: s_movrels_b32 s0, s36 1439; MOVREL-NEXT: v_mov_b32_e32 v0, s0 1440; MOVREL-NEXT: ; return to shader part epilog 1441entry: 1442 %ext = extractelement <32 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0, float 17.0, float 18.0, float 19.0, float 20.0, float 21.0, float 22.0, float 23.0, float 24.0, float 25.0, float 26.0, float 27.0, float 28.0, float 29.0, float 30.0, float 31.0, float 32.0>, i32 %sel 1443 ret float %ext 1444} 1445 1446define amdgpu_ps double @dyn_extract_v16f64_s_s(i32 inreg %sel) { 1447; GPRIDX-LABEL: dyn_extract_v16f64_s_s: 1448; GPRIDX: ; %bb.0: ; %entry 1449; GPRIDX-NEXT: s_mov_b32 s66, 0 1450; GPRIDX-NEXT: s_mov_b64 s[36:37], 1.0 1451; GPRIDX-NEXT: s_mov_b32 m0, s2 1452; GPRIDX-NEXT: s_mov_b32 s67, 0x40300000 1453; GPRIDX-NEXT: s_mov_b32 s65, 0x402e0000 1454; GPRIDX-NEXT: s_mov_b32 s64, s66 1455; GPRIDX-NEXT: s_mov_b32 s63, 0x402c0000 1456; GPRIDX-NEXT: s_mov_b32 s62, s66 1457; GPRIDX-NEXT: s_mov_b32 s61, 0x402a0000 1458; GPRIDX-NEXT: s_mov_b32 s60, s66 1459; GPRIDX-NEXT: s_mov_b32 s59, 0x40280000 1460; GPRIDX-NEXT: s_mov_b32 s58, s66 1461; GPRIDX-NEXT: s_mov_b32 s57, 0x40260000 1462; GPRIDX-NEXT: s_mov_b32 s56, s66 1463; GPRIDX-NEXT: s_mov_b32 s55, 0x40240000 1464; GPRIDX-NEXT: s_mov_b32 s54, s66 1465; GPRIDX-NEXT: s_mov_b32 s53, 0x40220000 1466; GPRIDX-NEXT: s_mov_b32 s52, s66 1467; GPRIDX-NEXT: s_mov_b32 s51, 0x40200000 1468; GPRIDX-NEXT: s_mov_b32 s50, s66 1469; GPRIDX-NEXT: s_mov_b32 s49, 0x401c0000 1470; GPRIDX-NEXT: s_mov_b32 s48, s66 1471; GPRIDX-NEXT: s_mov_b32 s47, 0x40180000 1472; GPRIDX-NEXT: s_mov_b32 s46, s66 1473; GPRIDX-NEXT: s_mov_b32 s45, 0x40140000 1474; GPRIDX-NEXT: s_mov_b32 s44, s66 1475; GPRIDX-NEXT: s_mov_b64 s[42:43], 4.0 1476; GPRIDX-NEXT: s_mov_b32 s41, 0x40080000 1477; GPRIDX-NEXT: s_mov_b32 s40, s66 1478; GPRIDX-NEXT: s_mov_b64 s[38:39], 2.0 1479; GPRIDX-NEXT: s_movrels_b64 s[0:1], s[36:37] 1480; GPRIDX-NEXT: ; return to shader part epilog 1481; 1482; MOVREL-LABEL: dyn_extract_v16f64_s_s: 1483; MOVREL: ; %bb.0: ; %entry 1484; MOVREL-NEXT: s_mov_b32 s66, 0 1485; MOVREL-NEXT: s_mov_b64 s[36:37], 1.0 1486; MOVREL-NEXT: s_mov_b32 m0, s2 1487; MOVREL-NEXT: s_mov_b32 s67, 0x40300000 1488; MOVREL-NEXT: s_mov_b32 s65, 0x402e0000 1489; MOVREL-NEXT: s_mov_b32 s64, s66 1490; MOVREL-NEXT: s_mov_b32 s63, 0x402c0000 1491; MOVREL-NEXT: s_mov_b32 s62, s66 1492; MOVREL-NEXT: s_mov_b32 s61, 0x402a0000 1493; MOVREL-NEXT: s_mov_b32 s60, s66 1494; MOVREL-NEXT: s_mov_b32 s59, 0x40280000 1495; MOVREL-NEXT: s_mov_b32 s58, s66 1496; MOVREL-NEXT: s_mov_b32 s57, 0x40260000 1497; MOVREL-NEXT: s_mov_b32 s56, s66 1498; MOVREL-NEXT: s_mov_b32 s55, 0x40240000 1499; MOVREL-NEXT: s_mov_b32 s54, s66 1500; MOVREL-NEXT: s_mov_b32 s53, 0x40220000 1501; MOVREL-NEXT: s_mov_b32 s52, s66 1502; MOVREL-NEXT: s_mov_b32 s51, 0x40200000 1503; MOVREL-NEXT: s_mov_b32 s50, s66 1504; MOVREL-NEXT: s_mov_b32 s49, 0x401c0000 1505; MOVREL-NEXT: s_mov_b32 s48, s66 1506; MOVREL-NEXT: s_mov_b32 s47, 0x40180000 1507; MOVREL-NEXT: s_mov_b32 s46, s66 1508; MOVREL-NEXT: s_mov_b32 s45, 0x40140000 1509; MOVREL-NEXT: s_mov_b32 s44, s66 1510; MOVREL-NEXT: s_mov_b64 s[42:43], 4.0 1511; MOVREL-NEXT: s_mov_b32 s41, 0x40080000 1512; MOVREL-NEXT: s_mov_b32 s40, s66 1513; MOVREL-NEXT: s_mov_b64 s[38:39], 2.0 1514; MOVREL-NEXT: s_movrels_b64 s[0:1], s[36:37] 1515; MOVREL-NEXT: ; return to shader part epilog 1516entry: 1517 %ext = extractelement <16 x double> <double 1.0, double 2.0, double 3.0, double 4.0, double 5.0, double 6.0, double 7.0, double 8.0, double 9.0, double 10.0, double 11.0, double 12.0, double 13.0, double 14.0, double 15.0, double 16.0>, i32 %sel 1518 ret double %ext 1519} 1520