1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GPRIDX %s
3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=MOVREL %s
4
5define float @dyn_extract_v8f32_const_s_v(i32 %sel) {
6; GPRIDX-LABEL: dyn_extract_v8f32_const_s_v:
7; GPRIDX:       ; %bb.0: ; %entry
8; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9; GPRIDX-NEXT:    s_mov_b32 s4, 1.0
10; GPRIDX-NEXT:    s_mov_b32 s5, 2.0
11; GPRIDX-NEXT:    s_mov_b32 s6, 0x40400000
12; GPRIDX-NEXT:    s_mov_b32 s7, 4.0
13; GPRIDX-NEXT:    s_mov_b32 s8, 0x40a00000
14; GPRIDX-NEXT:    s_mov_b32 s9, 0x40c00000
15; GPRIDX-NEXT:    s_mov_b32 s10, 0x40e00000
16; GPRIDX-NEXT:    s_mov_b32 s11, 0x41000000
17; GPRIDX-NEXT:    s_mov_b64 s[12:13], exec
18; GPRIDX-NEXT:  BB0_1: ; =>This Inner Loop Header: Depth=1
19; GPRIDX-NEXT:    v_readfirstlane_b32 s14, v0
20; GPRIDX-NEXT:    s_mov_b32 m0, s14
21; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s14, v0
22; GPRIDX-NEXT:    s_movrels_b32 s14, s4
23; GPRIDX-NEXT:    v_mov_b32_e32 v1, s14
24; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
25; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
26; GPRIDX-NEXT:    s_cbranch_execnz BB0_1
27; GPRIDX-NEXT:  ; %bb.2:
28; GPRIDX-NEXT:    s_mov_b64 exec, s[12:13]
29; GPRIDX-NEXT:    v_mov_b32_e32 v0, v1
30; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
31;
32; MOVREL-LABEL: dyn_extract_v8f32_const_s_v:
33; MOVREL:       ; %bb.0: ; %entry
34; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
35; MOVREL-NEXT:    s_mov_b32 s4, 1.0
36; MOVREL-NEXT:    s_mov_b32 s5, 2.0
37; MOVREL-NEXT:    s_mov_b32 s6, 0x40400000
38; MOVREL-NEXT:    s_mov_b32 s7, 4.0
39; MOVREL-NEXT:    s_mov_b32 s8, 0x40a00000
40; MOVREL-NEXT:    s_mov_b32 s9, 0x40c00000
41; MOVREL-NEXT:    s_mov_b32 s10, 0x40e00000
42; MOVREL-NEXT:    s_mov_b32 s11, 0x41000000
43; MOVREL-NEXT:    s_mov_b64 s[12:13], exec
44; MOVREL-NEXT:  BB0_1: ; =>This Inner Loop Header: Depth=1
45; MOVREL-NEXT:    v_readfirstlane_b32 s14, v0
46; MOVREL-NEXT:    s_mov_b32 m0, s14
47; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s14, v0
48; MOVREL-NEXT:    s_movrels_b32 s14, s4
49; MOVREL-NEXT:    v_mov_b32_e32 v1, s14
50; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
51; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
52; MOVREL-NEXT:    s_cbranch_execnz BB0_1
53; MOVREL-NEXT:  ; %bb.2:
54; MOVREL-NEXT:    s_mov_b64 exec, s[12:13]
55; MOVREL-NEXT:    v_mov_b32_e32 v0, v1
56; MOVREL-NEXT:    s_setpc_b64 s[30:31]
57entry:
58  %ext = extractelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, i32 %sel
59  ret float %ext
60}
61
62define amdgpu_ps float @dyn_extract_v8f32_const_s_s(i32 inreg %sel) {
63; GPRIDX-LABEL: dyn_extract_v8f32_const_s_s:
64; GPRIDX:       ; %bb.0: ; %entry
65; GPRIDX-NEXT:    s_mov_b32 s4, 1.0
66; GPRIDX-NEXT:    s_mov_b32 m0, s2
67; GPRIDX-NEXT:    s_mov_b32 s5, 2.0
68; GPRIDX-NEXT:    s_mov_b32 s6, 0x40400000
69; GPRIDX-NEXT:    s_mov_b32 s7, 4.0
70; GPRIDX-NEXT:    s_mov_b32 s8, 0x40a00000
71; GPRIDX-NEXT:    s_mov_b32 s9, 0x40c00000
72; GPRIDX-NEXT:    s_mov_b32 s10, 0x40e00000
73; GPRIDX-NEXT:    s_mov_b32 s11, 0x41000000
74; GPRIDX-NEXT:    s_movrels_b32 s0, s4
75; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
76; GPRIDX-NEXT:    ; return to shader part epilog
77;
78; MOVREL-LABEL: dyn_extract_v8f32_const_s_s:
79; MOVREL:       ; %bb.0: ; %entry
80; MOVREL-NEXT:    s_mov_b32 s4, 1.0
81; MOVREL-NEXT:    s_mov_b32 m0, s2
82; MOVREL-NEXT:    s_mov_b32 s5, 2.0
83; MOVREL-NEXT:    s_mov_b32 s6, 0x40400000
84; MOVREL-NEXT:    s_mov_b32 s7, 4.0
85; MOVREL-NEXT:    s_mov_b32 s8, 0x40a00000
86; MOVREL-NEXT:    s_mov_b32 s9, 0x40c00000
87; MOVREL-NEXT:    s_mov_b32 s10, 0x40e00000
88; MOVREL-NEXT:    s_mov_b32 s11, 0x41000000
89; MOVREL-NEXT:    s_movrels_b32 s0, s4
90; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
91; MOVREL-NEXT:    ; return to shader part epilog
92entry:
93  %ext = extractelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, i32 %sel
94  ret float %ext
95}
96
97define amdgpu_ps float @dyn_extract_v8f32_s_v(<8 x float> inreg %vec, i32 %sel) {
98; GPRIDX-LABEL: dyn_extract_v8f32_s_v:
99; GPRIDX:       ; %bb.0: ; %entry
100; GPRIDX-NEXT:    s_mov_b32 s0, s2
101; GPRIDX-NEXT:    s_mov_b32 s1, s3
102; GPRIDX-NEXT:    s_mov_b32 s2, s4
103; GPRIDX-NEXT:    s_mov_b32 s3, s5
104; GPRIDX-NEXT:    s_mov_b32 s4, s6
105; GPRIDX-NEXT:    s_mov_b32 s5, s7
106; GPRIDX-NEXT:    s_mov_b32 s6, s8
107; GPRIDX-NEXT:    s_mov_b32 s7, s9
108; GPRIDX-NEXT:    s_mov_b64 s[8:9], exec
109; GPRIDX-NEXT:  BB2_1: ; =>This Inner Loop Header: Depth=1
110; GPRIDX-NEXT:    v_readfirstlane_b32 s10, v0
111; GPRIDX-NEXT:    s_mov_b32 m0, s10
112; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s10, v0
113; GPRIDX-NEXT:    s_movrels_b32 s10, s0
114; GPRIDX-NEXT:    v_mov_b32_e32 v1, s10
115; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
116; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
117; GPRIDX-NEXT:    s_cbranch_execnz BB2_1
118; GPRIDX-NEXT:  ; %bb.2:
119; GPRIDX-NEXT:    s_mov_b64 exec, s[8:9]
120; GPRIDX-NEXT:    v_mov_b32_e32 v0, v1
121; GPRIDX-NEXT:    ; return to shader part epilog
122;
123; MOVREL-LABEL: dyn_extract_v8f32_s_v:
124; MOVREL:       ; %bb.0: ; %entry
125; MOVREL-NEXT:    s_mov_b32 s0, s2
126; MOVREL-NEXT:    s_mov_b32 s1, s3
127; MOVREL-NEXT:    s_mov_b32 s2, s4
128; MOVREL-NEXT:    s_mov_b32 s3, s5
129; MOVREL-NEXT:    s_mov_b32 s4, s6
130; MOVREL-NEXT:    s_mov_b32 s5, s7
131; MOVREL-NEXT:    s_mov_b32 s6, s8
132; MOVREL-NEXT:    s_mov_b32 s7, s9
133; MOVREL-NEXT:    s_mov_b64 s[8:9], exec
134; MOVREL-NEXT:  BB2_1: ; =>This Inner Loop Header: Depth=1
135; MOVREL-NEXT:    v_readfirstlane_b32 s10, v0
136; MOVREL-NEXT:    s_mov_b32 m0, s10
137; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s10, v0
138; MOVREL-NEXT:    s_movrels_b32 s10, s0
139; MOVREL-NEXT:    v_mov_b32_e32 v1, s10
140; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
141; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
142; MOVREL-NEXT:    s_cbranch_execnz BB2_1
143; MOVREL-NEXT:  ; %bb.2:
144; MOVREL-NEXT:    s_mov_b64 exec, s[8:9]
145; MOVREL-NEXT:    v_mov_b32_e32 v0, v1
146; MOVREL-NEXT:    ; return to shader part epilog
147entry:
148  %ext = extractelement <8 x float> %vec, i32 %sel
149  ret float %ext
150}
151
152define float @dyn_extract_v8f32_v_v(<8 x float> %vec, i32 %sel) {
153; GPRIDX-LABEL: dyn_extract_v8f32_v_v:
154; GPRIDX:       ; %bb.0: ; %entry
155; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
156; GPRIDX-NEXT:    s_mov_b64 s[4:5], exec
157; GPRIDX-NEXT:  BB3_1: ; =>This Inner Loop Header: Depth=1
158; GPRIDX-NEXT:    v_readfirstlane_b32 s6, v8
159; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v8
160; GPRIDX-NEXT:    s_set_gpr_idx_on s6, gpr_idx(SRC0)
161; GPRIDX-NEXT:    v_mov_b32_e32 v9, v0
162; GPRIDX-NEXT:    s_set_gpr_idx_off
163; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
164; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
165; GPRIDX-NEXT:    s_cbranch_execnz BB3_1
166; GPRIDX-NEXT:  ; %bb.2:
167; GPRIDX-NEXT:    s_mov_b64 exec, s[4:5]
168; GPRIDX-NEXT:    v_mov_b32_e32 v0, v9
169; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
170;
171; MOVREL-LABEL: dyn_extract_v8f32_v_v:
172; MOVREL:       ; %bb.0: ; %entry
173; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
174; MOVREL-NEXT:    s_mov_b64 s[4:5], exec
175; MOVREL-NEXT:  BB3_1: ; =>This Inner Loop Header: Depth=1
176; MOVREL-NEXT:    v_readfirstlane_b32 s6, v8
177; MOVREL-NEXT:    s_mov_b32 m0, s6
178; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v8
179; MOVREL-NEXT:    v_movrels_b32_e32 v9, v0
180; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
181; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
182; MOVREL-NEXT:    s_cbranch_execnz BB3_1
183; MOVREL-NEXT:  ; %bb.2:
184; MOVREL-NEXT:    s_mov_b64 exec, s[4:5]
185; MOVREL-NEXT:    v_mov_b32_e32 v0, v9
186; MOVREL-NEXT:    s_setpc_b64 s[30:31]
187entry:
188  %ext = extractelement <8 x float> %vec, i32 %sel
189  ret float %ext
190}
191
192define amdgpu_ps float @dyn_extract_v8f32_v_s(<8 x float> %vec, i32 inreg %sel) {
193; GPRIDX-LABEL: dyn_extract_v8f32_v_s:
194; GPRIDX:       ; %bb.0: ; %entry
195; GPRIDX-NEXT:    s_set_gpr_idx_on s2, gpr_idx(SRC0)
196; GPRIDX-NEXT:    v_mov_b32_e32 v0, v0
197; GPRIDX-NEXT:    s_set_gpr_idx_off
198; GPRIDX-NEXT:    ; return to shader part epilog
199;
200; MOVREL-LABEL: dyn_extract_v8f32_v_s:
201; MOVREL:       ; %bb.0: ; %entry
202; MOVREL-NEXT:    s_mov_b32 m0, s2
203; MOVREL-NEXT:    v_movrels_b32_e32 v0, v0
204; MOVREL-NEXT:    ; return to shader part epilog
205entry:
206  %ext = extractelement <8 x float> %vec, i32 %sel
207  ret float %ext
208}
209
210define amdgpu_ps float @dyn_extract_v8f32_s_s(<8 x float> inreg %vec, i32 inreg %sel) {
211; GPRIDX-LABEL: dyn_extract_v8f32_s_s:
212; GPRIDX:       ; %bb.0: ; %entry
213; GPRIDX-NEXT:    s_mov_b32 s0, s2
214; GPRIDX-NEXT:    s_mov_b32 m0, s10
215; GPRIDX-NEXT:    s_mov_b32 s1, s3
216; GPRIDX-NEXT:    s_mov_b32 s2, s4
217; GPRIDX-NEXT:    s_mov_b32 s3, s5
218; GPRIDX-NEXT:    s_mov_b32 s4, s6
219; GPRIDX-NEXT:    s_mov_b32 s5, s7
220; GPRIDX-NEXT:    s_mov_b32 s6, s8
221; GPRIDX-NEXT:    s_mov_b32 s7, s9
222; GPRIDX-NEXT:    s_movrels_b32 s0, s0
223; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
224; GPRIDX-NEXT:    ; return to shader part epilog
225;
226; MOVREL-LABEL: dyn_extract_v8f32_s_s:
227; MOVREL:       ; %bb.0: ; %entry
228; MOVREL-NEXT:    s_mov_b32 s0, s2
229; MOVREL-NEXT:    s_mov_b32 m0, s10
230; MOVREL-NEXT:    s_mov_b32 s1, s3
231; MOVREL-NEXT:    s_mov_b32 s2, s4
232; MOVREL-NEXT:    s_mov_b32 s3, s5
233; MOVREL-NEXT:    s_mov_b32 s4, s6
234; MOVREL-NEXT:    s_mov_b32 s5, s7
235; MOVREL-NEXT:    s_mov_b32 s6, s8
236; MOVREL-NEXT:    s_mov_b32 s7, s9
237; MOVREL-NEXT:    s_movrels_b32 s0, s0
238; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
239; MOVREL-NEXT:    ; return to shader part epilog
240entry:
241  %ext = extractelement <8 x float> %vec, i32 %sel
242  ret float %ext
243}
244
245define i64 @dyn_extract_v8i64_const_s_v(i32 %sel) {
246; GPRIDX-LABEL: dyn_extract_v8i64_const_s_v:
247; GPRIDX:       ; %bb.0: ; %entry
248; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
249; GPRIDX-NEXT:    s_mov_b64 s[4:5], 1
250; GPRIDX-NEXT:    s_mov_b64 s[6:7], 2
251; GPRIDX-NEXT:    s_mov_b64 s[8:9], 3
252; GPRIDX-NEXT:    s_mov_b64 s[10:11], 4
253; GPRIDX-NEXT:    s_mov_b64 s[12:13], 5
254; GPRIDX-NEXT:    s_mov_b64 s[14:15], 6
255; GPRIDX-NEXT:    s_mov_b64 s[16:17], 7
256; GPRIDX-NEXT:    s_mov_b64 s[18:19], 8
257; GPRIDX-NEXT:    s_mov_b64 s[20:21], exec
258; GPRIDX-NEXT:  BB6_1: ; =>This Inner Loop Header: Depth=1
259; GPRIDX-NEXT:    v_readfirstlane_b32 s22, v0
260; GPRIDX-NEXT:    s_lshl_b32 m0, s22, 1
261; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s22, v0
262; GPRIDX-NEXT:    s_movrels_b32 s22, s4
263; GPRIDX-NEXT:    s_movrels_b32 s23, s5
264; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
265; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
266; GPRIDX-NEXT:    s_cbranch_execnz BB6_1
267; GPRIDX-NEXT:  ; %bb.2:
268; GPRIDX-NEXT:    s_mov_b64 exec, s[20:21]
269; GPRIDX-NEXT:    v_mov_b32_e32 v0, s22
270; GPRIDX-NEXT:    v_mov_b32_e32 v1, s23
271; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
272;
273; MOVREL-LABEL: dyn_extract_v8i64_const_s_v:
274; MOVREL:       ; %bb.0: ; %entry
275; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
276; MOVREL-NEXT:    s_mov_b64 s[4:5], 1
277; MOVREL-NEXT:    s_mov_b64 s[6:7], 2
278; MOVREL-NEXT:    s_mov_b64 s[8:9], 3
279; MOVREL-NEXT:    s_mov_b64 s[10:11], 4
280; MOVREL-NEXT:    s_mov_b64 s[12:13], 5
281; MOVREL-NEXT:    s_mov_b64 s[14:15], 6
282; MOVREL-NEXT:    s_mov_b64 s[16:17], 7
283; MOVREL-NEXT:    s_mov_b64 s[18:19], 8
284; MOVREL-NEXT:    s_mov_b64 s[20:21], exec
285; MOVREL-NEXT:  BB6_1: ; =>This Inner Loop Header: Depth=1
286; MOVREL-NEXT:    v_readfirstlane_b32 s22, v0
287; MOVREL-NEXT:    s_lshl_b32 m0, s22, 1
288; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s22, v0
289; MOVREL-NEXT:    s_movrels_b32 s22, s4
290; MOVREL-NEXT:    s_movrels_b32 s23, s5
291; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
292; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
293; MOVREL-NEXT:    s_cbranch_execnz BB6_1
294; MOVREL-NEXT:  ; %bb.2:
295; MOVREL-NEXT:    s_mov_b64 exec, s[20:21]
296; MOVREL-NEXT:    v_mov_b32_e32 v0, s22
297; MOVREL-NEXT:    v_mov_b32_e32 v1, s23
298; MOVREL-NEXT:    s_setpc_b64 s[30:31]
299entry:
300  %ext = extractelement <8 x i64> <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8>, i32 %sel
301  ret i64 %ext
302}
303
304define amdgpu_ps void @dyn_extract_v8i64_const_s_s(i32 inreg %sel) {
305; GPRIDX-LABEL: dyn_extract_v8i64_const_s_s:
306; GPRIDX:       ; %bb.0: ; %entry
307; GPRIDX-NEXT:    s_mov_b64 s[4:5], 1
308; GPRIDX-NEXT:    s_mov_b32 m0, s2
309; GPRIDX-NEXT:    s_mov_b64 s[6:7], 2
310; GPRIDX-NEXT:    s_mov_b64 s[8:9], 3
311; GPRIDX-NEXT:    s_mov_b64 s[10:11], 4
312; GPRIDX-NEXT:    s_mov_b64 s[12:13], 5
313; GPRIDX-NEXT:    s_mov_b64 s[14:15], 6
314; GPRIDX-NEXT:    s_mov_b64 s[16:17], 7
315; GPRIDX-NEXT:    s_mov_b64 s[18:19], 8
316; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[4:5]
317; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
318; GPRIDX-NEXT:    v_mov_b32_e32 v1, s1
319; GPRIDX-NEXT:    global_store_dwordx2 v[0:1], v[0:1], off
320; GPRIDX-NEXT:    s_endpgm
321;
322; MOVREL-LABEL: dyn_extract_v8i64_const_s_s:
323; MOVREL:       ; %bb.0: ; %entry
324; MOVREL-NEXT:    s_mov_b64 s[4:5], 1
325; MOVREL-NEXT:    s_mov_b32 m0, s2
326; MOVREL-NEXT:    s_mov_b64 s[6:7], 2
327; MOVREL-NEXT:    s_mov_b64 s[8:9], 3
328; MOVREL-NEXT:    s_mov_b64 s[10:11], 4
329; MOVREL-NEXT:    s_mov_b64 s[12:13], 5
330; MOVREL-NEXT:    s_mov_b64 s[14:15], 6
331; MOVREL-NEXT:    s_mov_b64 s[16:17], 7
332; MOVREL-NEXT:    s_mov_b64 s[18:19], 8
333; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[4:5]
334; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
335; MOVREL-NEXT:    v_mov_b32_e32 v1, s1
336; MOVREL-NEXT:    flat_store_dwordx2 v[0:1], v[0:1]
337; MOVREL-NEXT:    s_endpgm
338entry:
339  %ext = extractelement <8 x i64> <i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8>, i32 %sel
340  store i64 %ext, i64 addrspace(1)* undef
341  ret void
342}
343
344define amdgpu_ps void @dyn_extract_v8i64_s_v(<8 x i64> inreg %vec, i32 %sel) {
345; GPRIDX-LABEL: dyn_extract_v8i64_s_v:
346; GPRIDX:       ; %bb.0: ; %entry
347; GPRIDX-NEXT:    s_mov_b32 s0, s2
348; GPRIDX-NEXT:    s_mov_b32 s1, s3
349; GPRIDX-NEXT:    s_mov_b32 s2, s4
350; GPRIDX-NEXT:    s_mov_b32 s3, s5
351; GPRIDX-NEXT:    s_mov_b32 s4, s6
352; GPRIDX-NEXT:    s_mov_b32 s5, s7
353; GPRIDX-NEXT:    s_mov_b32 s6, s8
354; GPRIDX-NEXT:    s_mov_b32 s7, s9
355; GPRIDX-NEXT:    s_mov_b32 s8, s10
356; GPRIDX-NEXT:    s_mov_b32 s9, s11
357; GPRIDX-NEXT:    s_mov_b32 s10, s12
358; GPRIDX-NEXT:    s_mov_b32 s11, s13
359; GPRIDX-NEXT:    s_mov_b32 s12, s14
360; GPRIDX-NEXT:    s_mov_b32 s13, s15
361; GPRIDX-NEXT:    s_mov_b32 s14, s16
362; GPRIDX-NEXT:    s_mov_b32 s15, s17
363; GPRIDX-NEXT:    s_mov_b64 s[16:17], exec
364; GPRIDX-NEXT:  BB8_1: ; =>This Inner Loop Header: Depth=1
365; GPRIDX-NEXT:    v_readfirstlane_b32 s18, v0
366; GPRIDX-NEXT:    s_lshl_b32 m0, s18, 1
367; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s18, v0
368; GPRIDX-NEXT:    s_movrels_b32 s18, s0
369; GPRIDX-NEXT:    s_movrels_b32 s19, s1
370; GPRIDX-NEXT:    v_mov_b32_e32 v1, s18
371; GPRIDX-NEXT:    v_mov_b32_e32 v2, s19
372; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
373; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
374; GPRIDX-NEXT:    s_cbranch_execnz BB8_1
375; GPRIDX-NEXT:  ; %bb.2:
376; GPRIDX-NEXT:    s_mov_b64 exec, s[16:17]
377; GPRIDX-NEXT:    global_store_dwordx2 v[0:1], v[1:2], off
378; GPRIDX-NEXT:    s_endpgm
379;
380; MOVREL-LABEL: dyn_extract_v8i64_s_v:
381; MOVREL:       ; %bb.0: ; %entry
382; MOVREL-NEXT:    s_mov_b32 s0, s2
383; MOVREL-NEXT:    s_mov_b32 s1, s3
384; MOVREL-NEXT:    s_mov_b32 s2, s4
385; MOVREL-NEXT:    s_mov_b32 s3, s5
386; MOVREL-NEXT:    s_mov_b32 s4, s6
387; MOVREL-NEXT:    s_mov_b32 s5, s7
388; MOVREL-NEXT:    s_mov_b32 s6, s8
389; MOVREL-NEXT:    s_mov_b32 s7, s9
390; MOVREL-NEXT:    s_mov_b32 s8, s10
391; MOVREL-NEXT:    s_mov_b32 s9, s11
392; MOVREL-NEXT:    s_mov_b32 s10, s12
393; MOVREL-NEXT:    s_mov_b32 s11, s13
394; MOVREL-NEXT:    s_mov_b32 s12, s14
395; MOVREL-NEXT:    s_mov_b32 s13, s15
396; MOVREL-NEXT:    s_mov_b32 s14, s16
397; MOVREL-NEXT:    s_mov_b32 s15, s17
398; MOVREL-NEXT:    s_mov_b64 s[16:17], exec
399; MOVREL-NEXT:  BB8_1: ; =>This Inner Loop Header: Depth=1
400; MOVREL-NEXT:    v_readfirstlane_b32 s18, v0
401; MOVREL-NEXT:    s_lshl_b32 m0, s18, 1
402; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s18, v0
403; MOVREL-NEXT:    s_movrels_b32 s18, s0
404; MOVREL-NEXT:    s_movrels_b32 s19, s1
405; MOVREL-NEXT:    v_mov_b32_e32 v1, s18
406; MOVREL-NEXT:    v_mov_b32_e32 v2, s19
407; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
408; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
409; MOVREL-NEXT:    s_cbranch_execnz BB8_1
410; MOVREL-NEXT:  ; %bb.2:
411; MOVREL-NEXT:    s_mov_b64 exec, s[16:17]
412; MOVREL-NEXT:    flat_store_dwordx2 v[0:1], v[1:2]
413; MOVREL-NEXT:    s_endpgm
414entry:
415  %ext = extractelement <8 x i64> %vec, i32 %sel
416  store i64 %ext, i64 addrspace(1)* undef
417  ret void
418}
419
420define i64 @dyn_extract_v8i64_v_v(<8 x i64> %vec, i32 %sel) {
421; GPRIDX-LABEL: dyn_extract_v8i64_v_v:
422; GPRIDX:       ; %bb.0: ; %entry
423; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
424; GPRIDX-NEXT:    s_mov_b64 s[4:5], exec
425; GPRIDX-NEXT:  BB9_1: ; =>This Inner Loop Header: Depth=1
426; GPRIDX-NEXT:    v_readfirstlane_b32 s6, v16
427; GPRIDX-NEXT:    s_lshl_b32 s7, s6, 1
428; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v16
429; GPRIDX-NEXT:    s_set_gpr_idx_on s7, gpr_idx(SRC0)
430; GPRIDX-NEXT:    v_mov_b32_e32 v17, v0
431; GPRIDX-NEXT:    s_set_gpr_idx_off
432; GPRIDX-NEXT:    s_set_gpr_idx_on s7, gpr_idx(SRC0)
433; GPRIDX-NEXT:    v_mov_b32_e32 v18, v1
434; GPRIDX-NEXT:    s_set_gpr_idx_off
435; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
436; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
437; GPRIDX-NEXT:    s_cbranch_execnz BB9_1
438; GPRIDX-NEXT:  ; %bb.2:
439; GPRIDX-NEXT:    s_mov_b64 exec, s[4:5]
440; GPRIDX-NEXT:    v_mov_b32_e32 v0, v17
441; GPRIDX-NEXT:    v_mov_b32_e32 v1, v18
442; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
443;
444; MOVREL-LABEL: dyn_extract_v8i64_v_v:
445; MOVREL:       ; %bb.0: ; %entry
446; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
447; MOVREL-NEXT:    s_mov_b64 s[4:5], exec
448; MOVREL-NEXT:  BB9_1: ; =>This Inner Loop Header: Depth=1
449; MOVREL-NEXT:    v_readfirstlane_b32 s6, v16
450; MOVREL-NEXT:    s_lshl_b32 m0, s6, 1
451; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v16
452; MOVREL-NEXT:    v_movrels_b32_e32 v17, v0
453; MOVREL-NEXT:    v_movrels_b32_e32 v18, v1
454; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
455; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
456; MOVREL-NEXT:    s_cbranch_execnz BB9_1
457; MOVREL-NEXT:  ; %bb.2:
458; MOVREL-NEXT:    s_mov_b64 exec, s[4:5]
459; MOVREL-NEXT:    v_mov_b32_e32 v0, v17
460; MOVREL-NEXT:    v_mov_b32_e32 v1, v18
461; MOVREL-NEXT:    s_setpc_b64 s[30:31]
462entry:
463  %ext = extractelement <8 x i64> %vec, i32 %sel
464  ret i64 %ext
465}
466
467define amdgpu_ps void @dyn_extract_v8i64_v_s(<8 x i64> %vec, i32 inreg %sel) {
468; GPRIDX-LABEL: dyn_extract_v8i64_v_s:
469; GPRIDX:       ; %bb.0: ; %entry
470; GPRIDX-NEXT:    s_lshl_b32 s0, s2, 1
471; GPRIDX-NEXT:    s_set_gpr_idx_on s0, gpr_idx(SRC0)
472; GPRIDX-NEXT:    v_mov_b32_e32 v16, v0
473; GPRIDX-NEXT:    s_set_gpr_idx_off
474; GPRIDX-NEXT:    s_set_gpr_idx_on s0, gpr_idx(SRC0)
475; GPRIDX-NEXT:    v_mov_b32_e32 v17, v1
476; GPRIDX-NEXT:    s_set_gpr_idx_off
477; GPRIDX-NEXT:    global_store_dwordx2 v[0:1], v[16:17], off
478; GPRIDX-NEXT:    s_endpgm
479;
480; MOVREL-LABEL: dyn_extract_v8i64_v_s:
481; MOVREL:       ; %bb.0: ; %entry
482; MOVREL-NEXT:    s_lshl_b32 m0, s2, 1
483; MOVREL-NEXT:    v_movrels_b32_e32 v16, v0
484; MOVREL-NEXT:    v_movrels_b32_e32 v17, v1
485; MOVREL-NEXT:    flat_store_dwordx2 v[0:1], v[16:17]
486; MOVREL-NEXT:    s_endpgm
487entry:
488  %ext = extractelement <8 x i64> %vec, i32 %sel
489  store i64 %ext, i64 addrspace(1)* undef
490  ret void
491}
492
493define amdgpu_ps void @dyn_extract_v8i64_s_s(<8 x i64> inreg %vec, i32 inreg %sel) {
494; GPRIDX-LABEL: dyn_extract_v8i64_s_s:
495; GPRIDX:       ; %bb.0: ; %entry
496; GPRIDX-NEXT:    s_mov_b32 s0, s2
497; GPRIDX-NEXT:    s_mov_b32 s1, s3
498; GPRIDX-NEXT:    s_mov_b32 m0, s18
499; GPRIDX-NEXT:    s_mov_b32 s2, s4
500; GPRIDX-NEXT:    s_mov_b32 s3, s5
501; GPRIDX-NEXT:    s_mov_b32 s4, s6
502; GPRIDX-NEXT:    s_mov_b32 s5, s7
503; GPRIDX-NEXT:    s_mov_b32 s6, s8
504; GPRIDX-NEXT:    s_mov_b32 s7, s9
505; GPRIDX-NEXT:    s_mov_b32 s8, s10
506; GPRIDX-NEXT:    s_mov_b32 s9, s11
507; GPRIDX-NEXT:    s_mov_b32 s10, s12
508; GPRIDX-NEXT:    s_mov_b32 s11, s13
509; GPRIDX-NEXT:    s_mov_b32 s12, s14
510; GPRIDX-NEXT:    s_mov_b32 s13, s15
511; GPRIDX-NEXT:    s_mov_b32 s14, s16
512; GPRIDX-NEXT:    s_mov_b32 s15, s17
513; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[0:1]
514; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
515; GPRIDX-NEXT:    v_mov_b32_e32 v1, s1
516; GPRIDX-NEXT:    global_store_dwordx2 v[0:1], v[0:1], off
517; GPRIDX-NEXT:    s_endpgm
518;
519; MOVREL-LABEL: dyn_extract_v8i64_s_s:
520; MOVREL:       ; %bb.0: ; %entry
521; MOVREL-NEXT:    s_mov_b32 s0, s2
522; MOVREL-NEXT:    s_mov_b32 s1, s3
523; MOVREL-NEXT:    s_mov_b32 m0, s18
524; MOVREL-NEXT:    s_mov_b32 s2, s4
525; MOVREL-NEXT:    s_mov_b32 s3, s5
526; MOVREL-NEXT:    s_mov_b32 s4, s6
527; MOVREL-NEXT:    s_mov_b32 s5, s7
528; MOVREL-NEXT:    s_mov_b32 s6, s8
529; MOVREL-NEXT:    s_mov_b32 s7, s9
530; MOVREL-NEXT:    s_mov_b32 s8, s10
531; MOVREL-NEXT:    s_mov_b32 s9, s11
532; MOVREL-NEXT:    s_mov_b32 s10, s12
533; MOVREL-NEXT:    s_mov_b32 s11, s13
534; MOVREL-NEXT:    s_mov_b32 s12, s14
535; MOVREL-NEXT:    s_mov_b32 s13, s15
536; MOVREL-NEXT:    s_mov_b32 s14, s16
537; MOVREL-NEXT:    s_mov_b32 s15, s17
538; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[0:1]
539; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
540; MOVREL-NEXT:    v_mov_b32_e32 v1, s1
541; MOVREL-NEXT:    flat_store_dwordx2 v[0:1], v[0:1]
542; MOVREL-NEXT:    s_endpgm
543entry:
544  %ext = extractelement <8 x i64> %vec, i32 %sel
545  store i64 %ext, i64 addrspace(1)* undef
546  ret void
547}
548
549define amdgpu_ps float @dyn_extract_v8f32_s_s_offset3(<8 x float> inreg %vec, i32 inreg %sel) {
550; GPRIDX-LABEL: dyn_extract_v8f32_s_s_offset3:
551; GPRIDX:       ; %bb.0: ; %entry
552; GPRIDX-NEXT:    s_mov_b32 s0, s2
553; GPRIDX-NEXT:    s_mov_b32 s1, s3
554; GPRIDX-NEXT:    s_mov_b32 s3, s5
555; GPRIDX-NEXT:    s_mov_b32 m0, s10
556; GPRIDX-NEXT:    s_mov_b32 s2, s4
557; GPRIDX-NEXT:    s_mov_b32 s4, s6
558; GPRIDX-NEXT:    s_mov_b32 s5, s7
559; GPRIDX-NEXT:    s_mov_b32 s6, s8
560; GPRIDX-NEXT:    s_mov_b32 s7, s9
561; GPRIDX-NEXT:    s_movrels_b32 s0, s3
562; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
563; GPRIDX-NEXT:    ; return to shader part epilog
564;
565; MOVREL-LABEL: dyn_extract_v8f32_s_s_offset3:
566; MOVREL:       ; %bb.0: ; %entry
567; MOVREL-NEXT:    s_mov_b32 s0, s2
568; MOVREL-NEXT:    s_mov_b32 s1, s3
569; MOVREL-NEXT:    s_mov_b32 s3, s5
570; MOVREL-NEXT:    s_mov_b32 m0, s10
571; MOVREL-NEXT:    s_mov_b32 s2, s4
572; MOVREL-NEXT:    s_mov_b32 s4, s6
573; MOVREL-NEXT:    s_mov_b32 s5, s7
574; MOVREL-NEXT:    s_mov_b32 s6, s8
575; MOVREL-NEXT:    s_mov_b32 s7, s9
576; MOVREL-NEXT:    s_movrels_b32 s0, s3
577; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
578; MOVREL-NEXT:    ; return to shader part epilog
579entry:
580  %add = add i32 %sel, 3
581  %ext = extractelement <8 x float> %vec, i32 %add
582  ret float %ext
583}
584
585define float @dyn_extract_v8f32_v_v_offset3(<8 x float> %vec, i32 %sel) {
586; GPRIDX-LABEL: dyn_extract_v8f32_v_v_offset3:
587; GPRIDX:       ; %bb.0: ; %entry
588; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
589; GPRIDX-NEXT:    s_mov_b64 s[4:5], exec
590; GPRIDX-NEXT:  BB13_1: ; =>This Inner Loop Header: Depth=1
591; GPRIDX-NEXT:    v_readfirstlane_b32 s6, v8
592; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v8
593; GPRIDX-NEXT:    s_set_gpr_idx_on s6, gpr_idx(SRC0)
594; GPRIDX-NEXT:    v_mov_b32_e32 v9, v3
595; GPRIDX-NEXT:    s_set_gpr_idx_off
596; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
597; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
598; GPRIDX-NEXT:    s_cbranch_execnz BB13_1
599; GPRIDX-NEXT:  ; %bb.2:
600; GPRIDX-NEXT:    s_mov_b64 exec, s[4:5]
601; GPRIDX-NEXT:    v_mov_b32_e32 v0, v9
602; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
603;
604; MOVREL-LABEL: dyn_extract_v8f32_v_v_offset3:
605; MOVREL:       ; %bb.0: ; %entry
606; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
607; MOVREL-NEXT:    s_mov_b64 s[4:5], exec
608; MOVREL-NEXT:  BB13_1: ; =>This Inner Loop Header: Depth=1
609; MOVREL-NEXT:    v_readfirstlane_b32 s6, v8
610; MOVREL-NEXT:    s_mov_b32 m0, s6
611; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v8
612; MOVREL-NEXT:    v_movrels_b32_e32 v9, v3
613; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
614; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
615; MOVREL-NEXT:    s_cbranch_execnz BB13_1
616; MOVREL-NEXT:  ; %bb.2:
617; MOVREL-NEXT:    s_mov_b64 exec, s[4:5]
618; MOVREL-NEXT:    v_mov_b32_e32 v0, v9
619; MOVREL-NEXT:    s_setpc_b64 s[30:31]
620entry:
621  %add = add i32 %sel, 3
622  %ext = extractelement <8 x float> %vec, i32 %add
623  ret float %ext
624}
625
626define amdgpu_ps double @dyn_extract_v8f64_s_s_offset1(<8 x double> inreg %vec, i32 inreg %sel) {
627; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset1:
628; GPRIDX:       ; %bb.0: ; %entry
629; GPRIDX-NEXT:    s_mov_b32 s0, s2
630; GPRIDX-NEXT:    s_mov_b32 s1, s3
631; GPRIDX-NEXT:    s_mov_b32 s2, s4
632; GPRIDX-NEXT:    s_mov_b32 s3, s5
633; GPRIDX-NEXT:    s_mov_b32 m0, s18
634; GPRIDX-NEXT:    s_mov_b32 s4, s6
635; GPRIDX-NEXT:    s_mov_b32 s5, s7
636; GPRIDX-NEXT:    s_mov_b32 s6, s8
637; GPRIDX-NEXT:    s_mov_b32 s7, s9
638; GPRIDX-NEXT:    s_mov_b32 s8, s10
639; GPRIDX-NEXT:    s_mov_b32 s9, s11
640; GPRIDX-NEXT:    s_mov_b32 s10, s12
641; GPRIDX-NEXT:    s_mov_b32 s11, s13
642; GPRIDX-NEXT:    s_mov_b32 s12, s14
643; GPRIDX-NEXT:    s_mov_b32 s13, s15
644; GPRIDX-NEXT:    s_mov_b32 s14, s16
645; GPRIDX-NEXT:    s_mov_b32 s15, s17
646; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[2:3]
647; GPRIDX-NEXT:    ; return to shader part epilog
648;
649; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset1:
650; MOVREL:       ; %bb.0: ; %entry
651; MOVREL-NEXT:    s_mov_b32 s0, s2
652; MOVREL-NEXT:    s_mov_b32 s1, s3
653; MOVREL-NEXT:    s_mov_b32 s2, s4
654; MOVREL-NEXT:    s_mov_b32 s3, s5
655; MOVREL-NEXT:    s_mov_b32 m0, s18
656; MOVREL-NEXT:    s_mov_b32 s4, s6
657; MOVREL-NEXT:    s_mov_b32 s5, s7
658; MOVREL-NEXT:    s_mov_b32 s6, s8
659; MOVREL-NEXT:    s_mov_b32 s7, s9
660; MOVREL-NEXT:    s_mov_b32 s8, s10
661; MOVREL-NEXT:    s_mov_b32 s9, s11
662; MOVREL-NEXT:    s_mov_b32 s10, s12
663; MOVREL-NEXT:    s_mov_b32 s11, s13
664; MOVREL-NEXT:    s_mov_b32 s12, s14
665; MOVREL-NEXT:    s_mov_b32 s13, s15
666; MOVREL-NEXT:    s_mov_b32 s14, s16
667; MOVREL-NEXT:    s_mov_b32 s15, s17
668; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[2:3]
669; MOVREL-NEXT:    ; return to shader part epilog
670entry:
671  %add = add i32 %sel, 1
672  %ext = extractelement <8 x double> %vec, i32 %add
673  ret double %ext
674}
675
676define amdgpu_ps double @dyn_extract_v8f64_s_s_offset2(<8 x double> inreg %vec, i32 inreg %sel) {
677; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset2:
678; GPRIDX:       ; %bb.0: ; %entry
679; GPRIDX-NEXT:    s_mov_b32 s0, s2
680; GPRIDX-NEXT:    s_mov_b32 s1, s3
681; GPRIDX-NEXT:    s_mov_b32 s2, s4
682; GPRIDX-NEXT:    s_mov_b32 s3, s5
683; GPRIDX-NEXT:    s_mov_b32 s4, s6
684; GPRIDX-NEXT:    s_mov_b32 s5, s7
685; GPRIDX-NEXT:    s_mov_b32 m0, s18
686; GPRIDX-NEXT:    s_mov_b32 s6, s8
687; GPRIDX-NEXT:    s_mov_b32 s7, s9
688; GPRIDX-NEXT:    s_mov_b32 s8, s10
689; GPRIDX-NEXT:    s_mov_b32 s9, s11
690; GPRIDX-NEXT:    s_mov_b32 s10, s12
691; GPRIDX-NEXT:    s_mov_b32 s11, s13
692; GPRIDX-NEXT:    s_mov_b32 s12, s14
693; GPRIDX-NEXT:    s_mov_b32 s13, s15
694; GPRIDX-NEXT:    s_mov_b32 s14, s16
695; GPRIDX-NEXT:    s_mov_b32 s15, s17
696; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[4:5]
697; GPRIDX-NEXT:    ; return to shader part epilog
698;
699; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset2:
700; MOVREL:       ; %bb.0: ; %entry
701; MOVREL-NEXT:    s_mov_b32 s0, s2
702; MOVREL-NEXT:    s_mov_b32 s1, s3
703; MOVREL-NEXT:    s_mov_b32 s2, s4
704; MOVREL-NEXT:    s_mov_b32 s3, s5
705; MOVREL-NEXT:    s_mov_b32 s4, s6
706; MOVREL-NEXT:    s_mov_b32 s5, s7
707; MOVREL-NEXT:    s_mov_b32 m0, s18
708; MOVREL-NEXT:    s_mov_b32 s6, s8
709; MOVREL-NEXT:    s_mov_b32 s7, s9
710; MOVREL-NEXT:    s_mov_b32 s8, s10
711; MOVREL-NEXT:    s_mov_b32 s9, s11
712; MOVREL-NEXT:    s_mov_b32 s10, s12
713; MOVREL-NEXT:    s_mov_b32 s11, s13
714; MOVREL-NEXT:    s_mov_b32 s12, s14
715; MOVREL-NEXT:    s_mov_b32 s13, s15
716; MOVREL-NEXT:    s_mov_b32 s14, s16
717; MOVREL-NEXT:    s_mov_b32 s15, s17
718; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[4:5]
719; MOVREL-NEXT:    ; return to shader part epilog
720entry:
721  %add = add i32 %sel, 2
722  %ext = extractelement <8 x double> %vec, i32 %add
723  ret double %ext
724}
725
726define amdgpu_ps double @dyn_extract_v8f64_s_s_offset3(<8 x double> inreg %vec, i32 inreg %sel) {
727; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset3:
728; GPRIDX:       ; %bb.0: ; %entry
729; GPRIDX-NEXT:    s_mov_b32 s0, s2
730; GPRIDX-NEXT:    s_mov_b32 s1, s3
731; GPRIDX-NEXT:    s_mov_b32 s2, s4
732; GPRIDX-NEXT:    s_mov_b32 s3, s5
733; GPRIDX-NEXT:    s_mov_b32 s4, s6
734; GPRIDX-NEXT:    s_mov_b32 s5, s7
735; GPRIDX-NEXT:    s_mov_b32 s6, s8
736; GPRIDX-NEXT:    s_mov_b32 s7, s9
737; GPRIDX-NEXT:    s_mov_b32 m0, s18
738; GPRIDX-NEXT:    s_mov_b32 s8, s10
739; GPRIDX-NEXT:    s_mov_b32 s9, s11
740; GPRIDX-NEXT:    s_mov_b32 s10, s12
741; GPRIDX-NEXT:    s_mov_b32 s11, s13
742; GPRIDX-NEXT:    s_mov_b32 s12, s14
743; GPRIDX-NEXT:    s_mov_b32 s13, s15
744; GPRIDX-NEXT:    s_mov_b32 s14, s16
745; GPRIDX-NEXT:    s_mov_b32 s15, s17
746; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[6:7]
747; GPRIDX-NEXT:    ; return to shader part epilog
748;
749; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset3:
750; MOVREL:       ; %bb.0: ; %entry
751; MOVREL-NEXT:    s_mov_b32 s0, s2
752; MOVREL-NEXT:    s_mov_b32 s1, s3
753; MOVREL-NEXT:    s_mov_b32 s2, s4
754; MOVREL-NEXT:    s_mov_b32 s3, s5
755; MOVREL-NEXT:    s_mov_b32 s4, s6
756; MOVREL-NEXT:    s_mov_b32 s5, s7
757; MOVREL-NEXT:    s_mov_b32 s6, s8
758; MOVREL-NEXT:    s_mov_b32 s7, s9
759; MOVREL-NEXT:    s_mov_b32 m0, s18
760; MOVREL-NEXT:    s_mov_b32 s8, s10
761; MOVREL-NEXT:    s_mov_b32 s9, s11
762; MOVREL-NEXT:    s_mov_b32 s10, s12
763; MOVREL-NEXT:    s_mov_b32 s11, s13
764; MOVREL-NEXT:    s_mov_b32 s12, s14
765; MOVREL-NEXT:    s_mov_b32 s13, s15
766; MOVREL-NEXT:    s_mov_b32 s14, s16
767; MOVREL-NEXT:    s_mov_b32 s15, s17
768; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[6:7]
769; MOVREL-NEXT:    ; return to shader part epilog
770entry:
771  %add = add i32 %sel, 3
772  %ext = extractelement <8 x double> %vec, i32 %add
773  ret double %ext
774}
775
776define amdgpu_ps double @dyn_extract_v8f64_s_s_offset4(<8 x double> inreg %vec, i32 inreg %sel) {
777; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset4:
778; GPRIDX:       ; %bb.0: ; %entry
779; GPRIDX-NEXT:    s_mov_b32 s0, s2
780; GPRIDX-NEXT:    s_mov_b32 s1, s3
781; GPRIDX-NEXT:    s_mov_b32 s2, s4
782; GPRIDX-NEXT:    s_mov_b32 s3, s5
783; GPRIDX-NEXT:    s_mov_b32 s4, s6
784; GPRIDX-NEXT:    s_mov_b32 s5, s7
785; GPRIDX-NEXT:    s_mov_b32 s6, s8
786; GPRIDX-NEXT:    s_mov_b32 s7, s9
787; GPRIDX-NEXT:    s_mov_b32 s8, s10
788; GPRIDX-NEXT:    s_mov_b32 s9, s11
789; GPRIDX-NEXT:    s_mov_b32 m0, s18
790; GPRIDX-NEXT:    s_mov_b32 s10, s12
791; GPRIDX-NEXT:    s_mov_b32 s11, s13
792; GPRIDX-NEXT:    s_mov_b32 s12, s14
793; GPRIDX-NEXT:    s_mov_b32 s13, s15
794; GPRIDX-NEXT:    s_mov_b32 s14, s16
795; GPRIDX-NEXT:    s_mov_b32 s15, s17
796; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[8:9]
797; GPRIDX-NEXT:    ; return to shader part epilog
798;
799; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset4:
800; MOVREL:       ; %bb.0: ; %entry
801; MOVREL-NEXT:    s_mov_b32 s0, s2
802; MOVREL-NEXT:    s_mov_b32 s1, s3
803; MOVREL-NEXT:    s_mov_b32 s2, s4
804; MOVREL-NEXT:    s_mov_b32 s3, s5
805; MOVREL-NEXT:    s_mov_b32 s4, s6
806; MOVREL-NEXT:    s_mov_b32 s5, s7
807; MOVREL-NEXT:    s_mov_b32 s6, s8
808; MOVREL-NEXT:    s_mov_b32 s7, s9
809; MOVREL-NEXT:    s_mov_b32 s8, s10
810; MOVREL-NEXT:    s_mov_b32 s9, s11
811; MOVREL-NEXT:    s_mov_b32 m0, s18
812; MOVREL-NEXT:    s_mov_b32 s10, s12
813; MOVREL-NEXT:    s_mov_b32 s11, s13
814; MOVREL-NEXT:    s_mov_b32 s12, s14
815; MOVREL-NEXT:    s_mov_b32 s13, s15
816; MOVREL-NEXT:    s_mov_b32 s14, s16
817; MOVREL-NEXT:    s_mov_b32 s15, s17
818; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[8:9]
819; MOVREL-NEXT:    ; return to shader part epilog
820entry:
821  %add = add i32 %sel, 4
822  %ext = extractelement <8 x double> %vec, i32 %add
823  ret double %ext
824}
825
826define amdgpu_ps double @dyn_extract_v8f64_s_s_offset5(<8 x double> inreg %vec, i32 inreg %sel) {
827; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset5:
828; GPRIDX:       ; %bb.0: ; %entry
829; GPRIDX-NEXT:    s_mov_b32 s0, s2
830; GPRIDX-NEXT:    s_mov_b32 s1, s3
831; GPRIDX-NEXT:    s_mov_b32 s2, s4
832; GPRIDX-NEXT:    s_mov_b32 s3, s5
833; GPRIDX-NEXT:    s_mov_b32 s4, s6
834; GPRIDX-NEXT:    s_mov_b32 s5, s7
835; GPRIDX-NEXT:    s_mov_b32 s6, s8
836; GPRIDX-NEXT:    s_mov_b32 s7, s9
837; GPRIDX-NEXT:    s_mov_b32 s8, s10
838; GPRIDX-NEXT:    s_mov_b32 s9, s11
839; GPRIDX-NEXT:    s_mov_b32 s10, s12
840; GPRIDX-NEXT:    s_mov_b32 s11, s13
841; GPRIDX-NEXT:    s_mov_b32 m0, s18
842; GPRIDX-NEXT:    s_mov_b32 s12, s14
843; GPRIDX-NEXT:    s_mov_b32 s13, s15
844; GPRIDX-NEXT:    s_mov_b32 s14, s16
845; GPRIDX-NEXT:    s_mov_b32 s15, s17
846; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[10:11]
847; GPRIDX-NEXT:    ; return to shader part epilog
848;
849; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset5:
850; MOVREL:       ; %bb.0: ; %entry
851; MOVREL-NEXT:    s_mov_b32 s0, s2
852; MOVREL-NEXT:    s_mov_b32 s1, s3
853; MOVREL-NEXT:    s_mov_b32 s2, s4
854; MOVREL-NEXT:    s_mov_b32 s3, s5
855; MOVREL-NEXT:    s_mov_b32 s4, s6
856; MOVREL-NEXT:    s_mov_b32 s5, s7
857; MOVREL-NEXT:    s_mov_b32 s6, s8
858; MOVREL-NEXT:    s_mov_b32 s7, s9
859; MOVREL-NEXT:    s_mov_b32 s8, s10
860; MOVREL-NEXT:    s_mov_b32 s9, s11
861; MOVREL-NEXT:    s_mov_b32 s10, s12
862; MOVREL-NEXT:    s_mov_b32 s11, s13
863; MOVREL-NEXT:    s_mov_b32 m0, s18
864; MOVREL-NEXT:    s_mov_b32 s12, s14
865; MOVREL-NEXT:    s_mov_b32 s13, s15
866; MOVREL-NEXT:    s_mov_b32 s14, s16
867; MOVREL-NEXT:    s_mov_b32 s15, s17
868; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[10:11]
869; MOVREL-NEXT:    ; return to shader part epilog
870entry:
871  %add = add i32 %sel, 5
872  %ext = extractelement <8 x double> %vec, i32 %add
873  ret double %ext
874}
875
876define amdgpu_ps double @dyn_extract_v8f64_s_s_offset6(<8 x double> inreg %vec, i32 inreg %sel) {
877; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset6:
878; GPRIDX:       ; %bb.0: ; %entry
879; GPRIDX-NEXT:    s_mov_b32 s0, s2
880; GPRIDX-NEXT:    s_mov_b32 s1, s3
881; GPRIDX-NEXT:    s_mov_b32 s2, s4
882; GPRIDX-NEXT:    s_mov_b32 s3, s5
883; GPRIDX-NEXT:    s_mov_b32 s4, s6
884; GPRIDX-NEXT:    s_mov_b32 s5, s7
885; GPRIDX-NEXT:    s_mov_b32 s6, s8
886; GPRIDX-NEXT:    s_mov_b32 s7, s9
887; GPRIDX-NEXT:    s_mov_b32 s8, s10
888; GPRIDX-NEXT:    s_mov_b32 s9, s11
889; GPRIDX-NEXT:    s_mov_b32 s10, s12
890; GPRIDX-NEXT:    s_mov_b32 s11, s13
891; GPRIDX-NEXT:    s_mov_b32 s12, s14
892; GPRIDX-NEXT:    s_mov_b32 s13, s15
893; GPRIDX-NEXT:    s_mov_b32 m0, s18
894; GPRIDX-NEXT:    s_mov_b32 s14, s16
895; GPRIDX-NEXT:    s_mov_b32 s15, s17
896; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[12:13]
897; GPRIDX-NEXT:    ; return to shader part epilog
898;
899; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset6:
900; MOVREL:       ; %bb.0: ; %entry
901; MOVREL-NEXT:    s_mov_b32 s0, s2
902; MOVREL-NEXT:    s_mov_b32 s1, s3
903; MOVREL-NEXT:    s_mov_b32 s2, s4
904; MOVREL-NEXT:    s_mov_b32 s3, s5
905; MOVREL-NEXT:    s_mov_b32 s4, s6
906; MOVREL-NEXT:    s_mov_b32 s5, s7
907; MOVREL-NEXT:    s_mov_b32 s6, s8
908; MOVREL-NEXT:    s_mov_b32 s7, s9
909; MOVREL-NEXT:    s_mov_b32 s8, s10
910; MOVREL-NEXT:    s_mov_b32 s9, s11
911; MOVREL-NEXT:    s_mov_b32 s10, s12
912; MOVREL-NEXT:    s_mov_b32 s11, s13
913; MOVREL-NEXT:    s_mov_b32 s12, s14
914; MOVREL-NEXT:    s_mov_b32 s13, s15
915; MOVREL-NEXT:    s_mov_b32 m0, s18
916; MOVREL-NEXT:    s_mov_b32 s14, s16
917; MOVREL-NEXT:    s_mov_b32 s15, s17
918; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[12:13]
919; MOVREL-NEXT:    ; return to shader part epilog
920entry:
921  %add = add i32 %sel, 6
922  %ext = extractelement <8 x double> %vec, i32 %add
923  ret double %ext
924}
925
926define amdgpu_ps double @dyn_extract_v8f64_s_s_offset7(<8 x double> inreg %vec, i32 inreg %sel) {
927; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offset7:
928; GPRIDX:       ; %bb.0: ; %entry
929; GPRIDX-NEXT:    s_mov_b32 s0, s2
930; GPRIDX-NEXT:    s_mov_b32 s1, s3
931; GPRIDX-NEXT:    s_mov_b32 s2, s4
932; GPRIDX-NEXT:    s_mov_b32 s3, s5
933; GPRIDX-NEXT:    s_mov_b32 s4, s6
934; GPRIDX-NEXT:    s_mov_b32 s5, s7
935; GPRIDX-NEXT:    s_mov_b32 s6, s8
936; GPRIDX-NEXT:    s_mov_b32 s7, s9
937; GPRIDX-NEXT:    s_mov_b32 s8, s10
938; GPRIDX-NEXT:    s_mov_b32 s9, s11
939; GPRIDX-NEXT:    s_mov_b32 s10, s12
940; GPRIDX-NEXT:    s_mov_b32 s11, s13
941; GPRIDX-NEXT:    s_mov_b32 s12, s14
942; GPRIDX-NEXT:    s_mov_b32 s13, s15
943; GPRIDX-NEXT:    s_mov_b32 s14, s16
944; GPRIDX-NEXT:    s_mov_b32 s15, s17
945; GPRIDX-NEXT:    s_mov_b32 m0, s18
946; GPRIDX-NEXT:    s_nop 0
947; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[14:15]
948; GPRIDX-NEXT:    ; return to shader part epilog
949;
950; MOVREL-LABEL: dyn_extract_v8f64_s_s_offset7:
951; MOVREL:       ; %bb.0: ; %entry
952; MOVREL-NEXT:    s_mov_b32 s0, s2
953; MOVREL-NEXT:    s_mov_b32 s1, s3
954; MOVREL-NEXT:    s_mov_b32 s2, s4
955; MOVREL-NEXT:    s_mov_b32 s3, s5
956; MOVREL-NEXT:    s_mov_b32 s4, s6
957; MOVREL-NEXT:    s_mov_b32 s5, s7
958; MOVREL-NEXT:    s_mov_b32 s6, s8
959; MOVREL-NEXT:    s_mov_b32 s7, s9
960; MOVREL-NEXT:    s_mov_b32 s8, s10
961; MOVREL-NEXT:    s_mov_b32 s9, s11
962; MOVREL-NEXT:    s_mov_b32 s10, s12
963; MOVREL-NEXT:    s_mov_b32 s11, s13
964; MOVREL-NEXT:    s_mov_b32 s12, s14
965; MOVREL-NEXT:    s_mov_b32 s13, s15
966; MOVREL-NEXT:    s_mov_b32 s14, s16
967; MOVREL-NEXT:    s_mov_b32 s15, s17
968; MOVREL-NEXT:    s_mov_b32 m0, s18
969; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[14:15]
970; MOVREL-NEXT:    ; return to shader part epilog
971entry:
972  %add = add i32 %sel, 7
973  %ext = extractelement <8 x double> %vec, i32 %add
974  ret double %ext
975}
976
977define amdgpu_ps double @dyn_extract_v8f64_s_s_offsetm1(<8 x double> inreg %vec, i32 inreg %sel) {
978; GPRIDX-LABEL: dyn_extract_v8f64_s_s_offsetm1:
979; GPRIDX:       ; %bb.0: ; %entry
980; GPRIDX-NEXT:    s_mov_b32 s0, s2
981; GPRIDX-NEXT:    s_mov_b32 s1, s3
982; GPRIDX-NEXT:    s_add_i32 m0, s18, -1
983; GPRIDX-NEXT:    s_mov_b32 s2, s4
984; GPRIDX-NEXT:    s_mov_b32 s3, s5
985; GPRIDX-NEXT:    s_mov_b32 s4, s6
986; GPRIDX-NEXT:    s_mov_b32 s5, s7
987; GPRIDX-NEXT:    s_mov_b32 s6, s8
988; GPRIDX-NEXT:    s_mov_b32 s7, s9
989; GPRIDX-NEXT:    s_mov_b32 s8, s10
990; GPRIDX-NEXT:    s_mov_b32 s9, s11
991; GPRIDX-NEXT:    s_mov_b32 s10, s12
992; GPRIDX-NEXT:    s_mov_b32 s11, s13
993; GPRIDX-NEXT:    s_mov_b32 s12, s14
994; GPRIDX-NEXT:    s_mov_b32 s13, s15
995; GPRIDX-NEXT:    s_mov_b32 s14, s16
996; GPRIDX-NEXT:    s_mov_b32 s15, s17
997; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[0:1]
998; GPRIDX-NEXT:    ; return to shader part epilog
999;
1000; MOVREL-LABEL: dyn_extract_v8f64_s_s_offsetm1:
1001; MOVREL:       ; %bb.0: ; %entry
1002; MOVREL-NEXT:    s_mov_b32 s0, s2
1003; MOVREL-NEXT:    s_mov_b32 s1, s3
1004; MOVREL-NEXT:    s_add_i32 m0, s18, -1
1005; MOVREL-NEXT:    s_mov_b32 s2, s4
1006; MOVREL-NEXT:    s_mov_b32 s3, s5
1007; MOVREL-NEXT:    s_mov_b32 s4, s6
1008; MOVREL-NEXT:    s_mov_b32 s5, s7
1009; MOVREL-NEXT:    s_mov_b32 s6, s8
1010; MOVREL-NEXT:    s_mov_b32 s7, s9
1011; MOVREL-NEXT:    s_mov_b32 s8, s10
1012; MOVREL-NEXT:    s_mov_b32 s9, s11
1013; MOVREL-NEXT:    s_mov_b32 s10, s12
1014; MOVREL-NEXT:    s_mov_b32 s11, s13
1015; MOVREL-NEXT:    s_mov_b32 s12, s14
1016; MOVREL-NEXT:    s_mov_b32 s13, s15
1017; MOVREL-NEXT:    s_mov_b32 s14, s16
1018; MOVREL-NEXT:    s_mov_b32 s15, s17
1019; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[0:1]
1020; MOVREL-NEXT:    ; return to shader part epilog
1021entry:
1022  %add = add i32 %sel, -1
1023  %ext = extractelement <8 x double> %vec, i32 %add
1024  ret double %ext
1025}
1026
1027define double @dyn_extract_v8f64_v_v_offset3(<8 x double> %vec, i32 %sel) {
1028; GPRIDX-LABEL: dyn_extract_v8f64_v_v_offset3:
1029; GPRIDX:       ; %bb.0: ; %entry
1030; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1031; GPRIDX-NEXT:    s_mov_b64 s[4:5], exec
1032; GPRIDX-NEXT:  BB22_1: ; =>This Inner Loop Header: Depth=1
1033; GPRIDX-NEXT:    v_readfirstlane_b32 s6, v16
1034; GPRIDX-NEXT:    s_add_i32 s7, s6, 3
1035; GPRIDX-NEXT:    s_lshl_b32 s7, s7, 1
1036; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v16
1037; GPRIDX-NEXT:    s_set_gpr_idx_on s7, gpr_idx(SRC0)
1038; GPRIDX-NEXT:    v_mov_b32_e32 v17, v0
1039; GPRIDX-NEXT:    s_set_gpr_idx_off
1040; GPRIDX-NEXT:    s_set_gpr_idx_on s7, gpr_idx(SRC0)
1041; GPRIDX-NEXT:    v_mov_b32_e32 v18, v1
1042; GPRIDX-NEXT:    s_set_gpr_idx_off
1043; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
1044; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
1045; GPRIDX-NEXT:    s_cbranch_execnz BB22_1
1046; GPRIDX-NEXT:  ; %bb.2:
1047; GPRIDX-NEXT:    s_mov_b64 exec, s[4:5]
1048; GPRIDX-NEXT:    v_mov_b32_e32 v0, v17
1049; GPRIDX-NEXT:    v_mov_b32_e32 v1, v18
1050; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
1051;
1052; MOVREL-LABEL: dyn_extract_v8f64_v_v_offset3:
1053; MOVREL:       ; %bb.0: ; %entry
1054; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1055; MOVREL-NEXT:    s_mov_b64 s[4:5], exec
1056; MOVREL-NEXT:  BB22_1: ; =>This Inner Loop Header: Depth=1
1057; MOVREL-NEXT:    v_readfirstlane_b32 s6, v16
1058; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v16
1059; MOVREL-NEXT:    s_add_i32 s6, s6, 3
1060; MOVREL-NEXT:    s_lshl_b32 m0, s6, 1
1061; MOVREL-NEXT:    v_movrels_b32_e32 v17, v0
1062; MOVREL-NEXT:    v_movrels_b32_e32 v18, v1
1063; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
1064; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
1065; MOVREL-NEXT:    s_cbranch_execnz BB22_1
1066; MOVREL-NEXT:  ; %bb.2:
1067; MOVREL-NEXT:    s_mov_b64 exec, s[4:5]
1068; MOVREL-NEXT:    v_mov_b32_e32 v0, v17
1069; MOVREL-NEXT:    v_mov_b32_e32 v1, v18
1070; MOVREL-NEXT:    s_setpc_b64 s[30:31]
1071entry:
1072  %add = add i32 %sel, 3
1073  %ext = extractelement <8 x double> %vec, i32 %add
1074  ret double %ext
1075}
1076
1077define i8 addrspace(3)* @dyn_extract_v8p3_v_v(<8 x i8 addrspace(3)*> %vec, i32 %idx) {
1078; GPRIDX-LABEL: dyn_extract_v8p3_v_v:
1079; GPRIDX:       ; %bb.0: ; %entry
1080; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1081; GPRIDX-NEXT:    s_mov_b64 s[4:5], exec
1082; GPRIDX-NEXT:  BB23_1: ; =>This Inner Loop Header: Depth=1
1083; GPRIDX-NEXT:    v_readfirstlane_b32 s6, v8
1084; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v8
1085; GPRIDX-NEXT:    s_set_gpr_idx_on s6, gpr_idx(SRC0)
1086; GPRIDX-NEXT:    v_mov_b32_e32 v9, v0
1087; GPRIDX-NEXT:    s_set_gpr_idx_off
1088; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
1089; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
1090; GPRIDX-NEXT:    s_cbranch_execnz BB23_1
1091; GPRIDX-NEXT:  ; %bb.2:
1092; GPRIDX-NEXT:    s_mov_b64 exec, s[4:5]
1093; GPRIDX-NEXT:    v_mov_b32_e32 v0, v9
1094; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
1095;
1096; MOVREL-LABEL: dyn_extract_v8p3_v_v:
1097; MOVREL:       ; %bb.0: ; %entry
1098; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1099; MOVREL-NEXT:    s_mov_b64 s[4:5], exec
1100; MOVREL-NEXT:  BB23_1: ; =>This Inner Loop Header: Depth=1
1101; MOVREL-NEXT:    v_readfirstlane_b32 s6, v8
1102; MOVREL-NEXT:    s_mov_b32 m0, s6
1103; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v8
1104; MOVREL-NEXT:    v_movrels_b32_e32 v9, v0
1105; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
1106; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
1107; MOVREL-NEXT:    s_cbranch_execnz BB23_1
1108; MOVREL-NEXT:  ; %bb.2:
1109; MOVREL-NEXT:    s_mov_b64 exec, s[4:5]
1110; MOVREL-NEXT:    v_mov_b32_e32 v0, v9
1111; MOVREL-NEXT:    s_setpc_b64 s[30:31]
1112entry:
1113  %ext = extractelement <8 x i8 addrspace(3)*> %vec, i32 %idx
1114  ret i8 addrspace(3)* %ext
1115}
1116
1117define amdgpu_ps void @dyn_extract_v8p3_s_s(<8 x i8 addrspace(3)*> inreg %vec, i32 inreg %idx) {
1118; GPRIDX-LABEL: dyn_extract_v8p3_s_s:
1119; GPRIDX:       ; %bb.0: ; %entry
1120; GPRIDX-NEXT:    s_mov_b32 s0, s2
1121; GPRIDX-NEXT:    s_mov_b32 m0, s10
1122; GPRIDX-NEXT:    s_mov_b32 s1, s3
1123; GPRIDX-NEXT:    s_mov_b32 s2, s4
1124; GPRIDX-NEXT:    s_mov_b32 s3, s5
1125; GPRIDX-NEXT:    s_mov_b32 s4, s6
1126; GPRIDX-NEXT:    s_mov_b32 s5, s7
1127; GPRIDX-NEXT:    s_mov_b32 s6, s8
1128; GPRIDX-NEXT:    s_mov_b32 s7, s9
1129; GPRIDX-NEXT:    s_movrels_b32 s0, s0
1130; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
1131; GPRIDX-NEXT:    ds_write_b32 v0, v0
1132; GPRIDX-NEXT:    s_endpgm
1133;
1134; MOVREL-LABEL: dyn_extract_v8p3_s_s:
1135; MOVREL:       ; %bb.0: ; %entry
1136; MOVREL-NEXT:    s_mov_b32 s0, s2
1137; MOVREL-NEXT:    s_mov_b32 m0, s10
1138; MOVREL-NEXT:    s_mov_b32 s1, s3
1139; MOVREL-NEXT:    s_mov_b32 s2, s4
1140; MOVREL-NEXT:    s_mov_b32 s3, s5
1141; MOVREL-NEXT:    s_mov_b32 s4, s6
1142; MOVREL-NEXT:    s_mov_b32 s5, s7
1143; MOVREL-NEXT:    s_mov_b32 s6, s8
1144; MOVREL-NEXT:    s_mov_b32 s7, s9
1145; MOVREL-NEXT:    s_movrels_b32 s0, s0
1146; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
1147; MOVREL-NEXT:    s_mov_b32 m0, -1
1148; MOVREL-NEXT:    ds_write_b32 v0, v0
1149; MOVREL-NEXT:    s_endpgm
1150entry:
1151  %ext = extractelement <8 x i8 addrspace(3)*> %vec, i32 %idx
1152  store i8 addrspace(3)* %ext, i8 addrspace(3)* addrspace(3)* undef
1153  ret void
1154}
1155
1156define i8 addrspace(1)* @dyn_extract_v8p1_v_v(<8 x i8 addrspace(1)*> %vec, i32 %idx) {
1157; GPRIDX-LABEL: dyn_extract_v8p1_v_v:
1158; GPRIDX:       ; %bb.0: ; %entry
1159; GPRIDX-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1160; GPRIDX-NEXT:    s_mov_b64 s[4:5], exec
1161; GPRIDX-NEXT:  BB25_1: ; =>This Inner Loop Header: Depth=1
1162; GPRIDX-NEXT:    v_readfirstlane_b32 s6, v16
1163; GPRIDX-NEXT:    s_lshl_b32 s7, s6, 1
1164; GPRIDX-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v16
1165; GPRIDX-NEXT:    s_set_gpr_idx_on s7, gpr_idx(SRC0)
1166; GPRIDX-NEXT:    v_mov_b32_e32 v17, v0
1167; GPRIDX-NEXT:    s_set_gpr_idx_off
1168; GPRIDX-NEXT:    s_set_gpr_idx_on s7, gpr_idx(SRC0)
1169; GPRIDX-NEXT:    v_mov_b32_e32 v18, v1
1170; GPRIDX-NEXT:    s_set_gpr_idx_off
1171; GPRIDX-NEXT:    s_and_saveexec_b64 vcc, vcc
1172; GPRIDX-NEXT:    s_xor_b64 exec, exec, vcc
1173; GPRIDX-NEXT:    s_cbranch_execnz BB25_1
1174; GPRIDX-NEXT:  ; %bb.2:
1175; GPRIDX-NEXT:    s_mov_b64 exec, s[4:5]
1176; GPRIDX-NEXT:    v_mov_b32_e32 v0, v17
1177; GPRIDX-NEXT:    v_mov_b32_e32 v1, v18
1178; GPRIDX-NEXT:    s_setpc_b64 s[30:31]
1179;
1180; MOVREL-LABEL: dyn_extract_v8p1_v_v:
1181; MOVREL:       ; %bb.0: ; %entry
1182; MOVREL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1183; MOVREL-NEXT:    s_mov_b64 s[4:5], exec
1184; MOVREL-NEXT:  BB25_1: ; =>This Inner Loop Header: Depth=1
1185; MOVREL-NEXT:    v_readfirstlane_b32 s6, v16
1186; MOVREL-NEXT:    s_lshl_b32 m0, s6, 1
1187; MOVREL-NEXT:    v_cmp_eq_u32_e32 vcc, s6, v16
1188; MOVREL-NEXT:    v_movrels_b32_e32 v17, v0
1189; MOVREL-NEXT:    v_movrels_b32_e32 v18, v1
1190; MOVREL-NEXT:    s_and_saveexec_b64 vcc, vcc
1191; MOVREL-NEXT:    s_xor_b64 exec, exec, vcc
1192; MOVREL-NEXT:    s_cbranch_execnz BB25_1
1193; MOVREL-NEXT:  ; %bb.2:
1194; MOVREL-NEXT:    s_mov_b64 exec, s[4:5]
1195; MOVREL-NEXT:    v_mov_b32_e32 v0, v17
1196; MOVREL-NEXT:    v_mov_b32_e32 v1, v18
1197; MOVREL-NEXT:    s_setpc_b64 s[30:31]
1198entry:
1199  %ext = extractelement <8 x i8 addrspace(1)*> %vec, i32 %idx
1200  ret i8 addrspace(1)* %ext
1201}
1202
1203define amdgpu_ps void @dyn_extract_v8p1_s_s(<8 x i8 addrspace(1)*> inreg %vec, i32 inreg %idx) {
1204; GPRIDX-LABEL: dyn_extract_v8p1_s_s:
1205; GPRIDX:       ; %bb.0: ; %entry
1206; GPRIDX-NEXT:    s_mov_b32 s0, s2
1207; GPRIDX-NEXT:    s_mov_b32 s1, s3
1208; GPRIDX-NEXT:    s_mov_b32 m0, s18
1209; GPRIDX-NEXT:    s_mov_b32 s2, s4
1210; GPRIDX-NEXT:    s_mov_b32 s3, s5
1211; GPRIDX-NEXT:    s_mov_b32 s4, s6
1212; GPRIDX-NEXT:    s_mov_b32 s5, s7
1213; GPRIDX-NEXT:    s_mov_b32 s6, s8
1214; GPRIDX-NEXT:    s_mov_b32 s7, s9
1215; GPRIDX-NEXT:    s_mov_b32 s8, s10
1216; GPRIDX-NEXT:    s_mov_b32 s9, s11
1217; GPRIDX-NEXT:    s_mov_b32 s10, s12
1218; GPRIDX-NEXT:    s_mov_b32 s11, s13
1219; GPRIDX-NEXT:    s_mov_b32 s12, s14
1220; GPRIDX-NEXT:    s_mov_b32 s13, s15
1221; GPRIDX-NEXT:    s_mov_b32 s14, s16
1222; GPRIDX-NEXT:    s_mov_b32 s15, s17
1223; GPRIDX-NEXT:    s_movrels_b64 s[0:1], s[0:1]
1224; GPRIDX-NEXT:    v_mov_b32_e32 v0, s0
1225; GPRIDX-NEXT:    v_mov_b32_e32 v1, s1
1226; GPRIDX-NEXT:    global_store_dwordx2 v[0:1], v[0:1], off
1227; GPRIDX-NEXT:    s_endpgm
1228;
1229; MOVREL-LABEL: dyn_extract_v8p1_s_s:
1230; MOVREL:       ; %bb.0: ; %entry
1231; MOVREL-NEXT:    s_mov_b32 s0, s2
1232; MOVREL-NEXT:    s_mov_b32 s1, s3
1233; MOVREL-NEXT:    s_mov_b32 m0, s18
1234; MOVREL-NEXT:    s_mov_b32 s2, s4
1235; MOVREL-NEXT:    s_mov_b32 s3, s5
1236; MOVREL-NEXT:    s_mov_b32 s4, s6
1237; MOVREL-NEXT:    s_mov_b32 s5, s7
1238; MOVREL-NEXT:    s_mov_b32 s6, s8
1239; MOVREL-NEXT:    s_mov_b32 s7, s9
1240; MOVREL-NEXT:    s_mov_b32 s8, s10
1241; MOVREL-NEXT:    s_mov_b32 s9, s11
1242; MOVREL-NEXT:    s_mov_b32 s10, s12
1243; MOVREL-NEXT:    s_mov_b32 s11, s13
1244; MOVREL-NEXT:    s_mov_b32 s12, s14
1245; MOVREL-NEXT:    s_mov_b32 s13, s15
1246; MOVREL-NEXT:    s_mov_b32 s14, s16
1247; MOVREL-NEXT:    s_mov_b32 s15, s17
1248; MOVREL-NEXT:    s_movrels_b64 s[0:1], s[0:1]
1249; MOVREL-NEXT:    v_mov_b32_e32 v0, s0
1250; MOVREL-NEXT:    v_mov_b32_e32 v1, s1
1251; MOVREL-NEXT:    flat_store_dwordx2 v[0:1], v[0:1]
1252; MOVREL-NEXT:    s_endpgm
1253entry:
1254  %ext = extractelement <8 x i8 addrspace(1)*> %vec, i32 %idx
1255  store i8 addrspace(1)* %ext, i8 addrspace(1)* addrspace(1)* undef
1256  ret void
1257}
1258