1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s
3
4define <16 x i32> @no_existing_zext(<16 x i8> %a, <16 x i32> %op) {
5; CHECK-LABEL: no_existing_zext:
6; CHECK:       ; %bb.0: ; %entry
7; CHECK-NEXT:    movi.16b v5, #10
8; CHECK-NEXT:    cmhi.16b v0, v0, v5
9; CHECK-NEXT:    sshll.8h v5, v0, #0
10; CHECK-NEXT:    sshll2.8h v0, v0, #0
11; CHECK-NEXT:    sshll.4s v6, v5, #0
12; CHECK-NEXT:    sshll.4s v7, v0, #0
13; CHECK-NEXT:    sshll2.4s v0, v0, #0
14; CHECK-NEXT:    sshll2.4s v5, v5, #0
15; CHECK-NEXT:    and.16b v4, v4, v0
16; CHECK-NEXT:    and.16b v5, v2, v5
17; CHECK-NEXT:    and.16b v2, v3, v7
18; CHECK-NEXT:    and.16b v0, v1, v6
19; CHECK-NEXT:    mov.16b v1, v5
20; CHECK-NEXT:    mov.16b v3, v4
21; CHECK-NEXT:    ret
22entry:
23  %cmp = icmp ugt <16 x i8> %a, <i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10>
24  %sel = select <16 x i1> %cmp, <16 x i32> %op, <16 x i32> zeroinitializer
25  ret <16 x i32> %sel
26}
27
28define <16 x i32> @second_compare_operand_not_splat(<16 x i8> %a, <16 x i8> %b) {
29; CHECK-LABEL: second_compare_operand_not_splat:
30; CHECK:       ; %bb.0: ; %entry
31; CHECK-NEXT:    ushll.8h v2, v0, #0
32; CHECK-NEXT:    ushll2.8h v3, v0, #0
33; CHECK-NEXT:    cmgt.16b v0, v0, v1
34; CHECK-NEXT:    ushll.4s v4, v2, #0
35; CHECK-NEXT:    ushll.4s v5, v3, #0
36; CHECK-NEXT:    ushll2.4s v1, v2, #0
37; CHECK-NEXT:    ushll2.4s v2, v3, #0
38; CHECK-NEXT:    sshll.8h v3, v0, #0
39; CHECK-NEXT:    sshll2.8h v0, v0, #0
40; CHECK-NEXT:    sshll.4s v6, v3, #0
41; CHECK-NEXT:    sshll.4s v7, v0, #0
42; CHECK-NEXT:    sshll2.4s v0, v0, #0
43; CHECK-NEXT:    sshll2.4s v16, v3, #0
44; CHECK-NEXT:    and.16b v3, v2, v0
45; CHECK-NEXT:    and.16b v1, v1, v16
46; CHECK-NEXT:    and.16b v2, v5, v7
47; CHECK-NEXT:    and.16b v0, v4, v6
48; CHECK-NEXT:    ret
49entry:
50  %ext = zext <16 x i8> %a to <16 x i32>
51  %cmp = icmp sgt <16 x i8> %a, %b
52  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
53  ret <16 x i32> %sel
54}
55
56define <16 x i32> @same_zext_used_in_cmp_signed_pred_and_select(<16 x i8> %a) {
57; CHECK-LABEL: same_zext_used_in_cmp_signed_pred_and_select:
58; CHECK:       ; %bb.0: ; %entry
59; CHECK-NEXT:    movi.16b v1, #10
60; CHECK-NEXT:    ushll.8h v2, v0, #0
61; CHECK-NEXT:    ushll2.8h v3, v0, #0
62; CHECK-NEXT:    ushll.4s v4, v2, #0
63; CHECK-NEXT:    cmgt.16b v0, v0, v1
64; CHECK-NEXT:    ushll.4s v5, v3, #0
65; CHECK-NEXT:    ushll2.4s v1, v3, #0
66; CHECK-NEXT:    sshll.8h v3, v0, #0
67; CHECK-NEXT:    sshll2.8h v0, v0, #0
68; CHECK-NEXT:    ushll2.4s v2, v2, #0
69; CHECK-NEXT:    sshll.4s v6, v3, #0
70; CHECK-NEXT:    sshll.4s v7, v0, #0
71; CHECK-NEXT:    sshll2.4s v0, v0, #0
72; CHECK-NEXT:    sshll2.4s v16, v3, #0
73; CHECK-NEXT:    and.16b v3, v1, v0
74; CHECK-NEXT:    and.16b v1, v2, v16
75; CHECK-NEXT:    and.16b v2, v5, v7
76; CHECK-NEXT:    and.16b v0, v4, v6
77; CHECK-NEXT:    ret
78entry:
79  %ext = zext <16 x i8> %a to <16 x i32>
80  %cmp = icmp sgt <16 x i8> %a, <i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10>
81  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
82  ret <16 x i32> %sel
83}
84
85define <16 x i32> @same_zext_used_in_cmp_unsigned_pred_and_select(<16 x i8> %a) {
86; CHECK-LABEL: same_zext_used_in_cmp_unsigned_pred_and_select:
87; CHECK:       ; %bb.0: ; %entry
88; CHECK-NEXT:    movi.16b v1, #10
89; CHECK-NEXT:    ushll.8h v2, v0, #0
90; CHECK-NEXT:    ushll2.8h v3, v0, #0
91; CHECK-NEXT:    ushll.4s v4, v2, #0
92; CHECK-NEXT:    cmhi.16b v0, v0, v1
93; CHECK-NEXT:    ushll.4s v5, v3, #0
94; CHECK-NEXT:    ushll2.4s v1, v3, #0
95; CHECK-NEXT:    sshll.8h v3, v0, #0
96; CHECK-NEXT:    sshll2.8h v0, v0, #0
97; CHECK-NEXT:    ushll2.4s v2, v2, #0
98; CHECK-NEXT:    sshll.4s v6, v3, #0
99; CHECK-NEXT:    sshll.4s v7, v0, #0
100; CHECK-NEXT:    sshll2.4s v0, v0, #0
101; CHECK-NEXT:    sshll2.4s v16, v3, #0
102; CHECK-NEXT:    and.16b v3, v1, v0
103; CHECK-NEXT:    and.16b v1, v2, v16
104; CHECK-NEXT:    and.16b v2, v5, v7
105; CHECK-NEXT:    and.16b v0, v4, v6
106; CHECK-NEXT:    ret
107entry:
108  %ext = zext <16 x i8> %a to <16 x i32>
109  %cmp = icmp ugt <16 x i8> %a, <i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10>
110  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
111  ret <16 x i32> %sel
112}
113
114; A variation of @same_zext_used_in_cmp_unsigned_pred_and_select, with with
115; multiple users of the compare.
116define <16 x i32> @same_zext_used_in_cmp_unsigned_pred_and_select_other_use(<16 x i8> %a, <16 x i64> %v, <16 x i64>* %ptr) {
117; CHECK-LABEL: same_zext_used_in_cmp_unsigned_pred_and_select_other_use:
118; CHECK:       ; %bb.0: ; %entry
119; CHECK-NEXT:    mov.16b v16, v2
120; CHECK-NEXT:    movi.16b v2, #10
121; CHECK-NEXT:    ushll.8h v18, v0, #0
122; CHECK-NEXT:    ushll2.8h v20, v0, #0
123; CHECK-NEXT:    mov.16b v17, v1
124; CHECK-NEXT:    ldr q1, [sp]
125; CHECK-NEXT:    cmhi.16b v0, v0, v2
126; CHECK-NEXT:    ushll.4s v19, v18, #0
127; CHECK-NEXT:    sshll2.8h v21, v0, #0
128; CHECK-NEXT:    sshll.8h v0, v0, #0
129; CHECK-NEXT:    sshll2.4s v22, v21, #0
130; CHECK-NEXT:    sshll.4s v21, v21, #0
131; CHECK-NEXT:    sshll2.2d v23, v22, #0
132; CHECK-NEXT:    sshll.2d v24, v22, #0
133; CHECK-NEXT:    sshll2.4s v25, v0, #0
134; CHECK-NEXT:    sshll2.2d v26, v21, #0
135; CHECK-NEXT:    sshll.2d v28, v21, #0
136; CHECK-NEXT:    sshll2.2d v27, v25, #0
137; CHECK-NEXT:    sshll.4s v0, v0, #0
138; CHECK-NEXT:    and.16b v1, v1, v23
139; CHECK-NEXT:    and.16b v7, v7, v24
140; CHECK-NEXT:    sshll.2d v29, v25, #0
141; CHECK-NEXT:    stp q7, q1, [x0, #96]
142; CHECK-NEXT:    and.16b v1, v6, v26
143; CHECK-NEXT:    and.16b v5, v5, v28
144; CHECK-NEXT:    ushll.4s v2, v20, #0
145; CHECK-NEXT:    stp q5, q1, [x0, #64]
146; CHECK-NEXT:    ushll2.4s v18, v18, #0
147; CHECK-NEXT:    ushll2.4s v20, v20, #0
148; CHECK-NEXT:    and.16b v1, v4, v27
149; CHECK-NEXT:    sshll2.2d v4, v0, #0
150; CHECK-NEXT:    sshll.2d v5, v0, #0
151; CHECK-NEXT:    and.16b v3, v3, v29
152; CHECK-NEXT:    stp q3, q1, [x0, #32]
153; CHECK-NEXT:    and.16b v3, v20, v22
154; CHECK-NEXT:    and.16b v1, v18, v25
155; CHECK-NEXT:    and.16b v2, v2, v21
156; CHECK-NEXT:    and.16b v0, v19, v0
157; CHECK-NEXT:    and.16b v4, v16, v4
158; CHECK-NEXT:    and.16b v5, v17, v5
159; CHECK-NEXT:    stp q5, q4, [x0]
160; CHECK-NEXT:    ret
161entry:
162  %ext = zext <16 x i8> %a to <16 x i32>
163  %cmp = icmp ugt <16 x i8> %a, <i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10>
164  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
165  %sel.2 = select <16 x i1> %cmp, <16 x i64> %v, <16 x i64> zeroinitializer
166  store <16 x i64> %sel.2, <16 x i64>* %ptr
167  ret <16 x i32> %sel
168}
169
170define <16 x i32> @same_sext_used_in_cmp_signed_pred_and_select(<16 x i8> %a) {
171; CHECK-LABEL: same_sext_used_in_cmp_signed_pred_and_select:
172; CHECK:       ; %bb.0: ; %entry
173; CHECK-NEXT:    movi.16b v1, #10
174; CHECK-NEXT:    sshll.8h v3, v0, #0
175; CHECK-NEXT:    sshll2.8h v2, v0, #0
176; CHECK-NEXT:    cmgt.16b v0, v0, v1
177; CHECK-NEXT:    ext.16b v1, v3, v3, #8
178; CHECK-NEXT:    sshll.8h v5, v0, #0
179; CHECK-NEXT:    sshll2.8h v0, v0, #0
180; CHECK-NEXT:    ext.16b v4, v2, v2, #8
181; CHECK-NEXT:    ext.16b v6, v5, v5, #8
182; CHECK-NEXT:    ext.16b v7, v0, v0, #8
183; CHECK-NEXT:    and.8b v0, v2, v0
184; CHECK-NEXT:    sshll.4s v2, v0, #0
185; CHECK-NEXT:    and.8b v0, v3, v5
186; CHECK-NEXT:    and.8b v1, v1, v6
187; CHECK-NEXT:    and.8b v3, v4, v7
188; CHECK-NEXT:    sshll.4s v0, v0, #0
189; CHECK-NEXT:    sshll.4s v1, v1, #0
190; CHECK-NEXT:    sshll.4s v3, v3, #0
191; CHECK-NEXT:    ret
192entry:
193  %ext = sext <16 x i8> %a to <16 x i32>
194  %cmp = icmp sgt <16 x i8> %a, <i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10>
195  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
196  ret <16 x i32> %sel
197}
198
199define <16 x i32> @same_sext_used_in_cmp_unsigned_pred_and_select(<16 x i8> %a) {
200; CHECK-LABEL: same_sext_used_in_cmp_unsigned_pred_and_select:
201; CHECK:       ; %bb.0: ; %entry
202; CHECK-NEXT:    movi.16b v1, #10
203; CHECK-NEXT:    sshll.8h v3, v0, #0
204; CHECK-NEXT:    sshll2.8h v2, v0, #0
205; CHECK-NEXT:    cmhi.16b v0, v0, v1
206; CHECK-NEXT:    ext.16b v1, v3, v3, #8
207; CHECK-NEXT:    sshll.8h v5, v0, #0
208; CHECK-NEXT:    sshll2.8h v0, v0, #0
209; CHECK-NEXT:    ext.16b v4, v2, v2, #8
210; CHECK-NEXT:    ext.16b v6, v5, v5, #8
211; CHECK-NEXT:    ext.16b v7, v0, v0, #8
212; CHECK-NEXT:    and.8b v0, v2, v0
213; CHECK-NEXT:    sshll.4s v2, v0, #0
214; CHECK-NEXT:    and.8b v0, v3, v5
215; CHECK-NEXT:    and.8b v1, v1, v6
216; CHECK-NEXT:    and.8b v3, v4, v7
217; CHECK-NEXT:    sshll.4s v0, v0, #0
218; CHECK-NEXT:    sshll.4s v1, v1, #0
219; CHECK-NEXT:    sshll.4s v3, v3, #0
220; CHECK-NEXT:    ret
221entry:
222  %ext = sext <16 x i8> %a to <16 x i32>
223  %cmp = icmp ugt <16 x i8> %a, <i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10, i8 10>
224  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
225  ret <16 x i32> %sel
226}
227
228define <16 x i32> @same_zext_used_in_cmp_signed_pred_and_select_can_convert_to_unsigned_pred(<16 x i8> %a) {
229; CHECK-LABEL: same_zext_used_in_cmp_signed_pred_and_select_can_convert_to_unsigned_pred:
230; CHECK:       ; %bb.0: ; %entry
231; CHECK-NEXT:    movi.2d v1, #0xffffffffffffffff
232; CHECK-NEXT:    ushll.8h v2, v0, #0
233; CHECK-NEXT:    ushll2.8h v3, v0, #0
234; CHECK-NEXT:    ushll.4s v4, v2, #0
235; CHECK-NEXT:    cmgt.16b v0, v0, v1
236; CHECK-NEXT:    ushll.4s v5, v3, #0
237; CHECK-NEXT:    ushll2.4s v1, v3, #0
238; CHECK-NEXT:    sshll.8h v3, v0, #0
239; CHECK-NEXT:    sshll2.8h v0, v0, #0
240; CHECK-NEXT:    ushll2.4s v2, v2, #0
241; CHECK-NEXT:    sshll.4s v6, v3, #0
242; CHECK-NEXT:    sshll.4s v7, v0, #0
243; CHECK-NEXT:    sshll2.4s v0, v0, #0
244; CHECK-NEXT:    sshll2.4s v16, v3, #0
245; CHECK-NEXT:    and.16b v3, v1, v0
246; CHECK-NEXT:    and.16b v1, v2, v16
247; CHECK-NEXT:    and.16b v2, v5, v7
248; CHECK-NEXT:    and.16b v0, v4, v6
249; CHECK-NEXT:    ret
250entry:
251  %ext = zext <16 x i8> %a to <16 x i32>
252  %cmp = icmp sgt <16 x i8> %a,  <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
253  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
254  ret <16 x i32> %sel
255}
256
257define void @extension_in_loop_v16i8_to_v16i32(i8* %src, i32* %dst) {
258; CHECK-LABEL: extension_in_loop_v16i8_to_v16i32:
259; CHECK:       ; %bb.0: ; %entry
260; CHECK-NEXT:    movi.2d v0, #0xffffffffffffffff
261; CHECK-NEXT:    mov x8, xzr
262; CHECK-NEXT:  LBB8_1: ; %loop
263; CHECK-NEXT:    ; =>This Inner Loop Header: Depth=1
264; CHECK-NEXT:    ldr q1, [x0, x8]
265; CHECK-NEXT:    add x8, x8, #16
266; CHECK-NEXT:    cmp x8, #128
267; CHECK-NEXT:    cmgt.16b v2, v1, v0
268; CHECK-NEXT:    ushll2.8h v3, v1, #0
269; CHECK-NEXT:    sshll2.8h v4, v2, #0
270; CHECK-NEXT:    ushll2.4s v5, v3, #0
271; CHECK-NEXT:    ushll.4s v3, v3, #0
272; CHECK-NEXT:    sshll2.4s v6, v4, #0
273; CHECK-NEXT:    sshll.4s v4, v4, #0
274; CHECK-NEXT:    ushll.8h v1, v1, #0
275; CHECK-NEXT:    sshll.8h v2, v2, #0
276; CHECK-NEXT:    and.16b v5, v5, v6
277; CHECK-NEXT:    and.16b v3, v3, v4
278; CHECK-NEXT:    stp q3, q5, [x1, #32]
279; CHECK-NEXT:    sshll2.4s v4, v2, #0
280; CHECK-NEXT:    sshll.4s v2, v2, #0
281; CHECK-NEXT:    ushll2.4s v3, v1, #0
282; CHECK-NEXT:    ushll.4s v1, v1, #0
283; CHECK-NEXT:    and.16b v3, v3, v4
284; CHECK-NEXT:    and.16b v1, v1, v2
285; CHECK-NEXT:    stp q1, q3, [x1], #64
286; CHECK-NEXT:    b.ne LBB8_1
287; CHECK-NEXT:  ; %bb.2: ; %exit
288; CHECK-NEXT:    ret
289entry:
290  br label %loop
291
292loop:
293  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
294  %src.gep = getelementptr i8, i8* %src, i64 %iv
295  %src.gep.cast = bitcast i8* %src.gep to <16 x i8>*
296  %load = load <16 x i8>, <16 x i8>* %src.gep.cast
297  %cmp = icmp sgt <16 x i8> %load,  <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
298  %ext = zext <16 x i8> %load to <16 x i32>
299  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
300  %dst.gep = getelementptr i32, i32* %dst, i64 %iv
301  %dst.gep.cast = bitcast i32* %dst.gep to <16 x i32>*
302  store <16 x i32> %sel, <16 x i32>* %dst.gep.cast
303  %iv.next = add nuw i64 %iv, 16
304  %ec = icmp eq i64 %iv.next, 128
305  br i1 %ec, label %exit, label %loop
306
307exit:
308  ret void
309}
310
311define void @extension_in_loop_as_shuffle_v16i8_to_v16i32(i8* %src, i32* %dst) {
312; CHECK-LABEL: extension_in_loop_as_shuffle_v16i8_to_v16i32:
313; CHECK:       ; %bb.0: ; %entry
314; CHECK-NEXT:  Lloh0:
315; CHECK-NEXT:    adrp x9, lCPI9_0@PAGE
316; CHECK-NEXT:  Lloh1:
317; CHECK-NEXT:    adrp x10, lCPI9_1@PAGE
318; CHECK-NEXT:  Lloh2:
319; CHECK-NEXT:    adrp x11, lCPI9_2@PAGE
320; CHECK-NEXT:  Lloh3:
321; CHECK-NEXT:    adrp x12, lCPI9_3@PAGE
322; CHECK-NEXT:    movi.2d v2, #0xffffffffffffffff
323; CHECK-NEXT:    mov x8, xzr
324; CHECK-NEXT:  Lloh4:
325; CHECK-NEXT:    ldr q0, [x9, lCPI9_0@PAGEOFF]
326; CHECK-NEXT:  Lloh5:
327; CHECK-NEXT:    ldr q1, [x10, lCPI9_1@PAGEOFF]
328; CHECK-NEXT:  Lloh6:
329; CHECK-NEXT:    ldr q3, [x11, lCPI9_2@PAGEOFF]
330; CHECK-NEXT:  Lloh7:
331; CHECK-NEXT:    ldr q4, [x12, lCPI9_3@PAGEOFF]
332; CHECK-NEXT:  LBB9_1: ; %loop
333; CHECK-NEXT:    ; =>This Inner Loop Header: Depth=1
334; CHECK-NEXT:    ldr q5, [x0, x8]
335; CHECK-NEXT:    add x8, x8, #16
336; CHECK-NEXT:    cmp x8, #128
337; CHECK-NEXT:    cmgt.16b v6, v5, v2
338; CHECK-NEXT:    tbl.16b v7, { v5 }, v0
339; CHECK-NEXT:    tbl.16b v16, { v5 }, v1
340; CHECK-NEXT:    sshll2.8h v18, v6, #0
341; CHECK-NEXT:    tbl.16b v17, { v5 }, v3
342; CHECK-NEXT:    sshll2.4s v19, v18, #0
343; CHECK-NEXT:    sshll.4s v18, v18, #0
344; CHECK-NEXT:    tbl.16b v5, { v5 }, v4
345; CHECK-NEXT:    sshll.8h v6, v6, #0
346; CHECK-NEXT:    and.16b v7, v7, v19
347; CHECK-NEXT:    and.16b v16, v16, v18
348; CHECK-NEXT:    stp q16, q7, [x1, #32]
349; CHECK-NEXT:    sshll2.4s v7, v6, #0
350; CHECK-NEXT:    sshll.4s v6, v6, #0
351; CHECK-NEXT:    and.16b v7, v17, v7
352; CHECK-NEXT:    and.16b v5, v5, v6
353; CHECK-NEXT:    stp q5, q7, [x1], #64
354; CHECK-NEXT:    b.ne LBB9_1
355; CHECK-NEXT:  ; %bb.2: ; %exit
356; CHECK-NEXT:    ret
357; CHECK-NEXT:    .loh AdrpLdr Lloh3, Lloh7
358; CHECK-NEXT:    .loh AdrpLdr Lloh2, Lloh6
359; CHECK-NEXT:    .loh AdrpLdr Lloh1, Lloh5
360; CHECK-NEXT:    .loh AdrpLdr Lloh0, Lloh4
361entry:
362  br label %loop
363
364loop:
365  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
366  %src.gep = getelementptr i8, i8* %src, i64 %iv
367  %src.gep.cast = bitcast i8* %src.gep to <16 x i8>*
368  %load = load <16 x i8>, <16 x i8>* %src.gep.cast
369  %cmp = icmp sgt <16 x i8> %load,  <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
370  %ext.shuf = shufflevector <16 x i8> %load, <16 x i8> zeroinitializer, <64 x i32> <i32 16, i32 16, i32 16, i32 0, i32 16, i32 16, i32 16, i32 1, i32 16, i32 16, i32 16, i32 2, i32 16, i32 16, i32 16, i32 3, i32 16, i32 16, i32 16, i32 4, i32 16, i32 16, i32 16, i32 5, i32 16, i32 16, i32 16, i32 6, i32 16, i32 16, i32 16, i32 7, i32 16, i32 16, i32 16, i32 8, i32 16, i32 16, i32 16, i32 9, i32 16, i32 16, i32 16, i32 10, i32 16, i32 16, i32 16, i32 11, i32 16, i32 16, i32 16, i32 12, i32 16, i32 16, i32 16, i32 13, i32 16, i32 16, i32 16, i32 14, i32 16, i32 16, i32 16, i32 15>
371  %ext = bitcast <64 x i8> %ext.shuf to <16 x i32>
372  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
373  %dst.gep = getelementptr i32, i32* %dst, i64 %iv
374  %dst.gep.cast = bitcast i32* %dst.gep to <16 x i32>*
375  store <16 x i32> %sel, <16 x i32>* %dst.gep.cast
376  %iv.next = add nuw i64 %iv, 16
377  %ec = icmp eq i64 %iv.next, 128
378  br i1 %ec, label %exit, label %loop
379
380exit:
381  ret void
382}
383
384define void @shuffle_in_loop_is_no_extend_v16i8_to_v16i32(i8* %src, i32* %dst) {
385; CHECK-LABEL: shuffle_in_loop_is_no_extend_v16i8_to_v16i32:
386; CHECK:       ; %bb.0: ; %entry
387; CHECK-NEXT:  Lloh8:
388; CHECK-NEXT:    adrp x9, lCPI10_0@PAGE
389; CHECK-NEXT:  Lloh9:
390; CHECK-NEXT:    adrp x10, lCPI10_1@PAGE
391; CHECK-NEXT:  Lloh10:
392; CHECK-NEXT:    adrp x11, lCPI10_2@PAGE
393; CHECK-NEXT:  Lloh11:
394; CHECK-NEXT:    adrp x12, lCPI10_3@PAGE
395; CHECK-NEXT:    movi.2d v2, #0xffffffffffffffff
396; CHECK-NEXT:    mov x8, xzr
397; CHECK-NEXT:  Lloh12:
398; CHECK-NEXT:    ldr q0, [x9, lCPI10_0@PAGEOFF]
399; CHECK-NEXT:  Lloh13:
400; CHECK-NEXT:    ldr q1, [x10, lCPI10_1@PAGEOFF]
401; CHECK-NEXT:  Lloh14:
402; CHECK-NEXT:    ldr q3, [x11, lCPI10_2@PAGEOFF]
403; CHECK-NEXT:  Lloh15:
404; CHECK-NEXT:    ldr q4, [x12, lCPI10_3@PAGEOFF]
405; CHECK-NEXT:  LBB10_1: ; %loop
406; CHECK-NEXT:    ; =>This Inner Loop Header: Depth=1
407; CHECK-NEXT:    ldr q5, [x0, x8]
408; CHECK-NEXT:    add x8, x8, #16
409; CHECK-NEXT:    cmp x8, #128
410; CHECK-NEXT:    cmgt.16b v6, v5, v2
411; CHECK-NEXT:    tbl.16b v7, { v5 }, v0
412; CHECK-NEXT:    tbl.16b v16, { v5 }, v1
413; CHECK-NEXT:    sshll2.8h v18, v6, #0
414; CHECK-NEXT:    tbl.16b v17, { v5 }, v3
415; CHECK-NEXT:    sshll2.4s v19, v18, #0
416; CHECK-NEXT:    sshll.4s v18, v18, #0
417; CHECK-NEXT:    tbl.16b v5, { v5 }, v4
418; CHECK-NEXT:    sshll.8h v6, v6, #0
419; CHECK-NEXT:    and.16b v7, v7, v19
420; CHECK-NEXT:    and.16b v16, v16, v18
421; CHECK-NEXT:    stp q16, q7, [x1, #32]
422; CHECK-NEXT:    sshll2.4s v7, v6, #0
423; CHECK-NEXT:    sshll.4s v6, v6, #0
424; CHECK-NEXT:    and.16b v7, v17, v7
425; CHECK-NEXT:    and.16b v5, v5, v6
426; CHECK-NEXT:    stp q5, q7, [x1], #64
427; CHECK-NEXT:    b.ne LBB10_1
428; CHECK-NEXT:  ; %bb.2: ; %exit
429; CHECK-NEXT:    ret
430; CHECK-NEXT:    .loh AdrpLdr Lloh11, Lloh15
431; CHECK-NEXT:    .loh AdrpLdr Lloh10, Lloh14
432; CHECK-NEXT:    .loh AdrpLdr Lloh9, Lloh13
433; CHECK-NEXT:    .loh AdrpLdr Lloh8, Lloh12
434entry:
435  br label %loop
436
437loop:
438  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
439  %src.gep = getelementptr i8, i8* %src, i64 %iv
440  %src.gep.cast = bitcast i8* %src.gep to <16 x i8>*
441  %load = load <16 x i8>, <16 x i8>* %src.gep.cast
442  %cmp = icmp sgt <16 x i8> %load,  <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
443  %ext.shuf = shufflevector <16 x i8> %load, <16 x i8> zeroinitializer, <64 x i32> <i32 1, i32 16, i32 16, i32 0, i32 16, i32 16, i32 16, i32 1, i32 16, i32 16, i32 16, i32 2, i32 16, i32 16, i32 16, i32 3, i32 16, i32 16, i32 16, i32 4, i32 16, i32 16, i32 16, i32 5, i32 16, i32 16, i32 16, i32 6, i32 16, i32 16, i32 16, i32 7, i32 16, i32 16, i32 16, i32 8, i32 16, i32 16, i32 16, i32 9, i32 16, i32 16, i32 16, i32 10, i32 16, i32 16, i32 16, i32 11, i32 16, i32 16, i32 16, i32 12, i32 16, i32 16, i32 16, i32 13, i32 16, i32 16, i32 16, i32 14, i32 16, i32 16, i32 16, i32 15>
444  %ext = bitcast <64 x i8> %ext.shuf to <16 x i32>
445  %sel = select <16 x i1> %cmp, <16 x i32> %ext, <16 x i32> zeroinitializer
446  %dst.gep = getelementptr i32, i32* %dst, i64 %iv
447  %dst.gep.cast = bitcast i32* %dst.gep to <16 x i32>*
448  store <16 x i32> %sel, <16 x i32>* %dst.gep.cast
449  %iv.next = add nuw i64 %iv, 16
450  %ec = icmp eq i64 %iv.next, 128
451  br i1 %ec, label %exit, label %loop
452
453exit:
454  ret void
455}
456