1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s --check-prefixes=CHECK
3; RUN: FileCheck --check-prefix=WARN --allow-empty %s < %t
4
5; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
6; WARN-NOT: warning
7
8; LEGAL INTEGER TYPES
9
10define <vscale x 2 x i64> @stepvector_nxv2i64() {
11; CHECK-LABEL: stepvector_nxv2i64:
12; CHECK:       // %bb.0: // %entry
13; CHECK-NEXT:    index z0.d, #0, #1
14; CHECK-NEXT:    ret
15entry:
16  %0 = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
17  ret <vscale x 2 x i64> %0
18}
19
20define <vscale x 4 x i32> @stepvector_nxv4i32() {
21; CHECK-LABEL: stepvector_nxv4i32:
22; CHECK:       // %bb.0: // %entry
23; CHECK-NEXT:    index z0.s, #0, #1
24; CHECK-NEXT:    ret
25entry:
26  %0 = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
27  ret <vscale x 4 x i32> %0
28}
29
30define <vscale x 8 x i16> @stepvector_nxv8i16() {
31; CHECK-LABEL: stepvector_nxv8i16:
32; CHECK:       // %bb.0: // %entry
33; CHECK-NEXT:    index z0.h, #0, #1
34; CHECK-NEXT:    ret
35entry:
36  %0 = call <vscale x 8 x i16> @llvm.experimental.stepvector.nxv8i16()
37  ret <vscale x 8 x i16> %0
38}
39
40define <vscale x 16 x i8> @stepvector_nxv16i8() {
41; CHECK-LABEL: stepvector_nxv16i8:
42; CHECK:       // %bb.0: // %entry
43; CHECK-NEXT:    index z0.b, #0, #1
44; CHECK-NEXT:    ret
45entry:
46  %0 = call <vscale x 16 x i8> @llvm.experimental.stepvector.nxv16i8()
47  ret <vscale x 16 x i8> %0
48}
49
50; ILLEGAL INTEGER TYPES
51
52define <vscale x 4 x i64> @stepvector_nxv4i64() {
53; CHECK-LABEL: stepvector_nxv4i64:
54; CHECK:       // %bb.0: // %entry
55; CHECK-NEXT:    cntd x8
56; CHECK-NEXT:    mov z1.d, x8
57; CHECK-NEXT:    index z0.d, #0, #1
58; CHECK-NEXT:    add z1.d, z0.d, z1.d
59; CHECK-NEXT:    ret
60entry:
61  %0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
62  ret <vscale x 4 x i64> %0
63}
64
65define <vscale x 16 x i32> @stepvector_nxv16i32() {
66; CHECK-LABEL: stepvector_nxv16i32:
67; CHECK:       // %bb.0: // %entry
68; CHECK-NEXT:    cntw x9
69; CHECK-NEXT:    cnth x8
70; CHECK-NEXT:    index z0.s, #0, #1
71; CHECK-NEXT:    mov z1.s, w9
72; CHECK-NEXT:    mov z3.s, w8
73; CHECK-NEXT:    add z1.s, z0.s, z1.s
74; CHECK-NEXT:    add z2.s, z0.s, z3.s
75; CHECK-NEXT:    add z3.s, z1.s, z3.s
76; CHECK-NEXT:    ret
77entry:
78  %0 = call <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
79  ret <vscale x 16 x i32> %0
80}
81
82define <vscale x 2 x i32> @stepvector_nxv2i32() {
83; CHECK-LABEL: stepvector_nxv2i32:
84; CHECK:       // %bb.0: // %entry
85; CHECK-NEXT:    index z0.d, #0, #1
86; CHECK-NEXT:    ret
87entry:
88  %0 = call <vscale x 2 x i32> @llvm.experimental.stepvector.nxv2i32()
89  ret <vscale x 2 x i32> %0
90}
91
92define <vscale x 4 x i16> @stepvector_nxv4i16() {
93; CHECK-LABEL: stepvector_nxv4i16:
94; CHECK:       // %bb.0: // %entry
95; CHECK-NEXT:    index z0.s, #0, #1
96; CHECK-NEXT:    ret
97entry:
98  %0 = call <vscale x 4 x i16> @llvm.experimental.stepvector.nxv4i16()
99  ret <vscale x 4 x i16> %0
100}
101
102define <vscale x 8 x i8> @stepvector_nxv8i8() {
103; CHECK-LABEL: stepvector_nxv8i8:
104; CHECK:       // %bb.0: // %entry
105; CHECK-NEXT:    index z0.h, #0, #1
106; CHECK-NEXT:    ret
107entry:
108  %0 = call <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
109  ret <vscale x 8 x i8> %0
110}
111
112declare <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
113declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
114declare <vscale x 8 x i16> @llvm.experimental.stepvector.nxv8i16()
115declare <vscale x 16 x i8> @llvm.experimental.stepvector.nxv16i8()
116
117declare <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
118declare <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
119declare <vscale x 2 x i32> @llvm.experimental.stepvector.nxv2i32()
120declare <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
121declare <vscale x 4 x i16> @llvm.experimental.stepvector.nxv4i16()
122