1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
3
4; FADD
5
6define double @fadda_nxv8f64(double %init, <vscale x 8 x double> %a) {
7; CHECK-LABEL: fadda_nxv8f64:
8; CHECK:       // %bb.0:
9; CHECK-NEXT:    // kill: def $d0 killed $d0 def $z0
10; CHECK-NEXT:    ptrue p0.d
11; CHECK-NEXT:    fadda d0, p0, d0, z1.d
12; CHECK-NEXT:    fadda d0, p0, d0, z2.d
13; CHECK-NEXT:    fadda d0, p0, d0, z3.d
14; CHECK-NEXT:    fadda d0, p0, d0, z4.d
15; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $z0
16; CHECK-NEXT:    ret
17  %res = call double @llvm.vector.reduce.fadd.nxv8f64(double %init, <vscale x 8 x double> %a)
18  ret double %res
19}
20
21; FADDV
22
23define float @faddv_nxv8f32(float %init, <vscale x 8 x float> %a) {
24; CHECK-LABEL: faddv_nxv8f32:
25; CHECK:       // %bb.0:
26; CHECK-NEXT:    fadd z1.s, z1.s, z2.s
27; CHECK-NEXT:    ptrue p0.s
28; CHECK-NEXT:    faddv s1, p0, z1.s
29; CHECK-NEXT:    fadd s0, s0, s1
30; CHECK-NEXT:    ret
31  %res = call fast float @llvm.vector.reduce.fadd.nxv8f32(float %init, <vscale x 8 x float> %a)
32  ret float %res
33}
34
35; FMAXV
36
37define double @fmaxv_nxv8f64(<vscale x 8 x double> %a) {
38; CHECK-LABEL: fmaxv_nxv8f64:
39; CHECK:       // %bb.0:
40; CHECK-NEXT:    ptrue p0.d
41; CHECK-NEXT:    fmaxnm z1.d, p0/m, z1.d, z3.d
42; CHECK-NEXT:    fmaxnm z0.d, p0/m, z0.d, z2.d
43; CHECK-NEXT:    fmaxnm z0.d, p0/m, z0.d, z1.d
44; CHECK-NEXT:    fmaxnmv d0, p0, z0.d
45; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $z0
46; CHECK-NEXT:    ret
47  %res = call double @llvm.vector.reduce.fmax.nxv8f64(<vscale x 8 x double> %a)
48  ret double %res
49}
50
51; FMINV
52
53define half @fminv_nxv16f16(<vscale x 16 x half> %a) {
54; CHECK-LABEL: fminv_nxv16f16:
55; CHECK:       // %bb.0:
56; CHECK-NEXT:    ptrue p0.h
57; CHECK-NEXT:    fminnm z0.h, p0/m, z0.h, z1.h
58; CHECK-NEXT:    fminnmv h0, p0, z0.h
59; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $z0
60; CHECK-NEXT:    ret
61  %res = call half @llvm.vector.reduce.fmin.nxv16f16(<vscale x 16 x half> %a)
62  ret half %res
63}
64
65declare double @llvm.vector.reduce.fadd.nxv8f64(double, <vscale x 8 x double>)
66declare float @llvm.vector.reduce.fadd.nxv8f32(float, <vscale x 8 x float>)
67
68declare double @llvm.vector.reduce.fmax.nxv8f64(<vscale x 8 x double>)
69
70declare half @llvm.vector.reduce.fmin.nxv16f16(<vscale x 16 x half>)
71