1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
3
4define i64 @sub1_disguised_constant(i64 %x) {
5; CHECK-LABEL: sub1_disguised_constant:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    sub w8, w0, #1
8; CHECK-NEXT:    and w8, w0, w8
9; CHECK-NEXT:    and x0, x8, #0xffff
10; CHECK-NEXT:    ret
11  %a1 = and i64 %x, 65535
12  %a2 = add i64 %x, 65535
13  %r = and i64 %a1, %a2
14  ret i64 %r
15}
16
17define i8 @masked_sub_i8(i8 %x) {
18; CHECK-LABEL: masked_sub_i8:
19; CHECK:       // %bb.0:
20; CHECK-NEXT:    mov w8, #5
21; CHECK-NEXT:    mov w9, #7
22; CHECK-NEXT:    and w8, w0, w8
23; CHECK-NEXT:    sub w0, w9, w8
24; CHECK-NEXT:    ret
25  %a = and i8 %x, 5
26  %m = sub i8 7, %a
27  ret i8 %m
28}
29
30define i8 @not_masked_sub_i8(i8 %x) {
31; CHECK-LABEL: not_masked_sub_i8:
32; CHECK:       // %bb.0:
33; CHECK-NEXT:    mov w8, #7
34; CHECK-NEXT:    and w9, w0, #0x8
35; CHECK-NEXT:    sub w0, w8, w9
36; CHECK-NEXT:    ret
37  %a = and i8 %x, 8
38  %m = sub i8 7, %a
39  ret i8 %m
40}
41
42define i32 @masked_sub_i32(i32 %x) {
43; CHECK-LABEL: masked_sub_i32:
44; CHECK:       // %bb.0:
45; CHECK-NEXT:    mov w8, #9
46; CHECK-NEXT:    mov w9, #31
47; CHECK-NEXT:    and w8, w0, w8
48; CHECK-NEXT:    sub w0, w9, w8
49; CHECK-NEXT:    ret
50  %a = and i32 %x, 9
51  %m = sub i32 31, %a
52  ret i32 %m
53}
54
55define <4 x i32> @masked_sub_v4i32(<4 x i32> %x) {
56; CHECK-LABEL: masked_sub_v4i32:
57; CHECK:       // %bb.0:
58; CHECK-NEXT:    movi v1.4s, #42
59; CHECK-NEXT:    movi v2.4s, #1, msl #8
60; CHECK-NEXT:    and v0.16b, v0.16b, v1.16b
61; CHECK-NEXT:    sub v0.4s, v2.4s, v0.4s
62; CHECK-NEXT:    ret
63  %a = and <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42>
64  %m = sub <4 x i32> <i32 511, i32 511, i32 511, i32 511>, %a
65  ret <4 x i32>  %m
66}
67