1; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s -check-prefix=CYCLONE --check-prefix=ALL
2; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=kryo < %s | FileCheck %s -check-prefix=KRYO --check-prefix=ALL
3; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=falkor < %s | FileCheck %s -check-prefix=FALKOR --check-prefix=ALL
4
5; rdar://11481771
6; rdar://13713797
7
8define void @t1() nounwind ssp {
9entry:
10; ALL-LABEL: t1:
11; ALL-NOT: fmov
12; CYCLONE: movi.2d v0, #0000000000000000
13; CYCLONE: movi.2d v1, #0000000000000000
14; CYCLONE: movi.2d v2, #0000000000000000
15; CYCLONE: movi.2d v3, #0000000000000000
16; KRYO: movi v0.2d, #0000000000000000
17; KRYO: movi v1.2d, #0000000000000000
18; KRYO: movi v2.2d, #0000000000000000
19; KRYO: movi v3.2d, #0000000000000000
20; FALKOR: movi v0.2d, #0000000000000000
21; FALKOR: movi v1.2d, #0000000000000000
22; FALKOR: movi v2.2d, #0000000000000000
23; FALKOR: movi v3.2d, #0000000000000000
24  tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
25  ret void
26}
27
28define void @t2() nounwind ssp {
29entry:
30; ALL-LABEL: t2:
31; ALL-NOT: mov w0, wzr
32; ALL: mov w0, #0
33; ALL: mov w1, #0
34  tail call void @bari(i32 0, i32 0) nounwind
35  ret void
36}
37
38define void @t3() nounwind ssp {
39entry:
40; ALL-LABEL: t3:
41; ALL-NOT: mov x0, xzr
42; ALL: mov x0, #0
43; ALL: mov x1, #0
44  tail call void @barl(i64 0, i64 0) nounwind
45  ret void
46}
47
48define void @t4() nounwind ssp {
49; ALL-LABEL: t4:
50; ALL-NOT: fmov
51; CYCLONE: movi.2d v0, #0000000000000000
52; CYCLONE: movi.2d v1, #0000000000000000
53; KRYO: movi v0.2d, #0000000000000000
54; KRYO: movi v1.2d, #0000000000000000
55; FALKOR: movi v0.2d, #0000000000000000
56; FALKOR: movi v1.2d, #0000000000000000
57  tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
58  ret void
59}
60
61declare void @bar(double, double, double, double)
62declare void @bari(i32, i32)
63declare void @barl(i64, i64)
64declare void @barf(float, float)
65
66; We used to produce spills+reloads for a Q register with zero cycle zeroing
67; enabled.
68; ALL-LABEL: foo:
69; ALL-NOT: str {{q[0-9]+}}
70; ALL-NOT: ldr {{q[0-9]+}}
71define double @foo(i32 %n) {
72entry:
73  br label %for.body
74
75for.body:
76  %phi0 = phi double [ 1.0, %entry ], [ %v0, %for.body ]
77  %i.076 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
78  %conv21 = sitofp i32 %i.076 to double
79  %call = tail call fast double @sin(double %conv21)
80  %cmp.i = fcmp fast olt double %phi0, %call
81  %v0 = select i1 %cmp.i, double %call, double %phi0
82  %inc = add nuw nsw i32 %i.076, 1
83  %cmp = icmp slt i32 %inc, %n
84  br i1 %cmp, label %for.body, label %for.end
85
86for.end:
87  ret double %v0
88}
89
90declare double @sin(double)
91