1; RUN: opt < %s -disable-output "-passes=print<ddg>" 2>&1 | FileCheck %s 2 3 4; CHECK-LABEL: 'DDG' for loop 'test1.for.cond1.preheader': 5; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction 6; CHECK-NEXT: Instructions: 7; CHECK-NEXT: %sub = add i64 %n, -1 8; CHECK-NEXT: Edges: 9; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]] 10; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]] 11 12; CHECK: Node Address:[[N3]]:single-instruction 13; CHECK-NEXT: Instructions: 14; CHECK-NEXT: %cmp21 = icmp ult i64 1, %sub 15; CHECK-NEXT: Edges: 16; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]] 17 18; CHECK: Node Address:[[N4]]:single-instruction 19; CHECK-NEXT: Instructions: 20; CHECK-NEXT: br i1 %cmp21, label %for.body4.preheader, label %for.inc12 21; CHECK-NEXT: Edges:none! 22 23; CHECK: Node Address:[[N5:0x[0-9a-f]*]]:single-instruction 24; CHECK-NEXT: Instructions: 25; CHECK-NEXT: %0 = mul nsw i64 %i.04, %n 26; CHECK-NEXT: Edges: 27; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]] 28 29; CHECK: Node Address:[[N6]]:single-instruction 30; CHECK-NEXT: Instructions: 31; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %0 32; CHECK-NEXT: Edges: 33; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]] 34 35; CHECK: Node Address:[[N7]]:single-instruction 36; CHECK-NEXT: Instructions: 37; CHECK-NEXT: %arrayidx5 = getelementptr inbounds float, float* %arrayidx, i64 %j.02 38; CHECK-NEXT: Edges: 39; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]] 40 41; CHECK: Node Address:[[N8]]:single-instruction 42; CHECK-NEXT: Instructions: 43; CHECK-NEXT: %1 = load float, float* %arrayidx5, align 4 44; CHECK-NEXT: Edges: 45; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]] 46 47; CHECK: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction 48; CHECK-NEXT: Instructions: 49; CHECK-NEXT: %2 = mul nsw i64 %i.04, %n 50; CHECK-NEXT: Edges: 51; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]] 52 53; CHECK: Node Address:[[N11]]:single-instruction 54; CHECK-NEXT: Instructions: 55; CHECK-NEXT: %arrayidx6 = getelementptr inbounds float, float* %a, i64 %2 56; CHECK-NEXT: Edges: 57; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]] 58 59; CHECK: Node Address:[[N13:0x[0-9a-f]*]]:single-instruction 60; CHECK-NEXT: Instructions: 61; CHECK-NEXT: %sub7 = add i64 %j.02, -1 62; CHECK-NEXT: Edges: 63; CHECK-NEXT: [def-use] to [[N12]] 64 65; CHECK: Node Address:[[N12]]:single-instruction 66; CHECK-NEXT: Instructions: 67; CHECK-NEXT: %arrayidx8 = getelementptr inbounds float, float* %arrayidx6, i64 %sub7 68; CHECK-NEXT: Edges: 69; CHECK-NEXT: [def-use] to [[N9]] 70 71; CHECK: Node Address:[[N14:0x[0-9a-f]*]]:single-instruction 72; CHECK-NEXT: Instructions: 73; CHECK-NEXT: %4 = mul nsw i64 %i.04, %n 74; CHECK-NEXT: Edges: 75; CHECK-NEXT: [def-use] to [[N15:0x[0-9a-f]*]] 76 77; CHECK: Node Address:[[N15]]:single-instruction 78; CHECK-NEXT: Instructions: 79; CHECK-NEXT: %arrayidx10 = getelementptr inbounds float, float* %a, i64 %4 80; CHECK-NEXT: Edges: 81; CHECK-NEXT: [def-use] to [[N16:0x[0-9a-f]*]] 82 83; CHECK: Node Address:[[N16]]:single-instruction 84; CHECK-NEXT: Instructions: 85; CHECK-NEXT: %arrayidx11 = getelementptr inbounds float, float* %arrayidx10, i64 %j.02 86; CHECK-NEXT: Edges: 87; CHECK-NEXT: [def-use] to [[N9]] 88 89; CHECK: Node Address:[[N2]]:single-instruction 90; CHECK-NEXT: Instructions: 91; CHECK-NEXT: %cmp2 = icmp ult i64 %inc, %sub 92; CHECK-NEXT: Edges: 93; CHECK-NEXT: [def-use] to [[N17:0x[0-9a-f]*]] 94 95; CHECK: Node Address:[[N17]]:single-instruction 96; CHECK-NEXT: Instructions: 97; CHECK-NEXT: br i1 %cmp2, label %for.body4, label %for.inc12.loopexit 98; CHECK-NEXT: Edges:none! 99 100; CHECK: Node Address:[[N18:0x[0-9a-f]*]]:single-instruction 101; CHECK-NEXT: Instructions: 102; CHECK-NEXT: %exitcond = icmp ne i64 %inc13, %n 103; CHECK-NEXT: Edges: 104; CHECK-NEXT: [def-use] to [[N19:0x[0-9a-f]*]] 105 106; CHECK: Node Address:[[N19]]:single-instruction 107; CHECK-NEXT: Instructions: 108; CHECK-NEXT: br i1 %exitcond, label %test1.for.cond1.preheader, label %for.end14.loopexit 109; CHECK-NEXT: Edges:none! 110 111; CHECK: Node Address:[[N20:0x[0-9a-f]*]]:single-instruction 112; CHECK-NEXT: Instructions: 113; CHECK-NEXT: br label %for.body4 114; CHECK-NEXT: Edges:none! 115 116; CHECK: Node Address:[[N21:0x[0-9a-f]*]]:single-instruction 117; CHECK-NEXT: Instructions: 118; CHECK-NEXT: br label %for.inc12 119; CHECK-NEXT: Edges:none! 120 121; CHECK: Node Address:[[N9]]:pi-block 122; CHECK-NEXT:--- start of nodes in pi-block --- 123; CHECK: Node Address:[[N22:0x[0-9a-f]*]]:single-instruction 124; CHECK-NEXT: Instructions: 125; CHECK-NEXT: %add = fadd float %1, %3 126; CHECK-NEXT: Edges: 127; CHECK-NEXT: [def-use] to [[N23:0x[0-9a-f]*]] 128 129; CHECK: Node Address:[[N24:0x[0-9a-f]*]]:single-instruction 130; CHECK-NEXT: Instructions: 131; CHECK-NEXT: %3 = load float, float* %arrayidx8, align 4 132; CHECK-NEXT: Edges: 133; CHECK-NEXT: [def-use] to [[N22]] 134 135; CHECK: Node Address:[[N23]]:single-instruction 136; CHECK-NEXT: Instructions: 137; CHECK-NEXT: store float %add, float* %arrayidx11, align 4 138; CHECK-NEXT: Edges: 139; CHECK-NEXT: [memory] to [[N24]] 140; CHECK-NEXT:--- end of nodes in pi-block --- 141; CHECK-NEXT: Edges:none! 142 143; CHECK: Node Address:[[N25:0x[0-9a-f]*]]:pi-block 144; CHECK-NEXT:--- start of nodes in pi-block --- 145; CHECK: Node Address:[[N26:0x[0-9a-f]*]]:single-instruction 146; CHECK-NEXT: Instructions: 147; CHECK-NEXT: %inc13 = add i64 %i.04, 1 148; CHECK-NEXT: Edges: 149; CHECK-NEXT: [def-use] to [[N27:0x[0-9a-f]*]] 150 151; CHECK: Node Address:[[N27]]:single-instruction 152; CHECK-NEXT: Instructions: 153; CHECK-NEXT: %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %test1.for.cond1.preheader.preheader ] 154; CHECK-NEXT: Edges: 155; CHECK-NEXT: [def-use] to [[N26]] 156; CHECK-NEXT:--- end of nodes in pi-block --- 157; CHECK-NEXT: Edges: 158; CHECK-NEXT: [def-use] to [[N5]] 159; CHECK-NEXT: [def-use] to [[N10]] 160; CHECK-NEXT: [def-use] to [[N14]] 161; CHECK-NEXT: [def-use] to [[N18]] 162 163; CHECK: Node Address:[[N28:0x[0-9a-f]*]]:pi-block 164; CHECK-NEXT:--- start of nodes in pi-block --- 165; CHECK: Node Address:[[N29:0x[0-9a-f]*]]:single-instruction 166; CHECK-NEXT: Instructions: 167; CHECK-NEXT: %inc = add i64 %j.02, 1 168; CHECK-NEXT: Edges: 169; CHECK-NEXT: [def-use] to [[N30:0x[0-9a-f]*]] 170 171; CHECK: Node Address:[[N30]]:single-instruction 172; CHECK-NEXT: Instructions: 173; CHECK-NEXT: %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %for.body4.preheader ] 174; CHECK-NEXT: Edges: 175; CHECK-NEXT: [def-use] to [[N29]] 176; CHECK-NEXT:--- end of nodes in pi-block --- 177; CHECK-NEXT: Edges: 178; CHECK-NEXT: [def-use] to [[N7]] 179; CHECK-NEXT: [def-use] to [[N13]] 180; CHECK-NEXT: [def-use] to [[N16]] 181; CHECK-NEXT: [def-use] to [[N2]] 182 183 184 185;; This test has a cycle. 186;; void test1(unsigned long n, float a[][n], float b[][n]) { 187;; for (unsigned long i = 0; i < n; i++) 188;; for (unsigned long j = 1; j < n-1; j++) 189;; a[i][j] = b[i][j] + a[i][j-1]; 190;; } 191 192define void @test1(i64 %n, float* noalias %a, float* noalias %b) { 193entry: 194 %exitcond3 = icmp ne i64 0, %n 195 br i1 %exitcond3, label %test1.for.cond1.preheader, label %for.end14 196 197test1.for.cond1.preheader: ; preds = %entry, %for.inc12 198 %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %entry ] 199 %sub = add i64 %n, -1 200 %cmp21 = icmp ult i64 1, %sub 201 br i1 %cmp21, label %for.body4, label %for.inc12 202 203for.body4: ; preds = %test1.for.cond1.preheader, %for.body4 204 %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %test1.for.cond1.preheader ] 205 %0 = mul nsw i64 %i.04, %n 206 %arrayidx = getelementptr inbounds float, float* %b, i64 %0 207 %arrayidx5 = getelementptr inbounds float, float* %arrayidx, i64 %j.02 208 %1 = load float, float* %arrayidx5, align 4 209 %2 = mul nsw i64 %i.04, %n 210 %arrayidx6 = getelementptr inbounds float, float* %a, i64 %2 211 %sub7 = add i64 %j.02, -1 212 %arrayidx8 = getelementptr inbounds float, float* %arrayidx6, i64 %sub7 213 %3 = load float, float* %arrayidx8, align 4 214 %add = fadd float %1, %3 215 %4 = mul nsw i64 %i.04, %n 216 %arrayidx10 = getelementptr inbounds float, float* %a, i64 %4 217 %arrayidx11 = getelementptr inbounds float, float* %arrayidx10, i64 %j.02 218 store float %add, float* %arrayidx11, align 4 219 %inc = add i64 %j.02, 1 220 %cmp2 = icmp ult i64 %inc, %sub 221 br i1 %cmp2, label %for.body4, label %for.inc12 222 223for.inc12: ; preds = %for.body4, %test1.for.cond1.preheader 224 %inc13 = add i64 %i.04, 1 225 %exitcond = icmp ne i64 %inc13, %n 226 br i1 %exitcond, label %test1.for.cond1.preheader, label %for.end14 227 228for.end14: ; preds = %for.inc12, %entry 229 ret void 230} 231 232 233 234; CHECK-LABEL: 'DDG' for loop 'test2.for.cond1.preheader': 235; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction 236; CHECK-NEXT: Instructions: 237; CHECK-NEXT: %sub = add i64 %n, -1 238; CHECK-NEXT: Edges: 239; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]] 240; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]] 241 242; CHECK: Node Address:[[N3]]:single-instruction 243; CHECK-NEXT: Instructions: 244; CHECK-NEXT: %cmp21 = icmp ult i64 1, %sub 245; CHECK-NEXT: Edges: 246; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]] 247 248; CHECK: Node Address:[[N4]]:single-instruction 249; CHECK-NEXT: Instructions: 250; CHECK-NEXT: br i1 %cmp21, label %for.body4.preheader, label %for.inc12 251; CHECK-NEXT: Edges:none! 252 253; CHECK: Node Address:[[N5:0x[0-9a-f]*]]:single-instruction 254; CHECK-NEXT: Instructions: 255; CHECK-NEXT: %0 = mul nsw i64 %i.04, %n 256; CHECK-NEXT: Edges: 257; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]] 258 259; CHECK: Node Address:[[N6]]:single-instruction 260; CHECK-NEXT: Instructions: 261; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %0 262; CHECK-NEXT: Edges: 263; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]] 264 265; CHECK: Node Address:[[N7]]:single-instruction 266; CHECK-NEXT: Instructions: 267; CHECK-NEXT: %arrayidx5 = getelementptr inbounds float, float* %arrayidx, i64 %j.02 268; CHECK-NEXT: Edges: 269; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]] 270 271; CHECK: Node Address:[[N8]]:single-instruction 272; CHECK-NEXT: Instructions: 273; CHECK-NEXT: %1 = load float, float* %arrayidx5, align 4 274; CHECK-NEXT: Edges: 275; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]] 276 277; CHECK: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction 278; CHECK-NEXT: Instructions: 279; CHECK-NEXT: %2 = mul nsw i64 %i.04, %n 280; CHECK-NEXT: Edges: 281; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]] 282 283; CHECK: Node Address:[[N11]]:single-instruction 284; CHECK-NEXT: Instructions: 285; CHECK-NEXT: %arrayidx6 = getelementptr inbounds float, float* %a, i64 %2 286; CHECK-NEXT: Edges: 287; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]] 288 289; CHECK: Node Address:[[N13:0x[0-9a-f]*]]:single-instruction 290; CHECK-NEXT: Instructions: 291; CHECK-NEXT: %add7 = add i64 %j.02, 1 292; CHECK-NEXT: Edges: 293; CHECK-NEXT: [def-use] to [[N12]] 294 295; CHECK: Node Address:[[N12]]:single-instruction 296; CHECK-NEXT: Instructions: 297; CHECK-NEXT: %arrayidx8 = getelementptr inbounds float, float* %arrayidx6, i64 %add7 298; CHECK-NEXT: Edges: 299; CHECK-NEXT: [def-use] to [[N14:0x[0-9a-f]*]] 300 301; CHECK: Node Address:[[N14]]:single-instruction 302; CHECK-NEXT: Instructions: 303; CHECK-NEXT: %3 = load float, float* %arrayidx8, align 4 304; CHECK-NEXT: Edges: 305; CHECK-NEXT: [def-use] to [[N9]] 306; CHECK-NEXT: [memory] to [[N15:0x[0-9a-f]*]] 307 308; CHECK: Node Address:[[N9]]:single-instruction 309; CHECK-NEXT: Instructions: 310; CHECK-NEXT: %add = fadd float %1, %3 311; CHECK-NEXT: Edges: 312; CHECK-NEXT: [def-use] to [[N15]] 313 314; CHECK: Node Address:[[N16:0x[0-9a-f]*]]:single-instruction 315; CHECK-NEXT: Instructions: 316; CHECK-NEXT: %4 = mul nsw i64 %i.04, %n 317; CHECK-NEXT: Edges: 318; CHECK-NEXT: [def-use] to [[N17:0x[0-9a-f]*]] 319 320; CHECK: Node Address:[[N17]]:single-instruction 321; CHECK-NEXT: Instructions: 322; CHECK-NEXT: %arrayidx10 = getelementptr inbounds float, float* %a, i64 %4 323; CHECK-NEXT: Edges: 324; CHECK-NEXT: [def-use] to [[N18:0x[0-9a-f]*]] 325 326; CHECK: Node Address:[[N18]]:single-instruction 327; CHECK-NEXT: Instructions: 328; CHECK-NEXT: %arrayidx11 = getelementptr inbounds float, float* %arrayidx10, i64 %j.02 329; CHECK-NEXT: Edges: 330; CHECK-NEXT: [def-use] to [[N15]] 331 332; CHECK: Node Address:[[N15]]:single-instruction 333; CHECK-NEXT: Instructions: 334; CHECK-NEXT: store float %add, float* %arrayidx11, align 4 335; CHECK-NEXT: Edges:none! 336 337; CHECK: Node Address:[[N2]]:single-instruction 338; CHECK-NEXT: Instructions: 339; CHECK-NEXT: %cmp2 = icmp ult i64 %inc, %sub 340; CHECK-NEXT: Edges: 341; CHECK-NEXT: [def-use] to [[N19:0x[0-9a-f]*]] 342 343; CHECK: Node Address:[[N19]]:single-instruction 344; CHECK-NEXT: Instructions: 345; CHECK-NEXT: br i1 %cmp2, label %for.body4, label %for.inc12.loopexit 346; CHECK-NEXT: Edges:none! 347 348; CHECK: Node Address:[[N20:0x[0-9a-f]*]]:single-instruction 349; CHECK-NEXT: Instructions: 350; CHECK-NEXT: %exitcond = icmp ne i64 %inc13, %n 351; CHECK-NEXT: Edges: 352; CHECK-NEXT: [def-use] to [[N21:0x[0-9a-f]*]] 353 354; CHECK: Node Address:[[N21]]:single-instruction 355; CHECK-NEXT: Instructions: 356; CHECK-NEXT: br i1 %exitcond, label %test2.for.cond1.preheader, label %for.end14.loopexit 357; CHECK-NEXT: Edges:none! 358 359; CHECK: Node Address:[[N22:0x[0-9a-f]*]]:single-instruction 360; CHECK-NEXT: Instructions: 361; CHECK-NEXT: br label %for.body4 362; CHECK-NEXT: Edges:none! 363 364; CHECK: Node Address:[[N23:0x[0-9a-f]*]]:single-instruction 365; CHECK-NEXT: Instructions: 366; CHECK-NEXT: br label %for.inc12 367; CHECK-NEXT: Edges:none! 368 369; CHECK: Node Address:[[N24:0x[0-9a-f]*]]:pi-block 370; CHECK-NEXT:--- start of nodes in pi-block --- 371; CHECK: Node Address:[[N25:0x[0-9a-f]*]]:single-instruction 372; CHECK-NEXT: Instructions: 373; CHECK-NEXT: %inc13 = add i64 %i.04, 1 374; CHECK-NEXT: Edges: 375; CHECK-NEXT: [def-use] to [[N26:0x[0-9a-f]*]] 376 377; CHECK: Node Address:[[N26]]:single-instruction 378; CHECK-NEXT: Instructions: 379; CHECK-NEXT: %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %test2.for.cond1.preheader.preheader ] 380; CHECK-NEXT: Edges: 381; CHECK-NEXT: [def-use] to [[N25]] 382; CHECK-NEXT:--- end of nodes in pi-block --- 383; CHECK-NEXT: Edges: 384; CHECK-NEXT: [def-use] to [[N5]] 385; CHECK-NEXT: [def-use] to [[N10]] 386; CHECK-NEXT: [def-use] to [[N16]] 387; CHECK-NEXT: [def-use] to [[N20]] 388 389; CHECK: Node Address:[[N27:0x[0-9a-f]*]]:pi-block 390; CHECK-NEXT:--- start of nodes in pi-block --- 391; CHECK: Node Address:[[N28:0x[0-9a-f]*]]:single-instruction 392; CHECK-NEXT: Instructions: 393; CHECK-NEXT: %inc = add i64 %j.02, 1 394; CHECK-NEXT: Edges: 395; CHECK-NEXT: [def-use] to [[N29:0x[0-9a-f]*]] 396 397; CHECK: Node Address:[[N29]]:single-instruction 398; CHECK-NEXT: Instructions: 399; CHECK-NEXT: %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %for.body4.preheader ] 400; CHECK-NEXT: Edges: 401; CHECK-NEXT: [def-use] to [[N28]] 402; CHECK-NEXT:--- end of nodes in pi-block --- 403; CHECK-NEXT: Edges: 404; CHECK-NEXT: [def-use] to [[N7]] 405; CHECK-NEXT: [def-use] to [[N13]] 406; CHECK-NEXT: [def-use] to [[N18]] 407; CHECK-NEXT: [def-use] to [[N2]] 408 409 410;; This test has no cycles. 411;; void test2(unsigned long n, float a[][n], float b[][n]) { 412;; for (unsigned long i = 0; i < n; i++) 413;; for (unsigned long j = 1; j < n-1; j++) 414;; a[i][j] = b[i][j] + a[i][j+1]; 415;; } 416 417define void @test2(i64 %n, float* noalias %a, float* noalias %b) { 418entry: 419 %exitcond3 = icmp ne i64 0, %n 420 br i1 %exitcond3, label %test2.for.cond1.preheader, label %for.end14 421 422test2.for.cond1.preheader: ; preds = %entry, %for.inc12 423 %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %entry ] 424 %sub = add i64 %n, -1 425 %cmp21 = icmp ult i64 1, %sub 426 br i1 %cmp21, label %for.body4, label %for.inc12 427 428for.body4: ; preds = %test2.for.cond1.preheader, %for.body4 429 %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %test2.for.cond1.preheader ] 430 %0 = mul nsw i64 %i.04, %n 431 %arrayidx = getelementptr inbounds float, float* %b, i64 %0 432 %arrayidx5 = getelementptr inbounds float, float* %arrayidx, i64 %j.02 433 %1 = load float, float* %arrayidx5, align 4 434 %2 = mul nsw i64 %i.04, %n 435 %arrayidx6 = getelementptr inbounds float, float* %a, i64 %2 436 %add7 = add i64 %j.02, 1 437 %arrayidx8 = getelementptr inbounds float, float* %arrayidx6, i64 %add7 438 %3 = load float, float* %arrayidx8, align 4 439 %add = fadd float %1, %3 440 %4 = mul nsw i64 %i.04, %n 441 %arrayidx10 = getelementptr inbounds float, float* %a, i64 %4 442 %arrayidx11 = getelementptr inbounds float, float* %arrayidx10, i64 %j.02 443 store float %add, float* %arrayidx11, align 4 444 %inc = add i64 %j.02, 1 445 %cmp2 = icmp ult i64 %inc, %sub 446 br i1 %cmp2, label %for.body4, label %for.inc12 447 448for.inc12: ; preds = %for.body4, %test2.for.cond1.preheader 449 %inc13 = add i64 %i.04, 1 450 %exitcond = icmp ne i64 %inc13, %n 451 br i1 %exitcond, label %test2.for.cond1.preheader, label %for.end14 452 453for.end14: ; preds = %for.inc12, %entry 454 ret void 455}