1; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900  -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FASTF64,FASTF32,FASTF16,ALL %s
2; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=SLOWF64,SLOWF32,SLOWF16,ALL %s
3; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZEF16 %s
4; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZENOF16 %s
5; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=GFX90A-FASTF64,FASTF16,PACKEDF32,ALL %s
6
7; ALL-LABEL: 'fma_f32'
8; SLOWF32: estimated cost of 4 for {{.*}} call float @llvm.fma.f32
9; FASTF32: estimated cost of 2 for {{.*}} call float @llvm.fma.f32
10; SIZEALL: estimated cost of 2 for {{.*}} call float @llvm.fma.f32
11define amdgpu_kernel void @fma_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr) #0 {
12  %vec = load float, float addrspace(1)* %vaddr
13  %fma = call float @llvm.fma.f32(float %vec, float %vec, float %vec) #1
14  store float %fma, float addrspace(1)* %out
15  ret void
16}
17
18; ALL-LABEL: 'fma_v2f32'
19; SLOWF32: estimated cost of 8 for {{.*}} call <2 x float> @llvm.fma.v2f32
20; PACKEDF32: estimated cost of 2 for {{.*}} call <2 x float> @llvm.fma.v2f32
21; SIZEALL: estimated cost of 4 for {{.*}} call <2 x float> @llvm.fma.v2f32
22define amdgpu_kernel void @fma_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) #0 {
23  %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
24  %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %vec, <2 x float> %vec, <2 x float> %vec) #1
25  store <2 x float> %fma, <2 x float> addrspace(1)* %out
26  ret void
27}
28
29; ALL-LABEL: 'fma_v3f32'
30; SLOWF32: estimated cost of 12 for {{.*}} call <3 x float> @llvm.fma.v3f32
31; PACKEDF32: estimated cost of 4 for {{.*}} call <3 x float> @llvm.fma.v3f32
32; SIZEALL: estimated cost of 6 for {{.*}} call <3 x float> @llvm.fma.v3f32
33define amdgpu_kernel void @fma_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr) #0 {
34  %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
35  %fma = call <3 x float> @llvm.fma.v3f32(<3 x float> %vec, <3 x float> %vec, <3 x float> %vec) #1
36  store <3 x float> %fma, <3 x float> addrspace(1)* %out
37  ret void
38}
39
40; ALL-LABEL: 'fma_v5f32'
41; SLOWF32: estimated cost of 20 for {{.*}} call <5 x float> @llvm.fma.v5f32
42; PACKEDF32: estimated cost of 6 for {{.*}} call <5 x float> @llvm.fma.v5f32
43; SIZEALL: estimated cost of 10 for {{.*}} call <5 x float> @llvm.fma.v5f32
44define amdgpu_kernel void @fma_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr) #0 {
45  %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
46  %fma = call <5 x float> @llvm.fma.v5f32(<5 x float> %vec, <5 x float> %vec, <5 x float> %vec) #1
47  store <5 x float> %fma, <5 x float> addrspace(1)* %out
48  ret void
49}
50
51; ALL-LABEL: 'fma_f64'
52; SLOWF64: estimated cost of 4 for {{.*}} call double @llvm.fma.f64
53; GFX90A-FASTF64: estimated cost of 1 for {{.*}} call double @llvm.fma.f64
54; FASTF64: estimated cost of 2 for {{.*}} call double @llvm.fma.f64
55; SIZEALL: estimated cost of 2 for {{.*}} call double @llvm.fma.f64
56define amdgpu_kernel void @fma_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr) #0 {
57  %vec = load double, double addrspace(1)* %vaddr
58  %fma = call double @llvm.fma.f64(double %vec, double %vec, double %vec) #1
59  store double %fma, double addrspace(1)* %out
60  ret void
61}
62
63; ALL-LABEL: 'fma_v2f64'
64; SLOWF64: estimated cost of 8 for {{.*}} call <2 x double> @llvm.fma.v2f64
65; GFX90A-FASTF64: estimated cost of 2 for {{.*}} call <2 x double> @llvm.fma.v2f64
66; FASTF64: estimated cost of 4 for {{.*}} call <2 x double> @llvm.fma.v2f64
67; SIZEALL: estimated cost of 4 for {{.*}} call <2 x double> @llvm.fma.v2f64
68define amdgpu_kernel void @fma_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr) #0 {
69  %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
70  %fma = call <2 x double> @llvm.fma.v2f64(<2 x double> %vec, <2 x double> %vec, <2 x double> %vec) #1
71  store <2 x double> %fma, <2 x double> addrspace(1)* %out
72  ret void
73}
74
75; ALL-LABEL: 'fma_v3f64'
76; SLOWF64: estimated cost of 12 for {{.*}} call <3 x double> @llvm.fma.v3f64
77; FASTF64: estimated cost of 6 for {{.*}} call <3 x double> @llvm.fma.v3f64
78; SIZEALL: estimated cost of 6 for {{.*}} call <3 x double> @llvm.fma.v3f64
79define amdgpu_kernel void @fma_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr) #0 {
80  %vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
81  %fma = call <3 x double> @llvm.fma.v3f64(<3 x double> %vec, <3 x double> %vec, <3 x double> %vec) #1
82  store <3 x double> %fma, <3 x double> addrspace(1)* %out
83  ret void
84}
85
86; ALL-LABEL: 'fma_f16'
87; SLOWF16: estimated cost of 4 for {{.*}} call half @llvm.fma.f16
88; FASTF16: estimated cost of 2 for {{.*}} call half @llvm.fma.f16
89; SIZEALL: estimated cost of 2 for {{.*}} call half @llvm.fma.f16
90define amdgpu_kernel void @fma_f16(half addrspace(1)* %out, half addrspace(1)* %vaddr) #0 {
91  %vec = load half, half addrspace(1)* %vaddr
92  %fma = call half @llvm.fma.f16(half %vec, half %vec, half %vec) #1
93  store half %fma, half addrspace(1)* %out
94  ret void
95}
96
97; ALL-LABEL: 'fma_v2f16'
98; SLOWF16: estimated cost of 8 for {{.*}} call <2 x half> @llvm.fma.v2f16
99; FASTF16: estimated cost of 2 for {{.*}} call <2 x half> @llvm.fma.v2f16
100; SIZEF16: estimated cost of 2 for {{.*}} call <2 x half> @llvm.fma.v2f16
101; SIZENOF16: estimated cost of 4 for {{.*}} call <2 x half> @llvm.fma.v2f16
102define amdgpu_kernel void @fma_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr) #0 {
103  %vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
104  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %vec, <2 x half> %vec, <2 x half> %vec) #1
105  store <2 x half> %fma, <2 x half> addrspace(1)* %out
106  ret void
107}
108
109; ALL-LABEL: 'fma_v3f16'
110; SLOWF16: estimated cost of 16 for {{.*}} call <3 x half> @llvm.fma.v3f16
111; FASTF16: estimated cost of 4 for {{.*}} call <3 x half> @llvm.fma.v3f16
112; SIZEF16: estimated cost of 4 for {{.*}} call <3 x half> @llvm.fma.v3f16
113; SIZENOF16: estimated cost of 8 for {{.*}} call <3 x half> @llvm.fma.v3f16
114define amdgpu_kernel void @fma_v3f16(<3 x half> addrspace(1)* %out, <3 x half> addrspace(1)* %vaddr) #0 {
115  %vec = load <3 x half>, <3 x half> addrspace(1)* %vaddr
116  %fma = call <3 x half> @llvm.fma.v3f16(<3 x half> %vec, <3 x half> %vec, <3 x half> %vec) #1
117  store <3 x half> %fma, <3 x half> addrspace(1)* %out
118  ret void
119}
120
121declare float @llvm.fma.f32(float, float, float) #1
122declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) #1
123declare <3 x float> @llvm.fma.v3f32(<3 x float>, <3 x float>, <3 x float>) #1
124declare <5 x float> @llvm.fma.v5f32(<5 x float>, <5 x float>, <5 x float>) #1
125
126declare double @llvm.fma.f64(double, double, double) #1
127declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) #1
128declare <3 x double> @llvm.fma.v3f64(<3 x double>, <3 x double>, <3 x double>) #1
129
130declare half @llvm.fma.f16(half, half, half) #1
131declare <2 x half> @llvm.fma.v2f16(<2 x half>, <2 x half>, <2 x half>) #1
132declare <3 x half> @llvm.fma.v3f16(<3 x half>, <3 x half>, <3 x half>) #1
133
134attributes #0 = { nounwind }
135attributes #1 = { nounwind readnone }
136