1; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck  --check-prefixes=ALL,SPEED %s
2; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck --check-prefixes=ALL,SIZE %s
3
4; ALL-LABEL: 'test_br_cost'
5; SPEED: estimated cost of 7 for instruction: br i1
6; SPEED: estimated cost of 4 for instruction: br label
7; SPEED: estimated cost of 1 for instruction: %phi = phi i32 [
8; SPEED: estimated cost of 10 for instruction: ret void
9; SIZE: estimated cost of 5 for instruction: br i1
10; SIZE: estimated cost of 1 for instruction: br label
11; SIZE: estimated cost of 0 for instruction: %phi = phi i32 [
12; SIZE: estimated cost of 1 for instruction: ret void
13define amdgpu_kernel void @test_br_cost(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
14bb0:
15  br i1 undef, label %bb1, label %bb2
16
17bb1:
18  %vec = load i32, i32 addrspace(1)* %vaddr
19  %add = add i32 %vec, %b
20  store i32 %add, i32 addrspace(1)* %out
21  br label %bb2
22
23bb2:
24  %phi = phi i32 [ %b, %bb0 ], [ %add, %bb1 ]
25  ret void
26}
27
28; ALL-LABEL: 'test_switch_cost'
29; SPEED: estimated cost of 24 for instruction:   switch
30; SIZE: estimated cost of 18 for instruction:   switch
31define amdgpu_kernel void @test_switch_cost(i32 %a) #0 {
32entry:
33  switch i32 %a, label %default [
34    i32 0, label %case0
35    i32 1, label %case1
36  ]
37
38case0:
39  store volatile i32 undef, i32 addrspace(1)* undef
40  ret void
41
42case1:
43  store volatile i32 undef, i32 addrspace(1)* undef
44  ret void
45
46default:
47  store volatile i32 undef, i32 addrspace(1)* undef
48  ret void
49
50end:
51  ret void
52}
53