1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This is the LLVM loop vectorizer. This pass modifies 'vectorizable' loops 10 // and generates target-independent LLVM-IR. 11 // The vectorizer uses the TargetTransformInfo analysis to estimate the costs 12 // of instructions in order to estimate the profitability of vectorization. 13 // 14 // The loop vectorizer combines consecutive loop iterations into a single 15 // 'wide' iteration. After this transformation the index is incremented 16 // by the SIMD vector width, and not by one. 17 // 18 // This pass has three parts: 19 // 1. The main loop pass that drives the different parts. 20 // 2. LoopVectorizationLegality - A unit that checks for the legality 21 // of the vectorization. 22 // 3. InnerLoopVectorizer - A unit that performs the actual 23 // widening of instructions. 24 // 4. LoopVectorizationCostModel - A unit that checks for the profitability 25 // of vectorization. It decides on the optimal vector width, which 26 // can be one, if vectorization is not profitable. 27 // 28 // There is a development effort going on to migrate loop vectorizer to the 29 // VPlan infrastructure and to introduce outer loop vectorization support (see 30 // docs/Proposal/VectorizationPlan.rst and 31 // http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this 32 // purpose, we temporarily introduced the VPlan-native vectorization path: an 33 // alternative vectorization path that is natively implemented on top of the 34 // VPlan infrastructure. See EnableVPlanNativePath for enabling. 35 // 36 //===----------------------------------------------------------------------===// 37 // 38 // The reduction-variable vectorization is based on the paper: 39 // D. Nuzman and R. Henderson. Multi-platform Auto-vectorization. 40 // 41 // Variable uniformity checks are inspired by: 42 // Karrenberg, R. and Hack, S. Whole Function Vectorization. 43 // 44 // The interleaved access vectorization is based on the paper: 45 // Dorit Nuzman, Ira Rosen and Ayal Zaks. Auto-Vectorization of Interleaved 46 // Data for SIMD 47 // 48 // Other ideas/concepts are from: 49 // A. Zaks and D. Nuzman. Autovectorization in GCC-two years later. 50 // 51 // S. Maleki, Y. Gao, M. Garzaran, T. Wong and D. Padua. An Evaluation of 52 // Vectorizing Compilers. 53 // 54 //===----------------------------------------------------------------------===// 55 56 #include "llvm/Transforms/Vectorize/LoopVectorize.h" 57 #include "LoopVectorizationPlanner.h" 58 #include "VPRecipeBuilder.h" 59 #include "VPlan.h" 60 #include "VPlanHCFGBuilder.h" 61 #include "VPlanPredicator.h" 62 #include "VPlanTransforms.h" 63 #include "llvm/ADT/APInt.h" 64 #include "llvm/ADT/ArrayRef.h" 65 #include "llvm/ADT/DenseMap.h" 66 #include "llvm/ADT/DenseMapInfo.h" 67 #include "llvm/ADT/Hashing.h" 68 #include "llvm/ADT/MapVector.h" 69 #include "llvm/ADT/None.h" 70 #include "llvm/ADT/Optional.h" 71 #include "llvm/ADT/STLExtras.h" 72 #include "llvm/ADT/SmallPtrSet.h" 73 #include "llvm/ADT/SmallSet.h" 74 #include "llvm/ADT/SmallVector.h" 75 #include "llvm/ADT/Statistic.h" 76 #include "llvm/ADT/StringRef.h" 77 #include "llvm/ADT/Twine.h" 78 #include "llvm/ADT/iterator_range.h" 79 #include "llvm/Analysis/AssumptionCache.h" 80 #include "llvm/Analysis/BasicAliasAnalysis.h" 81 #include "llvm/Analysis/BlockFrequencyInfo.h" 82 #include "llvm/Analysis/CFG.h" 83 #include "llvm/Analysis/CodeMetrics.h" 84 #include "llvm/Analysis/DemandedBits.h" 85 #include "llvm/Analysis/GlobalsModRef.h" 86 #include "llvm/Analysis/LoopAccessAnalysis.h" 87 #include "llvm/Analysis/LoopAnalysisManager.h" 88 #include "llvm/Analysis/LoopInfo.h" 89 #include "llvm/Analysis/LoopIterator.h" 90 #include "llvm/Analysis/MemorySSA.h" 91 #include "llvm/Analysis/OptimizationRemarkEmitter.h" 92 #include "llvm/Analysis/ProfileSummaryInfo.h" 93 #include "llvm/Analysis/ScalarEvolution.h" 94 #include "llvm/Analysis/ScalarEvolutionExpressions.h" 95 #include "llvm/Analysis/TargetLibraryInfo.h" 96 #include "llvm/Analysis/TargetTransformInfo.h" 97 #include "llvm/Analysis/VectorUtils.h" 98 #include "llvm/IR/Attributes.h" 99 #include "llvm/IR/BasicBlock.h" 100 #include "llvm/IR/CFG.h" 101 #include "llvm/IR/Constant.h" 102 #include "llvm/IR/Constants.h" 103 #include "llvm/IR/DataLayout.h" 104 #include "llvm/IR/DebugInfoMetadata.h" 105 #include "llvm/IR/DebugLoc.h" 106 #include "llvm/IR/DerivedTypes.h" 107 #include "llvm/IR/DiagnosticInfo.h" 108 #include "llvm/IR/Dominators.h" 109 #include "llvm/IR/Function.h" 110 #include "llvm/IR/IRBuilder.h" 111 #include "llvm/IR/InstrTypes.h" 112 #include "llvm/IR/Instruction.h" 113 #include "llvm/IR/Instructions.h" 114 #include "llvm/IR/IntrinsicInst.h" 115 #include "llvm/IR/Intrinsics.h" 116 #include "llvm/IR/LLVMContext.h" 117 #include "llvm/IR/Metadata.h" 118 #include "llvm/IR/Module.h" 119 #include "llvm/IR/Operator.h" 120 #include "llvm/IR/PatternMatch.h" 121 #include "llvm/IR/Type.h" 122 #include "llvm/IR/Use.h" 123 #include "llvm/IR/User.h" 124 #include "llvm/IR/Value.h" 125 #include "llvm/IR/ValueHandle.h" 126 #include "llvm/IR/Verifier.h" 127 #include "llvm/InitializePasses.h" 128 #include "llvm/Pass.h" 129 #include "llvm/Support/Casting.h" 130 #include "llvm/Support/CommandLine.h" 131 #include "llvm/Support/Compiler.h" 132 #include "llvm/Support/Debug.h" 133 #include "llvm/Support/ErrorHandling.h" 134 #include "llvm/Support/InstructionCost.h" 135 #include "llvm/Support/MathExtras.h" 136 #include "llvm/Support/raw_ostream.h" 137 #include "llvm/Transforms/Utils/BasicBlockUtils.h" 138 #include "llvm/Transforms/Utils/InjectTLIMappings.h" 139 #include "llvm/Transforms/Utils/LoopSimplify.h" 140 #include "llvm/Transforms/Utils/LoopUtils.h" 141 #include "llvm/Transforms/Utils/LoopVersioning.h" 142 #include "llvm/Transforms/Utils/ScalarEvolutionExpander.h" 143 #include "llvm/Transforms/Utils/SizeOpts.h" 144 #include "llvm/Transforms/Vectorize/LoopVectorizationLegality.h" 145 #include <algorithm> 146 #include <cassert> 147 #include <cstdint> 148 #include <cstdlib> 149 #include <functional> 150 #include <iterator> 151 #include <limits> 152 #include <memory> 153 #include <string> 154 #include <tuple> 155 #include <utility> 156 157 using namespace llvm; 158 159 #define LV_NAME "loop-vectorize" 160 #define DEBUG_TYPE LV_NAME 161 162 #ifndef NDEBUG 163 const char VerboseDebug[] = DEBUG_TYPE "-verbose"; 164 #endif 165 166 /// @{ 167 /// Metadata attribute names 168 const char LLVMLoopVectorizeFollowupAll[] = "llvm.loop.vectorize.followup_all"; 169 const char LLVMLoopVectorizeFollowupVectorized[] = 170 "llvm.loop.vectorize.followup_vectorized"; 171 const char LLVMLoopVectorizeFollowupEpilogue[] = 172 "llvm.loop.vectorize.followup_epilogue"; 173 /// @} 174 175 STATISTIC(LoopsVectorized, "Number of loops vectorized"); 176 STATISTIC(LoopsAnalyzed, "Number of loops analyzed for vectorization"); 177 STATISTIC(LoopsEpilogueVectorized, "Number of epilogues vectorized"); 178 179 static cl::opt<bool> EnableEpilogueVectorization( 180 "enable-epilogue-vectorization", cl::init(true), cl::Hidden, 181 cl::desc("Enable vectorization of epilogue loops.")); 182 183 static cl::opt<unsigned> EpilogueVectorizationForceVF( 184 "epilogue-vectorization-force-VF", cl::init(1), cl::Hidden, 185 cl::desc("When epilogue vectorization is enabled, and a value greater than " 186 "1 is specified, forces the given VF for all applicable epilogue " 187 "loops.")); 188 189 static cl::opt<unsigned> EpilogueVectorizationMinVF( 190 "epilogue-vectorization-minimum-VF", cl::init(16), cl::Hidden, 191 cl::desc("Only loops with vectorization factor equal to or larger than " 192 "the specified value are considered for epilogue vectorization.")); 193 194 /// Loops with a known constant trip count below this number are vectorized only 195 /// if no scalar iteration overheads are incurred. 196 static cl::opt<unsigned> TinyTripCountVectorThreshold( 197 "vectorizer-min-trip-count", cl::init(16), cl::Hidden, 198 cl::desc("Loops with a constant trip count that is smaller than this " 199 "value are vectorized only if no scalar iteration overheads " 200 "are incurred.")); 201 202 static cl::opt<unsigned> PragmaVectorizeMemoryCheckThreshold( 203 "pragma-vectorize-memory-check-threshold", cl::init(128), cl::Hidden, 204 cl::desc("The maximum allowed number of runtime memory checks with a " 205 "vectorize(enable) pragma.")); 206 207 // Option prefer-predicate-over-epilogue indicates that an epilogue is undesired, 208 // that predication is preferred, and this lists all options. I.e., the 209 // vectorizer will try to fold the tail-loop (epilogue) into the vector body 210 // and predicate the instructions accordingly. If tail-folding fails, there are 211 // different fallback strategies depending on these values: 212 namespace PreferPredicateTy { 213 enum Option { 214 ScalarEpilogue = 0, 215 PredicateElseScalarEpilogue, 216 PredicateOrDontVectorize 217 }; 218 } // namespace PreferPredicateTy 219 220 static cl::opt<PreferPredicateTy::Option> PreferPredicateOverEpilogue( 221 "prefer-predicate-over-epilogue", 222 cl::init(PreferPredicateTy::ScalarEpilogue), 223 cl::Hidden, 224 cl::desc("Tail-folding and predication preferences over creating a scalar " 225 "epilogue loop."), 226 cl::values(clEnumValN(PreferPredicateTy::ScalarEpilogue, 227 "scalar-epilogue", 228 "Don't tail-predicate loops, create scalar epilogue"), 229 clEnumValN(PreferPredicateTy::PredicateElseScalarEpilogue, 230 "predicate-else-scalar-epilogue", 231 "prefer tail-folding, create scalar epilogue if tail " 232 "folding fails."), 233 clEnumValN(PreferPredicateTy::PredicateOrDontVectorize, 234 "predicate-dont-vectorize", 235 "prefers tail-folding, don't attempt vectorization if " 236 "tail-folding fails."))); 237 238 static cl::opt<bool> MaximizeBandwidth( 239 "vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden, 240 cl::desc("Maximize bandwidth when selecting vectorization factor which " 241 "will be determined by the smallest type in loop.")); 242 243 static cl::opt<bool> EnableInterleavedMemAccesses( 244 "enable-interleaved-mem-accesses", cl::init(false), cl::Hidden, 245 cl::desc("Enable vectorization on interleaved memory accesses in a loop")); 246 247 /// An interleave-group may need masking if it resides in a block that needs 248 /// predication, or in order to mask away gaps. 249 static cl::opt<bool> EnableMaskedInterleavedMemAccesses( 250 "enable-masked-interleaved-mem-accesses", cl::init(false), cl::Hidden, 251 cl::desc("Enable vectorization on masked interleaved memory accesses in a loop")); 252 253 static cl::opt<unsigned> TinyTripCountInterleaveThreshold( 254 "tiny-trip-count-interleave-threshold", cl::init(128), cl::Hidden, 255 cl::desc("We don't interleave loops with a estimated constant trip count " 256 "below this number")); 257 258 static cl::opt<unsigned> ForceTargetNumScalarRegs( 259 "force-target-num-scalar-regs", cl::init(0), cl::Hidden, 260 cl::desc("A flag that overrides the target's number of scalar registers.")); 261 262 static cl::opt<unsigned> ForceTargetNumVectorRegs( 263 "force-target-num-vector-regs", cl::init(0), cl::Hidden, 264 cl::desc("A flag that overrides the target's number of vector registers.")); 265 266 static cl::opt<unsigned> ForceTargetMaxScalarInterleaveFactor( 267 "force-target-max-scalar-interleave", cl::init(0), cl::Hidden, 268 cl::desc("A flag that overrides the target's max interleave factor for " 269 "scalar loops.")); 270 271 static cl::opt<unsigned> ForceTargetMaxVectorInterleaveFactor( 272 "force-target-max-vector-interleave", cl::init(0), cl::Hidden, 273 cl::desc("A flag that overrides the target's max interleave factor for " 274 "vectorized loops.")); 275 276 static cl::opt<unsigned> ForceTargetInstructionCost( 277 "force-target-instruction-cost", cl::init(0), cl::Hidden, 278 cl::desc("A flag that overrides the target's expected cost for " 279 "an instruction to a single constant value. Mostly " 280 "useful for getting consistent testing.")); 281 282 static cl::opt<bool> ForceTargetSupportsScalableVectors( 283 "force-target-supports-scalable-vectors", cl::init(false), cl::Hidden, 284 cl::desc( 285 "Pretend that scalable vectors are supported, even if the target does " 286 "not support them. This flag should only be used for testing.")); 287 288 static cl::opt<unsigned> SmallLoopCost( 289 "small-loop-cost", cl::init(20), cl::Hidden, 290 cl::desc( 291 "The cost of a loop that is considered 'small' by the interleaver.")); 292 293 static cl::opt<bool> LoopVectorizeWithBlockFrequency( 294 "loop-vectorize-with-block-frequency", cl::init(true), cl::Hidden, 295 cl::desc("Enable the use of the block frequency analysis to access PGO " 296 "heuristics minimizing code growth in cold regions and being more " 297 "aggressive in hot regions.")); 298 299 // Runtime interleave loops for load/store throughput. 300 static cl::opt<bool> EnableLoadStoreRuntimeInterleave( 301 "enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden, 302 cl::desc( 303 "Enable runtime interleaving until load/store ports are saturated")); 304 305 /// Interleave small loops with scalar reductions. 306 static cl::opt<bool> InterleaveSmallLoopScalarReduction( 307 "interleave-small-loop-scalar-reduction", cl::init(false), cl::Hidden, 308 cl::desc("Enable interleaving for loops with small iteration counts that " 309 "contain scalar reductions to expose ILP.")); 310 311 /// The number of stores in a loop that are allowed to need predication. 312 static cl::opt<unsigned> NumberOfStoresToPredicate( 313 "vectorize-num-stores-pred", cl::init(1), cl::Hidden, 314 cl::desc("Max number of stores to be predicated behind an if.")); 315 316 static cl::opt<bool> EnableIndVarRegisterHeur( 317 "enable-ind-var-reg-heur", cl::init(true), cl::Hidden, 318 cl::desc("Count the induction variable only once when interleaving")); 319 320 static cl::opt<bool> EnableCondStoresVectorization( 321 "enable-cond-stores-vec", cl::init(true), cl::Hidden, 322 cl::desc("Enable if predication of stores during vectorization.")); 323 324 static cl::opt<unsigned> MaxNestedScalarReductionIC( 325 "max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden, 326 cl::desc("The maximum interleave count to use when interleaving a scalar " 327 "reduction in a nested loop.")); 328 329 static cl::opt<bool> 330 PreferInLoopReductions("prefer-inloop-reductions", cl::init(false), 331 cl::Hidden, 332 cl::desc("Prefer in-loop vector reductions, " 333 "overriding the targets preference.")); 334 335 cl::opt<bool> EnableStrictReductions( 336 "enable-strict-reductions", cl::init(false), cl::Hidden, 337 cl::desc("Enable the vectorisation of loops with in-order (strict) " 338 "FP reductions")); 339 340 static cl::opt<bool> PreferPredicatedReductionSelect( 341 "prefer-predicated-reduction-select", cl::init(false), cl::Hidden, 342 cl::desc( 343 "Prefer predicating a reduction operation over an after loop select.")); 344 345 cl::opt<bool> EnableVPlanNativePath( 346 "enable-vplan-native-path", cl::init(false), cl::Hidden, 347 cl::desc("Enable VPlan-native vectorization path with " 348 "support for outer loop vectorization.")); 349 350 // FIXME: Remove this switch once we have divergence analysis. Currently we 351 // assume divergent non-backedge branches when this switch is true. 352 cl::opt<bool> EnableVPlanPredication( 353 "enable-vplan-predication", cl::init(false), cl::Hidden, 354 cl::desc("Enable VPlan-native vectorization path predicator with " 355 "support for outer loop vectorization.")); 356 357 // This flag enables the stress testing of the VPlan H-CFG construction in the 358 // VPlan-native vectorization path. It must be used in conjuction with 359 // -enable-vplan-native-path. -vplan-verify-hcfg can also be used to enable the 360 // verification of the H-CFGs built. 361 static cl::opt<bool> VPlanBuildStressTest( 362 "vplan-build-stress-test", cl::init(false), cl::Hidden, 363 cl::desc( 364 "Build VPlan for every supported loop nest in the function and bail " 365 "out right after the build (stress test the VPlan H-CFG construction " 366 "in the VPlan-native vectorization path).")); 367 368 cl::opt<bool> llvm::EnableLoopInterleaving( 369 "interleave-loops", cl::init(true), cl::Hidden, 370 cl::desc("Enable loop interleaving in Loop vectorization passes")); 371 cl::opt<bool> llvm::EnableLoopVectorization( 372 "vectorize-loops", cl::init(true), cl::Hidden, 373 cl::desc("Run the Loop vectorization passes")); 374 375 cl::opt<bool> PrintVPlansInDotFormat( 376 "vplan-print-in-dot-format", cl::init(false), cl::Hidden, 377 cl::desc("Use dot format instead of plain text when dumping VPlans")); 378 379 /// A helper function that returns true if the given type is irregular. The 380 /// type is irregular if its allocated size doesn't equal the store size of an 381 /// element of the corresponding vector type. 382 static bool hasIrregularType(Type *Ty, const DataLayout &DL) { 383 // Determine if an array of N elements of type Ty is "bitcast compatible" 384 // with a <N x Ty> vector. 385 // This is only true if there is no padding between the array elements. 386 return DL.getTypeAllocSizeInBits(Ty) != DL.getTypeSizeInBits(Ty); 387 } 388 389 /// A helper function that returns the reciprocal of the block probability of 390 /// predicated blocks. If we return X, we are assuming the predicated block 391 /// will execute once for every X iterations of the loop header. 392 /// 393 /// TODO: We should use actual block probability here, if available. Currently, 394 /// we always assume predicated blocks have a 50% chance of executing. 395 static unsigned getReciprocalPredBlockProb() { return 2; } 396 397 /// A helper function that returns an integer or floating-point constant with 398 /// value C. 399 static Constant *getSignedIntOrFpConstant(Type *Ty, int64_t C) { 400 return Ty->isIntegerTy() ? ConstantInt::getSigned(Ty, C) 401 : ConstantFP::get(Ty, C); 402 } 403 404 /// Returns "best known" trip count for the specified loop \p L as defined by 405 /// the following procedure: 406 /// 1) Returns exact trip count if it is known. 407 /// 2) Returns expected trip count according to profile data if any. 408 /// 3) Returns upper bound estimate if it is known. 409 /// 4) Returns None if all of the above failed. 410 static Optional<unsigned> getSmallBestKnownTC(ScalarEvolution &SE, Loop *L) { 411 // Check if exact trip count is known. 412 if (unsigned ExpectedTC = SE.getSmallConstantTripCount(L)) 413 return ExpectedTC; 414 415 // Check if there is an expected trip count available from profile data. 416 if (LoopVectorizeWithBlockFrequency) 417 if (auto EstimatedTC = getLoopEstimatedTripCount(L)) 418 return EstimatedTC; 419 420 // Check if upper bound estimate is known. 421 if (unsigned ExpectedTC = SE.getSmallConstantMaxTripCount(L)) 422 return ExpectedTC; 423 424 return None; 425 } 426 427 // Forward declare GeneratedRTChecks. 428 class GeneratedRTChecks; 429 430 namespace llvm { 431 432 /// InnerLoopVectorizer vectorizes loops which contain only one basic 433 /// block to a specified vectorization factor (VF). 434 /// This class performs the widening of scalars into vectors, or multiple 435 /// scalars. This class also implements the following features: 436 /// * It inserts an epilogue loop for handling loops that don't have iteration 437 /// counts that are known to be a multiple of the vectorization factor. 438 /// * It handles the code generation for reduction variables. 439 /// * Scalarization (implementation using scalars) of un-vectorizable 440 /// instructions. 441 /// InnerLoopVectorizer does not perform any vectorization-legality 442 /// checks, and relies on the caller to check for the different legality 443 /// aspects. The InnerLoopVectorizer relies on the 444 /// LoopVectorizationLegality class to provide information about the induction 445 /// and reduction variables that were found to a given vectorization factor. 446 class InnerLoopVectorizer { 447 public: 448 InnerLoopVectorizer(Loop *OrigLoop, PredicatedScalarEvolution &PSE, 449 LoopInfo *LI, DominatorTree *DT, 450 const TargetLibraryInfo *TLI, 451 const TargetTransformInfo *TTI, AssumptionCache *AC, 452 OptimizationRemarkEmitter *ORE, ElementCount VecWidth, 453 unsigned UnrollFactor, LoopVectorizationLegality *LVL, 454 LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, 455 ProfileSummaryInfo *PSI, GeneratedRTChecks &RTChecks) 456 : OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI), 457 AC(AC), ORE(ORE), VF(VecWidth), UF(UnrollFactor), 458 Builder(PSE.getSE()->getContext()), Legal(LVL), Cost(CM), BFI(BFI), 459 PSI(PSI), RTChecks(RTChecks) { 460 // Query this against the original loop and save it here because the profile 461 // of the original loop header may change as the transformation happens. 462 OptForSizeBasedOnProfile = llvm::shouldOptimizeForSize( 463 OrigLoop->getHeader(), PSI, BFI, PGSOQueryType::IRPass); 464 } 465 466 virtual ~InnerLoopVectorizer() = default; 467 468 /// Create a new empty loop that will contain vectorized instructions later 469 /// on, while the old loop will be used as the scalar remainder. Control flow 470 /// is generated around the vectorized (and scalar epilogue) loops consisting 471 /// of various checks and bypasses. Return the pre-header block of the new 472 /// loop. 473 /// In the case of epilogue vectorization, this function is overriden to 474 /// handle the more complex control flow around the loops. 475 virtual BasicBlock *createVectorizedLoopSkeleton(); 476 477 /// Widen a single instruction within the innermost loop. 478 void widenInstruction(Instruction &I, VPValue *Def, VPUser &Operands, 479 VPTransformState &State); 480 481 /// Widen a single call instruction within the innermost loop. 482 void widenCallInstruction(CallInst &I, VPValue *Def, VPUser &ArgOperands, 483 VPTransformState &State); 484 485 /// Widen a single select instruction within the innermost loop. 486 void widenSelectInstruction(SelectInst &I, VPValue *VPDef, VPUser &Operands, 487 bool InvariantCond, VPTransformState &State); 488 489 /// Fix the vectorized code, taking care of header phi's, live-outs, and more. 490 void fixVectorizedLoop(VPTransformState &State); 491 492 // Return true if any runtime check is added. 493 bool areSafetyChecksAdded() { return AddedSafetyChecks; } 494 495 /// A type for vectorized values in the new loop. Each value from the 496 /// original loop, when vectorized, is represented by UF vector values in the 497 /// new unrolled loop, where UF is the unroll factor. 498 using VectorParts = SmallVector<Value *, 2>; 499 500 /// Vectorize a single GetElementPtrInst based on information gathered and 501 /// decisions taken during planning. 502 void widenGEP(GetElementPtrInst *GEP, VPValue *VPDef, VPUser &Indices, 503 unsigned UF, ElementCount VF, bool IsPtrLoopInvariant, 504 SmallBitVector &IsIndexLoopInvariant, VPTransformState &State); 505 506 /// Vectorize a single PHINode in a block. This method handles the induction 507 /// variable canonicalization. It supports both VF = 1 for unrolled loops and 508 /// arbitrary length vectors. 509 void widenPHIInstruction(Instruction *PN, RecurrenceDescriptor *RdxDesc, 510 VPWidenPHIRecipe *PhiR, VPTransformState &State); 511 512 /// A helper function to scalarize a single Instruction in the innermost loop. 513 /// Generates a sequence of scalar instances for each lane between \p MinLane 514 /// and \p MaxLane, times each part between \p MinPart and \p MaxPart, 515 /// inclusive. Uses the VPValue operands from \p Operands instead of \p 516 /// Instr's operands. 517 void scalarizeInstruction(Instruction *Instr, VPValue *Def, VPUser &Operands, 518 const VPIteration &Instance, bool IfPredicateInstr, 519 VPTransformState &State); 520 521 /// Widen an integer or floating-point induction variable \p IV. If \p Trunc 522 /// is provided, the integer induction variable will first be truncated to 523 /// the corresponding type. 524 void widenIntOrFpInduction(PHINode *IV, Value *Start, TruncInst *Trunc, 525 VPValue *Def, VPValue *CastDef, 526 VPTransformState &State); 527 528 /// Construct the vector value of a scalarized value \p V one lane at a time. 529 void packScalarIntoVectorValue(VPValue *Def, const VPIteration &Instance, 530 VPTransformState &State); 531 532 /// Try to vectorize interleaved access group \p Group with the base address 533 /// given in \p Addr, optionally masking the vector operations if \p 534 /// BlockInMask is non-null. Use \p State to translate given VPValues to IR 535 /// values in the vectorized loop. 536 void vectorizeInterleaveGroup(const InterleaveGroup<Instruction> *Group, 537 ArrayRef<VPValue *> VPDefs, 538 VPTransformState &State, VPValue *Addr, 539 ArrayRef<VPValue *> StoredValues, 540 VPValue *BlockInMask = nullptr); 541 542 /// Vectorize Load and Store instructions with the base address given in \p 543 /// Addr, optionally masking the vector operations if \p BlockInMask is 544 /// non-null. Use \p State to translate given VPValues to IR values in the 545 /// vectorized loop. 546 void vectorizeMemoryInstruction(Instruction *Instr, VPTransformState &State, 547 VPValue *Def, VPValue *Addr, 548 VPValue *StoredValue, VPValue *BlockInMask); 549 550 /// Set the debug location in the builder using the debug location in 551 /// the instruction. 552 void setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr); 553 554 /// Fix the non-induction PHIs in the OrigPHIsToFix vector. 555 void fixNonInductionPHIs(VPTransformState &State); 556 557 /// Returns true if the reordering of FP operations is not allowed, but we are 558 /// able to vectorize with strict in-order reductions for the given RdxDesc. 559 bool useOrderedReductions(RecurrenceDescriptor &RdxDesc); 560 561 /// Create a broadcast instruction. This method generates a broadcast 562 /// instruction (shuffle) for loop invariant values and for the induction 563 /// value. If this is the induction variable then we extend it to N, N+1, ... 564 /// this is needed because each iteration in the loop corresponds to a SIMD 565 /// element. 566 virtual Value *getBroadcastInstrs(Value *V); 567 568 protected: 569 friend class LoopVectorizationPlanner; 570 571 /// A small list of PHINodes. 572 using PhiVector = SmallVector<PHINode *, 4>; 573 574 /// A type for scalarized values in the new loop. Each value from the 575 /// original loop, when scalarized, is represented by UF x VF scalar values 576 /// in the new unrolled loop, where UF is the unroll factor and VF is the 577 /// vectorization factor. 578 using ScalarParts = SmallVector<SmallVector<Value *, 4>, 2>; 579 580 /// Set up the values of the IVs correctly when exiting the vector loop. 581 void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II, 582 Value *CountRoundDown, Value *EndValue, 583 BasicBlock *MiddleBlock); 584 585 /// Create a new induction variable inside L. 586 PHINode *createInductionVariable(Loop *L, Value *Start, Value *End, 587 Value *Step, Instruction *DL); 588 589 /// Handle all cross-iteration phis in the header. 590 void fixCrossIterationPHIs(VPTransformState &State); 591 592 /// Fix a first-order recurrence. This is the second phase of vectorizing 593 /// this phi node. 594 void fixFirstOrderRecurrence(VPWidenPHIRecipe *PhiR, VPTransformState &State); 595 596 /// Fix a reduction cross-iteration phi. This is the second phase of 597 /// vectorizing this phi node. 598 void fixReduction(VPWidenPHIRecipe *Phi, VPTransformState &State); 599 600 /// Clear NSW/NUW flags from reduction instructions if necessary. 601 void clearReductionWrapFlags(const RecurrenceDescriptor &RdxDesc, 602 VPTransformState &State); 603 604 /// Fixup the LCSSA phi nodes in the unique exit block. This simply 605 /// means we need to add the appropriate incoming value from the middle 606 /// block as exiting edges from the scalar epilogue loop (if present) are 607 /// already in place, and we exit the vector loop exclusively to the middle 608 /// block. 609 void fixLCSSAPHIs(VPTransformState &State); 610 611 /// Iteratively sink the scalarized operands of a predicated instruction into 612 /// the block that was created for it. 613 void sinkScalarOperands(Instruction *PredInst); 614 615 /// Shrinks vector element sizes to the smallest bitwidth they can be legally 616 /// represented as. 617 void truncateToMinimalBitwidths(VPTransformState &State); 618 619 /// This function adds 620 /// (StartIdx * Step, (StartIdx + 1) * Step, (StartIdx + 2) * Step, ...) 621 /// to each vector element of Val. The sequence starts at StartIndex. 622 /// \p Opcode is relevant for FP induction variable. 623 virtual Value *getStepVector(Value *Val, int StartIdx, Value *Step, 624 Instruction::BinaryOps Opcode = 625 Instruction::BinaryOpsEnd); 626 627 /// Compute scalar induction steps. \p ScalarIV is the scalar induction 628 /// variable on which to base the steps, \p Step is the size of the step, and 629 /// \p EntryVal is the value from the original loop that maps to the steps. 630 /// Note that \p EntryVal doesn't have to be an induction variable - it 631 /// can also be a truncate instruction. 632 void buildScalarSteps(Value *ScalarIV, Value *Step, Instruction *EntryVal, 633 const InductionDescriptor &ID, VPValue *Def, 634 VPValue *CastDef, VPTransformState &State); 635 636 /// Create a vector induction phi node based on an existing scalar one. \p 637 /// EntryVal is the value from the original loop that maps to the vector phi 638 /// node, and \p Step is the loop-invariant step. If \p EntryVal is a 639 /// truncate instruction, instead of widening the original IV, we widen a 640 /// version of the IV truncated to \p EntryVal's type. 641 void createVectorIntOrFpInductionPHI(const InductionDescriptor &II, 642 Value *Step, Value *Start, 643 Instruction *EntryVal, VPValue *Def, 644 VPValue *CastDef, 645 VPTransformState &State); 646 647 /// Returns true if an instruction \p I should be scalarized instead of 648 /// vectorized for the chosen vectorization factor. 649 bool shouldScalarizeInstruction(Instruction *I) const; 650 651 /// Returns true if we should generate a scalar version of \p IV. 652 bool needsScalarInduction(Instruction *IV) const; 653 654 /// If there is a cast involved in the induction variable \p ID, which should 655 /// be ignored in the vectorized loop body, this function records the 656 /// VectorLoopValue of the respective Phi also as the VectorLoopValue of the 657 /// cast. We had already proved that the casted Phi is equal to the uncasted 658 /// Phi in the vectorized loop (under a runtime guard), and therefore 659 /// there is no need to vectorize the cast - the same value can be used in the 660 /// vector loop for both the Phi and the cast. 661 /// If \p VectorLoopValue is a scalarized value, \p Lane is also specified, 662 /// Otherwise, \p VectorLoopValue is a widened/vectorized value. 663 /// 664 /// \p EntryVal is the value from the original loop that maps to the vector 665 /// phi node and is used to distinguish what is the IV currently being 666 /// processed - original one (if \p EntryVal is a phi corresponding to the 667 /// original IV) or the "newly-created" one based on the proof mentioned above 668 /// (see also buildScalarSteps() and createVectorIntOrFPInductionPHI()). In the 669 /// latter case \p EntryVal is a TruncInst and we must not record anything for 670 /// that IV, but it's error-prone to expect callers of this routine to care 671 /// about that, hence this explicit parameter. 672 void recordVectorLoopValueForInductionCast( 673 const InductionDescriptor &ID, const Instruction *EntryVal, 674 Value *VectorLoopValue, VPValue *CastDef, VPTransformState &State, 675 unsigned Part, unsigned Lane = UINT_MAX); 676 677 /// Generate a shuffle sequence that will reverse the vector Vec. 678 virtual Value *reverseVector(Value *Vec); 679 680 /// Returns (and creates if needed) the original loop trip count. 681 Value *getOrCreateTripCount(Loop *NewLoop); 682 683 /// Returns (and creates if needed) the trip count of the widened loop. 684 Value *getOrCreateVectorTripCount(Loop *NewLoop); 685 686 /// Returns a bitcasted value to the requested vector type. 687 /// Also handles bitcasts of vector<float> <-> vector<pointer> types. 688 Value *createBitOrPointerCast(Value *V, VectorType *DstVTy, 689 const DataLayout &DL); 690 691 /// Emit a bypass check to see if the vector trip count is zero, including if 692 /// it overflows. 693 void emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass); 694 695 /// Emit a bypass check to see if all of the SCEV assumptions we've 696 /// had to make are correct. Returns the block containing the checks or 697 /// nullptr if no checks have been added. 698 BasicBlock *emitSCEVChecks(Loop *L, BasicBlock *Bypass); 699 700 /// Emit bypass checks to check any memory assumptions we may have made. 701 /// Returns the block containing the checks or nullptr if no checks have been 702 /// added. 703 BasicBlock *emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass); 704 705 /// Compute the transformed value of Index at offset StartValue using step 706 /// StepValue. 707 /// For integer induction, returns StartValue + Index * StepValue. 708 /// For pointer induction, returns StartValue[Index * StepValue]. 709 /// FIXME: The newly created binary instructions should contain nsw/nuw 710 /// flags, which can be found from the original scalar operations. 711 Value *emitTransformedIndex(IRBuilder<> &B, Value *Index, ScalarEvolution *SE, 712 const DataLayout &DL, 713 const InductionDescriptor &ID) const; 714 715 /// Emit basic blocks (prefixed with \p Prefix) for the iteration check, 716 /// vector loop preheader, middle block and scalar preheader. Also 717 /// allocate a loop object for the new vector loop and return it. 718 Loop *createVectorLoopSkeleton(StringRef Prefix); 719 720 /// Create new phi nodes for the induction variables to resume iteration count 721 /// in the scalar epilogue, from where the vectorized loop left off (given by 722 /// \p VectorTripCount). 723 /// In cases where the loop skeleton is more complicated (eg. epilogue 724 /// vectorization) and the resume values can come from an additional bypass 725 /// block, the \p AdditionalBypass pair provides information about the bypass 726 /// block and the end value on the edge from bypass to this loop. 727 void createInductionResumeValues( 728 Loop *L, Value *VectorTripCount, 729 std::pair<BasicBlock *, Value *> AdditionalBypass = {nullptr, nullptr}); 730 731 /// Complete the loop skeleton by adding debug MDs, creating appropriate 732 /// conditional branches in the middle block, preparing the builder and 733 /// running the verifier. Take in the vector loop \p L as argument, and return 734 /// the preheader of the completed vector loop. 735 BasicBlock *completeLoopSkeleton(Loop *L, MDNode *OrigLoopID); 736 737 /// Add additional metadata to \p To that was not present on \p Orig. 738 /// 739 /// Currently this is used to add the noalias annotations based on the 740 /// inserted memchecks. Use this for instructions that are *cloned* into the 741 /// vector loop. 742 void addNewMetadata(Instruction *To, const Instruction *Orig); 743 744 /// Add metadata from one instruction to another. 745 /// 746 /// This includes both the original MDs from \p From and additional ones (\see 747 /// addNewMetadata). Use this for *newly created* instructions in the vector 748 /// loop. 749 void addMetadata(Instruction *To, Instruction *From); 750 751 /// Similar to the previous function but it adds the metadata to a 752 /// vector of instructions. 753 void addMetadata(ArrayRef<Value *> To, Instruction *From); 754 755 /// Allow subclasses to override and print debug traces before/after vplan 756 /// execution, when trace information is requested. 757 virtual void printDebugTracesAtStart(){}; 758 virtual void printDebugTracesAtEnd(){}; 759 760 /// The original loop. 761 Loop *OrigLoop; 762 763 /// A wrapper around ScalarEvolution used to add runtime SCEV checks. Applies 764 /// dynamic knowledge to simplify SCEV expressions and converts them to a 765 /// more usable form. 766 PredicatedScalarEvolution &PSE; 767 768 /// Loop Info. 769 LoopInfo *LI; 770 771 /// Dominator Tree. 772 DominatorTree *DT; 773 774 /// Alias Analysis. 775 AAResults *AA; 776 777 /// Target Library Info. 778 const TargetLibraryInfo *TLI; 779 780 /// Target Transform Info. 781 const TargetTransformInfo *TTI; 782 783 /// Assumption Cache. 784 AssumptionCache *AC; 785 786 /// Interface to emit optimization remarks. 787 OptimizationRemarkEmitter *ORE; 788 789 /// LoopVersioning. It's only set up (non-null) if memchecks were 790 /// used. 791 /// 792 /// This is currently only used to add no-alias metadata based on the 793 /// memchecks. The actually versioning is performed manually. 794 std::unique_ptr<LoopVersioning> LVer; 795 796 /// The vectorization SIMD factor to use. Each vector will have this many 797 /// vector elements. 798 ElementCount VF; 799 800 /// The vectorization unroll factor to use. Each scalar is vectorized to this 801 /// many different vector instructions. 802 unsigned UF; 803 804 /// The builder that we use 805 IRBuilder<> Builder; 806 807 // --- Vectorization state --- 808 809 /// The vector-loop preheader. 810 BasicBlock *LoopVectorPreHeader; 811 812 /// The scalar-loop preheader. 813 BasicBlock *LoopScalarPreHeader; 814 815 /// Middle Block between the vector and the scalar. 816 BasicBlock *LoopMiddleBlock; 817 818 /// The (unique) ExitBlock of the scalar loop. Note that 819 /// there can be multiple exiting edges reaching this block. 820 BasicBlock *LoopExitBlock; 821 822 /// The vector loop body. 823 BasicBlock *LoopVectorBody; 824 825 /// The scalar loop body. 826 BasicBlock *LoopScalarBody; 827 828 /// A list of all bypass blocks. The first block is the entry of the loop. 829 SmallVector<BasicBlock *, 4> LoopBypassBlocks; 830 831 /// The new Induction variable which was added to the new block. 832 PHINode *Induction = nullptr; 833 834 /// The induction variable of the old basic block. 835 PHINode *OldInduction = nullptr; 836 837 /// Store instructions that were predicated. 838 SmallVector<Instruction *, 4> PredicatedInstructions; 839 840 /// Trip count of the original loop. 841 Value *TripCount = nullptr; 842 843 /// Trip count of the widened loop (TripCount - TripCount % (VF*UF)) 844 Value *VectorTripCount = nullptr; 845 846 /// The legality analysis. 847 LoopVectorizationLegality *Legal; 848 849 /// The profitablity analysis. 850 LoopVectorizationCostModel *Cost; 851 852 // Record whether runtime checks are added. 853 bool AddedSafetyChecks = false; 854 855 // Holds the end values for each induction variable. We save the end values 856 // so we can later fix-up the external users of the induction variables. 857 DenseMap<PHINode *, Value *> IVEndValues; 858 859 // Vector of original scalar PHIs whose corresponding widened PHIs need to be 860 // fixed up at the end of vector code generation. 861 SmallVector<PHINode *, 8> OrigPHIsToFix; 862 863 /// BFI and PSI are used to check for profile guided size optimizations. 864 BlockFrequencyInfo *BFI; 865 ProfileSummaryInfo *PSI; 866 867 // Whether this loop should be optimized for size based on profile guided size 868 // optimizatios. 869 bool OptForSizeBasedOnProfile; 870 871 /// Structure to hold information about generated runtime checks, responsible 872 /// for cleaning the checks, if vectorization turns out unprofitable. 873 GeneratedRTChecks &RTChecks; 874 }; 875 876 class InnerLoopUnroller : public InnerLoopVectorizer { 877 public: 878 InnerLoopUnroller(Loop *OrigLoop, PredicatedScalarEvolution &PSE, 879 LoopInfo *LI, DominatorTree *DT, 880 const TargetLibraryInfo *TLI, 881 const TargetTransformInfo *TTI, AssumptionCache *AC, 882 OptimizationRemarkEmitter *ORE, unsigned UnrollFactor, 883 LoopVectorizationLegality *LVL, 884 LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, 885 ProfileSummaryInfo *PSI, GeneratedRTChecks &Check) 886 : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 887 ElementCount::getFixed(1), UnrollFactor, LVL, CM, 888 BFI, PSI, Check) {} 889 890 private: 891 Value *getBroadcastInstrs(Value *V) override; 892 Value *getStepVector(Value *Val, int StartIdx, Value *Step, 893 Instruction::BinaryOps Opcode = 894 Instruction::BinaryOpsEnd) override; 895 Value *reverseVector(Value *Vec) override; 896 }; 897 898 /// Encapsulate information regarding vectorization of a loop and its epilogue. 899 /// This information is meant to be updated and used across two stages of 900 /// epilogue vectorization. 901 struct EpilogueLoopVectorizationInfo { 902 ElementCount MainLoopVF = ElementCount::getFixed(0); 903 unsigned MainLoopUF = 0; 904 ElementCount EpilogueVF = ElementCount::getFixed(0); 905 unsigned EpilogueUF = 0; 906 BasicBlock *MainLoopIterationCountCheck = nullptr; 907 BasicBlock *EpilogueIterationCountCheck = nullptr; 908 BasicBlock *SCEVSafetyCheck = nullptr; 909 BasicBlock *MemSafetyCheck = nullptr; 910 Value *TripCount = nullptr; 911 Value *VectorTripCount = nullptr; 912 913 EpilogueLoopVectorizationInfo(unsigned MVF, unsigned MUF, unsigned EVF, 914 unsigned EUF) 915 : MainLoopVF(ElementCount::getFixed(MVF)), MainLoopUF(MUF), 916 EpilogueVF(ElementCount::getFixed(EVF)), EpilogueUF(EUF) { 917 assert(EUF == 1 && 918 "A high UF for the epilogue loop is likely not beneficial."); 919 } 920 }; 921 922 /// An extension of the inner loop vectorizer that creates a skeleton for a 923 /// vectorized loop that has its epilogue (residual) also vectorized. 924 /// The idea is to run the vplan on a given loop twice, firstly to setup the 925 /// skeleton and vectorize the main loop, and secondly to complete the skeleton 926 /// from the first step and vectorize the epilogue. This is achieved by 927 /// deriving two concrete strategy classes from this base class and invoking 928 /// them in succession from the loop vectorizer planner. 929 class InnerLoopAndEpilogueVectorizer : public InnerLoopVectorizer { 930 public: 931 InnerLoopAndEpilogueVectorizer( 932 Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, 933 DominatorTree *DT, const TargetLibraryInfo *TLI, 934 const TargetTransformInfo *TTI, AssumptionCache *AC, 935 OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, 936 LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, 937 BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, 938 GeneratedRTChecks &Checks) 939 : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 940 EPI.MainLoopVF, EPI.MainLoopUF, LVL, CM, BFI, PSI, 941 Checks), 942 EPI(EPI) {} 943 944 // Override this function to handle the more complex control flow around the 945 // three loops. 946 BasicBlock *createVectorizedLoopSkeleton() final override { 947 return createEpilogueVectorizedLoopSkeleton(); 948 } 949 950 /// The interface for creating a vectorized skeleton using one of two 951 /// different strategies, each corresponding to one execution of the vplan 952 /// as described above. 953 virtual BasicBlock *createEpilogueVectorizedLoopSkeleton() = 0; 954 955 /// Holds and updates state information required to vectorize the main loop 956 /// and its epilogue in two separate passes. This setup helps us avoid 957 /// regenerating and recomputing runtime safety checks. It also helps us to 958 /// shorten the iteration-count-check path length for the cases where the 959 /// iteration count of the loop is so small that the main vector loop is 960 /// completely skipped. 961 EpilogueLoopVectorizationInfo &EPI; 962 }; 963 964 /// A specialized derived class of inner loop vectorizer that performs 965 /// vectorization of *main* loops in the process of vectorizing loops and their 966 /// epilogues. 967 class EpilogueVectorizerMainLoop : public InnerLoopAndEpilogueVectorizer { 968 public: 969 EpilogueVectorizerMainLoop( 970 Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, 971 DominatorTree *DT, const TargetLibraryInfo *TLI, 972 const TargetTransformInfo *TTI, AssumptionCache *AC, 973 OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, 974 LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, 975 BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, 976 GeneratedRTChecks &Check) 977 : InnerLoopAndEpilogueVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 978 EPI, LVL, CM, BFI, PSI, Check) {} 979 /// Implements the interface for creating a vectorized skeleton using the 980 /// *main loop* strategy (ie the first pass of vplan execution). 981 BasicBlock *createEpilogueVectorizedLoopSkeleton() final override; 982 983 protected: 984 /// Emits an iteration count bypass check once for the main loop (when \p 985 /// ForEpilogue is false) and once for the epilogue loop (when \p 986 /// ForEpilogue is true). 987 BasicBlock *emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass, 988 bool ForEpilogue); 989 void printDebugTracesAtStart() override; 990 void printDebugTracesAtEnd() override; 991 }; 992 993 // A specialized derived class of inner loop vectorizer that performs 994 // vectorization of *epilogue* loops in the process of vectorizing loops and 995 // their epilogues. 996 class EpilogueVectorizerEpilogueLoop : public InnerLoopAndEpilogueVectorizer { 997 public: 998 EpilogueVectorizerEpilogueLoop( 999 Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, 1000 DominatorTree *DT, const TargetLibraryInfo *TLI, 1001 const TargetTransformInfo *TTI, AssumptionCache *AC, 1002 OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, 1003 LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, 1004 BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, 1005 GeneratedRTChecks &Checks) 1006 : InnerLoopAndEpilogueVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 1007 EPI, LVL, CM, BFI, PSI, Checks) {} 1008 /// Implements the interface for creating a vectorized skeleton using the 1009 /// *epilogue loop* strategy (ie the second pass of vplan execution). 1010 BasicBlock *createEpilogueVectorizedLoopSkeleton() final override; 1011 1012 protected: 1013 /// Emits an iteration count bypass check after the main vector loop has 1014 /// finished to see if there are any iterations left to execute by either 1015 /// the vector epilogue or the scalar epilogue. 1016 BasicBlock *emitMinimumVectorEpilogueIterCountCheck(Loop *L, 1017 BasicBlock *Bypass, 1018 BasicBlock *Insert); 1019 void printDebugTracesAtStart() override; 1020 void printDebugTracesAtEnd() override; 1021 }; 1022 } // end namespace llvm 1023 1024 /// Look for a meaningful debug location on the instruction or it's 1025 /// operands. 1026 static Instruction *getDebugLocFromInstOrOperands(Instruction *I) { 1027 if (!I) 1028 return I; 1029 1030 DebugLoc Empty; 1031 if (I->getDebugLoc() != Empty) 1032 return I; 1033 1034 for (Use &Op : I->operands()) { 1035 if (Instruction *OpInst = dyn_cast<Instruction>(Op)) 1036 if (OpInst->getDebugLoc() != Empty) 1037 return OpInst; 1038 } 1039 1040 return I; 1041 } 1042 1043 void InnerLoopVectorizer::setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr) { 1044 if (const Instruction *Inst = dyn_cast_or_null<Instruction>(Ptr)) { 1045 const DILocation *DIL = Inst->getDebugLoc(); 1046 1047 // When a FSDiscriminator is enabled, we don't need to add the multiply 1048 // factors to the discriminators. 1049 if (DIL && Inst->getFunction()->isDebugInfoForProfiling() && 1050 !isa<DbgInfoIntrinsic>(Inst) && !EnableFSDiscriminator) { 1051 // FIXME: For scalable vectors, assume vscale=1. 1052 auto NewDIL = 1053 DIL->cloneByMultiplyingDuplicationFactor(UF * VF.getKnownMinValue()); 1054 if (NewDIL) 1055 B.SetCurrentDebugLocation(NewDIL.getValue()); 1056 else 1057 LLVM_DEBUG(dbgs() 1058 << "Failed to create new discriminator: " 1059 << DIL->getFilename() << " Line: " << DIL->getLine()); 1060 } else 1061 B.SetCurrentDebugLocation(DIL); 1062 } else 1063 B.SetCurrentDebugLocation(DebugLoc()); 1064 } 1065 1066 /// Write a \p DebugMsg about vectorization to the debug output stream. If \p I 1067 /// is passed, the message relates to that particular instruction. 1068 #ifndef NDEBUG 1069 static void debugVectorizationMessage(const StringRef Prefix, 1070 const StringRef DebugMsg, 1071 Instruction *I) { 1072 dbgs() << "LV: " << Prefix << DebugMsg; 1073 if (I != nullptr) 1074 dbgs() << " " << *I; 1075 else 1076 dbgs() << '.'; 1077 dbgs() << '\n'; 1078 } 1079 #endif 1080 1081 /// Create an analysis remark that explains why vectorization failed 1082 /// 1083 /// \p PassName is the name of the pass (e.g. can be AlwaysPrint). \p 1084 /// RemarkName is the identifier for the remark. If \p I is passed it is an 1085 /// instruction that prevents vectorization. Otherwise \p TheLoop is used for 1086 /// the location of the remark. \return the remark object that can be 1087 /// streamed to. 1088 static OptimizationRemarkAnalysis createLVAnalysis(const char *PassName, 1089 StringRef RemarkName, Loop *TheLoop, Instruction *I) { 1090 Value *CodeRegion = TheLoop->getHeader(); 1091 DebugLoc DL = TheLoop->getStartLoc(); 1092 1093 if (I) { 1094 CodeRegion = I->getParent(); 1095 // If there is no debug location attached to the instruction, revert back to 1096 // using the loop's. 1097 if (I->getDebugLoc()) 1098 DL = I->getDebugLoc(); 1099 } 1100 1101 return OptimizationRemarkAnalysis(PassName, RemarkName, DL, CodeRegion); 1102 } 1103 1104 /// Return a value for Step multiplied by VF. 1105 static Value *createStepForVF(IRBuilder<> &B, Constant *Step, ElementCount VF) { 1106 assert(isa<ConstantInt>(Step) && "Expected an integer step"); 1107 Constant *StepVal = ConstantInt::get( 1108 Step->getType(), 1109 cast<ConstantInt>(Step)->getSExtValue() * VF.getKnownMinValue()); 1110 return VF.isScalable() ? B.CreateVScale(StepVal) : StepVal; 1111 } 1112 1113 namespace llvm { 1114 1115 /// Return the runtime value for VF. 1116 Value *getRuntimeVF(IRBuilder<> &B, Type *Ty, ElementCount VF) { 1117 Constant *EC = ConstantInt::get(Ty, VF.getKnownMinValue()); 1118 return VF.isScalable() ? B.CreateVScale(EC) : EC; 1119 } 1120 1121 void reportVectorizationFailure(const StringRef DebugMsg, 1122 const StringRef OREMsg, const StringRef ORETag, 1123 OptimizationRemarkEmitter *ORE, Loop *TheLoop, 1124 Instruction *I) { 1125 LLVM_DEBUG(debugVectorizationMessage("Not vectorizing: ", DebugMsg, I)); 1126 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE); 1127 ORE->emit( 1128 createLVAnalysis(Hints.vectorizeAnalysisPassName(), ORETag, TheLoop, I) 1129 << "loop not vectorized: " << OREMsg); 1130 } 1131 1132 void reportVectorizationInfo(const StringRef Msg, const StringRef ORETag, 1133 OptimizationRemarkEmitter *ORE, Loop *TheLoop, 1134 Instruction *I) { 1135 LLVM_DEBUG(debugVectorizationMessage("", Msg, I)); 1136 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE); 1137 ORE->emit( 1138 createLVAnalysis(Hints.vectorizeAnalysisPassName(), ORETag, TheLoop, I) 1139 << Msg); 1140 } 1141 1142 } // end namespace llvm 1143 1144 #ifndef NDEBUG 1145 /// \return string containing a file name and a line # for the given loop. 1146 static std::string getDebugLocString(const Loop *L) { 1147 std::string Result; 1148 if (L) { 1149 raw_string_ostream OS(Result); 1150 if (const DebugLoc LoopDbgLoc = L->getStartLoc()) 1151 LoopDbgLoc.print(OS); 1152 else 1153 // Just print the module name. 1154 OS << L->getHeader()->getParent()->getParent()->getModuleIdentifier(); 1155 OS.flush(); 1156 } 1157 return Result; 1158 } 1159 #endif 1160 1161 void InnerLoopVectorizer::addNewMetadata(Instruction *To, 1162 const Instruction *Orig) { 1163 // If the loop was versioned with memchecks, add the corresponding no-alias 1164 // metadata. 1165 if (LVer && (isa<LoadInst>(Orig) || isa<StoreInst>(Orig))) 1166 LVer->annotateInstWithNoAlias(To, Orig); 1167 } 1168 1169 void InnerLoopVectorizer::addMetadata(Instruction *To, 1170 Instruction *From) { 1171 propagateMetadata(To, From); 1172 addNewMetadata(To, From); 1173 } 1174 1175 void InnerLoopVectorizer::addMetadata(ArrayRef<Value *> To, 1176 Instruction *From) { 1177 for (Value *V : To) { 1178 if (Instruction *I = dyn_cast<Instruction>(V)) 1179 addMetadata(I, From); 1180 } 1181 } 1182 1183 namespace llvm { 1184 1185 // Loop vectorization cost-model hints how the scalar epilogue loop should be 1186 // lowered. 1187 enum ScalarEpilogueLowering { 1188 1189 // The default: allowing scalar epilogues. 1190 CM_ScalarEpilogueAllowed, 1191 1192 // Vectorization with OptForSize: don't allow epilogues. 1193 CM_ScalarEpilogueNotAllowedOptSize, 1194 1195 // A special case of vectorisation with OptForSize: loops with a very small 1196 // trip count are considered for vectorization under OptForSize, thereby 1197 // making sure the cost of their loop body is dominant, free of runtime 1198 // guards and scalar iteration overheads. 1199 CM_ScalarEpilogueNotAllowedLowTripLoop, 1200 1201 // Loop hint predicate indicating an epilogue is undesired. 1202 CM_ScalarEpilogueNotNeededUsePredicate, 1203 1204 // Directive indicating we must either tail fold or not vectorize 1205 CM_ScalarEpilogueNotAllowedUsePredicate 1206 }; 1207 1208 /// ElementCountComparator creates a total ordering for ElementCount 1209 /// for the purposes of using it in a set structure. 1210 struct ElementCountComparator { 1211 bool operator()(const ElementCount &LHS, const ElementCount &RHS) const { 1212 return std::make_tuple(LHS.isScalable(), LHS.getKnownMinValue()) < 1213 std::make_tuple(RHS.isScalable(), RHS.getKnownMinValue()); 1214 } 1215 }; 1216 using ElementCountSet = SmallSet<ElementCount, 16, ElementCountComparator>; 1217 1218 /// LoopVectorizationCostModel - estimates the expected speedups due to 1219 /// vectorization. 1220 /// In many cases vectorization is not profitable. This can happen because of 1221 /// a number of reasons. In this class we mainly attempt to predict the 1222 /// expected speedup/slowdowns due to the supported instruction set. We use the 1223 /// TargetTransformInfo to query the different backends for the cost of 1224 /// different operations. 1225 class LoopVectorizationCostModel { 1226 public: 1227 LoopVectorizationCostModel(ScalarEpilogueLowering SEL, Loop *L, 1228 PredicatedScalarEvolution &PSE, LoopInfo *LI, 1229 LoopVectorizationLegality *Legal, 1230 const TargetTransformInfo &TTI, 1231 const TargetLibraryInfo *TLI, DemandedBits *DB, 1232 AssumptionCache *AC, 1233 OptimizationRemarkEmitter *ORE, const Function *F, 1234 const LoopVectorizeHints *Hints, 1235 InterleavedAccessInfo &IAI) 1236 : ScalarEpilogueStatus(SEL), TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), 1237 TTI(TTI), TLI(TLI), DB(DB), AC(AC), ORE(ORE), TheFunction(F), 1238 Hints(Hints), InterleaveInfo(IAI) {} 1239 1240 /// \return An upper bound for the vectorization factors (both fixed and 1241 /// scalable). If the factors are 0, vectorization and interleaving should be 1242 /// avoided up front. 1243 FixedScalableVFPair computeMaxVF(ElementCount UserVF, unsigned UserIC); 1244 1245 /// \return True if runtime checks are required for vectorization, and false 1246 /// otherwise. 1247 bool runtimeChecksRequired(); 1248 1249 /// \return The most profitable vectorization factor and the cost of that VF. 1250 /// This method checks every VF in \p CandidateVFs. If UserVF is not ZERO 1251 /// then this vectorization factor will be selected if vectorization is 1252 /// possible. 1253 VectorizationFactor 1254 selectVectorizationFactor(const ElementCountSet &CandidateVFs); 1255 1256 VectorizationFactor 1257 selectEpilogueVectorizationFactor(const ElementCount MaxVF, 1258 const LoopVectorizationPlanner &LVP); 1259 1260 /// Setup cost-based decisions for user vectorization factor. 1261 void selectUserVectorizationFactor(ElementCount UserVF) { 1262 collectUniformsAndScalars(UserVF); 1263 collectInstsToScalarize(UserVF); 1264 } 1265 1266 /// \return The size (in bits) of the smallest and widest types in the code 1267 /// that needs to be vectorized. We ignore values that remain scalar such as 1268 /// 64 bit loop indices. 1269 std::pair<unsigned, unsigned> getSmallestAndWidestTypes(); 1270 1271 /// \return The desired interleave count. 1272 /// If interleave count has been specified by metadata it will be returned. 1273 /// Otherwise, the interleave count is computed and returned. VF and LoopCost 1274 /// are the selected vectorization factor and the cost of the selected VF. 1275 unsigned selectInterleaveCount(ElementCount VF, unsigned LoopCost); 1276 1277 /// Memory access instruction may be vectorized in more than one way. 1278 /// Form of instruction after vectorization depends on cost. 1279 /// This function takes cost-based decisions for Load/Store instructions 1280 /// and collects them in a map. This decisions map is used for building 1281 /// the lists of loop-uniform and loop-scalar instructions. 1282 /// The calculated cost is saved with widening decision in order to 1283 /// avoid redundant calculations. 1284 void setCostBasedWideningDecision(ElementCount VF); 1285 1286 /// A struct that represents some properties of the register usage 1287 /// of a loop. 1288 struct RegisterUsage { 1289 /// Holds the number of loop invariant values that are used in the loop. 1290 /// The key is ClassID of target-provided register class. 1291 SmallMapVector<unsigned, unsigned, 4> LoopInvariantRegs; 1292 /// Holds the maximum number of concurrent live intervals in the loop. 1293 /// The key is ClassID of target-provided register class. 1294 SmallMapVector<unsigned, unsigned, 4> MaxLocalUsers; 1295 }; 1296 1297 /// \return Returns information about the register usages of the loop for the 1298 /// given vectorization factors. 1299 SmallVector<RegisterUsage, 8> 1300 calculateRegisterUsage(ArrayRef<ElementCount> VFs); 1301 1302 /// Collect values we want to ignore in the cost model. 1303 void collectValuesToIgnore(); 1304 1305 /// Split reductions into those that happen in the loop, and those that happen 1306 /// outside. In loop reductions are collected into InLoopReductionChains. 1307 void collectInLoopReductions(); 1308 1309 /// Returns true if we should use strict in-order reductions for the given 1310 /// RdxDesc. This is true if the -enable-strict-reductions flag is passed, 1311 /// the IsOrdered flag of RdxDesc is set and we do not allow reordering 1312 /// of FP operations. 1313 bool useOrderedReductions(const RecurrenceDescriptor &RdxDesc) { 1314 return EnableStrictReductions && !Hints->allowReordering() && 1315 RdxDesc.isOrdered(); 1316 } 1317 1318 /// \returns The smallest bitwidth each instruction can be represented with. 1319 /// The vector equivalents of these instructions should be truncated to this 1320 /// type. 1321 const MapVector<Instruction *, uint64_t> &getMinimalBitwidths() const { 1322 return MinBWs; 1323 } 1324 1325 /// \returns True if it is more profitable to scalarize instruction \p I for 1326 /// vectorization factor \p VF. 1327 bool isProfitableToScalarize(Instruction *I, ElementCount VF) const { 1328 assert(VF.isVector() && 1329 "Profitable to scalarize relevant only for VF > 1."); 1330 1331 // Cost model is not run in the VPlan-native path - return conservative 1332 // result until this changes. 1333 if (EnableVPlanNativePath) 1334 return false; 1335 1336 auto Scalars = InstsToScalarize.find(VF); 1337 assert(Scalars != InstsToScalarize.end() && 1338 "VF not yet analyzed for scalarization profitability"); 1339 return Scalars->second.find(I) != Scalars->second.end(); 1340 } 1341 1342 /// Returns true if \p I is known to be uniform after vectorization. 1343 bool isUniformAfterVectorization(Instruction *I, ElementCount VF) const { 1344 if (VF.isScalar()) 1345 return true; 1346 1347 // Cost model is not run in the VPlan-native path - return conservative 1348 // result until this changes. 1349 if (EnableVPlanNativePath) 1350 return false; 1351 1352 auto UniformsPerVF = Uniforms.find(VF); 1353 assert(UniformsPerVF != Uniforms.end() && 1354 "VF not yet analyzed for uniformity"); 1355 return UniformsPerVF->second.count(I); 1356 } 1357 1358 /// Returns true if \p I is known to be scalar after vectorization. 1359 bool isScalarAfterVectorization(Instruction *I, ElementCount VF) const { 1360 if (VF.isScalar()) 1361 return true; 1362 1363 // Cost model is not run in the VPlan-native path - return conservative 1364 // result until this changes. 1365 if (EnableVPlanNativePath) 1366 return false; 1367 1368 auto ScalarsPerVF = Scalars.find(VF); 1369 assert(ScalarsPerVF != Scalars.end() && 1370 "Scalar values are not calculated for VF"); 1371 return ScalarsPerVF->second.count(I); 1372 } 1373 1374 /// \returns True if instruction \p I can be truncated to a smaller bitwidth 1375 /// for vectorization factor \p VF. 1376 bool canTruncateToMinimalBitwidth(Instruction *I, ElementCount VF) const { 1377 return VF.isVector() && MinBWs.find(I) != MinBWs.end() && 1378 !isProfitableToScalarize(I, VF) && 1379 !isScalarAfterVectorization(I, VF); 1380 } 1381 1382 /// Decision that was taken during cost calculation for memory instruction. 1383 enum InstWidening { 1384 CM_Unknown, 1385 CM_Widen, // For consecutive accesses with stride +1. 1386 CM_Widen_Reverse, // For consecutive accesses with stride -1. 1387 CM_Interleave, 1388 CM_GatherScatter, 1389 CM_Scalarize 1390 }; 1391 1392 /// Save vectorization decision \p W and \p Cost taken by the cost model for 1393 /// instruction \p I and vector width \p VF. 1394 void setWideningDecision(Instruction *I, ElementCount VF, InstWidening W, 1395 InstructionCost Cost) { 1396 assert(VF.isVector() && "Expected VF >=2"); 1397 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost); 1398 } 1399 1400 /// Save vectorization decision \p W and \p Cost taken by the cost model for 1401 /// interleaving group \p Grp and vector width \p VF. 1402 void setWideningDecision(const InterleaveGroup<Instruction> *Grp, 1403 ElementCount VF, InstWidening W, 1404 InstructionCost Cost) { 1405 assert(VF.isVector() && "Expected VF >=2"); 1406 /// Broadcast this decicion to all instructions inside the group. 1407 /// But the cost will be assigned to one instruction only. 1408 for (unsigned i = 0; i < Grp->getFactor(); ++i) { 1409 if (auto *I = Grp->getMember(i)) { 1410 if (Grp->getInsertPos() == I) 1411 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost); 1412 else 1413 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, 0); 1414 } 1415 } 1416 } 1417 1418 /// Return the cost model decision for the given instruction \p I and vector 1419 /// width \p VF. Return CM_Unknown if this instruction did not pass 1420 /// through the cost modeling. 1421 InstWidening getWideningDecision(Instruction *I, ElementCount VF) const { 1422 assert(VF.isVector() && "Expected VF to be a vector VF"); 1423 // Cost model is not run in the VPlan-native path - return conservative 1424 // result until this changes. 1425 if (EnableVPlanNativePath) 1426 return CM_GatherScatter; 1427 1428 std::pair<Instruction *, ElementCount> InstOnVF = std::make_pair(I, VF); 1429 auto Itr = WideningDecisions.find(InstOnVF); 1430 if (Itr == WideningDecisions.end()) 1431 return CM_Unknown; 1432 return Itr->second.first; 1433 } 1434 1435 /// Return the vectorization cost for the given instruction \p I and vector 1436 /// width \p VF. 1437 InstructionCost getWideningCost(Instruction *I, ElementCount VF) { 1438 assert(VF.isVector() && "Expected VF >=2"); 1439 std::pair<Instruction *, ElementCount> InstOnVF = std::make_pair(I, VF); 1440 assert(WideningDecisions.find(InstOnVF) != WideningDecisions.end() && 1441 "The cost is not calculated"); 1442 return WideningDecisions[InstOnVF].second; 1443 } 1444 1445 /// Return True if instruction \p I is an optimizable truncate whose operand 1446 /// is an induction variable. Such a truncate will be removed by adding a new 1447 /// induction variable with the destination type. 1448 bool isOptimizableIVTruncate(Instruction *I, ElementCount VF) { 1449 // If the instruction is not a truncate, return false. 1450 auto *Trunc = dyn_cast<TruncInst>(I); 1451 if (!Trunc) 1452 return false; 1453 1454 // Get the source and destination types of the truncate. 1455 Type *SrcTy = ToVectorTy(cast<CastInst>(I)->getSrcTy(), VF); 1456 Type *DestTy = ToVectorTy(cast<CastInst>(I)->getDestTy(), VF); 1457 1458 // If the truncate is free for the given types, return false. Replacing a 1459 // free truncate with an induction variable would add an induction variable 1460 // update instruction to each iteration of the loop. We exclude from this 1461 // check the primary induction variable since it will need an update 1462 // instruction regardless. 1463 Value *Op = Trunc->getOperand(0); 1464 if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy)) 1465 return false; 1466 1467 // If the truncated value is not an induction variable, return false. 1468 return Legal->isInductionPhi(Op); 1469 } 1470 1471 /// Collects the instructions to scalarize for each predicated instruction in 1472 /// the loop. 1473 void collectInstsToScalarize(ElementCount VF); 1474 1475 /// Collect Uniform and Scalar values for the given \p VF. 1476 /// The sets depend on CM decision for Load/Store instructions 1477 /// that may be vectorized as interleave, gather-scatter or scalarized. 1478 void collectUniformsAndScalars(ElementCount VF) { 1479 // Do the analysis once. 1480 if (VF.isScalar() || Uniforms.find(VF) != Uniforms.end()) 1481 return; 1482 setCostBasedWideningDecision(VF); 1483 collectLoopUniforms(VF); 1484 collectLoopScalars(VF); 1485 } 1486 1487 /// Returns true if the target machine supports masked store operation 1488 /// for the given \p DataType and kind of access to \p Ptr. 1489 bool isLegalMaskedStore(Type *DataType, Value *Ptr, Align Alignment) const { 1490 return Legal->isConsecutivePtr(Ptr) && 1491 TTI.isLegalMaskedStore(DataType, Alignment); 1492 } 1493 1494 /// Returns true if the target machine supports masked load operation 1495 /// for the given \p DataType and kind of access to \p Ptr. 1496 bool isLegalMaskedLoad(Type *DataType, Value *Ptr, Align Alignment) const { 1497 return Legal->isConsecutivePtr(Ptr) && 1498 TTI.isLegalMaskedLoad(DataType, Alignment); 1499 } 1500 1501 /// Returns true if the target machine can represent \p V as a masked gather 1502 /// or scatter operation. 1503 bool isLegalGatherOrScatter(Value *V) { 1504 bool LI = isa<LoadInst>(V); 1505 bool SI = isa<StoreInst>(V); 1506 if (!LI && !SI) 1507 return false; 1508 auto *Ty = getLoadStoreType(V); 1509 Align Align = getLoadStoreAlignment(V); 1510 return (LI && TTI.isLegalMaskedGather(Ty, Align)) || 1511 (SI && TTI.isLegalMaskedScatter(Ty, Align)); 1512 } 1513 1514 /// Returns true if the target machine supports all of the reduction 1515 /// variables found for the given VF. 1516 bool canVectorizeReductions(ElementCount VF) { 1517 return (all_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool { 1518 const RecurrenceDescriptor &RdxDesc = Reduction.second; 1519 return TTI.isLegalToVectorizeReduction(RdxDesc, VF); 1520 })); 1521 } 1522 1523 /// Returns true if \p I is an instruction that will be scalarized with 1524 /// predication. Such instructions include conditional stores and 1525 /// instructions that may divide by zero. 1526 /// If a non-zero VF has been calculated, we check if I will be scalarized 1527 /// predication for that VF. 1528 bool isScalarWithPredication(Instruction *I) const; 1529 1530 // Returns true if \p I is an instruction that will be predicated either 1531 // through scalar predication or masked load/store or masked gather/scatter. 1532 // Superset of instructions that return true for isScalarWithPredication. 1533 bool isPredicatedInst(Instruction *I) { 1534 if (!blockNeedsPredication(I->getParent())) 1535 return false; 1536 // Loads and stores that need some form of masked operation are predicated 1537 // instructions. 1538 if (isa<LoadInst>(I) || isa<StoreInst>(I)) 1539 return Legal->isMaskRequired(I); 1540 return isScalarWithPredication(I); 1541 } 1542 1543 /// Returns true if \p I is a memory instruction with consecutive memory 1544 /// access that can be widened. 1545 bool 1546 memoryInstructionCanBeWidened(Instruction *I, 1547 ElementCount VF = ElementCount::getFixed(1)); 1548 1549 /// Returns true if \p I is a memory instruction in an interleaved-group 1550 /// of memory accesses that can be vectorized with wide vector loads/stores 1551 /// and shuffles. 1552 bool 1553 interleavedAccessCanBeWidened(Instruction *I, 1554 ElementCount VF = ElementCount::getFixed(1)); 1555 1556 /// Check if \p Instr belongs to any interleaved access group. 1557 bool isAccessInterleaved(Instruction *Instr) { 1558 return InterleaveInfo.isInterleaved(Instr); 1559 } 1560 1561 /// Get the interleaved access group that \p Instr belongs to. 1562 const InterleaveGroup<Instruction> * 1563 getInterleavedAccessGroup(Instruction *Instr) { 1564 return InterleaveInfo.getInterleaveGroup(Instr); 1565 } 1566 1567 /// Returns true if we're required to use a scalar epilogue for at least 1568 /// the final iteration of the original loop. 1569 bool requiresScalarEpilogue() const { 1570 if (!isScalarEpilogueAllowed()) 1571 return false; 1572 // If we might exit from anywhere but the latch, must run the exiting 1573 // iteration in scalar form. 1574 if (TheLoop->getExitingBlock() != TheLoop->getLoopLatch()) 1575 return true; 1576 return InterleaveInfo.requiresScalarEpilogue(); 1577 } 1578 1579 /// Returns true if a scalar epilogue is not allowed due to optsize or a 1580 /// loop hint annotation. 1581 bool isScalarEpilogueAllowed() const { 1582 return ScalarEpilogueStatus == CM_ScalarEpilogueAllowed; 1583 } 1584 1585 /// Returns true if all loop blocks should be masked to fold tail loop. 1586 bool foldTailByMasking() const { return FoldTailByMasking; } 1587 1588 bool blockNeedsPredication(BasicBlock *BB) const { 1589 return foldTailByMasking() || Legal->blockNeedsPredication(BB); 1590 } 1591 1592 /// A SmallMapVector to store the InLoop reduction op chains, mapping phi 1593 /// nodes to the chain of instructions representing the reductions. Uses a 1594 /// MapVector to ensure deterministic iteration order. 1595 using ReductionChainMap = 1596 SmallMapVector<PHINode *, SmallVector<Instruction *, 4>, 4>; 1597 1598 /// Return the chain of instructions representing an inloop reduction. 1599 const ReductionChainMap &getInLoopReductionChains() const { 1600 return InLoopReductionChains; 1601 } 1602 1603 /// Returns true if the Phi is part of an inloop reduction. 1604 bool isInLoopReduction(PHINode *Phi) const { 1605 return InLoopReductionChains.count(Phi); 1606 } 1607 1608 /// Estimate cost of an intrinsic call instruction CI if it were vectorized 1609 /// with factor VF. Return the cost of the instruction, including 1610 /// scalarization overhead if it's needed. 1611 InstructionCost getVectorIntrinsicCost(CallInst *CI, ElementCount VF) const; 1612 1613 /// Estimate cost of a call instruction CI if it were vectorized with factor 1614 /// VF. Return the cost of the instruction, including scalarization overhead 1615 /// if it's needed. The flag NeedToScalarize shows if the call needs to be 1616 /// scalarized - 1617 /// i.e. either vector version isn't available, or is too expensive. 1618 InstructionCost getVectorCallCost(CallInst *CI, ElementCount VF, 1619 bool &NeedToScalarize) const; 1620 1621 /// Returns true if the per-lane cost of VectorizationFactor A is lower than 1622 /// that of B. 1623 bool isMoreProfitable(const VectorizationFactor &A, 1624 const VectorizationFactor &B) const; 1625 1626 /// Invalidates decisions already taken by the cost model. 1627 void invalidateCostModelingDecisions() { 1628 WideningDecisions.clear(); 1629 Uniforms.clear(); 1630 Scalars.clear(); 1631 } 1632 1633 private: 1634 unsigned NumPredStores = 0; 1635 1636 /// \return An upper bound for the vectorization factors for both 1637 /// fixed and scalable vectorization, where the minimum-known number of 1638 /// elements is a power-of-2 larger than zero. If scalable vectorization is 1639 /// disabled or unsupported, then the scalable part will be equal to 1640 /// ElementCount::getScalable(0). 1641 FixedScalableVFPair computeFeasibleMaxVF(unsigned ConstTripCount, 1642 ElementCount UserVF); 1643 1644 /// \return the maximized element count based on the targets vector 1645 /// registers and the loop trip-count, but limited to a maximum safe VF. 1646 /// This is a helper function of computeFeasibleMaxVF. 1647 /// FIXME: MaxSafeVF is currently passed by reference to avoid some obscure 1648 /// issue that occurred on one of the buildbots which cannot be reproduced 1649 /// without having access to the properietary compiler (see comments on 1650 /// D98509). The issue is currently under investigation and this workaround 1651 /// will be removed as soon as possible. 1652 ElementCount getMaximizedVFForTarget(unsigned ConstTripCount, 1653 unsigned SmallestType, 1654 unsigned WidestType, 1655 const ElementCount &MaxSafeVF); 1656 1657 /// \return the maximum legal scalable VF, based on the safe max number 1658 /// of elements. 1659 ElementCount getMaxLegalScalableVF(unsigned MaxSafeElements); 1660 1661 /// The vectorization cost is a combination of the cost itself and a boolean 1662 /// indicating whether any of the contributing operations will actually 1663 /// operate on vector values after type legalization in the backend. If this 1664 /// latter value is false, then all operations will be scalarized (i.e. no 1665 /// vectorization has actually taken place). 1666 using VectorizationCostTy = std::pair<InstructionCost, bool>; 1667 1668 /// Returns the expected execution cost. The unit of the cost does 1669 /// not matter because we use the 'cost' units to compare different 1670 /// vector widths. The cost that is returned is *not* normalized by 1671 /// the factor width. 1672 VectorizationCostTy expectedCost(ElementCount VF); 1673 1674 /// Returns the execution time cost of an instruction for a given vector 1675 /// width. Vector width of one means scalar. 1676 VectorizationCostTy getInstructionCost(Instruction *I, ElementCount VF); 1677 1678 /// The cost-computation logic from getInstructionCost which provides 1679 /// the vector type as an output parameter. 1680 InstructionCost getInstructionCost(Instruction *I, ElementCount VF, 1681 Type *&VectorTy); 1682 1683 /// Return the cost of instructions in an inloop reduction pattern, if I is 1684 /// part of that pattern. 1685 InstructionCost getReductionPatternCost(Instruction *I, ElementCount VF, 1686 Type *VectorTy, 1687 TTI::TargetCostKind CostKind); 1688 1689 /// Calculate vectorization cost of memory instruction \p I. 1690 InstructionCost getMemoryInstructionCost(Instruction *I, ElementCount VF); 1691 1692 /// The cost computation for scalarized memory instruction. 1693 InstructionCost getMemInstScalarizationCost(Instruction *I, ElementCount VF); 1694 1695 /// The cost computation for interleaving group of memory instructions. 1696 InstructionCost getInterleaveGroupCost(Instruction *I, ElementCount VF); 1697 1698 /// The cost computation for Gather/Scatter instruction. 1699 InstructionCost getGatherScatterCost(Instruction *I, ElementCount VF); 1700 1701 /// The cost computation for widening instruction \p I with consecutive 1702 /// memory access. 1703 InstructionCost getConsecutiveMemOpCost(Instruction *I, ElementCount VF); 1704 1705 /// The cost calculation for Load/Store instruction \p I with uniform pointer - 1706 /// Load: scalar load + broadcast. 1707 /// Store: scalar store + (loop invariant value stored? 0 : extract of last 1708 /// element) 1709 InstructionCost getUniformMemOpCost(Instruction *I, ElementCount VF); 1710 1711 /// Estimate the overhead of scalarizing an instruction. This is a 1712 /// convenience wrapper for the type-based getScalarizationOverhead API. 1713 InstructionCost getScalarizationOverhead(Instruction *I, 1714 ElementCount VF) const; 1715 1716 /// Returns whether the instruction is a load or store and will be a emitted 1717 /// as a vector operation. 1718 bool isConsecutiveLoadOrStore(Instruction *I); 1719 1720 /// Returns true if an artificially high cost for emulated masked memrefs 1721 /// should be used. 1722 bool useEmulatedMaskMemRefHack(Instruction *I); 1723 1724 /// Map of scalar integer values to the smallest bitwidth they can be legally 1725 /// represented as. The vector equivalents of these values should be truncated 1726 /// to this type. 1727 MapVector<Instruction *, uint64_t> MinBWs; 1728 1729 /// A type representing the costs for instructions if they were to be 1730 /// scalarized rather than vectorized. The entries are Instruction-Cost 1731 /// pairs. 1732 using ScalarCostsTy = DenseMap<Instruction *, InstructionCost>; 1733 1734 /// A set containing all BasicBlocks that are known to present after 1735 /// vectorization as a predicated block. 1736 SmallPtrSet<BasicBlock *, 4> PredicatedBBsAfterVectorization; 1737 1738 /// Records whether it is allowed to have the original scalar loop execute at 1739 /// least once. This may be needed as a fallback loop in case runtime 1740 /// aliasing/dependence checks fail, or to handle the tail/remainder 1741 /// iterations when the trip count is unknown or doesn't divide by the VF, 1742 /// or as a peel-loop to handle gaps in interleave-groups. 1743 /// Under optsize and when the trip count is very small we don't allow any 1744 /// iterations to execute in the scalar loop. 1745 ScalarEpilogueLowering ScalarEpilogueStatus = CM_ScalarEpilogueAllowed; 1746 1747 /// All blocks of loop are to be masked to fold tail of scalar iterations. 1748 bool FoldTailByMasking = false; 1749 1750 /// A map holding scalar costs for different vectorization factors. The 1751 /// presence of a cost for an instruction in the mapping indicates that the 1752 /// instruction will be scalarized when vectorizing with the associated 1753 /// vectorization factor. The entries are VF-ScalarCostTy pairs. 1754 DenseMap<ElementCount, ScalarCostsTy> InstsToScalarize; 1755 1756 /// Holds the instructions known to be uniform after vectorization. 1757 /// The data is collected per VF. 1758 DenseMap<ElementCount, SmallPtrSet<Instruction *, 4>> Uniforms; 1759 1760 /// Holds the instructions known to be scalar after vectorization. 1761 /// The data is collected per VF. 1762 DenseMap<ElementCount, SmallPtrSet<Instruction *, 4>> Scalars; 1763 1764 /// Holds the instructions (address computations) that are forced to be 1765 /// scalarized. 1766 DenseMap<ElementCount, SmallPtrSet<Instruction *, 4>> ForcedScalars; 1767 1768 /// PHINodes of the reductions that should be expanded in-loop along with 1769 /// their associated chains of reduction operations, in program order from top 1770 /// (PHI) to bottom 1771 ReductionChainMap InLoopReductionChains; 1772 1773 /// A Map of inloop reduction operations and their immediate chain operand. 1774 /// FIXME: This can be removed once reductions can be costed correctly in 1775 /// vplan. This was added to allow quick lookup to the inloop operations, 1776 /// without having to loop through InLoopReductionChains. 1777 DenseMap<Instruction *, Instruction *> InLoopReductionImmediateChains; 1778 1779 /// Returns the expected difference in cost from scalarizing the expression 1780 /// feeding a predicated instruction \p PredInst. The instructions to 1781 /// scalarize and their scalar costs are collected in \p ScalarCosts. A 1782 /// non-negative return value implies the expression will be scalarized. 1783 /// Currently, only single-use chains are considered for scalarization. 1784 int computePredInstDiscount(Instruction *PredInst, ScalarCostsTy &ScalarCosts, 1785 ElementCount VF); 1786 1787 /// Collect the instructions that are uniform after vectorization. An 1788 /// instruction is uniform if we represent it with a single scalar value in 1789 /// the vectorized loop corresponding to each vector iteration. Examples of 1790 /// uniform instructions include pointer operands of consecutive or 1791 /// interleaved memory accesses. Note that although uniformity implies an 1792 /// instruction will be scalar, the reverse is not true. In general, a 1793 /// scalarized instruction will be represented by VF scalar values in the 1794 /// vectorized loop, each corresponding to an iteration of the original 1795 /// scalar loop. 1796 void collectLoopUniforms(ElementCount VF); 1797 1798 /// Collect the instructions that are scalar after vectorization. An 1799 /// instruction is scalar if it is known to be uniform or will be scalarized 1800 /// during vectorization. Non-uniform scalarized instructions will be 1801 /// represented by VF values in the vectorized loop, each corresponding to an 1802 /// iteration of the original scalar loop. 1803 void collectLoopScalars(ElementCount VF); 1804 1805 /// Keeps cost model vectorization decision and cost for instructions. 1806 /// Right now it is used for memory instructions only. 1807 using DecisionList = DenseMap<std::pair<Instruction *, ElementCount>, 1808 std::pair<InstWidening, InstructionCost>>; 1809 1810 DecisionList WideningDecisions; 1811 1812 /// Returns true if \p V is expected to be vectorized and it needs to be 1813 /// extracted. 1814 bool needsExtract(Value *V, ElementCount VF) const { 1815 Instruction *I = dyn_cast<Instruction>(V); 1816 if (VF.isScalar() || !I || !TheLoop->contains(I) || 1817 TheLoop->isLoopInvariant(I)) 1818 return false; 1819 1820 // Assume we can vectorize V (and hence we need extraction) if the 1821 // scalars are not computed yet. This can happen, because it is called 1822 // via getScalarizationOverhead from setCostBasedWideningDecision, before 1823 // the scalars are collected. That should be a safe assumption in most 1824 // cases, because we check if the operands have vectorizable types 1825 // beforehand in LoopVectorizationLegality. 1826 return Scalars.find(VF) == Scalars.end() || 1827 !isScalarAfterVectorization(I, VF); 1828 }; 1829 1830 /// Returns a range containing only operands needing to be extracted. 1831 SmallVector<Value *, 4> filterExtractingOperands(Instruction::op_range Ops, 1832 ElementCount VF) const { 1833 return SmallVector<Value *, 4>(make_filter_range( 1834 Ops, [this, VF](Value *V) { return this->needsExtract(V, VF); })); 1835 } 1836 1837 /// Determines if we have the infrastructure to vectorize loop \p L and its 1838 /// epilogue, assuming the main loop is vectorized by \p VF. 1839 bool isCandidateForEpilogueVectorization(const Loop &L, 1840 const ElementCount VF) const; 1841 1842 /// Returns true if epilogue vectorization is considered profitable, and 1843 /// false otherwise. 1844 /// \p VF is the vectorization factor chosen for the original loop. 1845 bool isEpilogueVectorizationProfitable(const ElementCount VF) const; 1846 1847 public: 1848 /// The loop that we evaluate. 1849 Loop *TheLoop; 1850 1851 /// Predicated scalar evolution analysis. 1852 PredicatedScalarEvolution &PSE; 1853 1854 /// Loop Info analysis. 1855 LoopInfo *LI; 1856 1857 /// Vectorization legality. 1858 LoopVectorizationLegality *Legal; 1859 1860 /// Vector target information. 1861 const TargetTransformInfo &TTI; 1862 1863 /// Target Library Info. 1864 const TargetLibraryInfo *TLI; 1865 1866 /// Demanded bits analysis. 1867 DemandedBits *DB; 1868 1869 /// Assumption cache. 1870 AssumptionCache *AC; 1871 1872 /// Interface to emit optimization remarks. 1873 OptimizationRemarkEmitter *ORE; 1874 1875 const Function *TheFunction; 1876 1877 /// Loop Vectorize Hint. 1878 const LoopVectorizeHints *Hints; 1879 1880 /// The interleave access information contains groups of interleaved accesses 1881 /// with the same stride and close to each other. 1882 InterleavedAccessInfo &InterleaveInfo; 1883 1884 /// Values to ignore in the cost model. 1885 SmallPtrSet<const Value *, 16> ValuesToIgnore; 1886 1887 /// Values to ignore in the cost model when VF > 1. 1888 SmallPtrSet<const Value *, 16> VecValuesToIgnore; 1889 1890 /// Profitable vector factors. 1891 SmallVector<VectorizationFactor, 8> ProfitableVFs; 1892 }; 1893 } // end namespace llvm 1894 1895 /// Helper struct to manage generating runtime checks for vectorization. 1896 /// 1897 /// The runtime checks are created up-front in temporary blocks to allow better 1898 /// estimating the cost and un-linked from the existing IR. After deciding to 1899 /// vectorize, the checks are moved back. If deciding not to vectorize, the 1900 /// temporary blocks are completely removed. 1901 class GeneratedRTChecks { 1902 /// Basic block which contains the generated SCEV checks, if any. 1903 BasicBlock *SCEVCheckBlock = nullptr; 1904 1905 /// The value representing the result of the generated SCEV checks. If it is 1906 /// nullptr, either no SCEV checks have been generated or they have been used. 1907 Value *SCEVCheckCond = nullptr; 1908 1909 /// Basic block which contains the generated memory runtime checks, if any. 1910 BasicBlock *MemCheckBlock = nullptr; 1911 1912 /// The value representing the result of the generated memory runtime checks. 1913 /// If it is nullptr, either no memory runtime checks have been generated or 1914 /// they have been used. 1915 Instruction *MemRuntimeCheckCond = nullptr; 1916 1917 DominatorTree *DT; 1918 LoopInfo *LI; 1919 1920 SCEVExpander SCEVExp; 1921 SCEVExpander MemCheckExp; 1922 1923 public: 1924 GeneratedRTChecks(ScalarEvolution &SE, DominatorTree *DT, LoopInfo *LI, 1925 const DataLayout &DL) 1926 : DT(DT), LI(LI), SCEVExp(SE, DL, "scev.check"), 1927 MemCheckExp(SE, DL, "scev.check") {} 1928 1929 /// Generate runtime checks in SCEVCheckBlock and MemCheckBlock, so we can 1930 /// accurately estimate the cost of the runtime checks. The blocks are 1931 /// un-linked from the IR and is added back during vector code generation. If 1932 /// there is no vector code generation, the check blocks are removed 1933 /// completely. 1934 void Create(Loop *L, const LoopAccessInfo &LAI, 1935 const SCEVUnionPredicate &UnionPred) { 1936 1937 BasicBlock *LoopHeader = L->getHeader(); 1938 BasicBlock *Preheader = L->getLoopPreheader(); 1939 1940 // Use SplitBlock to create blocks for SCEV & memory runtime checks to 1941 // ensure the blocks are properly added to LoopInfo & DominatorTree. Those 1942 // may be used by SCEVExpander. The blocks will be un-linked from their 1943 // predecessors and removed from LI & DT at the end of the function. 1944 if (!UnionPred.isAlwaysTrue()) { 1945 SCEVCheckBlock = SplitBlock(Preheader, Preheader->getTerminator(), DT, LI, 1946 nullptr, "vector.scevcheck"); 1947 1948 SCEVCheckCond = SCEVExp.expandCodeForPredicate( 1949 &UnionPred, SCEVCheckBlock->getTerminator()); 1950 } 1951 1952 const auto &RtPtrChecking = *LAI.getRuntimePointerChecking(); 1953 if (RtPtrChecking.Need) { 1954 auto *Pred = SCEVCheckBlock ? SCEVCheckBlock : Preheader; 1955 MemCheckBlock = SplitBlock(Pred, Pred->getTerminator(), DT, LI, nullptr, 1956 "vector.memcheck"); 1957 1958 std::tie(std::ignore, MemRuntimeCheckCond) = 1959 addRuntimeChecks(MemCheckBlock->getTerminator(), L, 1960 RtPtrChecking.getChecks(), MemCheckExp); 1961 assert(MemRuntimeCheckCond && 1962 "no RT checks generated although RtPtrChecking " 1963 "claimed checks are required"); 1964 } 1965 1966 if (!MemCheckBlock && !SCEVCheckBlock) 1967 return; 1968 1969 // Unhook the temporary block with the checks, update various places 1970 // accordingly. 1971 if (SCEVCheckBlock) 1972 SCEVCheckBlock->replaceAllUsesWith(Preheader); 1973 if (MemCheckBlock) 1974 MemCheckBlock->replaceAllUsesWith(Preheader); 1975 1976 if (SCEVCheckBlock) { 1977 SCEVCheckBlock->getTerminator()->moveBefore(Preheader->getTerminator()); 1978 new UnreachableInst(Preheader->getContext(), SCEVCheckBlock); 1979 Preheader->getTerminator()->eraseFromParent(); 1980 } 1981 if (MemCheckBlock) { 1982 MemCheckBlock->getTerminator()->moveBefore(Preheader->getTerminator()); 1983 new UnreachableInst(Preheader->getContext(), MemCheckBlock); 1984 Preheader->getTerminator()->eraseFromParent(); 1985 } 1986 1987 DT->changeImmediateDominator(LoopHeader, Preheader); 1988 if (MemCheckBlock) { 1989 DT->eraseNode(MemCheckBlock); 1990 LI->removeBlock(MemCheckBlock); 1991 } 1992 if (SCEVCheckBlock) { 1993 DT->eraseNode(SCEVCheckBlock); 1994 LI->removeBlock(SCEVCheckBlock); 1995 } 1996 } 1997 1998 /// Remove the created SCEV & memory runtime check blocks & instructions, if 1999 /// unused. 2000 ~GeneratedRTChecks() { 2001 SCEVExpanderCleaner SCEVCleaner(SCEVExp, *DT); 2002 SCEVExpanderCleaner MemCheckCleaner(MemCheckExp, *DT); 2003 if (!SCEVCheckCond) 2004 SCEVCleaner.markResultUsed(); 2005 2006 if (!MemRuntimeCheckCond) 2007 MemCheckCleaner.markResultUsed(); 2008 2009 if (MemRuntimeCheckCond) { 2010 auto &SE = *MemCheckExp.getSE(); 2011 // Memory runtime check generation creates compares that use expanded 2012 // values. Remove them before running the SCEVExpanderCleaners. 2013 for (auto &I : make_early_inc_range(reverse(*MemCheckBlock))) { 2014 if (MemCheckExp.isInsertedInstruction(&I)) 2015 continue; 2016 SE.forgetValue(&I); 2017 SE.eraseValueFromMap(&I); 2018 I.eraseFromParent(); 2019 } 2020 } 2021 MemCheckCleaner.cleanup(); 2022 SCEVCleaner.cleanup(); 2023 2024 if (SCEVCheckCond) 2025 SCEVCheckBlock->eraseFromParent(); 2026 if (MemRuntimeCheckCond) 2027 MemCheckBlock->eraseFromParent(); 2028 } 2029 2030 /// Adds the generated SCEVCheckBlock before \p LoopVectorPreHeader and 2031 /// adjusts the branches to branch to the vector preheader or \p Bypass, 2032 /// depending on the generated condition. 2033 BasicBlock *emitSCEVChecks(Loop *L, BasicBlock *Bypass, 2034 BasicBlock *LoopVectorPreHeader, 2035 BasicBlock *LoopExitBlock) { 2036 if (!SCEVCheckCond) 2037 return nullptr; 2038 if (auto *C = dyn_cast<ConstantInt>(SCEVCheckCond)) 2039 if (C->isZero()) 2040 return nullptr; 2041 2042 auto *Pred = LoopVectorPreHeader->getSinglePredecessor(); 2043 2044 BranchInst::Create(LoopVectorPreHeader, SCEVCheckBlock); 2045 // Create new preheader for vector loop. 2046 if (auto *PL = LI->getLoopFor(LoopVectorPreHeader)) 2047 PL->addBasicBlockToLoop(SCEVCheckBlock, *LI); 2048 2049 SCEVCheckBlock->getTerminator()->eraseFromParent(); 2050 SCEVCheckBlock->moveBefore(LoopVectorPreHeader); 2051 Pred->getTerminator()->replaceSuccessorWith(LoopVectorPreHeader, 2052 SCEVCheckBlock); 2053 2054 DT->addNewBlock(SCEVCheckBlock, Pred); 2055 DT->changeImmediateDominator(LoopVectorPreHeader, SCEVCheckBlock); 2056 2057 ReplaceInstWithInst( 2058 SCEVCheckBlock->getTerminator(), 2059 BranchInst::Create(Bypass, LoopVectorPreHeader, SCEVCheckCond)); 2060 // Mark the check as used, to prevent it from being removed during cleanup. 2061 SCEVCheckCond = nullptr; 2062 return SCEVCheckBlock; 2063 } 2064 2065 /// Adds the generated MemCheckBlock before \p LoopVectorPreHeader and adjusts 2066 /// the branches to branch to the vector preheader or \p Bypass, depending on 2067 /// the generated condition. 2068 BasicBlock *emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass, 2069 BasicBlock *LoopVectorPreHeader) { 2070 // Check if we generated code that checks in runtime if arrays overlap. 2071 if (!MemRuntimeCheckCond) 2072 return nullptr; 2073 2074 auto *Pred = LoopVectorPreHeader->getSinglePredecessor(); 2075 Pred->getTerminator()->replaceSuccessorWith(LoopVectorPreHeader, 2076 MemCheckBlock); 2077 2078 DT->addNewBlock(MemCheckBlock, Pred); 2079 DT->changeImmediateDominator(LoopVectorPreHeader, MemCheckBlock); 2080 MemCheckBlock->moveBefore(LoopVectorPreHeader); 2081 2082 if (auto *PL = LI->getLoopFor(LoopVectorPreHeader)) 2083 PL->addBasicBlockToLoop(MemCheckBlock, *LI); 2084 2085 ReplaceInstWithInst( 2086 MemCheckBlock->getTerminator(), 2087 BranchInst::Create(Bypass, LoopVectorPreHeader, MemRuntimeCheckCond)); 2088 MemCheckBlock->getTerminator()->setDebugLoc( 2089 Pred->getTerminator()->getDebugLoc()); 2090 2091 // Mark the check as used, to prevent it from being removed during cleanup. 2092 MemRuntimeCheckCond = nullptr; 2093 return MemCheckBlock; 2094 } 2095 }; 2096 2097 // Return true if \p OuterLp is an outer loop annotated with hints for explicit 2098 // vectorization. The loop needs to be annotated with #pragma omp simd 2099 // simdlen(#) or #pragma clang vectorize(enable) vectorize_width(#). If the 2100 // vector length information is not provided, vectorization is not considered 2101 // explicit. Interleave hints are not allowed either. These limitations will be 2102 // relaxed in the future. 2103 // Please, note that we are currently forced to abuse the pragma 'clang 2104 // vectorize' semantics. This pragma provides *auto-vectorization hints* 2105 // (i.e., LV must check that vectorization is legal) whereas pragma 'omp simd' 2106 // provides *explicit vectorization hints* (LV can bypass legal checks and 2107 // assume that vectorization is legal). However, both hints are implemented 2108 // using the same metadata (llvm.loop.vectorize, processed by 2109 // LoopVectorizeHints). This will be fixed in the future when the native IR 2110 // representation for pragma 'omp simd' is introduced. 2111 static bool isExplicitVecOuterLoop(Loop *OuterLp, 2112 OptimizationRemarkEmitter *ORE) { 2113 assert(!OuterLp->isInnermost() && "This is not an outer loop"); 2114 LoopVectorizeHints Hints(OuterLp, true /*DisableInterleaving*/, *ORE); 2115 2116 // Only outer loops with an explicit vectorization hint are supported. 2117 // Unannotated outer loops are ignored. 2118 if (Hints.getForce() == LoopVectorizeHints::FK_Undefined) 2119 return false; 2120 2121 Function *Fn = OuterLp->getHeader()->getParent(); 2122 if (!Hints.allowVectorization(Fn, OuterLp, 2123 true /*VectorizeOnlyWhenForced*/)) { 2124 LLVM_DEBUG(dbgs() << "LV: Loop hints prevent outer loop vectorization.\n"); 2125 return false; 2126 } 2127 2128 if (Hints.getInterleave() > 1) { 2129 // TODO: Interleave support is future work. 2130 LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Interleave is not supported for " 2131 "outer loops.\n"); 2132 Hints.emitRemarkWithHints(); 2133 return false; 2134 } 2135 2136 return true; 2137 } 2138 2139 static void collectSupportedLoops(Loop &L, LoopInfo *LI, 2140 OptimizationRemarkEmitter *ORE, 2141 SmallVectorImpl<Loop *> &V) { 2142 // Collect inner loops and outer loops without irreducible control flow. For 2143 // now, only collect outer loops that have explicit vectorization hints. If we 2144 // are stress testing the VPlan H-CFG construction, we collect the outermost 2145 // loop of every loop nest. 2146 if (L.isInnermost() || VPlanBuildStressTest || 2147 (EnableVPlanNativePath && isExplicitVecOuterLoop(&L, ORE))) { 2148 LoopBlocksRPO RPOT(&L); 2149 RPOT.perform(LI); 2150 if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) { 2151 V.push_back(&L); 2152 // TODO: Collect inner loops inside marked outer loops in case 2153 // vectorization fails for the outer loop. Do not invoke 2154 // 'containsIrreducibleCFG' again for inner loops when the outer loop is 2155 // already known to be reducible. We can use an inherited attribute for 2156 // that. 2157 return; 2158 } 2159 } 2160 for (Loop *InnerL : L) 2161 collectSupportedLoops(*InnerL, LI, ORE, V); 2162 } 2163 2164 namespace { 2165 2166 /// The LoopVectorize Pass. 2167 struct LoopVectorize : public FunctionPass { 2168 /// Pass identification, replacement for typeid 2169 static char ID; 2170 2171 LoopVectorizePass Impl; 2172 2173 explicit LoopVectorize(bool InterleaveOnlyWhenForced = false, 2174 bool VectorizeOnlyWhenForced = false) 2175 : FunctionPass(ID), 2176 Impl({InterleaveOnlyWhenForced, VectorizeOnlyWhenForced}) { 2177 initializeLoopVectorizePass(*PassRegistry::getPassRegistry()); 2178 } 2179 2180 bool runOnFunction(Function &F) override { 2181 if (skipFunction(F)) 2182 return false; 2183 2184 auto *SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE(); 2185 auto *LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo(); 2186 auto *TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F); 2187 auto *DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree(); 2188 auto *BFI = &getAnalysis<BlockFrequencyInfoWrapperPass>().getBFI(); 2189 auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>(); 2190 auto *TLI = TLIP ? &TLIP->getTLI(F) : nullptr; 2191 auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); 2192 auto *AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F); 2193 auto *LAA = &getAnalysis<LoopAccessLegacyAnalysis>(); 2194 auto *DB = &getAnalysis<DemandedBitsWrapperPass>().getDemandedBits(); 2195 auto *ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE(); 2196 auto *PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI(); 2197 2198 std::function<const LoopAccessInfo &(Loop &)> GetLAA = 2199 [&](Loop &L) -> const LoopAccessInfo & { return LAA->getInfo(&L); }; 2200 2201 return Impl.runImpl(F, *SE, *LI, *TTI, *DT, *BFI, TLI, *DB, *AA, *AC, 2202 GetLAA, *ORE, PSI).MadeAnyChange; 2203 } 2204 2205 void getAnalysisUsage(AnalysisUsage &AU) const override { 2206 AU.addRequired<AssumptionCacheTracker>(); 2207 AU.addRequired<BlockFrequencyInfoWrapperPass>(); 2208 AU.addRequired<DominatorTreeWrapperPass>(); 2209 AU.addRequired<LoopInfoWrapperPass>(); 2210 AU.addRequired<ScalarEvolutionWrapperPass>(); 2211 AU.addRequired<TargetTransformInfoWrapperPass>(); 2212 AU.addRequired<AAResultsWrapperPass>(); 2213 AU.addRequired<LoopAccessLegacyAnalysis>(); 2214 AU.addRequired<DemandedBitsWrapperPass>(); 2215 AU.addRequired<OptimizationRemarkEmitterWrapperPass>(); 2216 AU.addRequired<InjectTLIMappingsLegacy>(); 2217 2218 // We currently do not preserve loopinfo/dominator analyses with outer loop 2219 // vectorization. Until this is addressed, mark these analyses as preserved 2220 // only for non-VPlan-native path. 2221 // TODO: Preserve Loop and Dominator analyses for VPlan-native path. 2222 if (!EnableVPlanNativePath) { 2223 AU.addPreserved<LoopInfoWrapperPass>(); 2224 AU.addPreserved<DominatorTreeWrapperPass>(); 2225 } 2226 2227 AU.addPreserved<BasicAAWrapperPass>(); 2228 AU.addPreserved<GlobalsAAWrapperPass>(); 2229 AU.addRequired<ProfileSummaryInfoWrapperPass>(); 2230 } 2231 }; 2232 2233 } // end anonymous namespace 2234 2235 //===----------------------------------------------------------------------===// 2236 // Implementation of LoopVectorizationLegality, InnerLoopVectorizer and 2237 // LoopVectorizationCostModel and LoopVectorizationPlanner. 2238 //===----------------------------------------------------------------------===// 2239 2240 Value *InnerLoopVectorizer::getBroadcastInstrs(Value *V) { 2241 // We need to place the broadcast of invariant variables outside the loop, 2242 // but only if it's proven safe to do so. Else, broadcast will be inside 2243 // vector loop body. 2244 Instruction *Instr = dyn_cast<Instruction>(V); 2245 bool SafeToHoist = OrigLoop->isLoopInvariant(V) && 2246 (!Instr || 2247 DT->dominates(Instr->getParent(), LoopVectorPreHeader)); 2248 // Place the code for broadcasting invariant variables in the new preheader. 2249 IRBuilder<>::InsertPointGuard Guard(Builder); 2250 if (SafeToHoist) 2251 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 2252 2253 // Broadcast the scalar into all locations in the vector. 2254 Value *Shuf = Builder.CreateVectorSplat(VF, V, "broadcast"); 2255 2256 return Shuf; 2257 } 2258 2259 void InnerLoopVectorizer::createVectorIntOrFpInductionPHI( 2260 const InductionDescriptor &II, Value *Step, Value *Start, 2261 Instruction *EntryVal, VPValue *Def, VPValue *CastDef, 2262 VPTransformState &State) { 2263 assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) && 2264 "Expected either an induction phi-node or a truncate of it!"); 2265 2266 // Construct the initial value of the vector IV in the vector loop preheader 2267 auto CurrIP = Builder.saveIP(); 2268 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 2269 if (isa<TruncInst>(EntryVal)) { 2270 assert(Start->getType()->isIntegerTy() && 2271 "Truncation requires an integer type"); 2272 auto *TruncType = cast<IntegerType>(EntryVal->getType()); 2273 Step = Builder.CreateTrunc(Step, TruncType); 2274 Start = Builder.CreateCast(Instruction::Trunc, Start, TruncType); 2275 } 2276 Value *SplatStart = Builder.CreateVectorSplat(VF, Start); 2277 Value *SteppedStart = 2278 getStepVector(SplatStart, 0, Step, II.getInductionOpcode()); 2279 2280 // We create vector phi nodes for both integer and floating-point induction 2281 // variables. Here, we determine the kind of arithmetic we will perform. 2282 Instruction::BinaryOps AddOp; 2283 Instruction::BinaryOps MulOp; 2284 if (Step->getType()->isIntegerTy()) { 2285 AddOp = Instruction::Add; 2286 MulOp = Instruction::Mul; 2287 } else { 2288 AddOp = II.getInductionOpcode(); 2289 MulOp = Instruction::FMul; 2290 } 2291 2292 // Multiply the vectorization factor by the step using integer or 2293 // floating-point arithmetic as appropriate. 2294 Type *StepType = Step->getType(); 2295 if (Step->getType()->isFloatingPointTy()) 2296 StepType = IntegerType::get(StepType->getContext(), 2297 StepType->getScalarSizeInBits()); 2298 Value *RuntimeVF = getRuntimeVF(Builder, StepType, VF); 2299 if (Step->getType()->isFloatingPointTy()) 2300 RuntimeVF = Builder.CreateSIToFP(RuntimeVF, Step->getType()); 2301 Value *Mul = Builder.CreateBinOp(MulOp, Step, RuntimeVF); 2302 2303 // Create a vector splat to use in the induction update. 2304 // 2305 // FIXME: If the step is non-constant, we create the vector splat with 2306 // IRBuilder. IRBuilder can constant-fold the multiply, but it doesn't 2307 // handle a constant vector splat. 2308 Value *SplatVF = isa<Constant>(Mul) 2309 ? ConstantVector::getSplat(VF, cast<Constant>(Mul)) 2310 : Builder.CreateVectorSplat(VF, Mul); 2311 Builder.restoreIP(CurrIP); 2312 2313 // We may need to add the step a number of times, depending on the unroll 2314 // factor. The last of those goes into the PHI. 2315 PHINode *VecInd = PHINode::Create(SteppedStart->getType(), 2, "vec.ind", 2316 &*LoopVectorBody->getFirstInsertionPt()); 2317 VecInd->setDebugLoc(EntryVal->getDebugLoc()); 2318 Instruction *LastInduction = VecInd; 2319 for (unsigned Part = 0; Part < UF; ++Part) { 2320 State.set(Def, LastInduction, Part); 2321 2322 if (isa<TruncInst>(EntryVal)) 2323 addMetadata(LastInduction, EntryVal); 2324 recordVectorLoopValueForInductionCast(II, EntryVal, LastInduction, CastDef, 2325 State, Part); 2326 2327 LastInduction = cast<Instruction>( 2328 Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")); 2329 LastInduction->setDebugLoc(EntryVal->getDebugLoc()); 2330 } 2331 2332 // Move the last step to the end of the latch block. This ensures consistent 2333 // placement of all induction updates. 2334 auto *LoopVectorLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch(); 2335 auto *Br = cast<BranchInst>(LoopVectorLatch->getTerminator()); 2336 auto *ICmp = cast<Instruction>(Br->getCondition()); 2337 LastInduction->moveBefore(ICmp); 2338 LastInduction->setName("vec.ind.next"); 2339 2340 VecInd->addIncoming(SteppedStart, LoopVectorPreHeader); 2341 VecInd->addIncoming(LastInduction, LoopVectorLatch); 2342 } 2343 2344 bool InnerLoopVectorizer::shouldScalarizeInstruction(Instruction *I) const { 2345 return Cost->isScalarAfterVectorization(I, VF) || 2346 Cost->isProfitableToScalarize(I, VF); 2347 } 2348 2349 bool InnerLoopVectorizer::needsScalarInduction(Instruction *IV) const { 2350 if (shouldScalarizeInstruction(IV)) 2351 return true; 2352 auto isScalarInst = [&](User *U) -> bool { 2353 auto *I = cast<Instruction>(U); 2354 return (OrigLoop->contains(I) && shouldScalarizeInstruction(I)); 2355 }; 2356 return llvm::any_of(IV->users(), isScalarInst); 2357 } 2358 2359 void InnerLoopVectorizer::recordVectorLoopValueForInductionCast( 2360 const InductionDescriptor &ID, const Instruction *EntryVal, 2361 Value *VectorLoopVal, VPValue *CastDef, VPTransformState &State, 2362 unsigned Part, unsigned Lane) { 2363 assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) && 2364 "Expected either an induction phi-node or a truncate of it!"); 2365 2366 // This induction variable is not the phi from the original loop but the 2367 // newly-created IV based on the proof that casted Phi is equal to the 2368 // uncasted Phi in the vectorized loop (under a runtime guard possibly). It 2369 // re-uses the same InductionDescriptor that original IV uses but we don't 2370 // have to do any recording in this case - that is done when original IV is 2371 // processed. 2372 if (isa<TruncInst>(EntryVal)) 2373 return; 2374 2375 const SmallVectorImpl<Instruction *> &Casts = ID.getCastInsts(); 2376 if (Casts.empty()) 2377 return; 2378 // Only the first Cast instruction in the Casts vector is of interest. 2379 // The rest of the Casts (if exist) have no uses outside the 2380 // induction update chain itself. 2381 if (Lane < UINT_MAX) 2382 State.set(CastDef, VectorLoopVal, VPIteration(Part, Lane)); 2383 else 2384 State.set(CastDef, VectorLoopVal, Part); 2385 } 2386 2387 void InnerLoopVectorizer::widenIntOrFpInduction(PHINode *IV, Value *Start, 2388 TruncInst *Trunc, VPValue *Def, 2389 VPValue *CastDef, 2390 VPTransformState &State) { 2391 assert((IV->getType()->isIntegerTy() || IV != OldInduction) && 2392 "Primary induction variable must have an integer type"); 2393 2394 auto II = Legal->getInductionVars().find(IV); 2395 assert(II != Legal->getInductionVars().end() && "IV is not an induction"); 2396 2397 auto ID = II->second; 2398 assert(IV->getType() == ID.getStartValue()->getType() && "Types must match"); 2399 2400 // The value from the original loop to which we are mapping the new induction 2401 // variable. 2402 Instruction *EntryVal = Trunc ? cast<Instruction>(Trunc) : IV; 2403 2404 auto &DL = OrigLoop->getHeader()->getModule()->getDataLayout(); 2405 2406 // Generate code for the induction step. Note that induction steps are 2407 // required to be loop-invariant 2408 auto CreateStepValue = [&](const SCEV *Step) -> Value * { 2409 assert(PSE.getSE()->isLoopInvariant(Step, OrigLoop) && 2410 "Induction step should be loop invariant"); 2411 if (PSE.getSE()->isSCEVable(IV->getType())) { 2412 SCEVExpander Exp(*PSE.getSE(), DL, "induction"); 2413 return Exp.expandCodeFor(Step, Step->getType(), 2414 LoopVectorPreHeader->getTerminator()); 2415 } 2416 return cast<SCEVUnknown>(Step)->getValue(); 2417 }; 2418 2419 // The scalar value to broadcast. This is derived from the canonical 2420 // induction variable. If a truncation type is given, truncate the canonical 2421 // induction variable and step. Otherwise, derive these values from the 2422 // induction descriptor. 2423 auto CreateScalarIV = [&](Value *&Step) -> Value * { 2424 Value *ScalarIV = Induction; 2425 if (IV != OldInduction) { 2426 ScalarIV = IV->getType()->isIntegerTy() 2427 ? Builder.CreateSExtOrTrunc(Induction, IV->getType()) 2428 : Builder.CreateCast(Instruction::SIToFP, Induction, 2429 IV->getType()); 2430 ScalarIV = emitTransformedIndex(Builder, ScalarIV, PSE.getSE(), DL, ID); 2431 ScalarIV->setName("offset.idx"); 2432 } 2433 if (Trunc) { 2434 auto *TruncType = cast<IntegerType>(Trunc->getType()); 2435 assert(Step->getType()->isIntegerTy() && 2436 "Truncation requires an integer step"); 2437 ScalarIV = Builder.CreateTrunc(ScalarIV, TruncType); 2438 Step = Builder.CreateTrunc(Step, TruncType); 2439 } 2440 return ScalarIV; 2441 }; 2442 2443 // Create the vector values from the scalar IV, in the absence of creating a 2444 // vector IV. 2445 auto CreateSplatIV = [&](Value *ScalarIV, Value *Step) { 2446 Value *Broadcasted = getBroadcastInstrs(ScalarIV); 2447 for (unsigned Part = 0; Part < UF; ++Part) { 2448 assert(!VF.isScalable() && "scalable vectors not yet supported."); 2449 Value *EntryPart = 2450 getStepVector(Broadcasted, VF.getKnownMinValue() * Part, Step, 2451 ID.getInductionOpcode()); 2452 State.set(Def, EntryPart, Part); 2453 if (Trunc) 2454 addMetadata(EntryPart, Trunc); 2455 recordVectorLoopValueForInductionCast(ID, EntryVal, EntryPart, CastDef, 2456 State, Part); 2457 } 2458 }; 2459 2460 // Fast-math-flags propagate from the original induction instruction. 2461 IRBuilder<>::FastMathFlagGuard FMFG(Builder); 2462 if (ID.getInductionBinOp() && isa<FPMathOperator>(ID.getInductionBinOp())) 2463 Builder.setFastMathFlags(ID.getInductionBinOp()->getFastMathFlags()); 2464 2465 // Now do the actual transformations, and start with creating the step value. 2466 Value *Step = CreateStepValue(ID.getStep()); 2467 if (VF.isZero() || VF.isScalar()) { 2468 Value *ScalarIV = CreateScalarIV(Step); 2469 CreateSplatIV(ScalarIV, Step); 2470 return; 2471 } 2472 2473 // Determine if we want a scalar version of the induction variable. This is 2474 // true if the induction variable itself is not widened, or if it has at 2475 // least one user in the loop that is not widened. 2476 auto NeedsScalarIV = needsScalarInduction(EntryVal); 2477 if (!NeedsScalarIV) { 2478 createVectorIntOrFpInductionPHI(ID, Step, Start, EntryVal, Def, CastDef, 2479 State); 2480 return; 2481 } 2482 2483 // Try to create a new independent vector induction variable. If we can't 2484 // create the phi node, we will splat the scalar induction variable in each 2485 // loop iteration. 2486 if (!shouldScalarizeInstruction(EntryVal)) { 2487 createVectorIntOrFpInductionPHI(ID, Step, Start, EntryVal, Def, CastDef, 2488 State); 2489 Value *ScalarIV = CreateScalarIV(Step); 2490 // Create scalar steps that can be used by instructions we will later 2491 // scalarize. Note that the addition of the scalar steps will not increase 2492 // the number of instructions in the loop in the common case prior to 2493 // InstCombine. We will be trading one vector extract for each scalar step. 2494 buildScalarSteps(ScalarIV, Step, EntryVal, ID, Def, CastDef, State); 2495 return; 2496 } 2497 2498 // All IV users are scalar instructions, so only emit a scalar IV, not a 2499 // vectorised IV. Except when we tail-fold, then the splat IV feeds the 2500 // predicate used by the masked loads/stores. 2501 Value *ScalarIV = CreateScalarIV(Step); 2502 if (!Cost->isScalarEpilogueAllowed()) 2503 CreateSplatIV(ScalarIV, Step); 2504 buildScalarSteps(ScalarIV, Step, EntryVal, ID, Def, CastDef, State); 2505 } 2506 2507 Value *InnerLoopVectorizer::getStepVector(Value *Val, int StartIdx, Value *Step, 2508 Instruction::BinaryOps BinOp) { 2509 // Create and check the types. 2510 auto *ValVTy = cast<VectorType>(Val->getType()); 2511 ElementCount VLen = ValVTy->getElementCount(); 2512 2513 Type *STy = Val->getType()->getScalarType(); 2514 assert((STy->isIntegerTy() || STy->isFloatingPointTy()) && 2515 "Induction Step must be an integer or FP"); 2516 assert(Step->getType() == STy && "Step has wrong type"); 2517 2518 SmallVector<Constant *, 8> Indices; 2519 2520 // Create a vector of consecutive numbers from zero to VF. 2521 VectorType *InitVecValVTy = ValVTy; 2522 Type *InitVecValSTy = STy; 2523 if (STy->isFloatingPointTy()) { 2524 InitVecValSTy = 2525 IntegerType::get(STy->getContext(), STy->getScalarSizeInBits()); 2526 InitVecValVTy = VectorType::get(InitVecValSTy, VLen); 2527 } 2528 Value *InitVec = Builder.CreateStepVector(InitVecValVTy); 2529 2530 // Add on StartIdx 2531 Value *StartIdxSplat = Builder.CreateVectorSplat( 2532 VLen, ConstantInt::get(InitVecValSTy, StartIdx)); 2533 InitVec = Builder.CreateAdd(InitVec, StartIdxSplat); 2534 2535 if (STy->isIntegerTy()) { 2536 Step = Builder.CreateVectorSplat(VLen, Step); 2537 assert(Step->getType() == Val->getType() && "Invalid step vec"); 2538 // FIXME: The newly created binary instructions should contain nsw/nuw flags, 2539 // which can be found from the original scalar operations. 2540 Step = Builder.CreateMul(InitVec, Step); 2541 return Builder.CreateAdd(Val, Step, "induction"); 2542 } 2543 2544 // Floating point induction. 2545 assert((BinOp == Instruction::FAdd || BinOp == Instruction::FSub) && 2546 "Binary Opcode should be specified for FP induction"); 2547 InitVec = Builder.CreateUIToFP(InitVec, ValVTy); 2548 Step = Builder.CreateVectorSplat(VLen, Step); 2549 Value *MulOp = Builder.CreateFMul(InitVec, Step); 2550 return Builder.CreateBinOp(BinOp, Val, MulOp, "induction"); 2551 } 2552 2553 void InnerLoopVectorizer::buildScalarSteps(Value *ScalarIV, Value *Step, 2554 Instruction *EntryVal, 2555 const InductionDescriptor &ID, 2556 VPValue *Def, VPValue *CastDef, 2557 VPTransformState &State) { 2558 // We shouldn't have to build scalar steps if we aren't vectorizing. 2559 assert(VF.isVector() && "VF should be greater than one"); 2560 // Get the value type and ensure it and the step have the same integer type. 2561 Type *ScalarIVTy = ScalarIV->getType()->getScalarType(); 2562 assert(ScalarIVTy == Step->getType() && 2563 "Val and Step should have the same type"); 2564 2565 // We build scalar steps for both integer and floating-point induction 2566 // variables. Here, we determine the kind of arithmetic we will perform. 2567 Instruction::BinaryOps AddOp; 2568 Instruction::BinaryOps MulOp; 2569 if (ScalarIVTy->isIntegerTy()) { 2570 AddOp = Instruction::Add; 2571 MulOp = Instruction::Mul; 2572 } else { 2573 AddOp = ID.getInductionOpcode(); 2574 MulOp = Instruction::FMul; 2575 } 2576 2577 // Determine the number of scalars we need to generate for each unroll 2578 // iteration. If EntryVal is uniform, we only need to generate the first 2579 // lane. Otherwise, we generate all VF values. 2580 bool IsUniform = 2581 Cost->isUniformAfterVectorization(cast<Instruction>(EntryVal), VF); 2582 unsigned Lanes = IsUniform ? 1 : VF.getKnownMinValue(); 2583 // Compute the scalar steps and save the results in State. 2584 Type *IntStepTy = IntegerType::get(ScalarIVTy->getContext(), 2585 ScalarIVTy->getScalarSizeInBits()); 2586 Type *VecIVTy = nullptr; 2587 Value *UnitStepVec = nullptr, *SplatStep = nullptr, *SplatIV = nullptr; 2588 if (!IsUniform && VF.isScalable()) { 2589 VecIVTy = VectorType::get(ScalarIVTy, VF); 2590 UnitStepVec = Builder.CreateStepVector(VectorType::get(IntStepTy, VF)); 2591 SplatStep = Builder.CreateVectorSplat(VF, Step); 2592 SplatIV = Builder.CreateVectorSplat(VF, ScalarIV); 2593 } 2594 2595 for (unsigned Part = 0; Part < UF; ++Part) { 2596 Value *StartIdx0 = 2597 createStepForVF(Builder, ConstantInt::get(IntStepTy, Part), VF); 2598 2599 if (!IsUniform && VF.isScalable()) { 2600 auto *SplatStartIdx = Builder.CreateVectorSplat(VF, StartIdx0); 2601 auto *InitVec = Builder.CreateAdd(SplatStartIdx, UnitStepVec); 2602 if (ScalarIVTy->isFloatingPointTy()) 2603 InitVec = Builder.CreateSIToFP(InitVec, VecIVTy); 2604 auto *Mul = Builder.CreateBinOp(MulOp, InitVec, SplatStep); 2605 auto *Add = Builder.CreateBinOp(AddOp, SplatIV, Mul); 2606 State.set(Def, Add, Part); 2607 recordVectorLoopValueForInductionCast(ID, EntryVal, Add, CastDef, State, 2608 Part); 2609 // It's useful to record the lane values too for the known minimum number 2610 // of elements so we do those below. This improves the code quality when 2611 // trying to extract the first element, for example. 2612 } 2613 2614 if (ScalarIVTy->isFloatingPointTy()) 2615 StartIdx0 = Builder.CreateSIToFP(StartIdx0, ScalarIVTy); 2616 2617 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { 2618 Value *StartIdx = Builder.CreateBinOp( 2619 AddOp, StartIdx0, getSignedIntOrFpConstant(ScalarIVTy, Lane)); 2620 // The step returned by `createStepForVF` is a runtime-evaluated value 2621 // when VF is scalable. Otherwise, it should be folded into a Constant. 2622 assert((VF.isScalable() || isa<Constant>(StartIdx)) && 2623 "Expected StartIdx to be folded to a constant when VF is not " 2624 "scalable"); 2625 auto *Mul = Builder.CreateBinOp(MulOp, StartIdx, Step); 2626 auto *Add = Builder.CreateBinOp(AddOp, ScalarIV, Mul); 2627 State.set(Def, Add, VPIteration(Part, Lane)); 2628 recordVectorLoopValueForInductionCast(ID, EntryVal, Add, CastDef, State, 2629 Part, Lane); 2630 } 2631 } 2632 } 2633 2634 void InnerLoopVectorizer::packScalarIntoVectorValue(VPValue *Def, 2635 const VPIteration &Instance, 2636 VPTransformState &State) { 2637 Value *ScalarInst = State.get(Def, Instance); 2638 Value *VectorValue = State.get(Def, Instance.Part); 2639 VectorValue = Builder.CreateInsertElement( 2640 VectorValue, ScalarInst, 2641 Instance.Lane.getAsRuntimeExpr(State.Builder, VF)); 2642 State.set(Def, VectorValue, Instance.Part); 2643 } 2644 2645 Value *InnerLoopVectorizer::reverseVector(Value *Vec) { 2646 assert(Vec->getType()->isVectorTy() && "Invalid type"); 2647 return Builder.CreateVectorReverse(Vec, "reverse"); 2648 } 2649 2650 // Return whether we allow using masked interleave-groups (for dealing with 2651 // strided loads/stores that reside in predicated blocks, or for dealing 2652 // with gaps). 2653 static bool useMaskedInterleavedAccesses(const TargetTransformInfo &TTI) { 2654 // If an override option has been passed in for interleaved accesses, use it. 2655 if (EnableMaskedInterleavedMemAccesses.getNumOccurrences() > 0) 2656 return EnableMaskedInterleavedMemAccesses; 2657 2658 return TTI.enableMaskedInterleavedAccessVectorization(); 2659 } 2660 2661 // Try to vectorize the interleave group that \p Instr belongs to. 2662 // 2663 // E.g. Translate following interleaved load group (factor = 3): 2664 // for (i = 0; i < N; i+=3) { 2665 // R = Pic[i]; // Member of index 0 2666 // G = Pic[i+1]; // Member of index 1 2667 // B = Pic[i+2]; // Member of index 2 2668 // ... // do something to R, G, B 2669 // } 2670 // To: 2671 // %wide.vec = load <12 x i32> ; Read 4 tuples of R,G,B 2672 // %R.vec = shuffle %wide.vec, poison, <0, 3, 6, 9> ; R elements 2673 // %G.vec = shuffle %wide.vec, poison, <1, 4, 7, 10> ; G elements 2674 // %B.vec = shuffle %wide.vec, poison, <2, 5, 8, 11> ; B elements 2675 // 2676 // Or translate following interleaved store group (factor = 3): 2677 // for (i = 0; i < N; i+=3) { 2678 // ... do something to R, G, B 2679 // Pic[i] = R; // Member of index 0 2680 // Pic[i+1] = G; // Member of index 1 2681 // Pic[i+2] = B; // Member of index 2 2682 // } 2683 // To: 2684 // %R_G.vec = shuffle %R.vec, %G.vec, <0, 1, 2, ..., 7> 2685 // %B_U.vec = shuffle %B.vec, poison, <0, 1, 2, 3, u, u, u, u> 2686 // %interleaved.vec = shuffle %R_G.vec, %B_U.vec, 2687 // <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> ; Interleave R,G,B elements 2688 // store <12 x i32> %interleaved.vec ; Write 4 tuples of R,G,B 2689 void InnerLoopVectorizer::vectorizeInterleaveGroup( 2690 const InterleaveGroup<Instruction> *Group, ArrayRef<VPValue *> VPDefs, 2691 VPTransformState &State, VPValue *Addr, ArrayRef<VPValue *> StoredValues, 2692 VPValue *BlockInMask) { 2693 Instruction *Instr = Group->getInsertPos(); 2694 const DataLayout &DL = Instr->getModule()->getDataLayout(); 2695 2696 // Prepare for the vector type of the interleaved load/store. 2697 Type *ScalarTy = getLoadStoreType(Instr); 2698 unsigned InterleaveFactor = Group->getFactor(); 2699 assert(!VF.isScalable() && "scalable vectors not yet supported."); 2700 auto *VecTy = VectorType::get(ScalarTy, VF * InterleaveFactor); 2701 2702 // Prepare for the new pointers. 2703 SmallVector<Value *, 2> AddrParts; 2704 unsigned Index = Group->getIndex(Instr); 2705 2706 // TODO: extend the masked interleaved-group support to reversed access. 2707 assert((!BlockInMask || !Group->isReverse()) && 2708 "Reversed masked interleave-group not supported."); 2709 2710 // If the group is reverse, adjust the index to refer to the last vector lane 2711 // instead of the first. We adjust the index from the first vector lane, 2712 // rather than directly getting the pointer for lane VF - 1, because the 2713 // pointer operand of the interleaved access is supposed to be uniform. For 2714 // uniform instructions, we're only required to generate a value for the 2715 // first vector lane in each unroll iteration. 2716 if (Group->isReverse()) 2717 Index += (VF.getKnownMinValue() - 1) * Group->getFactor(); 2718 2719 for (unsigned Part = 0; Part < UF; Part++) { 2720 Value *AddrPart = State.get(Addr, VPIteration(Part, 0)); 2721 setDebugLocFromInst(Builder, AddrPart); 2722 2723 // Notice current instruction could be any index. Need to adjust the address 2724 // to the member of index 0. 2725 // 2726 // E.g. a = A[i+1]; // Member of index 1 (Current instruction) 2727 // b = A[i]; // Member of index 0 2728 // Current pointer is pointed to A[i+1], adjust it to A[i]. 2729 // 2730 // E.g. A[i+1] = a; // Member of index 1 2731 // A[i] = b; // Member of index 0 2732 // A[i+2] = c; // Member of index 2 (Current instruction) 2733 // Current pointer is pointed to A[i+2], adjust it to A[i]. 2734 2735 bool InBounds = false; 2736 if (auto *gep = dyn_cast<GetElementPtrInst>(AddrPart->stripPointerCasts())) 2737 InBounds = gep->isInBounds(); 2738 AddrPart = Builder.CreateGEP(ScalarTy, AddrPart, Builder.getInt32(-Index)); 2739 cast<GetElementPtrInst>(AddrPart)->setIsInBounds(InBounds); 2740 2741 // Cast to the vector pointer type. 2742 unsigned AddressSpace = AddrPart->getType()->getPointerAddressSpace(); 2743 Type *PtrTy = VecTy->getPointerTo(AddressSpace); 2744 AddrParts.push_back(Builder.CreateBitCast(AddrPart, PtrTy)); 2745 } 2746 2747 setDebugLocFromInst(Builder, Instr); 2748 Value *PoisonVec = PoisonValue::get(VecTy); 2749 2750 Value *MaskForGaps = nullptr; 2751 if (Group->requiresScalarEpilogue() && !Cost->isScalarEpilogueAllowed()) { 2752 MaskForGaps = createBitMaskForGaps(Builder, VF.getKnownMinValue(), *Group); 2753 assert(MaskForGaps && "Mask for Gaps is required but it is null"); 2754 } 2755 2756 // Vectorize the interleaved load group. 2757 if (isa<LoadInst>(Instr)) { 2758 // For each unroll part, create a wide load for the group. 2759 SmallVector<Value *, 2> NewLoads; 2760 for (unsigned Part = 0; Part < UF; Part++) { 2761 Instruction *NewLoad; 2762 if (BlockInMask || MaskForGaps) { 2763 assert(useMaskedInterleavedAccesses(*TTI) && 2764 "masked interleaved groups are not allowed."); 2765 Value *GroupMask = MaskForGaps; 2766 if (BlockInMask) { 2767 Value *BlockInMaskPart = State.get(BlockInMask, Part); 2768 Value *ShuffledMask = Builder.CreateShuffleVector( 2769 BlockInMaskPart, 2770 createReplicatedMask(InterleaveFactor, VF.getKnownMinValue()), 2771 "interleaved.mask"); 2772 GroupMask = MaskForGaps 2773 ? Builder.CreateBinOp(Instruction::And, ShuffledMask, 2774 MaskForGaps) 2775 : ShuffledMask; 2776 } 2777 NewLoad = 2778 Builder.CreateMaskedLoad(AddrParts[Part], Group->getAlign(), 2779 GroupMask, PoisonVec, "wide.masked.vec"); 2780 } 2781 else 2782 NewLoad = Builder.CreateAlignedLoad(VecTy, AddrParts[Part], 2783 Group->getAlign(), "wide.vec"); 2784 Group->addMetadata(NewLoad); 2785 NewLoads.push_back(NewLoad); 2786 } 2787 2788 // For each member in the group, shuffle out the appropriate data from the 2789 // wide loads. 2790 unsigned J = 0; 2791 for (unsigned I = 0; I < InterleaveFactor; ++I) { 2792 Instruction *Member = Group->getMember(I); 2793 2794 // Skip the gaps in the group. 2795 if (!Member) 2796 continue; 2797 2798 auto StrideMask = 2799 createStrideMask(I, InterleaveFactor, VF.getKnownMinValue()); 2800 for (unsigned Part = 0; Part < UF; Part++) { 2801 Value *StridedVec = Builder.CreateShuffleVector( 2802 NewLoads[Part], StrideMask, "strided.vec"); 2803 2804 // If this member has different type, cast the result type. 2805 if (Member->getType() != ScalarTy) { 2806 assert(!VF.isScalable() && "VF is assumed to be non scalable."); 2807 VectorType *OtherVTy = VectorType::get(Member->getType(), VF); 2808 StridedVec = createBitOrPointerCast(StridedVec, OtherVTy, DL); 2809 } 2810 2811 if (Group->isReverse()) 2812 StridedVec = reverseVector(StridedVec); 2813 2814 State.set(VPDefs[J], StridedVec, Part); 2815 } 2816 ++J; 2817 } 2818 return; 2819 } 2820 2821 // The sub vector type for current instruction. 2822 auto *SubVT = VectorType::get(ScalarTy, VF); 2823 2824 // Vectorize the interleaved store group. 2825 for (unsigned Part = 0; Part < UF; Part++) { 2826 // Collect the stored vector from each member. 2827 SmallVector<Value *, 4> StoredVecs; 2828 for (unsigned i = 0; i < InterleaveFactor; i++) { 2829 // Interleaved store group doesn't allow a gap, so each index has a member 2830 assert(Group->getMember(i) && "Fail to get a member from an interleaved store group"); 2831 2832 Value *StoredVec = State.get(StoredValues[i], Part); 2833 2834 if (Group->isReverse()) 2835 StoredVec = reverseVector(StoredVec); 2836 2837 // If this member has different type, cast it to a unified type. 2838 2839 if (StoredVec->getType() != SubVT) 2840 StoredVec = createBitOrPointerCast(StoredVec, SubVT, DL); 2841 2842 StoredVecs.push_back(StoredVec); 2843 } 2844 2845 // Concatenate all vectors into a wide vector. 2846 Value *WideVec = concatenateVectors(Builder, StoredVecs); 2847 2848 // Interleave the elements in the wide vector. 2849 Value *IVec = Builder.CreateShuffleVector( 2850 WideVec, createInterleaveMask(VF.getKnownMinValue(), InterleaveFactor), 2851 "interleaved.vec"); 2852 2853 Instruction *NewStoreInstr; 2854 if (BlockInMask) { 2855 Value *BlockInMaskPart = State.get(BlockInMask, Part); 2856 Value *ShuffledMask = Builder.CreateShuffleVector( 2857 BlockInMaskPart, 2858 createReplicatedMask(InterleaveFactor, VF.getKnownMinValue()), 2859 "interleaved.mask"); 2860 NewStoreInstr = Builder.CreateMaskedStore( 2861 IVec, AddrParts[Part], Group->getAlign(), ShuffledMask); 2862 } 2863 else 2864 NewStoreInstr = 2865 Builder.CreateAlignedStore(IVec, AddrParts[Part], Group->getAlign()); 2866 2867 Group->addMetadata(NewStoreInstr); 2868 } 2869 } 2870 2871 void InnerLoopVectorizer::vectorizeMemoryInstruction( 2872 Instruction *Instr, VPTransformState &State, VPValue *Def, VPValue *Addr, 2873 VPValue *StoredValue, VPValue *BlockInMask) { 2874 // Attempt to issue a wide load. 2875 LoadInst *LI = dyn_cast<LoadInst>(Instr); 2876 StoreInst *SI = dyn_cast<StoreInst>(Instr); 2877 2878 assert((LI || SI) && "Invalid Load/Store instruction"); 2879 assert((!SI || StoredValue) && "No stored value provided for widened store"); 2880 assert((!LI || !StoredValue) && "Stored value provided for widened load"); 2881 2882 LoopVectorizationCostModel::InstWidening Decision = 2883 Cost->getWideningDecision(Instr, VF); 2884 assert((Decision == LoopVectorizationCostModel::CM_Widen || 2885 Decision == LoopVectorizationCostModel::CM_Widen_Reverse || 2886 Decision == LoopVectorizationCostModel::CM_GatherScatter) && 2887 "CM decision is not to widen the memory instruction"); 2888 2889 Type *ScalarDataTy = getLoadStoreType(Instr); 2890 2891 auto *DataTy = VectorType::get(ScalarDataTy, VF); 2892 const Align Alignment = getLoadStoreAlignment(Instr); 2893 2894 // Determine if the pointer operand of the access is either consecutive or 2895 // reverse consecutive. 2896 bool Reverse = (Decision == LoopVectorizationCostModel::CM_Widen_Reverse); 2897 bool ConsecutiveStride = 2898 Reverse || (Decision == LoopVectorizationCostModel::CM_Widen); 2899 bool CreateGatherScatter = 2900 (Decision == LoopVectorizationCostModel::CM_GatherScatter); 2901 2902 // Either Ptr feeds a vector load/store, or a vector GEP should feed a vector 2903 // gather/scatter. Otherwise Decision should have been to Scalarize. 2904 assert((ConsecutiveStride || CreateGatherScatter) && 2905 "The instruction should be scalarized"); 2906 (void)ConsecutiveStride; 2907 2908 VectorParts BlockInMaskParts(UF); 2909 bool isMaskRequired = BlockInMask; 2910 if (isMaskRequired) 2911 for (unsigned Part = 0; Part < UF; ++Part) 2912 BlockInMaskParts[Part] = State.get(BlockInMask, Part); 2913 2914 const auto CreateVecPtr = [&](unsigned Part, Value *Ptr) -> Value * { 2915 // Calculate the pointer for the specific unroll-part. 2916 GetElementPtrInst *PartPtr = nullptr; 2917 2918 bool InBounds = false; 2919 if (auto *gep = dyn_cast<GetElementPtrInst>(Ptr->stripPointerCasts())) 2920 InBounds = gep->isInBounds(); 2921 if (Reverse) { 2922 // If the address is consecutive but reversed, then the 2923 // wide store needs to start at the last vector element. 2924 // RunTimeVF = VScale * VF.getKnownMinValue() 2925 // For fixed-width VScale is 1, then RunTimeVF = VF.getKnownMinValue() 2926 Value *RunTimeVF = getRuntimeVF(Builder, Builder.getInt32Ty(), VF); 2927 // NumElt = -Part * RunTimeVF 2928 Value *NumElt = Builder.CreateMul(Builder.getInt32(-Part), RunTimeVF); 2929 // LastLane = 1 - RunTimeVF 2930 Value *LastLane = Builder.CreateSub(Builder.getInt32(1), RunTimeVF); 2931 PartPtr = 2932 cast<GetElementPtrInst>(Builder.CreateGEP(ScalarDataTy, Ptr, NumElt)); 2933 PartPtr->setIsInBounds(InBounds); 2934 PartPtr = cast<GetElementPtrInst>( 2935 Builder.CreateGEP(ScalarDataTy, PartPtr, LastLane)); 2936 PartPtr->setIsInBounds(InBounds); 2937 if (isMaskRequired) // Reverse of a null all-one mask is a null mask. 2938 BlockInMaskParts[Part] = reverseVector(BlockInMaskParts[Part]); 2939 } else { 2940 Value *Increment = createStepForVF(Builder, Builder.getInt32(Part), VF); 2941 PartPtr = cast<GetElementPtrInst>( 2942 Builder.CreateGEP(ScalarDataTy, Ptr, Increment)); 2943 PartPtr->setIsInBounds(InBounds); 2944 } 2945 2946 unsigned AddressSpace = Ptr->getType()->getPointerAddressSpace(); 2947 return Builder.CreateBitCast(PartPtr, DataTy->getPointerTo(AddressSpace)); 2948 }; 2949 2950 // Handle Stores: 2951 if (SI) { 2952 setDebugLocFromInst(Builder, SI); 2953 2954 for (unsigned Part = 0; Part < UF; ++Part) { 2955 Instruction *NewSI = nullptr; 2956 Value *StoredVal = State.get(StoredValue, Part); 2957 if (CreateGatherScatter) { 2958 Value *MaskPart = isMaskRequired ? BlockInMaskParts[Part] : nullptr; 2959 Value *VectorGep = State.get(Addr, Part); 2960 NewSI = Builder.CreateMaskedScatter(StoredVal, VectorGep, Alignment, 2961 MaskPart); 2962 } else { 2963 if (Reverse) { 2964 // If we store to reverse consecutive memory locations, then we need 2965 // to reverse the order of elements in the stored value. 2966 StoredVal = reverseVector(StoredVal); 2967 // We don't want to update the value in the map as it might be used in 2968 // another expression. So don't call resetVectorValue(StoredVal). 2969 } 2970 auto *VecPtr = CreateVecPtr(Part, State.get(Addr, VPIteration(0, 0))); 2971 if (isMaskRequired) 2972 NewSI = Builder.CreateMaskedStore(StoredVal, VecPtr, Alignment, 2973 BlockInMaskParts[Part]); 2974 else 2975 NewSI = Builder.CreateAlignedStore(StoredVal, VecPtr, Alignment); 2976 } 2977 addMetadata(NewSI, SI); 2978 } 2979 return; 2980 } 2981 2982 // Handle loads. 2983 assert(LI && "Must have a load instruction"); 2984 setDebugLocFromInst(Builder, LI); 2985 for (unsigned Part = 0; Part < UF; ++Part) { 2986 Value *NewLI; 2987 if (CreateGatherScatter) { 2988 Value *MaskPart = isMaskRequired ? BlockInMaskParts[Part] : nullptr; 2989 Value *VectorGep = State.get(Addr, Part); 2990 NewLI = Builder.CreateMaskedGather(VectorGep, Alignment, MaskPart, 2991 nullptr, "wide.masked.gather"); 2992 addMetadata(NewLI, LI); 2993 } else { 2994 auto *VecPtr = CreateVecPtr(Part, State.get(Addr, VPIteration(0, 0))); 2995 if (isMaskRequired) 2996 NewLI = Builder.CreateMaskedLoad( 2997 VecPtr, Alignment, BlockInMaskParts[Part], PoisonValue::get(DataTy), 2998 "wide.masked.load"); 2999 else 3000 NewLI = 3001 Builder.CreateAlignedLoad(DataTy, VecPtr, Alignment, "wide.load"); 3002 3003 // Add metadata to the load, but setVectorValue to the reverse shuffle. 3004 addMetadata(NewLI, LI); 3005 if (Reverse) 3006 NewLI = reverseVector(NewLI); 3007 } 3008 3009 State.set(Def, NewLI, Part); 3010 } 3011 } 3012 3013 void InnerLoopVectorizer::scalarizeInstruction(Instruction *Instr, VPValue *Def, 3014 VPUser &User, 3015 const VPIteration &Instance, 3016 bool IfPredicateInstr, 3017 VPTransformState &State) { 3018 assert(!Instr->getType()->isAggregateType() && "Can't handle vectors"); 3019 3020 // llvm.experimental.noalias.scope.decl intrinsics must only be duplicated for 3021 // the first lane and part. 3022 if (isa<NoAliasScopeDeclInst>(Instr)) 3023 if (!Instance.isFirstIteration()) 3024 return; 3025 3026 setDebugLocFromInst(Builder, Instr); 3027 3028 // Does this instruction return a value ? 3029 bool IsVoidRetTy = Instr->getType()->isVoidTy(); 3030 3031 Instruction *Cloned = Instr->clone(); 3032 if (!IsVoidRetTy) 3033 Cloned->setName(Instr->getName() + ".cloned"); 3034 3035 State.Builder.SetInsertPoint(Builder.GetInsertBlock(), 3036 Builder.GetInsertPoint()); 3037 // Replace the operands of the cloned instructions with their scalar 3038 // equivalents in the new loop. 3039 for (unsigned op = 0, e = User.getNumOperands(); op != e; ++op) { 3040 auto *Operand = dyn_cast<Instruction>(Instr->getOperand(op)); 3041 auto InputInstance = Instance; 3042 if (!Operand || !OrigLoop->contains(Operand) || 3043 (Cost->isUniformAfterVectorization(Operand, State.VF))) 3044 InputInstance.Lane = VPLane::getFirstLane(); 3045 auto *NewOp = State.get(User.getOperand(op), InputInstance); 3046 Cloned->setOperand(op, NewOp); 3047 } 3048 addNewMetadata(Cloned, Instr); 3049 3050 // Place the cloned scalar in the new loop. 3051 Builder.Insert(Cloned); 3052 3053 State.set(Def, Cloned, Instance); 3054 3055 // If we just cloned a new assumption, add it the assumption cache. 3056 if (auto *II = dyn_cast<AssumeInst>(Cloned)) 3057 AC->registerAssumption(II); 3058 3059 // End if-block. 3060 if (IfPredicateInstr) 3061 PredicatedInstructions.push_back(Cloned); 3062 } 3063 3064 PHINode *InnerLoopVectorizer::createInductionVariable(Loop *L, Value *Start, 3065 Value *End, Value *Step, 3066 Instruction *DL) { 3067 BasicBlock *Header = L->getHeader(); 3068 BasicBlock *Latch = L->getLoopLatch(); 3069 // As we're just creating this loop, it's possible no latch exists 3070 // yet. If so, use the header as this will be a single block loop. 3071 if (!Latch) 3072 Latch = Header; 3073 3074 IRBuilder<> Builder(&*Header->getFirstInsertionPt()); 3075 Instruction *OldInst = getDebugLocFromInstOrOperands(OldInduction); 3076 setDebugLocFromInst(Builder, OldInst); 3077 auto *Induction = Builder.CreatePHI(Start->getType(), 2, "index"); 3078 3079 Builder.SetInsertPoint(Latch->getTerminator()); 3080 setDebugLocFromInst(Builder, OldInst); 3081 3082 // Create i+1 and fill the PHINode. 3083 // 3084 // If the tail is not folded, we know that End - Start >= Step (either 3085 // statically or through the minimum iteration checks). We also know that both 3086 // Start % Step == 0 and End % Step == 0. We exit the vector loop if %IV + 3087 // %Step == %End. Hence we must exit the loop before %IV + %Step unsigned 3088 // overflows and we can mark the induction increment as NUW. 3089 Value *Next = 3090 Builder.CreateAdd(Induction, Step, "index.next", 3091 /*NUW=*/!Cost->foldTailByMasking(), /*NSW=*/false); 3092 Induction->addIncoming(Start, L->getLoopPreheader()); 3093 Induction->addIncoming(Next, Latch); 3094 // Create the compare. 3095 Value *ICmp = Builder.CreateICmpEQ(Next, End); 3096 Builder.CreateCondBr(ICmp, L->getUniqueExitBlock(), Header); 3097 3098 // Now we have two terminators. Remove the old one from the block. 3099 Latch->getTerminator()->eraseFromParent(); 3100 3101 return Induction; 3102 } 3103 3104 Value *InnerLoopVectorizer::getOrCreateTripCount(Loop *L) { 3105 if (TripCount) 3106 return TripCount; 3107 3108 assert(L && "Create Trip Count for null loop."); 3109 IRBuilder<> Builder(L->getLoopPreheader()->getTerminator()); 3110 // Find the loop boundaries. 3111 ScalarEvolution *SE = PSE.getSE(); 3112 const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount(); 3113 assert(!isa<SCEVCouldNotCompute>(BackedgeTakenCount) && 3114 "Invalid loop count"); 3115 3116 Type *IdxTy = Legal->getWidestInductionType(); 3117 assert(IdxTy && "No type for induction"); 3118 3119 // The exit count might have the type of i64 while the phi is i32. This can 3120 // happen if we have an induction variable that is sign extended before the 3121 // compare. The only way that we get a backedge taken count is that the 3122 // induction variable was signed and as such will not overflow. In such a case 3123 // truncation is legal. 3124 if (SE->getTypeSizeInBits(BackedgeTakenCount->getType()) > 3125 IdxTy->getPrimitiveSizeInBits()) 3126 BackedgeTakenCount = SE->getTruncateOrNoop(BackedgeTakenCount, IdxTy); 3127 BackedgeTakenCount = SE->getNoopOrZeroExtend(BackedgeTakenCount, IdxTy); 3128 3129 // Get the total trip count from the count by adding 1. 3130 const SCEV *ExitCount = SE->getAddExpr( 3131 BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType())); 3132 3133 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout(); 3134 3135 // Expand the trip count and place the new instructions in the preheader. 3136 // Notice that the pre-header does not change, only the loop body. 3137 SCEVExpander Exp(*SE, DL, "induction"); 3138 3139 // Count holds the overall loop count (N). 3140 TripCount = Exp.expandCodeFor(ExitCount, ExitCount->getType(), 3141 L->getLoopPreheader()->getTerminator()); 3142 3143 if (TripCount->getType()->isPointerTy()) 3144 TripCount = 3145 CastInst::CreatePointerCast(TripCount, IdxTy, "exitcount.ptrcnt.to.int", 3146 L->getLoopPreheader()->getTerminator()); 3147 3148 return TripCount; 3149 } 3150 3151 Value *InnerLoopVectorizer::getOrCreateVectorTripCount(Loop *L) { 3152 if (VectorTripCount) 3153 return VectorTripCount; 3154 3155 Value *TC = getOrCreateTripCount(L); 3156 IRBuilder<> Builder(L->getLoopPreheader()->getTerminator()); 3157 3158 Type *Ty = TC->getType(); 3159 // This is where we can make the step a runtime constant. 3160 Value *Step = createStepForVF(Builder, ConstantInt::get(Ty, UF), VF); 3161 3162 // If the tail is to be folded by masking, round the number of iterations N 3163 // up to a multiple of Step instead of rounding down. This is done by first 3164 // adding Step-1 and then rounding down. Note that it's ok if this addition 3165 // overflows: the vector induction variable will eventually wrap to zero given 3166 // that it starts at zero and its Step is a power of two; the loop will then 3167 // exit, with the last early-exit vector comparison also producing all-true. 3168 if (Cost->foldTailByMasking()) { 3169 assert(isPowerOf2_32(VF.getKnownMinValue() * UF) && 3170 "VF*UF must be a power of 2 when folding tail by masking"); 3171 assert(!VF.isScalable() && 3172 "Tail folding not yet supported for scalable vectors"); 3173 TC = Builder.CreateAdd( 3174 TC, ConstantInt::get(Ty, VF.getKnownMinValue() * UF - 1), "n.rnd.up"); 3175 } 3176 3177 // Now we need to generate the expression for the part of the loop that the 3178 // vectorized body will execute. This is equal to N - (N % Step) if scalar 3179 // iterations are not required for correctness, or N - Step, otherwise. Step 3180 // is equal to the vectorization factor (number of SIMD elements) times the 3181 // unroll factor (number of SIMD instructions). 3182 Value *R = Builder.CreateURem(TC, Step, "n.mod.vf"); 3183 3184 // There are two cases where we need to ensure (at least) the last iteration 3185 // runs in the scalar remainder loop. Thus, if the step evenly divides 3186 // the trip count, we set the remainder to be equal to the step. If the step 3187 // does not evenly divide the trip count, no adjustment is necessary since 3188 // there will already be scalar iterations. Note that the minimum iterations 3189 // check ensures that N >= Step. The cases are: 3190 // 1) If there is a non-reversed interleaved group that may speculatively 3191 // access memory out-of-bounds. 3192 // 2) If any instruction may follow a conditionally taken exit. That is, if 3193 // the loop contains multiple exiting blocks, or a single exiting block 3194 // which is not the latch. 3195 if (VF.isVector() && Cost->requiresScalarEpilogue()) { 3196 auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0)); 3197 R = Builder.CreateSelect(IsZero, Step, R); 3198 } 3199 3200 VectorTripCount = Builder.CreateSub(TC, R, "n.vec"); 3201 3202 return VectorTripCount; 3203 } 3204 3205 Value *InnerLoopVectorizer::createBitOrPointerCast(Value *V, VectorType *DstVTy, 3206 const DataLayout &DL) { 3207 // Verify that V is a vector type with same number of elements as DstVTy. 3208 auto *DstFVTy = cast<FixedVectorType>(DstVTy); 3209 unsigned VF = DstFVTy->getNumElements(); 3210 auto *SrcVecTy = cast<FixedVectorType>(V->getType()); 3211 assert((VF == SrcVecTy->getNumElements()) && "Vector dimensions do not match"); 3212 Type *SrcElemTy = SrcVecTy->getElementType(); 3213 Type *DstElemTy = DstFVTy->getElementType(); 3214 assert((DL.getTypeSizeInBits(SrcElemTy) == DL.getTypeSizeInBits(DstElemTy)) && 3215 "Vector elements must have same size"); 3216 3217 // Do a direct cast if element types are castable. 3218 if (CastInst::isBitOrNoopPointerCastable(SrcElemTy, DstElemTy, DL)) { 3219 return Builder.CreateBitOrPointerCast(V, DstFVTy); 3220 } 3221 // V cannot be directly casted to desired vector type. 3222 // May happen when V is a floating point vector but DstVTy is a vector of 3223 // pointers or vice-versa. Handle this using a two-step bitcast using an 3224 // intermediate Integer type for the bitcast i.e. Ptr <-> Int <-> Float. 3225 assert((DstElemTy->isPointerTy() != SrcElemTy->isPointerTy()) && 3226 "Only one type should be a pointer type"); 3227 assert((DstElemTy->isFloatingPointTy() != SrcElemTy->isFloatingPointTy()) && 3228 "Only one type should be a floating point type"); 3229 Type *IntTy = 3230 IntegerType::getIntNTy(V->getContext(), DL.getTypeSizeInBits(SrcElemTy)); 3231 auto *VecIntTy = FixedVectorType::get(IntTy, VF); 3232 Value *CastVal = Builder.CreateBitOrPointerCast(V, VecIntTy); 3233 return Builder.CreateBitOrPointerCast(CastVal, DstFVTy); 3234 } 3235 3236 void InnerLoopVectorizer::emitMinimumIterationCountCheck(Loop *L, 3237 BasicBlock *Bypass) { 3238 Value *Count = getOrCreateTripCount(L); 3239 // Reuse existing vector loop preheader for TC checks. 3240 // Note that new preheader block is generated for vector loop. 3241 BasicBlock *const TCCheckBlock = LoopVectorPreHeader; 3242 IRBuilder<> Builder(TCCheckBlock->getTerminator()); 3243 3244 // Generate code to check if the loop's trip count is less than VF * UF, or 3245 // equal to it in case a scalar epilogue is required; this implies that the 3246 // vector trip count is zero. This check also covers the case where adding one 3247 // to the backedge-taken count overflowed leading to an incorrect trip count 3248 // of zero. In this case we will also jump to the scalar loop. 3249 auto P = Cost->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE 3250 : ICmpInst::ICMP_ULT; 3251 3252 // If tail is to be folded, vector loop takes care of all iterations. 3253 Value *CheckMinIters = Builder.getFalse(); 3254 if (!Cost->foldTailByMasking()) { 3255 Value *Step = 3256 createStepForVF(Builder, ConstantInt::get(Count->getType(), UF), VF); 3257 CheckMinIters = Builder.CreateICmp(P, Count, Step, "min.iters.check"); 3258 } 3259 // Create new preheader for vector loop. 3260 LoopVectorPreHeader = 3261 SplitBlock(TCCheckBlock, TCCheckBlock->getTerminator(), DT, LI, nullptr, 3262 "vector.ph"); 3263 3264 assert(DT->properlyDominates(DT->getNode(TCCheckBlock), 3265 DT->getNode(Bypass)->getIDom()) && 3266 "TC check is expected to dominate Bypass"); 3267 3268 // Update dominator for Bypass & LoopExit. 3269 DT->changeImmediateDominator(Bypass, TCCheckBlock); 3270 DT->changeImmediateDominator(LoopExitBlock, TCCheckBlock); 3271 3272 ReplaceInstWithInst( 3273 TCCheckBlock->getTerminator(), 3274 BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters)); 3275 LoopBypassBlocks.push_back(TCCheckBlock); 3276 } 3277 3278 BasicBlock *InnerLoopVectorizer::emitSCEVChecks(Loop *L, BasicBlock *Bypass) { 3279 3280 BasicBlock *const SCEVCheckBlock = 3281 RTChecks.emitSCEVChecks(L, Bypass, LoopVectorPreHeader, LoopExitBlock); 3282 if (!SCEVCheckBlock) 3283 return nullptr; 3284 3285 assert(!(SCEVCheckBlock->getParent()->hasOptSize() || 3286 (OptForSizeBasedOnProfile && 3287 Cost->Hints->getForce() != LoopVectorizeHints::FK_Enabled)) && 3288 "Cannot SCEV check stride or overflow when optimizing for size"); 3289 3290 3291 // Update dominator only if this is first RT check. 3292 if (LoopBypassBlocks.empty()) { 3293 DT->changeImmediateDominator(Bypass, SCEVCheckBlock); 3294 DT->changeImmediateDominator(LoopExitBlock, SCEVCheckBlock); 3295 } 3296 3297 LoopBypassBlocks.push_back(SCEVCheckBlock); 3298 AddedSafetyChecks = true; 3299 return SCEVCheckBlock; 3300 } 3301 3302 BasicBlock *InnerLoopVectorizer::emitMemRuntimeChecks(Loop *L, 3303 BasicBlock *Bypass) { 3304 // VPlan-native path does not do any analysis for runtime checks currently. 3305 if (EnableVPlanNativePath) 3306 return nullptr; 3307 3308 BasicBlock *const MemCheckBlock = 3309 RTChecks.emitMemRuntimeChecks(L, Bypass, LoopVectorPreHeader); 3310 3311 // Check if we generated code that checks in runtime if arrays overlap. We put 3312 // the checks into a separate block to make the more common case of few 3313 // elements faster. 3314 if (!MemCheckBlock) 3315 return nullptr; 3316 3317 if (MemCheckBlock->getParent()->hasOptSize() || OptForSizeBasedOnProfile) { 3318 assert(Cost->Hints->getForce() == LoopVectorizeHints::FK_Enabled && 3319 "Cannot emit memory checks when optimizing for size, unless forced " 3320 "to vectorize."); 3321 ORE->emit([&]() { 3322 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationCodeSize", 3323 L->getStartLoc(), L->getHeader()) 3324 << "Code-size may be reduced by not forcing " 3325 "vectorization, or by source-code modifications " 3326 "eliminating the need for runtime checks " 3327 "(e.g., adding 'restrict')."; 3328 }); 3329 } 3330 3331 LoopBypassBlocks.push_back(MemCheckBlock); 3332 3333 AddedSafetyChecks = true; 3334 3335 // We currently don't use LoopVersioning for the actual loop cloning but we 3336 // still use it to add the noalias metadata. 3337 LVer = std::make_unique<LoopVersioning>( 3338 *Legal->getLAI(), 3339 Legal->getLAI()->getRuntimePointerChecking()->getChecks(), OrigLoop, LI, 3340 DT, PSE.getSE()); 3341 LVer->prepareNoAliasMetadata(); 3342 return MemCheckBlock; 3343 } 3344 3345 Value *InnerLoopVectorizer::emitTransformedIndex( 3346 IRBuilder<> &B, Value *Index, ScalarEvolution *SE, const DataLayout &DL, 3347 const InductionDescriptor &ID) const { 3348 3349 SCEVExpander Exp(*SE, DL, "induction"); 3350 auto Step = ID.getStep(); 3351 auto StartValue = ID.getStartValue(); 3352 assert(Index->getType()->getScalarType() == Step->getType() && 3353 "Index scalar type does not match StepValue type"); 3354 3355 // Note: the IR at this point is broken. We cannot use SE to create any new 3356 // SCEV and then expand it, hoping that SCEV's simplification will give us 3357 // a more optimal code. Unfortunately, attempt of doing so on invalid IR may 3358 // lead to various SCEV crashes. So all we can do is to use builder and rely 3359 // on InstCombine for future simplifications. Here we handle some trivial 3360 // cases only. 3361 auto CreateAdd = [&B](Value *X, Value *Y) { 3362 assert(X->getType() == Y->getType() && "Types don't match!"); 3363 if (auto *CX = dyn_cast<ConstantInt>(X)) 3364 if (CX->isZero()) 3365 return Y; 3366 if (auto *CY = dyn_cast<ConstantInt>(Y)) 3367 if (CY->isZero()) 3368 return X; 3369 return B.CreateAdd(X, Y); 3370 }; 3371 3372 // We allow X to be a vector type, in which case Y will potentially be 3373 // splatted into a vector with the same element count. 3374 auto CreateMul = [&B](Value *X, Value *Y) { 3375 assert(X->getType()->getScalarType() == Y->getType() && 3376 "Types don't match!"); 3377 if (auto *CX = dyn_cast<ConstantInt>(X)) 3378 if (CX->isOne()) 3379 return Y; 3380 if (auto *CY = dyn_cast<ConstantInt>(Y)) 3381 if (CY->isOne()) 3382 return X; 3383 VectorType *XVTy = dyn_cast<VectorType>(X->getType()); 3384 if (XVTy && !isa<VectorType>(Y->getType())) 3385 Y = B.CreateVectorSplat(XVTy->getElementCount(), Y); 3386 return B.CreateMul(X, Y); 3387 }; 3388 3389 // Get a suitable insert point for SCEV expansion. For blocks in the vector 3390 // loop, choose the end of the vector loop header (=LoopVectorBody), because 3391 // the DomTree is not kept up-to-date for additional blocks generated in the 3392 // vector loop. By using the header as insertion point, we guarantee that the 3393 // expanded instructions dominate all their uses. 3394 auto GetInsertPoint = [this, &B]() { 3395 BasicBlock *InsertBB = B.GetInsertPoint()->getParent(); 3396 if (InsertBB != LoopVectorBody && 3397 LI->getLoopFor(LoopVectorBody) == LI->getLoopFor(InsertBB)) 3398 return LoopVectorBody->getTerminator(); 3399 return &*B.GetInsertPoint(); 3400 }; 3401 3402 switch (ID.getKind()) { 3403 case InductionDescriptor::IK_IntInduction: { 3404 assert(!isa<VectorType>(Index->getType()) && 3405 "Vector indices not supported for integer inductions yet"); 3406 assert(Index->getType() == StartValue->getType() && 3407 "Index type does not match StartValue type"); 3408 if (ID.getConstIntStepValue() && ID.getConstIntStepValue()->isMinusOne()) 3409 return B.CreateSub(StartValue, Index); 3410 auto *Offset = CreateMul( 3411 Index, Exp.expandCodeFor(Step, Index->getType(), GetInsertPoint())); 3412 return CreateAdd(StartValue, Offset); 3413 } 3414 case InductionDescriptor::IK_PtrInduction: { 3415 assert(isa<SCEVConstant>(Step) && 3416 "Expected constant step for pointer induction"); 3417 return B.CreateGEP( 3418 StartValue->getType()->getPointerElementType(), StartValue, 3419 CreateMul(Index, 3420 Exp.expandCodeFor(Step, Index->getType()->getScalarType(), 3421 GetInsertPoint()))); 3422 } 3423 case InductionDescriptor::IK_FpInduction: { 3424 assert(!isa<VectorType>(Index->getType()) && 3425 "Vector indices not supported for FP inductions yet"); 3426 assert(Step->getType()->isFloatingPointTy() && "Expected FP Step value"); 3427 auto InductionBinOp = ID.getInductionBinOp(); 3428 assert(InductionBinOp && 3429 (InductionBinOp->getOpcode() == Instruction::FAdd || 3430 InductionBinOp->getOpcode() == Instruction::FSub) && 3431 "Original bin op should be defined for FP induction"); 3432 3433 Value *StepValue = cast<SCEVUnknown>(Step)->getValue(); 3434 Value *MulExp = B.CreateFMul(StepValue, Index); 3435 return B.CreateBinOp(InductionBinOp->getOpcode(), StartValue, MulExp, 3436 "induction"); 3437 } 3438 case InductionDescriptor::IK_NoInduction: 3439 return nullptr; 3440 } 3441 llvm_unreachable("invalid enum"); 3442 } 3443 3444 Loop *InnerLoopVectorizer::createVectorLoopSkeleton(StringRef Prefix) { 3445 LoopScalarBody = OrigLoop->getHeader(); 3446 LoopVectorPreHeader = OrigLoop->getLoopPreheader(); 3447 LoopExitBlock = OrigLoop->getUniqueExitBlock(); 3448 assert(LoopExitBlock && "Must have an exit block"); 3449 assert(LoopVectorPreHeader && "Invalid loop structure"); 3450 3451 LoopMiddleBlock = 3452 SplitBlock(LoopVectorPreHeader, LoopVectorPreHeader->getTerminator(), DT, 3453 LI, nullptr, Twine(Prefix) + "middle.block"); 3454 LoopScalarPreHeader = 3455 SplitBlock(LoopMiddleBlock, LoopMiddleBlock->getTerminator(), DT, LI, 3456 nullptr, Twine(Prefix) + "scalar.ph"); 3457 3458 // Set up branch from middle block to the exit and scalar preheader blocks. 3459 // completeLoopSkeleton will update the condition to use an iteration check, 3460 // if required to decide whether to execute the remainder. 3461 BranchInst *BrInst = 3462 BranchInst::Create(LoopExitBlock, LoopScalarPreHeader, Builder.getTrue()); 3463 auto *ScalarLatchTerm = OrigLoop->getLoopLatch()->getTerminator(); 3464 BrInst->setDebugLoc(ScalarLatchTerm->getDebugLoc()); 3465 ReplaceInstWithInst(LoopMiddleBlock->getTerminator(), BrInst); 3466 3467 // We intentionally don't let SplitBlock to update LoopInfo since 3468 // LoopVectorBody should belong to another loop than LoopVectorPreHeader. 3469 // LoopVectorBody is explicitly added to the correct place few lines later. 3470 LoopVectorBody = 3471 SplitBlock(LoopVectorPreHeader, LoopVectorPreHeader->getTerminator(), DT, 3472 nullptr, nullptr, Twine(Prefix) + "vector.body"); 3473 3474 // Update dominator for loop exit. 3475 DT->changeImmediateDominator(LoopExitBlock, LoopMiddleBlock); 3476 3477 // Create and register the new vector loop. 3478 Loop *Lp = LI->AllocateLoop(); 3479 Loop *ParentLoop = OrigLoop->getParentLoop(); 3480 3481 // Insert the new loop into the loop nest and register the new basic blocks 3482 // before calling any utilities such as SCEV that require valid LoopInfo. 3483 if (ParentLoop) { 3484 ParentLoop->addChildLoop(Lp); 3485 } else { 3486 LI->addTopLevelLoop(Lp); 3487 } 3488 Lp->addBasicBlockToLoop(LoopVectorBody, *LI); 3489 return Lp; 3490 } 3491 3492 void InnerLoopVectorizer::createInductionResumeValues( 3493 Loop *L, Value *VectorTripCount, 3494 std::pair<BasicBlock *, Value *> AdditionalBypass) { 3495 assert(VectorTripCount && L && "Expected valid arguments"); 3496 assert(((AdditionalBypass.first && AdditionalBypass.second) || 3497 (!AdditionalBypass.first && !AdditionalBypass.second)) && 3498 "Inconsistent information about additional bypass."); 3499 // We are going to resume the execution of the scalar loop. 3500 // Go over all of the induction variables that we found and fix the 3501 // PHIs that are left in the scalar version of the loop. 3502 // The starting values of PHI nodes depend on the counter of the last 3503 // iteration in the vectorized loop. 3504 // If we come from a bypass edge then we need to start from the original 3505 // start value. 3506 for (auto &InductionEntry : Legal->getInductionVars()) { 3507 PHINode *OrigPhi = InductionEntry.first; 3508 InductionDescriptor II = InductionEntry.second; 3509 3510 // Create phi nodes to merge from the backedge-taken check block. 3511 PHINode *BCResumeVal = 3512 PHINode::Create(OrigPhi->getType(), 3, "bc.resume.val", 3513 LoopScalarPreHeader->getTerminator()); 3514 // Copy original phi DL over to the new one. 3515 BCResumeVal->setDebugLoc(OrigPhi->getDebugLoc()); 3516 Value *&EndValue = IVEndValues[OrigPhi]; 3517 Value *EndValueFromAdditionalBypass = AdditionalBypass.second; 3518 if (OrigPhi == OldInduction) { 3519 // We know what the end value is. 3520 EndValue = VectorTripCount; 3521 } else { 3522 IRBuilder<> B(L->getLoopPreheader()->getTerminator()); 3523 3524 // Fast-math-flags propagate from the original induction instruction. 3525 if (II.getInductionBinOp() && isa<FPMathOperator>(II.getInductionBinOp())) 3526 B.setFastMathFlags(II.getInductionBinOp()->getFastMathFlags()); 3527 3528 Type *StepType = II.getStep()->getType(); 3529 Instruction::CastOps CastOp = 3530 CastInst::getCastOpcode(VectorTripCount, true, StepType, true); 3531 Value *CRD = B.CreateCast(CastOp, VectorTripCount, StepType, "cast.crd"); 3532 const DataLayout &DL = LoopScalarBody->getModule()->getDataLayout(); 3533 EndValue = emitTransformedIndex(B, CRD, PSE.getSE(), DL, II); 3534 EndValue->setName("ind.end"); 3535 3536 // Compute the end value for the additional bypass (if applicable). 3537 if (AdditionalBypass.first) { 3538 B.SetInsertPoint(&(*AdditionalBypass.first->getFirstInsertionPt())); 3539 CastOp = CastInst::getCastOpcode(AdditionalBypass.second, true, 3540 StepType, true); 3541 CRD = 3542 B.CreateCast(CastOp, AdditionalBypass.second, StepType, "cast.crd"); 3543 EndValueFromAdditionalBypass = 3544 emitTransformedIndex(B, CRD, PSE.getSE(), DL, II); 3545 EndValueFromAdditionalBypass->setName("ind.end"); 3546 } 3547 } 3548 // The new PHI merges the original incoming value, in case of a bypass, 3549 // or the value at the end of the vectorized loop. 3550 BCResumeVal->addIncoming(EndValue, LoopMiddleBlock); 3551 3552 // Fix the scalar body counter (PHI node). 3553 // The old induction's phi node in the scalar body needs the truncated 3554 // value. 3555 for (BasicBlock *BB : LoopBypassBlocks) 3556 BCResumeVal->addIncoming(II.getStartValue(), BB); 3557 3558 if (AdditionalBypass.first) 3559 BCResumeVal->setIncomingValueForBlock(AdditionalBypass.first, 3560 EndValueFromAdditionalBypass); 3561 3562 OrigPhi->setIncomingValueForBlock(LoopScalarPreHeader, BCResumeVal); 3563 } 3564 } 3565 3566 BasicBlock *InnerLoopVectorizer::completeLoopSkeleton(Loop *L, 3567 MDNode *OrigLoopID) { 3568 assert(L && "Expected valid loop."); 3569 3570 // The trip counts should be cached by now. 3571 Value *Count = getOrCreateTripCount(L); 3572 Value *VectorTripCount = getOrCreateVectorTripCount(L); 3573 3574 auto *ScalarLatchTerm = OrigLoop->getLoopLatch()->getTerminator(); 3575 3576 // Add a check in the middle block to see if we have completed 3577 // all of the iterations in the first vector loop. 3578 // If (N - N%VF) == N, then we *don't* need to run the remainder. 3579 // If tail is to be folded, we know we don't need to run the remainder. 3580 if (!Cost->foldTailByMasking()) { 3581 Instruction *CmpN = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ, 3582 Count, VectorTripCount, "cmp.n", 3583 LoopMiddleBlock->getTerminator()); 3584 3585 // Here we use the same DebugLoc as the scalar loop latch terminator instead 3586 // of the corresponding compare because they may have ended up with 3587 // different line numbers and we want to avoid awkward line stepping while 3588 // debugging. Eg. if the compare has got a line number inside the loop. 3589 CmpN->setDebugLoc(ScalarLatchTerm->getDebugLoc()); 3590 cast<BranchInst>(LoopMiddleBlock->getTerminator())->setCondition(CmpN); 3591 } 3592 3593 // Get ready to start creating new instructions into the vectorized body. 3594 assert(LoopVectorPreHeader == L->getLoopPreheader() && 3595 "Inconsistent vector loop preheader"); 3596 Builder.SetInsertPoint(&*LoopVectorBody->getFirstInsertionPt()); 3597 3598 Optional<MDNode *> VectorizedLoopID = 3599 makeFollowupLoopID(OrigLoopID, {LLVMLoopVectorizeFollowupAll, 3600 LLVMLoopVectorizeFollowupVectorized}); 3601 if (VectorizedLoopID.hasValue()) { 3602 L->setLoopID(VectorizedLoopID.getValue()); 3603 3604 // Do not setAlreadyVectorized if loop attributes have been defined 3605 // explicitly. 3606 return LoopVectorPreHeader; 3607 } 3608 3609 // Keep all loop hints from the original loop on the vector loop (we'll 3610 // replace the vectorizer-specific hints below). 3611 if (MDNode *LID = OrigLoop->getLoopID()) 3612 L->setLoopID(LID); 3613 3614 LoopVectorizeHints Hints(L, true, *ORE); 3615 Hints.setAlreadyVectorized(); 3616 3617 #ifdef EXPENSIVE_CHECKS 3618 assert(DT->verify(DominatorTree::VerificationLevel::Fast)); 3619 LI->verify(*DT); 3620 #endif 3621 3622 return LoopVectorPreHeader; 3623 } 3624 3625 BasicBlock *InnerLoopVectorizer::createVectorizedLoopSkeleton() { 3626 /* 3627 In this function we generate a new loop. The new loop will contain 3628 the vectorized instructions while the old loop will continue to run the 3629 scalar remainder. 3630 3631 [ ] <-- loop iteration number check. 3632 / | 3633 / v 3634 | [ ] <-- vector loop bypass (may consist of multiple blocks). 3635 | / | 3636 | / v 3637 || [ ] <-- vector pre header. 3638 |/ | 3639 | v 3640 | [ ] \ 3641 | [ ]_| <-- vector loop. 3642 | | 3643 | v 3644 | -[ ] <--- middle-block. 3645 | / | 3646 | / v 3647 -|- >[ ] <--- new preheader. 3648 | | 3649 | v 3650 | [ ] \ 3651 | [ ]_| <-- old scalar loop to handle remainder. 3652 \ | 3653 \ v 3654 >[ ] <-- exit block. 3655 ... 3656 */ 3657 3658 // Get the metadata of the original loop before it gets modified. 3659 MDNode *OrigLoopID = OrigLoop->getLoopID(); 3660 3661 // Workaround! Compute the trip count of the original loop and cache it 3662 // before we start modifying the CFG. This code has a systemic problem 3663 // wherein it tries to run analysis over partially constructed IR; this is 3664 // wrong, and not simply for SCEV. The trip count of the original loop 3665 // simply happens to be prone to hitting this in practice. In theory, we 3666 // can hit the same issue for any SCEV, or ValueTracking query done during 3667 // mutation. See PR49900. 3668 getOrCreateTripCount(OrigLoop); 3669 3670 // Create an empty vector loop, and prepare basic blocks for the runtime 3671 // checks. 3672 Loop *Lp = createVectorLoopSkeleton(""); 3673 3674 // Now, compare the new count to zero. If it is zero skip the vector loop and 3675 // jump to the scalar loop. This check also covers the case where the 3676 // backedge-taken count is uint##_max: adding one to it will overflow leading 3677 // to an incorrect trip count of zero. In this (rare) case we will also jump 3678 // to the scalar loop. 3679 emitMinimumIterationCountCheck(Lp, LoopScalarPreHeader); 3680 3681 // Generate the code to check any assumptions that we've made for SCEV 3682 // expressions. 3683 emitSCEVChecks(Lp, LoopScalarPreHeader); 3684 3685 // Generate the code that checks in runtime if arrays overlap. We put the 3686 // checks into a separate block to make the more common case of few elements 3687 // faster. 3688 emitMemRuntimeChecks(Lp, LoopScalarPreHeader); 3689 3690 // Some loops have a single integer induction variable, while other loops 3691 // don't. One example is c++ iterators that often have multiple pointer 3692 // induction variables. In the code below we also support a case where we 3693 // don't have a single induction variable. 3694 // 3695 // We try to obtain an induction variable from the original loop as hard 3696 // as possible. However if we don't find one that: 3697 // - is an integer 3698 // - counts from zero, stepping by one 3699 // - is the size of the widest induction variable type 3700 // then we create a new one. 3701 OldInduction = Legal->getPrimaryInduction(); 3702 Type *IdxTy = Legal->getWidestInductionType(); 3703 Value *StartIdx = ConstantInt::get(IdxTy, 0); 3704 // The loop step is equal to the vectorization factor (num of SIMD elements) 3705 // times the unroll factor (num of SIMD instructions). 3706 Builder.SetInsertPoint(&*Lp->getHeader()->getFirstInsertionPt()); 3707 Value *Step = createStepForVF(Builder, ConstantInt::get(IdxTy, UF), VF); 3708 Value *CountRoundDown = getOrCreateVectorTripCount(Lp); 3709 Induction = 3710 createInductionVariable(Lp, StartIdx, CountRoundDown, Step, 3711 getDebugLocFromInstOrOperands(OldInduction)); 3712 3713 // Emit phis for the new starting index of the scalar loop. 3714 createInductionResumeValues(Lp, CountRoundDown); 3715 3716 return completeLoopSkeleton(Lp, OrigLoopID); 3717 } 3718 3719 // Fix up external users of the induction variable. At this point, we are 3720 // in LCSSA form, with all external PHIs that use the IV having one input value, 3721 // coming from the remainder loop. We need those PHIs to also have a correct 3722 // value for the IV when arriving directly from the middle block. 3723 void InnerLoopVectorizer::fixupIVUsers(PHINode *OrigPhi, 3724 const InductionDescriptor &II, 3725 Value *CountRoundDown, Value *EndValue, 3726 BasicBlock *MiddleBlock) { 3727 // There are two kinds of external IV usages - those that use the value 3728 // computed in the last iteration (the PHI) and those that use the penultimate 3729 // value (the value that feeds into the phi from the loop latch). 3730 // We allow both, but they, obviously, have different values. 3731 3732 assert(OrigLoop->getUniqueExitBlock() && "Expected a single exit block"); 3733 3734 DenseMap<Value *, Value *> MissingVals; 3735 3736 // An external user of the last iteration's value should see the value that 3737 // the remainder loop uses to initialize its own IV. 3738 Value *PostInc = OrigPhi->getIncomingValueForBlock(OrigLoop->getLoopLatch()); 3739 for (User *U : PostInc->users()) { 3740 Instruction *UI = cast<Instruction>(U); 3741 if (!OrigLoop->contains(UI)) { 3742 assert(isa<PHINode>(UI) && "Expected LCSSA form"); 3743 MissingVals[UI] = EndValue; 3744 } 3745 } 3746 3747 // An external user of the penultimate value need to see EndValue - Step. 3748 // The simplest way to get this is to recompute it from the constituent SCEVs, 3749 // that is Start + (Step * (CRD - 1)). 3750 for (User *U : OrigPhi->users()) { 3751 auto *UI = cast<Instruction>(U); 3752 if (!OrigLoop->contains(UI)) { 3753 const DataLayout &DL = 3754 OrigLoop->getHeader()->getModule()->getDataLayout(); 3755 assert(isa<PHINode>(UI) && "Expected LCSSA form"); 3756 3757 IRBuilder<> B(MiddleBlock->getTerminator()); 3758 3759 // Fast-math-flags propagate from the original induction instruction. 3760 if (II.getInductionBinOp() && isa<FPMathOperator>(II.getInductionBinOp())) 3761 B.setFastMathFlags(II.getInductionBinOp()->getFastMathFlags()); 3762 3763 Value *CountMinusOne = B.CreateSub( 3764 CountRoundDown, ConstantInt::get(CountRoundDown->getType(), 1)); 3765 Value *CMO = 3766 !II.getStep()->getType()->isIntegerTy() 3767 ? B.CreateCast(Instruction::SIToFP, CountMinusOne, 3768 II.getStep()->getType()) 3769 : B.CreateSExtOrTrunc(CountMinusOne, II.getStep()->getType()); 3770 CMO->setName("cast.cmo"); 3771 Value *Escape = emitTransformedIndex(B, CMO, PSE.getSE(), DL, II); 3772 Escape->setName("ind.escape"); 3773 MissingVals[UI] = Escape; 3774 } 3775 } 3776 3777 for (auto &I : MissingVals) { 3778 PHINode *PHI = cast<PHINode>(I.first); 3779 // One corner case we have to handle is two IVs "chasing" each-other, 3780 // that is %IV2 = phi [...], [ %IV1, %latch ] 3781 // In this case, if IV1 has an external use, we need to avoid adding both 3782 // "last value of IV1" and "penultimate value of IV2". So, verify that we 3783 // don't already have an incoming value for the middle block. 3784 if (PHI->getBasicBlockIndex(MiddleBlock) == -1) 3785 PHI->addIncoming(I.second, MiddleBlock); 3786 } 3787 } 3788 3789 namespace { 3790 3791 struct CSEDenseMapInfo { 3792 static bool canHandle(const Instruction *I) { 3793 return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) || 3794 isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I); 3795 } 3796 3797 static inline Instruction *getEmptyKey() { 3798 return DenseMapInfo<Instruction *>::getEmptyKey(); 3799 } 3800 3801 static inline Instruction *getTombstoneKey() { 3802 return DenseMapInfo<Instruction *>::getTombstoneKey(); 3803 } 3804 3805 static unsigned getHashValue(const Instruction *I) { 3806 assert(canHandle(I) && "Unknown instruction!"); 3807 return hash_combine(I->getOpcode(), hash_combine_range(I->value_op_begin(), 3808 I->value_op_end())); 3809 } 3810 3811 static bool isEqual(const Instruction *LHS, const Instruction *RHS) { 3812 if (LHS == getEmptyKey() || RHS == getEmptyKey() || 3813 LHS == getTombstoneKey() || RHS == getTombstoneKey()) 3814 return LHS == RHS; 3815 return LHS->isIdenticalTo(RHS); 3816 } 3817 }; 3818 3819 } // end anonymous namespace 3820 3821 ///Perform cse of induction variable instructions. 3822 static void cse(BasicBlock *BB) { 3823 // Perform simple cse. 3824 SmallDenseMap<Instruction *, Instruction *, 4, CSEDenseMapInfo> CSEMap; 3825 for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) { 3826 Instruction *In = &*I++; 3827 3828 if (!CSEDenseMapInfo::canHandle(In)) 3829 continue; 3830 3831 // Check if we can replace this instruction with any of the 3832 // visited instructions. 3833 if (Instruction *V = CSEMap.lookup(In)) { 3834 In->replaceAllUsesWith(V); 3835 In->eraseFromParent(); 3836 continue; 3837 } 3838 3839 CSEMap[In] = In; 3840 } 3841 } 3842 3843 InstructionCost 3844 LoopVectorizationCostModel::getVectorCallCost(CallInst *CI, ElementCount VF, 3845 bool &NeedToScalarize) const { 3846 Function *F = CI->getCalledFunction(); 3847 Type *ScalarRetTy = CI->getType(); 3848 SmallVector<Type *, 4> Tys, ScalarTys; 3849 for (auto &ArgOp : CI->arg_operands()) 3850 ScalarTys.push_back(ArgOp->getType()); 3851 3852 // Estimate cost of scalarized vector call. The source operands are assumed 3853 // to be vectors, so we need to extract individual elements from there, 3854 // execute VF scalar calls, and then gather the result into the vector return 3855 // value. 3856 InstructionCost ScalarCallCost = 3857 TTI.getCallInstrCost(F, ScalarRetTy, ScalarTys, TTI::TCK_RecipThroughput); 3858 if (VF.isScalar()) 3859 return ScalarCallCost; 3860 3861 // Compute corresponding vector type for return value and arguments. 3862 Type *RetTy = ToVectorTy(ScalarRetTy, VF); 3863 for (Type *ScalarTy : ScalarTys) 3864 Tys.push_back(ToVectorTy(ScalarTy, VF)); 3865 3866 // Compute costs of unpacking argument values for the scalar calls and 3867 // packing the return values to a vector. 3868 InstructionCost ScalarizationCost = getScalarizationOverhead(CI, VF); 3869 3870 InstructionCost Cost = 3871 ScalarCallCost * VF.getKnownMinValue() + ScalarizationCost; 3872 3873 // If we can't emit a vector call for this function, then the currently found 3874 // cost is the cost we need to return. 3875 NeedToScalarize = true; 3876 VFShape Shape = VFShape::get(*CI, VF, false /*HasGlobalPred*/); 3877 Function *VecFunc = VFDatabase(*CI).getVectorizedFunction(Shape); 3878 3879 if (!TLI || CI->isNoBuiltin() || !VecFunc) 3880 return Cost; 3881 3882 // If the corresponding vector cost is cheaper, return its cost. 3883 InstructionCost VectorCallCost = 3884 TTI.getCallInstrCost(nullptr, RetTy, Tys, TTI::TCK_RecipThroughput); 3885 if (VectorCallCost < Cost) { 3886 NeedToScalarize = false; 3887 Cost = VectorCallCost; 3888 } 3889 return Cost; 3890 } 3891 3892 static Type *MaybeVectorizeType(Type *Elt, ElementCount VF) { 3893 if (VF.isScalar() || (!Elt->isIntOrPtrTy() && !Elt->isFloatingPointTy())) 3894 return Elt; 3895 return VectorType::get(Elt, VF); 3896 } 3897 3898 InstructionCost 3899 LoopVectorizationCostModel::getVectorIntrinsicCost(CallInst *CI, 3900 ElementCount VF) const { 3901 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 3902 assert(ID && "Expected intrinsic call!"); 3903 Type *RetTy = MaybeVectorizeType(CI->getType(), VF); 3904 FastMathFlags FMF; 3905 if (auto *FPMO = dyn_cast<FPMathOperator>(CI)) 3906 FMF = FPMO->getFastMathFlags(); 3907 3908 SmallVector<const Value *> Arguments(CI->arg_begin(), CI->arg_end()); 3909 FunctionType *FTy = CI->getCalledFunction()->getFunctionType(); 3910 SmallVector<Type *> ParamTys; 3911 std::transform(FTy->param_begin(), FTy->param_end(), 3912 std::back_inserter(ParamTys), 3913 [&](Type *Ty) { return MaybeVectorizeType(Ty, VF); }); 3914 3915 IntrinsicCostAttributes CostAttrs(ID, RetTy, Arguments, ParamTys, FMF, 3916 dyn_cast<IntrinsicInst>(CI)); 3917 return TTI.getIntrinsicInstrCost(CostAttrs, 3918 TargetTransformInfo::TCK_RecipThroughput); 3919 } 3920 3921 static Type *smallestIntegerVectorType(Type *T1, Type *T2) { 3922 auto *I1 = cast<IntegerType>(cast<VectorType>(T1)->getElementType()); 3923 auto *I2 = cast<IntegerType>(cast<VectorType>(T2)->getElementType()); 3924 return I1->getBitWidth() < I2->getBitWidth() ? T1 : T2; 3925 } 3926 3927 static Type *largestIntegerVectorType(Type *T1, Type *T2) { 3928 auto *I1 = cast<IntegerType>(cast<VectorType>(T1)->getElementType()); 3929 auto *I2 = cast<IntegerType>(cast<VectorType>(T2)->getElementType()); 3930 return I1->getBitWidth() > I2->getBitWidth() ? T1 : T2; 3931 } 3932 3933 void InnerLoopVectorizer::truncateToMinimalBitwidths(VPTransformState &State) { 3934 // For every instruction `I` in MinBWs, truncate the operands, create a 3935 // truncated version of `I` and reextend its result. InstCombine runs 3936 // later and will remove any ext/trunc pairs. 3937 SmallPtrSet<Value *, 4> Erased; 3938 for (const auto &KV : Cost->getMinimalBitwidths()) { 3939 // If the value wasn't vectorized, we must maintain the original scalar 3940 // type. The absence of the value from State indicates that it 3941 // wasn't vectorized. 3942 VPValue *Def = State.Plan->getVPValue(KV.first); 3943 if (!State.hasAnyVectorValue(Def)) 3944 continue; 3945 for (unsigned Part = 0; Part < UF; ++Part) { 3946 Value *I = State.get(Def, Part); 3947 if (Erased.count(I) || I->use_empty() || !isa<Instruction>(I)) 3948 continue; 3949 Type *OriginalTy = I->getType(); 3950 Type *ScalarTruncatedTy = 3951 IntegerType::get(OriginalTy->getContext(), KV.second); 3952 auto *TruncatedTy = FixedVectorType::get( 3953 ScalarTruncatedTy, 3954 cast<FixedVectorType>(OriginalTy)->getNumElements()); 3955 if (TruncatedTy == OriginalTy) 3956 continue; 3957 3958 IRBuilder<> B(cast<Instruction>(I)); 3959 auto ShrinkOperand = [&](Value *V) -> Value * { 3960 if (auto *ZI = dyn_cast<ZExtInst>(V)) 3961 if (ZI->getSrcTy() == TruncatedTy) 3962 return ZI->getOperand(0); 3963 return B.CreateZExtOrTrunc(V, TruncatedTy); 3964 }; 3965 3966 // The actual instruction modification depends on the instruction type, 3967 // unfortunately. 3968 Value *NewI = nullptr; 3969 if (auto *BO = dyn_cast<BinaryOperator>(I)) { 3970 NewI = B.CreateBinOp(BO->getOpcode(), ShrinkOperand(BO->getOperand(0)), 3971 ShrinkOperand(BO->getOperand(1))); 3972 3973 // Any wrapping introduced by shrinking this operation shouldn't be 3974 // considered undefined behavior. So, we can't unconditionally copy 3975 // arithmetic wrapping flags to NewI. 3976 cast<BinaryOperator>(NewI)->copyIRFlags(I, /*IncludeWrapFlags=*/false); 3977 } else if (auto *CI = dyn_cast<ICmpInst>(I)) { 3978 NewI = 3979 B.CreateICmp(CI->getPredicate(), ShrinkOperand(CI->getOperand(0)), 3980 ShrinkOperand(CI->getOperand(1))); 3981 } else if (auto *SI = dyn_cast<SelectInst>(I)) { 3982 NewI = B.CreateSelect(SI->getCondition(), 3983 ShrinkOperand(SI->getTrueValue()), 3984 ShrinkOperand(SI->getFalseValue())); 3985 } else if (auto *CI = dyn_cast<CastInst>(I)) { 3986 switch (CI->getOpcode()) { 3987 default: 3988 llvm_unreachable("Unhandled cast!"); 3989 case Instruction::Trunc: 3990 NewI = ShrinkOperand(CI->getOperand(0)); 3991 break; 3992 case Instruction::SExt: 3993 NewI = B.CreateSExtOrTrunc( 3994 CI->getOperand(0), 3995 smallestIntegerVectorType(OriginalTy, TruncatedTy)); 3996 break; 3997 case Instruction::ZExt: 3998 NewI = B.CreateZExtOrTrunc( 3999 CI->getOperand(0), 4000 smallestIntegerVectorType(OriginalTy, TruncatedTy)); 4001 break; 4002 } 4003 } else if (auto *SI = dyn_cast<ShuffleVectorInst>(I)) { 4004 auto Elements0 = cast<FixedVectorType>(SI->getOperand(0)->getType()) 4005 ->getNumElements(); 4006 auto *O0 = B.CreateZExtOrTrunc( 4007 SI->getOperand(0), 4008 FixedVectorType::get(ScalarTruncatedTy, Elements0)); 4009 auto Elements1 = cast<FixedVectorType>(SI->getOperand(1)->getType()) 4010 ->getNumElements(); 4011 auto *O1 = B.CreateZExtOrTrunc( 4012 SI->getOperand(1), 4013 FixedVectorType::get(ScalarTruncatedTy, Elements1)); 4014 4015 NewI = B.CreateShuffleVector(O0, O1, SI->getShuffleMask()); 4016 } else if (isa<LoadInst>(I) || isa<PHINode>(I)) { 4017 // Don't do anything with the operands, just extend the result. 4018 continue; 4019 } else if (auto *IE = dyn_cast<InsertElementInst>(I)) { 4020 auto Elements = cast<FixedVectorType>(IE->getOperand(0)->getType()) 4021 ->getNumElements(); 4022 auto *O0 = B.CreateZExtOrTrunc( 4023 IE->getOperand(0), 4024 FixedVectorType::get(ScalarTruncatedTy, Elements)); 4025 auto *O1 = B.CreateZExtOrTrunc(IE->getOperand(1), ScalarTruncatedTy); 4026 NewI = B.CreateInsertElement(O0, O1, IE->getOperand(2)); 4027 } else if (auto *EE = dyn_cast<ExtractElementInst>(I)) { 4028 auto Elements = cast<FixedVectorType>(EE->getOperand(0)->getType()) 4029 ->getNumElements(); 4030 auto *O0 = B.CreateZExtOrTrunc( 4031 EE->getOperand(0), 4032 FixedVectorType::get(ScalarTruncatedTy, Elements)); 4033 NewI = B.CreateExtractElement(O0, EE->getOperand(2)); 4034 } else { 4035 // If we don't know what to do, be conservative and don't do anything. 4036 continue; 4037 } 4038 4039 // Lastly, extend the result. 4040 NewI->takeName(cast<Instruction>(I)); 4041 Value *Res = B.CreateZExtOrTrunc(NewI, OriginalTy); 4042 I->replaceAllUsesWith(Res); 4043 cast<Instruction>(I)->eraseFromParent(); 4044 Erased.insert(I); 4045 State.reset(Def, Res, Part); 4046 } 4047 } 4048 4049 // We'll have created a bunch of ZExts that are now parentless. Clean up. 4050 for (const auto &KV : Cost->getMinimalBitwidths()) { 4051 // If the value wasn't vectorized, we must maintain the original scalar 4052 // type. The absence of the value from State indicates that it 4053 // wasn't vectorized. 4054 VPValue *Def = State.Plan->getVPValue(KV.first); 4055 if (!State.hasAnyVectorValue(Def)) 4056 continue; 4057 for (unsigned Part = 0; Part < UF; ++Part) { 4058 Value *I = State.get(Def, Part); 4059 ZExtInst *Inst = dyn_cast<ZExtInst>(I); 4060 if (Inst && Inst->use_empty()) { 4061 Value *NewI = Inst->getOperand(0); 4062 Inst->eraseFromParent(); 4063 State.reset(Def, NewI, Part); 4064 } 4065 } 4066 } 4067 } 4068 4069 void InnerLoopVectorizer::fixVectorizedLoop(VPTransformState &State) { 4070 // Insert truncates and extends for any truncated instructions as hints to 4071 // InstCombine. 4072 if (VF.isVector()) 4073 truncateToMinimalBitwidths(State); 4074 4075 // Fix widened non-induction PHIs by setting up the PHI operands. 4076 if (OrigPHIsToFix.size()) { 4077 assert(EnableVPlanNativePath && 4078 "Unexpected non-induction PHIs for fixup in non VPlan-native path"); 4079 fixNonInductionPHIs(State); 4080 } 4081 4082 // At this point every instruction in the original loop is widened to a 4083 // vector form. Now we need to fix the recurrences in the loop. These PHI 4084 // nodes are currently empty because we did not want to introduce cycles. 4085 // This is the second stage of vectorizing recurrences. 4086 fixCrossIterationPHIs(State); 4087 4088 // Forget the original basic block. 4089 PSE.getSE()->forgetLoop(OrigLoop); 4090 4091 // Fix-up external users of the induction variables. 4092 for (auto &Entry : Legal->getInductionVars()) 4093 fixupIVUsers(Entry.first, Entry.second, 4094 getOrCreateVectorTripCount(LI->getLoopFor(LoopVectorBody)), 4095 IVEndValues[Entry.first], LoopMiddleBlock); 4096 4097 fixLCSSAPHIs(State); 4098 for (Instruction *PI : PredicatedInstructions) 4099 sinkScalarOperands(&*PI); 4100 4101 // Remove redundant induction instructions. 4102 cse(LoopVectorBody); 4103 4104 // Set/update profile weights for the vector and remainder loops as original 4105 // loop iterations are now distributed among them. Note that original loop 4106 // represented by LoopScalarBody becomes remainder loop after vectorization. 4107 // 4108 // For cases like foldTailByMasking() and requiresScalarEpiloque() we may 4109 // end up getting slightly roughened result but that should be OK since 4110 // profile is not inherently precise anyway. Note also possible bypass of 4111 // vector code caused by legality checks is ignored, assigning all the weight 4112 // to the vector loop, optimistically. 4113 // 4114 // For scalable vectorization we can't know at compile time how many iterations 4115 // of the loop are handled in one vector iteration, so instead assume a pessimistic 4116 // vscale of '1'. 4117 setProfileInfoAfterUnrolling( 4118 LI->getLoopFor(LoopScalarBody), LI->getLoopFor(LoopVectorBody), 4119 LI->getLoopFor(LoopScalarBody), VF.getKnownMinValue() * UF); 4120 } 4121 4122 void InnerLoopVectorizer::fixCrossIterationPHIs(VPTransformState &State) { 4123 // In order to support recurrences we need to be able to vectorize Phi nodes. 4124 // Phi nodes have cycles, so we need to vectorize them in two stages. This is 4125 // stage #2: We now need to fix the recurrences by adding incoming edges to 4126 // the currently empty PHI nodes. At this point every instruction in the 4127 // original loop is widened to a vector form so we can use them to construct 4128 // the incoming edges. 4129 VPBasicBlock *Header = State.Plan->getEntry()->getEntryBasicBlock(); 4130 for (VPRecipeBase &R : Header->phis()) { 4131 auto *PhiR = dyn_cast<VPWidenPHIRecipe>(&R); 4132 if (!PhiR) 4133 continue; 4134 auto *OrigPhi = cast<PHINode>(PhiR->getUnderlyingValue()); 4135 if (PhiR->getRecurrenceDescriptor()) { 4136 fixReduction(PhiR, State); 4137 } else if (Legal->isFirstOrderRecurrence(OrigPhi)) 4138 fixFirstOrderRecurrence(PhiR, State); 4139 } 4140 } 4141 4142 void InnerLoopVectorizer::fixFirstOrderRecurrence(VPWidenPHIRecipe *PhiR, 4143 VPTransformState &State) { 4144 // This is the second phase of vectorizing first-order recurrences. An 4145 // overview of the transformation is described below. Suppose we have the 4146 // following loop. 4147 // 4148 // for (int i = 0; i < n; ++i) 4149 // b[i] = a[i] - a[i - 1]; 4150 // 4151 // There is a first-order recurrence on "a". For this loop, the shorthand 4152 // scalar IR looks like: 4153 // 4154 // scalar.ph: 4155 // s_init = a[-1] 4156 // br scalar.body 4157 // 4158 // scalar.body: 4159 // i = phi [0, scalar.ph], [i+1, scalar.body] 4160 // s1 = phi [s_init, scalar.ph], [s2, scalar.body] 4161 // s2 = a[i] 4162 // b[i] = s2 - s1 4163 // br cond, scalar.body, ... 4164 // 4165 // In this example, s1 is a recurrence because it's value depends on the 4166 // previous iteration. In the first phase of vectorization, we created a 4167 // temporary value for s1. We now complete the vectorization and produce the 4168 // shorthand vector IR shown below (for VF = 4, UF = 1). 4169 // 4170 // vector.ph: 4171 // v_init = vector(..., ..., ..., a[-1]) 4172 // br vector.body 4173 // 4174 // vector.body 4175 // i = phi [0, vector.ph], [i+4, vector.body] 4176 // v1 = phi [v_init, vector.ph], [v2, vector.body] 4177 // v2 = a[i, i+1, i+2, i+3]; 4178 // v3 = vector(v1(3), v2(0, 1, 2)) 4179 // b[i, i+1, i+2, i+3] = v2 - v3 4180 // br cond, vector.body, middle.block 4181 // 4182 // middle.block: 4183 // x = v2(3) 4184 // br scalar.ph 4185 // 4186 // scalar.ph: 4187 // s_init = phi [x, middle.block], [a[-1], otherwise] 4188 // br scalar.body 4189 // 4190 // After execution completes the vector loop, we extract the next value of 4191 // the recurrence (x) to use as the initial value in the scalar loop. 4192 4193 auto *ScalarInit = PhiR->getStartValue()->getLiveInIRValue(); 4194 4195 auto *IdxTy = Builder.getInt32Ty(); 4196 auto *One = ConstantInt::get(IdxTy, 1); 4197 4198 // Create a vector from the initial value. 4199 auto *VectorInit = ScalarInit; 4200 if (VF.isVector()) { 4201 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 4202 auto *RuntimeVF = getRuntimeVF(Builder, IdxTy, VF); 4203 auto *LastIdx = Builder.CreateSub(RuntimeVF, One); 4204 VectorInit = Builder.CreateInsertElement( 4205 PoisonValue::get(VectorType::get(VectorInit->getType(), VF)), 4206 VectorInit, LastIdx, "vector.recur.init"); 4207 } 4208 4209 VPValue *PreviousDef = PhiR->getBackedgeValue(); 4210 // We constructed a temporary phi node in the first phase of vectorization. 4211 // This phi node will eventually be deleted. 4212 Builder.SetInsertPoint(cast<Instruction>(State.get(PhiR, 0))); 4213 4214 // Create a phi node for the new recurrence. The current value will either be 4215 // the initial value inserted into a vector or loop-varying vector value. 4216 auto *VecPhi = Builder.CreatePHI(VectorInit->getType(), 2, "vector.recur"); 4217 VecPhi->addIncoming(VectorInit, LoopVectorPreHeader); 4218 4219 // Get the vectorized previous value of the last part UF - 1. It appears last 4220 // among all unrolled iterations, due to the order of their construction. 4221 Value *PreviousLastPart = State.get(PreviousDef, UF - 1); 4222 4223 // Find and set the insertion point after the previous value if it is an 4224 // instruction. 4225 BasicBlock::iterator InsertPt; 4226 // Note that the previous value may have been constant-folded so it is not 4227 // guaranteed to be an instruction in the vector loop. 4228 // FIXME: Loop invariant values do not form recurrences. We should deal with 4229 // them earlier. 4230 if (LI->getLoopFor(LoopVectorBody)->isLoopInvariant(PreviousLastPart)) 4231 InsertPt = LoopVectorBody->getFirstInsertionPt(); 4232 else { 4233 Instruction *PreviousInst = cast<Instruction>(PreviousLastPart); 4234 if (isa<PHINode>(PreviousLastPart)) 4235 // If the previous value is a phi node, we should insert after all the phi 4236 // nodes in the block containing the PHI to avoid breaking basic block 4237 // verification. Note that the basic block may be different to 4238 // LoopVectorBody, in case we predicate the loop. 4239 InsertPt = PreviousInst->getParent()->getFirstInsertionPt(); 4240 else 4241 InsertPt = ++PreviousInst->getIterator(); 4242 } 4243 Builder.SetInsertPoint(&*InsertPt); 4244 4245 // The vector from which to take the initial value for the current iteration 4246 // (actual or unrolled). Initially, this is the vector phi node. 4247 Value *Incoming = VecPhi; 4248 4249 // Shuffle the current and previous vector and update the vector parts. 4250 for (unsigned Part = 0; Part < UF; ++Part) { 4251 Value *PreviousPart = State.get(PreviousDef, Part); 4252 Value *PhiPart = State.get(PhiR, Part); 4253 auto *Shuffle = VF.isVector() 4254 ? Builder.CreateVectorSplice(Incoming, PreviousPart, -1) 4255 : Incoming; 4256 PhiPart->replaceAllUsesWith(Shuffle); 4257 cast<Instruction>(PhiPart)->eraseFromParent(); 4258 State.reset(PhiR, Shuffle, Part); 4259 Incoming = PreviousPart; 4260 } 4261 4262 // Fix the latch value of the new recurrence in the vector loop. 4263 VecPhi->addIncoming(Incoming, LI->getLoopFor(LoopVectorBody)->getLoopLatch()); 4264 4265 // Extract the last vector element in the middle block. This will be the 4266 // initial value for the recurrence when jumping to the scalar loop. 4267 auto *ExtractForScalar = Incoming; 4268 if (VF.isVector()) { 4269 Builder.SetInsertPoint(LoopMiddleBlock->getTerminator()); 4270 auto *RuntimeVF = getRuntimeVF(Builder, IdxTy, VF); 4271 auto *LastIdx = Builder.CreateSub(RuntimeVF, One); 4272 ExtractForScalar = Builder.CreateExtractElement(ExtractForScalar, LastIdx, 4273 "vector.recur.extract"); 4274 } 4275 // Extract the second last element in the middle block if the 4276 // Phi is used outside the loop. We need to extract the phi itself 4277 // and not the last element (the phi update in the current iteration). This 4278 // will be the value when jumping to the exit block from the LoopMiddleBlock, 4279 // when the scalar loop is not run at all. 4280 Value *ExtractForPhiUsedOutsideLoop = nullptr; 4281 if (VF.isVector()) { 4282 auto *RuntimeVF = getRuntimeVF(Builder, IdxTy, VF); 4283 auto *Idx = Builder.CreateSub(RuntimeVF, ConstantInt::get(IdxTy, 2)); 4284 ExtractForPhiUsedOutsideLoop = Builder.CreateExtractElement( 4285 Incoming, Idx, "vector.recur.extract.for.phi"); 4286 } else if (UF > 1) 4287 // When loop is unrolled without vectorizing, initialize 4288 // ExtractForPhiUsedOutsideLoop with the value just prior to unrolled value 4289 // of `Incoming`. This is analogous to the vectorized case above: extracting 4290 // the second last element when VF > 1. 4291 ExtractForPhiUsedOutsideLoop = State.get(PreviousDef, UF - 2); 4292 4293 // Fix the initial value of the original recurrence in the scalar loop. 4294 Builder.SetInsertPoint(&*LoopScalarPreHeader->begin()); 4295 PHINode *Phi = cast<PHINode>(PhiR->getUnderlyingValue()); 4296 auto *Start = Builder.CreatePHI(Phi->getType(), 2, "scalar.recur.init"); 4297 for (auto *BB : predecessors(LoopScalarPreHeader)) { 4298 auto *Incoming = BB == LoopMiddleBlock ? ExtractForScalar : ScalarInit; 4299 Start->addIncoming(Incoming, BB); 4300 } 4301 4302 Phi->setIncomingValueForBlock(LoopScalarPreHeader, Start); 4303 Phi->setName("scalar.recur"); 4304 4305 // Finally, fix users of the recurrence outside the loop. The users will need 4306 // either the last value of the scalar recurrence or the last value of the 4307 // vector recurrence we extracted in the middle block. Since the loop is in 4308 // LCSSA form, we just need to find all the phi nodes for the original scalar 4309 // recurrence in the exit block, and then add an edge for the middle block. 4310 // Note that LCSSA does not imply single entry when the original scalar loop 4311 // had multiple exiting edges (as we always run the last iteration in the 4312 // scalar epilogue); in that case, the exiting path through middle will be 4313 // dynamically dead and the value picked for the phi doesn't matter. 4314 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) 4315 if (any_of(LCSSAPhi.incoming_values(), 4316 [Phi](Value *V) { return V == Phi; })) 4317 LCSSAPhi.addIncoming(ExtractForPhiUsedOutsideLoop, LoopMiddleBlock); 4318 } 4319 4320 void InnerLoopVectorizer::fixReduction(VPWidenPHIRecipe *PhiR, 4321 VPTransformState &State) { 4322 PHINode *OrigPhi = cast<PHINode>(PhiR->getUnderlyingValue()); 4323 // Get it's reduction variable descriptor. 4324 assert(Legal->isReductionVariable(OrigPhi) && 4325 "Unable to find the reduction variable"); 4326 const RecurrenceDescriptor &RdxDesc = *PhiR->getRecurrenceDescriptor(); 4327 4328 RecurKind RK = RdxDesc.getRecurrenceKind(); 4329 TrackingVH<Value> ReductionStartValue = RdxDesc.getRecurrenceStartValue(); 4330 Instruction *LoopExitInst = RdxDesc.getLoopExitInstr(); 4331 setDebugLocFromInst(Builder, ReductionStartValue); 4332 bool IsInLoopReductionPhi = Cost->isInLoopReduction(OrigPhi); 4333 4334 VPValue *LoopExitInstDef = State.Plan->getVPValue(LoopExitInst); 4335 // This is the vector-clone of the value that leaves the loop. 4336 Type *VecTy = State.get(LoopExitInstDef, 0)->getType(); 4337 4338 // Wrap flags are in general invalid after vectorization, clear them. 4339 clearReductionWrapFlags(RdxDesc, State); 4340 4341 // Fix the vector-loop phi. 4342 4343 // Reductions do not have to start at zero. They can start with 4344 // any loop invariant values. 4345 BasicBlock *VectorLoopLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch(); 4346 4347 bool IsOrdered = IsInLoopReductionPhi && Cost->useOrderedReductions(RdxDesc); 4348 4349 for (unsigned Part = 0; Part < UF; ++Part) { 4350 if (IsOrdered && Part > 0) 4351 break; 4352 Value *VecRdxPhi = State.get(PhiR->getVPSingleValue(), Part); 4353 Value *Val = State.get(PhiR->getBackedgeValue(), Part); 4354 if (IsOrdered) 4355 Val = State.get(PhiR->getBackedgeValue(), UF - 1); 4356 4357 cast<PHINode>(VecRdxPhi)->addIncoming(Val, VectorLoopLatch); 4358 } 4359 4360 // Before each round, move the insertion point right between 4361 // the PHIs and the values we are going to write. 4362 // This allows us to write both PHINodes and the extractelement 4363 // instructions. 4364 Builder.SetInsertPoint(&*LoopMiddleBlock->getFirstInsertionPt()); 4365 4366 setDebugLocFromInst(Builder, LoopExitInst); 4367 4368 Type *PhiTy = OrigPhi->getType(); 4369 // If tail is folded by masking, the vector value to leave the loop should be 4370 // a Select choosing between the vectorized LoopExitInst and vectorized Phi, 4371 // instead of the former. For an inloop reduction the reduction will already 4372 // be predicated, and does not need to be handled here. 4373 if (Cost->foldTailByMasking() && !IsInLoopReductionPhi) { 4374 for (unsigned Part = 0; Part < UF; ++Part) { 4375 Value *VecLoopExitInst = State.get(LoopExitInstDef, Part); 4376 Value *Sel = nullptr; 4377 for (User *U : VecLoopExitInst->users()) { 4378 if (isa<SelectInst>(U)) { 4379 assert(!Sel && "Reduction exit feeding two selects"); 4380 Sel = U; 4381 } else 4382 assert(isa<PHINode>(U) && "Reduction exit must feed Phi's or select"); 4383 } 4384 assert(Sel && "Reduction exit feeds no select"); 4385 State.reset(LoopExitInstDef, Sel, Part); 4386 4387 // If the target can create a predicated operator for the reduction at no 4388 // extra cost in the loop (for example a predicated vadd), it can be 4389 // cheaper for the select to remain in the loop than be sunk out of it, 4390 // and so use the select value for the phi instead of the old 4391 // LoopExitValue. 4392 if (PreferPredicatedReductionSelect || 4393 TTI->preferPredicatedReductionSelect( 4394 RdxDesc.getOpcode(), PhiTy, 4395 TargetTransformInfo::ReductionFlags())) { 4396 auto *VecRdxPhi = 4397 cast<PHINode>(State.get(PhiR->getVPSingleValue(), Part)); 4398 VecRdxPhi->setIncomingValueForBlock( 4399 LI->getLoopFor(LoopVectorBody)->getLoopLatch(), Sel); 4400 } 4401 } 4402 } 4403 4404 // If the vector reduction can be performed in a smaller type, we truncate 4405 // then extend the loop exit value to enable InstCombine to evaluate the 4406 // entire expression in the smaller type. 4407 if (VF.isVector() && PhiTy != RdxDesc.getRecurrenceType()) { 4408 assert(!IsInLoopReductionPhi && "Unexpected truncated inloop reduction!"); 4409 Type *RdxVecTy = VectorType::get(RdxDesc.getRecurrenceType(), VF); 4410 Builder.SetInsertPoint( 4411 LI->getLoopFor(LoopVectorBody)->getLoopLatch()->getTerminator()); 4412 VectorParts RdxParts(UF); 4413 for (unsigned Part = 0; Part < UF; ++Part) { 4414 RdxParts[Part] = State.get(LoopExitInstDef, Part); 4415 Value *Trunc = Builder.CreateTrunc(RdxParts[Part], RdxVecTy); 4416 Value *Extnd = RdxDesc.isSigned() ? Builder.CreateSExt(Trunc, VecTy) 4417 : Builder.CreateZExt(Trunc, VecTy); 4418 for (Value::user_iterator UI = RdxParts[Part]->user_begin(); 4419 UI != RdxParts[Part]->user_end();) 4420 if (*UI != Trunc) { 4421 (*UI++)->replaceUsesOfWith(RdxParts[Part], Extnd); 4422 RdxParts[Part] = Extnd; 4423 } else { 4424 ++UI; 4425 } 4426 } 4427 Builder.SetInsertPoint(&*LoopMiddleBlock->getFirstInsertionPt()); 4428 for (unsigned Part = 0; Part < UF; ++Part) { 4429 RdxParts[Part] = Builder.CreateTrunc(RdxParts[Part], RdxVecTy); 4430 State.reset(LoopExitInstDef, RdxParts[Part], Part); 4431 } 4432 } 4433 4434 // Reduce all of the unrolled parts into a single vector. 4435 Value *ReducedPartRdx = State.get(LoopExitInstDef, 0); 4436 unsigned Op = RecurrenceDescriptor::getOpcode(RK); 4437 4438 // The middle block terminator has already been assigned a DebugLoc here (the 4439 // OrigLoop's single latch terminator). We want the whole middle block to 4440 // appear to execute on this line because: (a) it is all compiler generated, 4441 // (b) these instructions are always executed after evaluating the latch 4442 // conditional branch, and (c) other passes may add new predecessors which 4443 // terminate on this line. This is the easiest way to ensure we don't 4444 // accidentally cause an extra step back into the loop while debugging. 4445 setDebugLocFromInst(Builder, LoopMiddleBlock->getTerminator()); 4446 if (IsOrdered) 4447 ReducedPartRdx = State.get(LoopExitInstDef, UF - 1); 4448 else { 4449 // Floating-point operations should have some FMF to enable the reduction. 4450 IRBuilderBase::FastMathFlagGuard FMFG(Builder); 4451 Builder.setFastMathFlags(RdxDesc.getFastMathFlags()); 4452 for (unsigned Part = 1; Part < UF; ++Part) { 4453 Value *RdxPart = State.get(LoopExitInstDef, Part); 4454 if (Op != Instruction::ICmp && Op != Instruction::FCmp) { 4455 ReducedPartRdx = Builder.CreateBinOp( 4456 (Instruction::BinaryOps)Op, RdxPart, ReducedPartRdx, "bin.rdx"); 4457 } else { 4458 ReducedPartRdx = createMinMaxOp(Builder, RK, ReducedPartRdx, RdxPart); 4459 } 4460 } 4461 } 4462 4463 // Create the reduction after the loop. Note that inloop reductions create the 4464 // target reduction in the loop using a Reduction recipe. 4465 if (VF.isVector() && !IsInLoopReductionPhi) { 4466 ReducedPartRdx = 4467 createTargetReduction(Builder, TTI, RdxDesc, ReducedPartRdx); 4468 // If the reduction can be performed in a smaller type, we need to extend 4469 // the reduction to the wider type before we branch to the original loop. 4470 if (PhiTy != RdxDesc.getRecurrenceType()) 4471 ReducedPartRdx = RdxDesc.isSigned() 4472 ? Builder.CreateSExt(ReducedPartRdx, PhiTy) 4473 : Builder.CreateZExt(ReducedPartRdx, PhiTy); 4474 } 4475 4476 // Create a phi node that merges control-flow from the backedge-taken check 4477 // block and the middle block. 4478 PHINode *BCBlockPhi = PHINode::Create(PhiTy, 2, "bc.merge.rdx", 4479 LoopScalarPreHeader->getTerminator()); 4480 for (unsigned I = 0, E = LoopBypassBlocks.size(); I != E; ++I) 4481 BCBlockPhi->addIncoming(ReductionStartValue, LoopBypassBlocks[I]); 4482 BCBlockPhi->addIncoming(ReducedPartRdx, LoopMiddleBlock); 4483 4484 // Now, we need to fix the users of the reduction variable 4485 // inside and outside of the scalar remainder loop. 4486 4487 // We know that the loop is in LCSSA form. We need to update the PHI nodes 4488 // in the exit blocks. See comment on analogous loop in 4489 // fixFirstOrderRecurrence for a more complete explaination of the logic. 4490 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) 4491 if (any_of(LCSSAPhi.incoming_values(), 4492 [LoopExitInst](Value *V) { return V == LoopExitInst; })) 4493 LCSSAPhi.addIncoming(ReducedPartRdx, LoopMiddleBlock); 4494 4495 // Fix the scalar loop reduction variable with the incoming reduction sum 4496 // from the vector body and from the backedge value. 4497 int IncomingEdgeBlockIdx = 4498 OrigPhi->getBasicBlockIndex(OrigLoop->getLoopLatch()); 4499 assert(IncomingEdgeBlockIdx >= 0 && "Invalid block index"); 4500 // Pick the other block. 4501 int SelfEdgeBlockIdx = (IncomingEdgeBlockIdx ? 0 : 1); 4502 OrigPhi->setIncomingValue(SelfEdgeBlockIdx, BCBlockPhi); 4503 OrigPhi->setIncomingValue(IncomingEdgeBlockIdx, LoopExitInst); 4504 } 4505 4506 void InnerLoopVectorizer::clearReductionWrapFlags(const RecurrenceDescriptor &RdxDesc, 4507 VPTransformState &State) { 4508 RecurKind RK = RdxDesc.getRecurrenceKind(); 4509 if (RK != RecurKind::Add && RK != RecurKind::Mul) 4510 return; 4511 4512 Instruction *LoopExitInstr = RdxDesc.getLoopExitInstr(); 4513 assert(LoopExitInstr && "null loop exit instruction"); 4514 SmallVector<Instruction *, 8> Worklist; 4515 SmallPtrSet<Instruction *, 8> Visited; 4516 Worklist.push_back(LoopExitInstr); 4517 Visited.insert(LoopExitInstr); 4518 4519 while (!Worklist.empty()) { 4520 Instruction *Cur = Worklist.pop_back_val(); 4521 if (isa<OverflowingBinaryOperator>(Cur)) 4522 for (unsigned Part = 0; Part < UF; ++Part) { 4523 Value *V = State.get(State.Plan->getVPValue(Cur), Part); 4524 cast<Instruction>(V)->dropPoisonGeneratingFlags(); 4525 } 4526 4527 for (User *U : Cur->users()) { 4528 Instruction *UI = cast<Instruction>(U); 4529 if ((Cur != LoopExitInstr || OrigLoop->contains(UI->getParent())) && 4530 Visited.insert(UI).second) 4531 Worklist.push_back(UI); 4532 } 4533 } 4534 } 4535 4536 void InnerLoopVectorizer::fixLCSSAPHIs(VPTransformState &State) { 4537 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) { 4538 if (LCSSAPhi.getBasicBlockIndex(LoopMiddleBlock) != -1) 4539 // Some phis were already hand updated by the reduction and recurrence 4540 // code above, leave them alone. 4541 continue; 4542 4543 auto *IncomingValue = LCSSAPhi.getIncomingValue(0); 4544 // Non-instruction incoming values will have only one value. 4545 4546 VPLane Lane = VPLane::getFirstLane(); 4547 if (isa<Instruction>(IncomingValue) && 4548 !Cost->isUniformAfterVectorization(cast<Instruction>(IncomingValue), 4549 VF)) 4550 Lane = VPLane::getLastLaneForVF(VF); 4551 4552 // Can be a loop invariant incoming value or the last scalar value to be 4553 // extracted from the vectorized loop. 4554 Builder.SetInsertPoint(LoopMiddleBlock->getTerminator()); 4555 Value *lastIncomingValue = 4556 OrigLoop->isLoopInvariant(IncomingValue) 4557 ? IncomingValue 4558 : State.get(State.Plan->getVPValue(IncomingValue), 4559 VPIteration(UF - 1, Lane)); 4560 LCSSAPhi.addIncoming(lastIncomingValue, LoopMiddleBlock); 4561 } 4562 } 4563 4564 void InnerLoopVectorizer::sinkScalarOperands(Instruction *PredInst) { 4565 // The basic block and loop containing the predicated instruction. 4566 auto *PredBB = PredInst->getParent(); 4567 auto *VectorLoop = LI->getLoopFor(PredBB); 4568 4569 // Initialize a worklist with the operands of the predicated instruction. 4570 SetVector<Value *> Worklist(PredInst->op_begin(), PredInst->op_end()); 4571 4572 // Holds instructions that we need to analyze again. An instruction may be 4573 // reanalyzed if we don't yet know if we can sink it or not. 4574 SmallVector<Instruction *, 8> InstsToReanalyze; 4575 4576 // Returns true if a given use occurs in the predicated block. Phi nodes use 4577 // their operands in their corresponding predecessor blocks. 4578 auto isBlockOfUsePredicated = [&](Use &U) -> bool { 4579 auto *I = cast<Instruction>(U.getUser()); 4580 BasicBlock *BB = I->getParent(); 4581 if (auto *Phi = dyn_cast<PHINode>(I)) 4582 BB = Phi->getIncomingBlock( 4583 PHINode::getIncomingValueNumForOperand(U.getOperandNo())); 4584 return BB == PredBB; 4585 }; 4586 4587 // Iteratively sink the scalarized operands of the predicated instruction 4588 // into the block we created for it. When an instruction is sunk, it's 4589 // operands are then added to the worklist. The algorithm ends after one pass 4590 // through the worklist doesn't sink a single instruction. 4591 bool Changed; 4592 do { 4593 // Add the instructions that need to be reanalyzed to the worklist, and 4594 // reset the changed indicator. 4595 Worklist.insert(InstsToReanalyze.begin(), InstsToReanalyze.end()); 4596 InstsToReanalyze.clear(); 4597 Changed = false; 4598 4599 while (!Worklist.empty()) { 4600 auto *I = dyn_cast<Instruction>(Worklist.pop_back_val()); 4601 4602 // We can't sink an instruction if it is a phi node, is not in the loop, 4603 // or may have side effects. 4604 if (!I || isa<PHINode>(I) || !VectorLoop->contains(I) || 4605 I->mayHaveSideEffects()) 4606 continue; 4607 4608 // If the instruction is already in PredBB, check if we can sink its 4609 // operands. In that case, VPlan's sinkScalarOperands() succeeded in 4610 // sinking the scalar instruction I, hence it appears in PredBB; but it 4611 // may have failed to sink I's operands (recursively), which we try 4612 // (again) here. 4613 if (I->getParent() == PredBB) { 4614 Worklist.insert(I->op_begin(), I->op_end()); 4615 continue; 4616 } 4617 4618 // It's legal to sink the instruction if all its uses occur in the 4619 // predicated block. Otherwise, there's nothing to do yet, and we may 4620 // need to reanalyze the instruction. 4621 if (!llvm::all_of(I->uses(), isBlockOfUsePredicated)) { 4622 InstsToReanalyze.push_back(I); 4623 continue; 4624 } 4625 4626 // Move the instruction to the beginning of the predicated block, and add 4627 // it's operands to the worklist. 4628 I->moveBefore(&*PredBB->getFirstInsertionPt()); 4629 Worklist.insert(I->op_begin(), I->op_end()); 4630 4631 // The sinking may have enabled other instructions to be sunk, so we will 4632 // need to iterate. 4633 Changed = true; 4634 } 4635 } while (Changed); 4636 } 4637 4638 void InnerLoopVectorizer::fixNonInductionPHIs(VPTransformState &State) { 4639 for (PHINode *OrigPhi : OrigPHIsToFix) { 4640 VPWidenPHIRecipe *VPPhi = 4641 cast<VPWidenPHIRecipe>(State.Plan->getVPValue(OrigPhi)); 4642 PHINode *NewPhi = cast<PHINode>(State.get(VPPhi, 0)); 4643 // Make sure the builder has a valid insert point. 4644 Builder.SetInsertPoint(NewPhi); 4645 for (unsigned i = 0; i < VPPhi->getNumOperands(); ++i) { 4646 VPValue *Inc = VPPhi->getIncomingValue(i); 4647 VPBasicBlock *VPBB = VPPhi->getIncomingBlock(i); 4648 NewPhi->addIncoming(State.get(Inc, 0), State.CFG.VPBB2IRBB[VPBB]); 4649 } 4650 } 4651 } 4652 4653 bool InnerLoopVectorizer::useOrderedReductions(RecurrenceDescriptor &RdxDesc) { 4654 return Cost->useOrderedReductions(RdxDesc); 4655 } 4656 4657 void InnerLoopVectorizer::widenGEP(GetElementPtrInst *GEP, VPValue *VPDef, 4658 VPUser &Operands, unsigned UF, 4659 ElementCount VF, bool IsPtrLoopInvariant, 4660 SmallBitVector &IsIndexLoopInvariant, 4661 VPTransformState &State) { 4662 // Construct a vector GEP by widening the operands of the scalar GEP as 4663 // necessary. We mark the vector GEP 'inbounds' if appropriate. A GEP 4664 // results in a vector of pointers when at least one operand of the GEP 4665 // is vector-typed. Thus, to keep the representation compact, we only use 4666 // vector-typed operands for loop-varying values. 4667 4668 if (VF.isVector() && IsPtrLoopInvariant && IsIndexLoopInvariant.all()) { 4669 // If we are vectorizing, but the GEP has only loop-invariant operands, 4670 // the GEP we build (by only using vector-typed operands for 4671 // loop-varying values) would be a scalar pointer. Thus, to ensure we 4672 // produce a vector of pointers, we need to either arbitrarily pick an 4673 // operand to broadcast, or broadcast a clone of the original GEP. 4674 // Here, we broadcast a clone of the original. 4675 // 4676 // TODO: If at some point we decide to scalarize instructions having 4677 // loop-invariant operands, this special case will no longer be 4678 // required. We would add the scalarization decision to 4679 // collectLoopScalars() and teach getVectorValue() to broadcast 4680 // the lane-zero scalar value. 4681 auto *Clone = Builder.Insert(GEP->clone()); 4682 for (unsigned Part = 0; Part < UF; ++Part) { 4683 Value *EntryPart = Builder.CreateVectorSplat(VF, Clone); 4684 State.set(VPDef, EntryPart, Part); 4685 addMetadata(EntryPart, GEP); 4686 } 4687 } else { 4688 // If the GEP has at least one loop-varying operand, we are sure to 4689 // produce a vector of pointers. But if we are only unrolling, we want 4690 // to produce a scalar GEP for each unroll part. Thus, the GEP we 4691 // produce with the code below will be scalar (if VF == 1) or vector 4692 // (otherwise). Note that for the unroll-only case, we still maintain 4693 // values in the vector mapping with initVector, as we do for other 4694 // instructions. 4695 for (unsigned Part = 0; Part < UF; ++Part) { 4696 // The pointer operand of the new GEP. If it's loop-invariant, we 4697 // won't broadcast it. 4698 auto *Ptr = IsPtrLoopInvariant 4699 ? State.get(Operands.getOperand(0), VPIteration(0, 0)) 4700 : State.get(Operands.getOperand(0), Part); 4701 4702 // Collect all the indices for the new GEP. If any index is 4703 // loop-invariant, we won't broadcast it. 4704 SmallVector<Value *, 4> Indices; 4705 for (unsigned I = 1, E = Operands.getNumOperands(); I < E; I++) { 4706 VPValue *Operand = Operands.getOperand(I); 4707 if (IsIndexLoopInvariant[I - 1]) 4708 Indices.push_back(State.get(Operand, VPIteration(0, 0))); 4709 else 4710 Indices.push_back(State.get(Operand, Part)); 4711 } 4712 4713 // Create the new GEP. Note that this GEP may be a scalar if VF == 1, 4714 // but it should be a vector, otherwise. 4715 auto *NewGEP = 4716 GEP->isInBounds() 4717 ? Builder.CreateInBoundsGEP(GEP->getSourceElementType(), Ptr, 4718 Indices) 4719 : Builder.CreateGEP(GEP->getSourceElementType(), Ptr, Indices); 4720 assert((VF.isScalar() || NewGEP->getType()->isVectorTy()) && 4721 "NewGEP is not a pointer vector"); 4722 State.set(VPDef, NewGEP, Part); 4723 addMetadata(NewGEP, GEP); 4724 } 4725 } 4726 } 4727 4728 void InnerLoopVectorizer::widenPHIInstruction(Instruction *PN, 4729 RecurrenceDescriptor *RdxDesc, 4730 VPWidenPHIRecipe *PhiR, 4731 VPTransformState &State) { 4732 PHINode *P = cast<PHINode>(PN); 4733 if (EnableVPlanNativePath) { 4734 // Currently we enter here in the VPlan-native path for non-induction 4735 // PHIs where all control flow is uniform. We simply widen these PHIs. 4736 // Create a vector phi with no operands - the vector phi operands will be 4737 // set at the end of vector code generation. 4738 Type *VecTy = (State.VF.isScalar()) 4739 ? PN->getType() 4740 : VectorType::get(PN->getType(), State.VF); 4741 Value *VecPhi = Builder.CreatePHI(VecTy, PN->getNumOperands(), "vec.phi"); 4742 State.set(PhiR, VecPhi, 0); 4743 OrigPHIsToFix.push_back(P); 4744 4745 return; 4746 } 4747 4748 assert(PN->getParent() == OrigLoop->getHeader() && 4749 "Non-header phis should have been handled elsewhere"); 4750 4751 // In order to support recurrences we need to be able to vectorize Phi nodes. 4752 // Phi nodes have cycles, so we need to vectorize them in two stages. This is 4753 // stage #1: We create a new vector PHI node with no incoming edges. We'll use 4754 // this value when we vectorize all of the instructions that use the PHI. 4755 if (RdxDesc || Legal->isFirstOrderRecurrence(P)) { 4756 bool ScalarPHI = 4757 (State.VF.isScalar()) || Cost->isInLoopReduction(cast<PHINode>(PN)); 4758 Type *VecTy = 4759 ScalarPHI ? PN->getType() : VectorType::get(PN->getType(), State.VF); 4760 4761 bool IsOrdered = Cost->isInLoopReduction(cast<PHINode>(PN)) && 4762 Cost->useOrderedReductions(*RdxDesc); 4763 unsigned LastPartForNewPhi = IsOrdered ? 1 : State.UF; 4764 for (unsigned Part = 0; Part < LastPartForNewPhi; ++Part) { 4765 Value *EntryPart = PHINode::Create( 4766 VecTy, 2, "vec.phi", &*LoopVectorBody->getFirstInsertionPt()); 4767 State.set(PhiR, EntryPart, Part); 4768 } 4769 if (Legal->isFirstOrderRecurrence(P)) 4770 return; 4771 VPValue *StartVPV = PhiR->getStartValue(); 4772 Value *StartV = StartVPV->getLiveInIRValue(); 4773 4774 Value *Iden = nullptr; 4775 4776 assert(Legal->isReductionVariable(P) && StartV && 4777 "RdxDesc should only be set for reduction variables; in that case " 4778 "a StartV is also required"); 4779 RecurKind RK = RdxDesc->getRecurrenceKind(); 4780 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(RK)) { 4781 // MinMax reduction have the start value as their identify. 4782 if (ScalarPHI) { 4783 Iden = StartV; 4784 } else { 4785 IRBuilderBase::InsertPointGuard IPBuilder(Builder); 4786 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 4787 StartV = Iden = 4788 Builder.CreateVectorSplat(State.VF, StartV, "minmax.ident"); 4789 } 4790 } else { 4791 Constant *IdenC = RecurrenceDescriptor::getRecurrenceIdentity( 4792 RK, VecTy->getScalarType(), RdxDesc->getFastMathFlags()); 4793 Iden = IdenC; 4794 4795 if (!ScalarPHI) { 4796 Iden = ConstantVector::getSplat(State.VF, IdenC); 4797 IRBuilderBase::InsertPointGuard IPBuilder(Builder); 4798 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 4799 Constant *Zero = Builder.getInt32(0); 4800 StartV = Builder.CreateInsertElement(Iden, StartV, Zero); 4801 } 4802 } 4803 4804 for (unsigned Part = 0; Part < LastPartForNewPhi; ++Part) { 4805 Value *EntryPart = State.get(PhiR, Part); 4806 // Make sure to add the reduction start value only to the 4807 // first unroll part. 4808 Value *StartVal = (Part == 0) ? StartV : Iden; 4809 cast<PHINode>(EntryPart)->addIncoming(StartVal, LoopVectorPreHeader); 4810 } 4811 4812 return; 4813 } 4814 4815 assert(!Legal->isReductionVariable(P) && 4816 "reductions should be handled above"); 4817 4818 setDebugLocFromInst(Builder, P); 4819 4820 // This PHINode must be an induction variable. 4821 // Make sure that we know about it. 4822 assert(Legal->getInductionVars().count(P) && "Not an induction variable"); 4823 4824 InductionDescriptor II = Legal->getInductionVars().lookup(P); 4825 const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout(); 4826 4827 // FIXME: The newly created binary instructions should contain nsw/nuw flags, 4828 // which can be found from the original scalar operations. 4829 switch (II.getKind()) { 4830 case InductionDescriptor::IK_NoInduction: 4831 llvm_unreachable("Unknown induction"); 4832 case InductionDescriptor::IK_IntInduction: 4833 case InductionDescriptor::IK_FpInduction: 4834 llvm_unreachable("Integer/fp induction is handled elsewhere."); 4835 case InductionDescriptor::IK_PtrInduction: { 4836 // Handle the pointer induction variable case. 4837 assert(P->getType()->isPointerTy() && "Unexpected type."); 4838 4839 if (Cost->isScalarAfterVectorization(P, State.VF)) { 4840 // This is the normalized GEP that starts counting at zero. 4841 Value *PtrInd = 4842 Builder.CreateSExtOrTrunc(Induction, II.getStep()->getType()); 4843 // Determine the number of scalars we need to generate for each unroll 4844 // iteration. If the instruction is uniform, we only need to generate the 4845 // first lane. Otherwise, we generate all VF values. 4846 bool IsUniform = Cost->isUniformAfterVectorization(P, State.VF); 4847 unsigned Lanes = IsUniform ? 1 : State.VF.getKnownMinValue(); 4848 4849 bool NeedsVectorIndex = !IsUniform && VF.isScalable(); 4850 Value *UnitStepVec = nullptr, *PtrIndSplat = nullptr; 4851 if (NeedsVectorIndex) { 4852 Type *VecIVTy = VectorType::get(PtrInd->getType(), VF); 4853 UnitStepVec = Builder.CreateStepVector(VecIVTy); 4854 PtrIndSplat = Builder.CreateVectorSplat(VF, PtrInd); 4855 } 4856 4857 for (unsigned Part = 0; Part < UF; ++Part) { 4858 Value *PartStart = createStepForVF( 4859 Builder, ConstantInt::get(PtrInd->getType(), Part), VF); 4860 4861 if (NeedsVectorIndex) { 4862 Value *PartStartSplat = Builder.CreateVectorSplat(VF, PartStart); 4863 Value *Indices = Builder.CreateAdd(PartStartSplat, UnitStepVec); 4864 Value *GlobalIndices = Builder.CreateAdd(PtrIndSplat, Indices); 4865 Value *SclrGep = 4866 emitTransformedIndex(Builder, GlobalIndices, PSE.getSE(), DL, II); 4867 SclrGep->setName("next.gep"); 4868 State.set(PhiR, SclrGep, Part); 4869 // We've cached the whole vector, which means we can support the 4870 // extraction of any lane. 4871 continue; 4872 } 4873 4874 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { 4875 Value *Idx = Builder.CreateAdd( 4876 PartStart, ConstantInt::get(PtrInd->getType(), Lane)); 4877 Value *GlobalIdx = Builder.CreateAdd(PtrInd, Idx); 4878 Value *SclrGep = 4879 emitTransformedIndex(Builder, GlobalIdx, PSE.getSE(), DL, II); 4880 SclrGep->setName("next.gep"); 4881 State.set(PhiR, SclrGep, VPIteration(Part, Lane)); 4882 } 4883 } 4884 return; 4885 } 4886 assert(isa<SCEVConstant>(II.getStep()) && 4887 "Induction step not a SCEV constant!"); 4888 Type *PhiType = II.getStep()->getType(); 4889 4890 // Build a pointer phi 4891 Value *ScalarStartValue = II.getStartValue(); 4892 Type *ScStValueType = ScalarStartValue->getType(); 4893 PHINode *NewPointerPhi = 4894 PHINode::Create(ScStValueType, 2, "pointer.phi", Induction); 4895 NewPointerPhi->addIncoming(ScalarStartValue, LoopVectorPreHeader); 4896 4897 // A pointer induction, performed by using a gep 4898 BasicBlock *LoopLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch(); 4899 Instruction *InductionLoc = LoopLatch->getTerminator(); 4900 const SCEV *ScalarStep = II.getStep(); 4901 SCEVExpander Exp(*PSE.getSE(), DL, "induction"); 4902 Value *ScalarStepValue = 4903 Exp.expandCodeFor(ScalarStep, PhiType, InductionLoc); 4904 Value *RuntimeVF = getRuntimeVF(Builder, PhiType, VF); 4905 Value *NumUnrolledElems = 4906 Builder.CreateMul(RuntimeVF, ConstantInt::get(PhiType, State.UF)); 4907 Value *InductionGEP = GetElementPtrInst::Create( 4908 ScStValueType->getPointerElementType(), NewPointerPhi, 4909 Builder.CreateMul(ScalarStepValue, NumUnrolledElems), "ptr.ind", 4910 InductionLoc); 4911 NewPointerPhi->addIncoming(InductionGEP, LoopLatch); 4912 4913 // Create UF many actual address geps that use the pointer 4914 // phi as base and a vectorized version of the step value 4915 // (<step*0, ..., step*N>) as offset. 4916 for (unsigned Part = 0; Part < State.UF; ++Part) { 4917 Type *VecPhiType = VectorType::get(PhiType, State.VF); 4918 Value *StartOffsetScalar = 4919 Builder.CreateMul(RuntimeVF, ConstantInt::get(PhiType, Part)); 4920 Value *StartOffset = 4921 Builder.CreateVectorSplat(State.VF, StartOffsetScalar); 4922 // Create a vector of consecutive numbers from zero to VF. 4923 StartOffset = 4924 Builder.CreateAdd(StartOffset, Builder.CreateStepVector(VecPhiType)); 4925 4926 Value *GEP = Builder.CreateGEP( 4927 ScStValueType->getPointerElementType(), NewPointerPhi, 4928 Builder.CreateMul( 4929 StartOffset, Builder.CreateVectorSplat(State.VF, ScalarStepValue), 4930 "vector.gep")); 4931 State.set(PhiR, GEP, Part); 4932 } 4933 } 4934 } 4935 } 4936 4937 /// A helper function for checking whether an integer division-related 4938 /// instruction may divide by zero (in which case it must be predicated if 4939 /// executed conditionally in the scalar code). 4940 /// TODO: It may be worthwhile to generalize and check isKnownNonZero(). 4941 /// Non-zero divisors that are non compile-time constants will not be 4942 /// converted into multiplication, so we will still end up scalarizing 4943 /// the division, but can do so w/o predication. 4944 static bool mayDivideByZero(Instruction &I) { 4945 assert((I.getOpcode() == Instruction::UDiv || 4946 I.getOpcode() == Instruction::SDiv || 4947 I.getOpcode() == Instruction::URem || 4948 I.getOpcode() == Instruction::SRem) && 4949 "Unexpected instruction"); 4950 Value *Divisor = I.getOperand(1); 4951 auto *CInt = dyn_cast<ConstantInt>(Divisor); 4952 return !CInt || CInt->isZero(); 4953 } 4954 4955 void InnerLoopVectorizer::widenInstruction(Instruction &I, VPValue *Def, 4956 VPUser &User, 4957 VPTransformState &State) { 4958 switch (I.getOpcode()) { 4959 case Instruction::Call: 4960 case Instruction::Br: 4961 case Instruction::PHI: 4962 case Instruction::GetElementPtr: 4963 case Instruction::Select: 4964 llvm_unreachable("This instruction is handled by a different recipe."); 4965 case Instruction::UDiv: 4966 case Instruction::SDiv: 4967 case Instruction::SRem: 4968 case Instruction::URem: 4969 case Instruction::Add: 4970 case Instruction::FAdd: 4971 case Instruction::Sub: 4972 case Instruction::FSub: 4973 case Instruction::FNeg: 4974 case Instruction::Mul: 4975 case Instruction::FMul: 4976 case Instruction::FDiv: 4977 case Instruction::FRem: 4978 case Instruction::Shl: 4979 case Instruction::LShr: 4980 case Instruction::AShr: 4981 case Instruction::And: 4982 case Instruction::Or: 4983 case Instruction::Xor: { 4984 // Just widen unops and binops. 4985 setDebugLocFromInst(Builder, &I); 4986 4987 for (unsigned Part = 0; Part < UF; ++Part) { 4988 SmallVector<Value *, 2> Ops; 4989 for (VPValue *VPOp : User.operands()) 4990 Ops.push_back(State.get(VPOp, Part)); 4991 4992 Value *V = Builder.CreateNAryOp(I.getOpcode(), Ops); 4993 4994 if (auto *VecOp = dyn_cast<Instruction>(V)) 4995 VecOp->copyIRFlags(&I); 4996 4997 // Use this vector value for all users of the original instruction. 4998 State.set(Def, V, Part); 4999 addMetadata(V, &I); 5000 } 5001 5002 break; 5003 } 5004 case Instruction::ICmp: 5005 case Instruction::FCmp: { 5006 // Widen compares. Generate vector compares. 5007 bool FCmp = (I.getOpcode() == Instruction::FCmp); 5008 auto *Cmp = cast<CmpInst>(&I); 5009 setDebugLocFromInst(Builder, Cmp); 5010 for (unsigned Part = 0; Part < UF; ++Part) { 5011 Value *A = State.get(User.getOperand(0), Part); 5012 Value *B = State.get(User.getOperand(1), Part); 5013 Value *C = nullptr; 5014 if (FCmp) { 5015 // Propagate fast math flags. 5016 IRBuilder<>::FastMathFlagGuard FMFG(Builder); 5017 Builder.setFastMathFlags(Cmp->getFastMathFlags()); 5018 C = Builder.CreateFCmp(Cmp->getPredicate(), A, B); 5019 } else { 5020 C = Builder.CreateICmp(Cmp->getPredicate(), A, B); 5021 } 5022 State.set(Def, C, Part); 5023 addMetadata(C, &I); 5024 } 5025 5026 break; 5027 } 5028 5029 case Instruction::ZExt: 5030 case Instruction::SExt: 5031 case Instruction::FPToUI: 5032 case Instruction::FPToSI: 5033 case Instruction::FPExt: 5034 case Instruction::PtrToInt: 5035 case Instruction::IntToPtr: 5036 case Instruction::SIToFP: 5037 case Instruction::UIToFP: 5038 case Instruction::Trunc: 5039 case Instruction::FPTrunc: 5040 case Instruction::BitCast: { 5041 auto *CI = cast<CastInst>(&I); 5042 setDebugLocFromInst(Builder, CI); 5043 5044 /// Vectorize casts. 5045 Type *DestTy = 5046 (VF.isScalar()) ? CI->getType() : VectorType::get(CI->getType(), VF); 5047 5048 for (unsigned Part = 0; Part < UF; ++Part) { 5049 Value *A = State.get(User.getOperand(0), Part); 5050 Value *Cast = Builder.CreateCast(CI->getOpcode(), A, DestTy); 5051 State.set(Def, Cast, Part); 5052 addMetadata(Cast, &I); 5053 } 5054 break; 5055 } 5056 default: 5057 // This instruction is not vectorized by simple widening. 5058 LLVM_DEBUG(dbgs() << "LV: Found an unhandled instruction: " << I); 5059 llvm_unreachable("Unhandled instruction!"); 5060 } // end of switch. 5061 } 5062 5063 void InnerLoopVectorizer::widenCallInstruction(CallInst &I, VPValue *Def, 5064 VPUser &ArgOperands, 5065 VPTransformState &State) { 5066 assert(!isa<DbgInfoIntrinsic>(I) && 5067 "DbgInfoIntrinsic should have been dropped during VPlan construction"); 5068 setDebugLocFromInst(Builder, &I); 5069 5070 Module *M = I.getParent()->getParent()->getParent(); 5071 auto *CI = cast<CallInst>(&I); 5072 5073 SmallVector<Type *, 4> Tys; 5074 for (Value *ArgOperand : CI->arg_operands()) 5075 Tys.push_back(ToVectorTy(ArgOperand->getType(), VF.getKnownMinValue())); 5076 5077 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 5078 5079 // The flag shows whether we use Intrinsic or a usual Call for vectorized 5080 // version of the instruction. 5081 // Is it beneficial to perform intrinsic call compared to lib call? 5082 bool NeedToScalarize = false; 5083 InstructionCost CallCost = Cost->getVectorCallCost(CI, VF, NeedToScalarize); 5084 InstructionCost IntrinsicCost = ID ? Cost->getVectorIntrinsicCost(CI, VF) : 0; 5085 bool UseVectorIntrinsic = ID && IntrinsicCost <= CallCost; 5086 assert((UseVectorIntrinsic || !NeedToScalarize) && 5087 "Instruction should be scalarized elsewhere."); 5088 assert((IntrinsicCost.isValid() || CallCost.isValid()) && 5089 "Either the intrinsic cost or vector call cost must be valid"); 5090 5091 for (unsigned Part = 0; Part < UF; ++Part) { 5092 SmallVector<Type *, 2> TysForDecl = {CI->getType()}; 5093 SmallVector<Value *, 4> Args; 5094 for (auto &I : enumerate(ArgOperands.operands())) { 5095 // Some intrinsics have a scalar argument - don't replace it with a 5096 // vector. 5097 Value *Arg; 5098 if (!UseVectorIntrinsic || !hasVectorInstrinsicScalarOpd(ID, I.index())) 5099 Arg = State.get(I.value(), Part); 5100 else { 5101 Arg = State.get(I.value(), VPIteration(0, 0)); 5102 if (hasVectorInstrinsicOverloadedScalarOpd(ID, I.index())) 5103 TysForDecl.push_back(Arg->getType()); 5104 } 5105 Args.push_back(Arg); 5106 } 5107 5108 Function *VectorF; 5109 if (UseVectorIntrinsic) { 5110 // Use vector version of the intrinsic. 5111 if (VF.isVector()) 5112 TysForDecl[0] = VectorType::get(CI->getType()->getScalarType(), VF); 5113 VectorF = Intrinsic::getDeclaration(M, ID, TysForDecl); 5114 assert(VectorF && "Can't retrieve vector intrinsic."); 5115 } else { 5116 // Use vector version of the function call. 5117 const VFShape Shape = VFShape::get(*CI, VF, false /*HasGlobalPred*/); 5118 #ifndef NDEBUG 5119 assert(VFDatabase(*CI).getVectorizedFunction(Shape) != nullptr && 5120 "Can't create vector function."); 5121 #endif 5122 VectorF = VFDatabase(*CI).getVectorizedFunction(Shape); 5123 } 5124 SmallVector<OperandBundleDef, 1> OpBundles; 5125 CI->getOperandBundlesAsDefs(OpBundles); 5126 CallInst *V = Builder.CreateCall(VectorF, Args, OpBundles); 5127 5128 if (isa<FPMathOperator>(V)) 5129 V->copyFastMathFlags(CI); 5130 5131 State.set(Def, V, Part); 5132 addMetadata(V, &I); 5133 } 5134 } 5135 5136 void InnerLoopVectorizer::widenSelectInstruction(SelectInst &I, VPValue *VPDef, 5137 VPUser &Operands, 5138 bool InvariantCond, 5139 VPTransformState &State) { 5140 setDebugLocFromInst(Builder, &I); 5141 5142 // The condition can be loop invariant but still defined inside the 5143 // loop. This means that we can't just use the original 'cond' value. 5144 // We have to take the 'vectorized' value and pick the first lane. 5145 // Instcombine will make this a no-op. 5146 auto *InvarCond = InvariantCond 5147 ? State.get(Operands.getOperand(0), VPIteration(0, 0)) 5148 : nullptr; 5149 5150 for (unsigned Part = 0; Part < UF; ++Part) { 5151 Value *Cond = 5152 InvarCond ? InvarCond : State.get(Operands.getOperand(0), Part); 5153 Value *Op0 = State.get(Operands.getOperand(1), Part); 5154 Value *Op1 = State.get(Operands.getOperand(2), Part); 5155 Value *Sel = Builder.CreateSelect(Cond, Op0, Op1); 5156 State.set(VPDef, Sel, Part); 5157 addMetadata(Sel, &I); 5158 } 5159 } 5160 5161 void LoopVectorizationCostModel::collectLoopScalars(ElementCount VF) { 5162 // We should not collect Scalars more than once per VF. Right now, this 5163 // function is called from collectUniformsAndScalars(), which already does 5164 // this check. Collecting Scalars for VF=1 does not make any sense. 5165 assert(VF.isVector() && Scalars.find(VF) == Scalars.end() && 5166 "This function should not be visited twice for the same VF"); 5167 5168 SmallSetVector<Instruction *, 8> Worklist; 5169 5170 // These sets are used to seed the analysis with pointers used by memory 5171 // accesses that will remain scalar. 5172 SmallSetVector<Instruction *, 8> ScalarPtrs; 5173 SmallPtrSet<Instruction *, 8> PossibleNonScalarPtrs; 5174 auto *Latch = TheLoop->getLoopLatch(); 5175 5176 // A helper that returns true if the use of Ptr by MemAccess will be scalar. 5177 // The pointer operands of loads and stores will be scalar as long as the 5178 // memory access is not a gather or scatter operation. The value operand of a 5179 // store will remain scalar if the store is scalarized. 5180 auto isScalarUse = [&](Instruction *MemAccess, Value *Ptr) { 5181 InstWidening WideningDecision = getWideningDecision(MemAccess, VF); 5182 assert(WideningDecision != CM_Unknown && 5183 "Widening decision should be ready at this moment"); 5184 if (auto *Store = dyn_cast<StoreInst>(MemAccess)) 5185 if (Ptr == Store->getValueOperand()) 5186 return WideningDecision == CM_Scalarize; 5187 assert(Ptr == getLoadStorePointerOperand(MemAccess) && 5188 "Ptr is neither a value or pointer operand"); 5189 return WideningDecision != CM_GatherScatter; 5190 }; 5191 5192 // A helper that returns true if the given value is a bitcast or 5193 // getelementptr instruction contained in the loop. 5194 auto isLoopVaryingBitCastOrGEP = [&](Value *V) { 5195 return ((isa<BitCastInst>(V) && V->getType()->isPointerTy()) || 5196 isa<GetElementPtrInst>(V)) && 5197 !TheLoop->isLoopInvariant(V); 5198 }; 5199 5200 auto isScalarPtrInduction = [&](Instruction *MemAccess, Value *Ptr) { 5201 if (!isa<PHINode>(Ptr) || 5202 !Legal->getInductionVars().count(cast<PHINode>(Ptr))) 5203 return false; 5204 auto &Induction = Legal->getInductionVars()[cast<PHINode>(Ptr)]; 5205 if (Induction.getKind() != InductionDescriptor::IK_PtrInduction) 5206 return false; 5207 return isScalarUse(MemAccess, Ptr); 5208 }; 5209 5210 // A helper that evaluates a memory access's use of a pointer. If the 5211 // pointer is actually the pointer induction of a loop, it is being 5212 // inserted into Worklist. If the use will be a scalar use, and the 5213 // pointer is only used by memory accesses, we place the pointer in 5214 // ScalarPtrs. Otherwise, the pointer is placed in PossibleNonScalarPtrs. 5215 auto evaluatePtrUse = [&](Instruction *MemAccess, Value *Ptr) { 5216 if (isScalarPtrInduction(MemAccess, Ptr)) { 5217 Worklist.insert(cast<Instruction>(Ptr)); 5218 Instruction *Update = cast<Instruction>( 5219 cast<PHINode>(Ptr)->getIncomingValueForBlock(Latch)); 5220 Worklist.insert(Update); 5221 LLVM_DEBUG(dbgs() << "LV: Found new scalar instruction: " << *Ptr 5222 << "\n"); 5223 LLVM_DEBUG(dbgs() << "LV: Found new scalar instruction: " << *Update 5224 << "\n"); 5225 return; 5226 } 5227 // We only care about bitcast and getelementptr instructions contained in 5228 // the loop. 5229 if (!isLoopVaryingBitCastOrGEP(Ptr)) 5230 return; 5231 5232 // If the pointer has already been identified as scalar (e.g., if it was 5233 // also identified as uniform), there's nothing to do. 5234 auto *I = cast<Instruction>(Ptr); 5235 if (Worklist.count(I)) 5236 return; 5237 5238 // If the use of the pointer will be a scalar use, and all users of the 5239 // pointer are memory accesses, place the pointer in ScalarPtrs. Otherwise, 5240 // place the pointer in PossibleNonScalarPtrs. 5241 if (isScalarUse(MemAccess, Ptr) && llvm::all_of(I->users(), [&](User *U) { 5242 return isa<LoadInst>(U) || isa<StoreInst>(U); 5243 })) 5244 ScalarPtrs.insert(I); 5245 else 5246 PossibleNonScalarPtrs.insert(I); 5247 }; 5248 5249 // We seed the scalars analysis with three classes of instructions: (1) 5250 // instructions marked uniform-after-vectorization and (2) bitcast, 5251 // getelementptr and (pointer) phi instructions used by memory accesses 5252 // requiring a scalar use. 5253 // 5254 // (1) Add to the worklist all instructions that have been identified as 5255 // uniform-after-vectorization. 5256 Worklist.insert(Uniforms[VF].begin(), Uniforms[VF].end()); 5257 5258 // (2) Add to the worklist all bitcast and getelementptr instructions used by 5259 // memory accesses requiring a scalar use. The pointer operands of loads and 5260 // stores will be scalar as long as the memory accesses is not a gather or 5261 // scatter operation. The value operand of a store will remain scalar if the 5262 // store is scalarized. 5263 for (auto *BB : TheLoop->blocks()) 5264 for (auto &I : *BB) { 5265 if (auto *Load = dyn_cast<LoadInst>(&I)) { 5266 evaluatePtrUse(Load, Load->getPointerOperand()); 5267 } else if (auto *Store = dyn_cast<StoreInst>(&I)) { 5268 evaluatePtrUse(Store, Store->getPointerOperand()); 5269 evaluatePtrUse(Store, Store->getValueOperand()); 5270 } 5271 } 5272 for (auto *I : ScalarPtrs) 5273 if (!PossibleNonScalarPtrs.count(I)) { 5274 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *I << "\n"); 5275 Worklist.insert(I); 5276 } 5277 5278 // Insert the forced scalars. 5279 // FIXME: Currently widenPHIInstruction() often creates a dead vector 5280 // induction variable when the PHI user is scalarized. 5281 auto ForcedScalar = ForcedScalars.find(VF); 5282 if (ForcedScalar != ForcedScalars.end()) 5283 for (auto *I : ForcedScalar->second) 5284 Worklist.insert(I); 5285 5286 // Expand the worklist by looking through any bitcasts and getelementptr 5287 // instructions we've already identified as scalar. This is similar to the 5288 // expansion step in collectLoopUniforms(); however, here we're only 5289 // expanding to include additional bitcasts and getelementptr instructions. 5290 unsigned Idx = 0; 5291 while (Idx != Worklist.size()) { 5292 Instruction *Dst = Worklist[Idx++]; 5293 if (!isLoopVaryingBitCastOrGEP(Dst->getOperand(0))) 5294 continue; 5295 auto *Src = cast<Instruction>(Dst->getOperand(0)); 5296 if (llvm::all_of(Src->users(), [&](User *U) -> bool { 5297 auto *J = cast<Instruction>(U); 5298 return !TheLoop->contains(J) || Worklist.count(J) || 5299 ((isa<LoadInst>(J) || isa<StoreInst>(J)) && 5300 isScalarUse(J, Src)); 5301 })) { 5302 Worklist.insert(Src); 5303 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Src << "\n"); 5304 } 5305 } 5306 5307 // An induction variable will remain scalar if all users of the induction 5308 // variable and induction variable update remain scalar. 5309 for (auto &Induction : Legal->getInductionVars()) { 5310 auto *Ind = Induction.first; 5311 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch)); 5312 5313 // If tail-folding is applied, the primary induction variable will be used 5314 // to feed a vector compare. 5315 if (Ind == Legal->getPrimaryInduction() && foldTailByMasking()) 5316 continue; 5317 5318 // Determine if all users of the induction variable are scalar after 5319 // vectorization. 5320 auto ScalarInd = llvm::all_of(Ind->users(), [&](User *U) -> bool { 5321 auto *I = cast<Instruction>(U); 5322 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I); 5323 }); 5324 if (!ScalarInd) 5325 continue; 5326 5327 // Determine if all users of the induction variable update instruction are 5328 // scalar after vectorization. 5329 auto ScalarIndUpdate = 5330 llvm::all_of(IndUpdate->users(), [&](User *U) -> bool { 5331 auto *I = cast<Instruction>(U); 5332 return I == Ind || !TheLoop->contains(I) || Worklist.count(I); 5333 }); 5334 if (!ScalarIndUpdate) 5335 continue; 5336 5337 // The induction variable and its update instruction will remain scalar. 5338 Worklist.insert(Ind); 5339 Worklist.insert(IndUpdate); 5340 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n"); 5341 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate 5342 << "\n"); 5343 } 5344 5345 Scalars[VF].insert(Worklist.begin(), Worklist.end()); 5346 } 5347 5348 bool LoopVectorizationCostModel::isScalarWithPredication(Instruction *I) const { 5349 if (!blockNeedsPredication(I->getParent())) 5350 return false; 5351 switch(I->getOpcode()) { 5352 default: 5353 break; 5354 case Instruction::Load: 5355 case Instruction::Store: { 5356 if (!Legal->isMaskRequired(I)) 5357 return false; 5358 auto *Ptr = getLoadStorePointerOperand(I); 5359 auto *Ty = getLoadStoreType(I); 5360 const Align Alignment = getLoadStoreAlignment(I); 5361 return isa<LoadInst>(I) ? !(isLegalMaskedLoad(Ty, Ptr, Alignment) || 5362 TTI.isLegalMaskedGather(Ty, Alignment)) 5363 : !(isLegalMaskedStore(Ty, Ptr, Alignment) || 5364 TTI.isLegalMaskedScatter(Ty, Alignment)); 5365 } 5366 case Instruction::UDiv: 5367 case Instruction::SDiv: 5368 case Instruction::SRem: 5369 case Instruction::URem: 5370 return mayDivideByZero(*I); 5371 } 5372 return false; 5373 } 5374 5375 bool LoopVectorizationCostModel::interleavedAccessCanBeWidened( 5376 Instruction *I, ElementCount VF) { 5377 assert(isAccessInterleaved(I) && "Expecting interleaved access."); 5378 assert(getWideningDecision(I, VF) == CM_Unknown && 5379 "Decision should not be set yet."); 5380 auto *Group = getInterleavedAccessGroup(I); 5381 assert(Group && "Must have a group."); 5382 5383 // If the instruction's allocated size doesn't equal it's type size, it 5384 // requires padding and will be scalarized. 5385 auto &DL = I->getModule()->getDataLayout(); 5386 auto *ScalarTy = getLoadStoreType(I); 5387 if (hasIrregularType(ScalarTy, DL)) 5388 return false; 5389 5390 // Check if masking is required. 5391 // A Group may need masking for one of two reasons: it resides in a block that 5392 // needs predication, or it was decided to use masking to deal with gaps. 5393 bool PredicatedAccessRequiresMasking = 5394 Legal->blockNeedsPredication(I->getParent()) && Legal->isMaskRequired(I); 5395 bool AccessWithGapsRequiresMasking = 5396 Group->requiresScalarEpilogue() && !isScalarEpilogueAllowed(); 5397 if (!PredicatedAccessRequiresMasking && !AccessWithGapsRequiresMasking) 5398 return true; 5399 5400 // If masked interleaving is required, we expect that the user/target had 5401 // enabled it, because otherwise it either wouldn't have been created or 5402 // it should have been invalidated by the CostModel. 5403 assert(useMaskedInterleavedAccesses(TTI) && 5404 "Masked interleave-groups for predicated accesses are not enabled."); 5405 5406 auto *Ty = getLoadStoreType(I); 5407 const Align Alignment = getLoadStoreAlignment(I); 5408 return isa<LoadInst>(I) ? TTI.isLegalMaskedLoad(Ty, Alignment) 5409 : TTI.isLegalMaskedStore(Ty, Alignment); 5410 } 5411 5412 bool LoopVectorizationCostModel::memoryInstructionCanBeWidened( 5413 Instruction *I, ElementCount VF) { 5414 // Get and ensure we have a valid memory instruction. 5415 LoadInst *LI = dyn_cast<LoadInst>(I); 5416 StoreInst *SI = dyn_cast<StoreInst>(I); 5417 assert((LI || SI) && "Invalid memory instruction"); 5418 5419 auto *Ptr = getLoadStorePointerOperand(I); 5420 5421 // In order to be widened, the pointer should be consecutive, first of all. 5422 if (!Legal->isConsecutivePtr(Ptr)) 5423 return false; 5424 5425 // If the instruction is a store located in a predicated block, it will be 5426 // scalarized. 5427 if (isScalarWithPredication(I)) 5428 return false; 5429 5430 // If the instruction's allocated size doesn't equal it's type size, it 5431 // requires padding and will be scalarized. 5432 auto &DL = I->getModule()->getDataLayout(); 5433 auto *ScalarTy = LI ? LI->getType() : SI->getValueOperand()->getType(); 5434 if (hasIrregularType(ScalarTy, DL)) 5435 return false; 5436 5437 return true; 5438 } 5439 5440 void LoopVectorizationCostModel::collectLoopUniforms(ElementCount VF) { 5441 // We should not collect Uniforms more than once per VF. Right now, 5442 // this function is called from collectUniformsAndScalars(), which 5443 // already does this check. Collecting Uniforms for VF=1 does not make any 5444 // sense. 5445 5446 assert(VF.isVector() && Uniforms.find(VF) == Uniforms.end() && 5447 "This function should not be visited twice for the same VF"); 5448 5449 // Visit the list of Uniforms. If we'll not find any uniform value, we'll 5450 // not analyze again. Uniforms.count(VF) will return 1. 5451 Uniforms[VF].clear(); 5452 5453 // We now know that the loop is vectorizable! 5454 // Collect instructions inside the loop that will remain uniform after 5455 // vectorization. 5456 5457 // Global values, params and instructions outside of current loop are out of 5458 // scope. 5459 auto isOutOfScope = [&](Value *V) -> bool { 5460 Instruction *I = dyn_cast<Instruction>(V); 5461 return (!I || !TheLoop->contains(I)); 5462 }; 5463 5464 SetVector<Instruction *> Worklist; 5465 BasicBlock *Latch = TheLoop->getLoopLatch(); 5466 5467 // Instructions that are scalar with predication must not be considered 5468 // uniform after vectorization, because that would create an erroneous 5469 // replicating region where only a single instance out of VF should be formed. 5470 // TODO: optimize such seldom cases if found important, see PR40816. 5471 auto addToWorklistIfAllowed = [&](Instruction *I) -> void { 5472 if (isOutOfScope(I)) { 5473 LLVM_DEBUG(dbgs() << "LV: Found not uniform due to scope: " 5474 << *I << "\n"); 5475 return; 5476 } 5477 if (isScalarWithPredication(I)) { 5478 LLVM_DEBUG(dbgs() << "LV: Found not uniform being ScalarWithPredication: " 5479 << *I << "\n"); 5480 return; 5481 } 5482 LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *I << "\n"); 5483 Worklist.insert(I); 5484 }; 5485 5486 // Start with the conditional branch. If the branch condition is an 5487 // instruction contained in the loop that is only used by the branch, it is 5488 // uniform. 5489 auto *Cmp = dyn_cast<Instruction>(Latch->getTerminator()->getOperand(0)); 5490 if (Cmp && TheLoop->contains(Cmp) && Cmp->hasOneUse()) 5491 addToWorklistIfAllowed(Cmp); 5492 5493 auto isUniformDecision = [&](Instruction *I, ElementCount VF) { 5494 InstWidening WideningDecision = getWideningDecision(I, VF); 5495 assert(WideningDecision != CM_Unknown && 5496 "Widening decision should be ready at this moment"); 5497 5498 // A uniform memory op is itself uniform. We exclude uniform stores 5499 // here as they demand the last lane, not the first one. 5500 if (isa<LoadInst>(I) && Legal->isUniformMemOp(*I)) { 5501 assert(WideningDecision == CM_Scalarize); 5502 return true; 5503 } 5504 5505 return (WideningDecision == CM_Widen || 5506 WideningDecision == CM_Widen_Reverse || 5507 WideningDecision == CM_Interleave); 5508 }; 5509 5510 5511 // Returns true if Ptr is the pointer operand of a memory access instruction 5512 // I, and I is known to not require scalarization. 5513 auto isVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool { 5514 return getLoadStorePointerOperand(I) == Ptr && isUniformDecision(I, VF); 5515 }; 5516 5517 // Holds a list of values which are known to have at least one uniform use. 5518 // Note that there may be other uses which aren't uniform. A "uniform use" 5519 // here is something which only demands lane 0 of the unrolled iterations; 5520 // it does not imply that all lanes produce the same value (e.g. this is not 5521 // the usual meaning of uniform) 5522 SetVector<Value *> HasUniformUse; 5523 5524 // Scan the loop for instructions which are either a) known to have only 5525 // lane 0 demanded or b) are uses which demand only lane 0 of their operand. 5526 for (auto *BB : TheLoop->blocks()) 5527 for (auto &I : *BB) { 5528 // If there's no pointer operand, there's nothing to do. 5529 auto *Ptr = getLoadStorePointerOperand(&I); 5530 if (!Ptr) 5531 continue; 5532 5533 // A uniform memory op is itself uniform. We exclude uniform stores 5534 // here as they demand the last lane, not the first one. 5535 if (isa<LoadInst>(I) && Legal->isUniformMemOp(I)) 5536 addToWorklistIfAllowed(&I); 5537 5538 if (isUniformDecision(&I, VF)) { 5539 assert(isVectorizedMemAccessUse(&I, Ptr) && "consistency check"); 5540 HasUniformUse.insert(Ptr); 5541 } 5542 } 5543 5544 // Add to the worklist any operands which have *only* uniform (e.g. lane 0 5545 // demanding) users. Since loops are assumed to be in LCSSA form, this 5546 // disallows uses outside the loop as well. 5547 for (auto *V : HasUniformUse) { 5548 if (isOutOfScope(V)) 5549 continue; 5550 auto *I = cast<Instruction>(V); 5551 auto UsersAreMemAccesses = 5552 llvm::all_of(I->users(), [&](User *U) -> bool { 5553 return isVectorizedMemAccessUse(cast<Instruction>(U), V); 5554 }); 5555 if (UsersAreMemAccesses) 5556 addToWorklistIfAllowed(I); 5557 } 5558 5559 // Expand Worklist in topological order: whenever a new instruction 5560 // is added , its users should be already inside Worklist. It ensures 5561 // a uniform instruction will only be used by uniform instructions. 5562 unsigned idx = 0; 5563 while (idx != Worklist.size()) { 5564 Instruction *I = Worklist[idx++]; 5565 5566 for (auto OV : I->operand_values()) { 5567 // isOutOfScope operands cannot be uniform instructions. 5568 if (isOutOfScope(OV)) 5569 continue; 5570 // First order recurrence Phi's should typically be considered 5571 // non-uniform. 5572 auto *OP = dyn_cast<PHINode>(OV); 5573 if (OP && Legal->isFirstOrderRecurrence(OP)) 5574 continue; 5575 // If all the users of the operand are uniform, then add the 5576 // operand into the uniform worklist. 5577 auto *OI = cast<Instruction>(OV); 5578 if (llvm::all_of(OI->users(), [&](User *U) -> bool { 5579 auto *J = cast<Instruction>(U); 5580 return Worklist.count(J) || isVectorizedMemAccessUse(J, OI); 5581 })) 5582 addToWorklistIfAllowed(OI); 5583 } 5584 } 5585 5586 // For an instruction to be added into Worklist above, all its users inside 5587 // the loop should also be in Worklist. However, this condition cannot be 5588 // true for phi nodes that form a cyclic dependence. We must process phi 5589 // nodes separately. An induction variable will remain uniform if all users 5590 // of the induction variable and induction variable update remain uniform. 5591 // The code below handles both pointer and non-pointer induction variables. 5592 for (auto &Induction : Legal->getInductionVars()) { 5593 auto *Ind = Induction.first; 5594 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch)); 5595 5596 // Determine if all users of the induction variable are uniform after 5597 // vectorization. 5598 auto UniformInd = llvm::all_of(Ind->users(), [&](User *U) -> bool { 5599 auto *I = cast<Instruction>(U); 5600 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) || 5601 isVectorizedMemAccessUse(I, Ind); 5602 }); 5603 if (!UniformInd) 5604 continue; 5605 5606 // Determine if all users of the induction variable update instruction are 5607 // uniform after vectorization. 5608 auto UniformIndUpdate = 5609 llvm::all_of(IndUpdate->users(), [&](User *U) -> bool { 5610 auto *I = cast<Instruction>(U); 5611 return I == Ind || !TheLoop->contains(I) || Worklist.count(I) || 5612 isVectorizedMemAccessUse(I, IndUpdate); 5613 }); 5614 if (!UniformIndUpdate) 5615 continue; 5616 5617 // The induction variable and its update instruction will remain uniform. 5618 addToWorklistIfAllowed(Ind); 5619 addToWorklistIfAllowed(IndUpdate); 5620 } 5621 5622 Uniforms[VF].insert(Worklist.begin(), Worklist.end()); 5623 } 5624 5625 bool LoopVectorizationCostModel::runtimeChecksRequired() { 5626 LLVM_DEBUG(dbgs() << "LV: Performing code size checks.\n"); 5627 5628 if (Legal->getRuntimePointerChecking()->Need) { 5629 reportVectorizationFailure("Runtime ptr check is required with -Os/-Oz", 5630 "runtime pointer checks needed. Enable vectorization of this " 5631 "loop with '#pragma clang loop vectorize(enable)' when " 5632 "compiling with -Os/-Oz", 5633 "CantVersionLoopWithOptForSize", ORE, TheLoop); 5634 return true; 5635 } 5636 5637 if (!PSE.getUnionPredicate().getPredicates().empty()) { 5638 reportVectorizationFailure("Runtime SCEV check is required with -Os/-Oz", 5639 "runtime SCEV checks needed. Enable vectorization of this " 5640 "loop with '#pragma clang loop vectorize(enable)' when " 5641 "compiling with -Os/-Oz", 5642 "CantVersionLoopWithOptForSize", ORE, TheLoop); 5643 return true; 5644 } 5645 5646 // FIXME: Avoid specializing for stride==1 instead of bailing out. 5647 if (!Legal->getLAI()->getSymbolicStrides().empty()) { 5648 reportVectorizationFailure("Runtime stride check for small trip count", 5649 "runtime stride == 1 checks needed. Enable vectorization of " 5650 "this loop without such check by compiling with -Os/-Oz", 5651 "CantVersionLoopWithOptForSize", ORE, TheLoop); 5652 return true; 5653 } 5654 5655 return false; 5656 } 5657 5658 ElementCount 5659 LoopVectorizationCostModel::getMaxLegalScalableVF(unsigned MaxSafeElements) { 5660 if (!TTI.supportsScalableVectors() && !ForceTargetSupportsScalableVectors) { 5661 reportVectorizationInfo( 5662 "Disabling scalable vectorization, because target does not " 5663 "support scalable vectors.", 5664 "ScalableVectorsUnsupported", ORE, TheLoop); 5665 return ElementCount::getScalable(0); 5666 } 5667 5668 if (Hints->isScalableVectorizationDisabled()) { 5669 reportVectorizationInfo("Scalable vectorization is explicitly disabled", 5670 "ScalableVectorizationDisabled", ORE, TheLoop); 5671 return ElementCount::getScalable(0); 5672 } 5673 5674 auto MaxScalableVF = ElementCount::getScalable( 5675 std::numeric_limits<ElementCount::ScalarTy>::max()); 5676 5677 // Disable scalable vectorization if the loop contains unsupported reductions. 5678 // Test that the loop-vectorizer can legalize all operations for this MaxVF. 5679 // FIXME: While for scalable vectors this is currently sufficient, this should 5680 // be replaced by a more detailed mechanism that filters out specific VFs, 5681 // instead of invalidating vectorization for a whole set of VFs based on the 5682 // MaxVF. 5683 if (!canVectorizeReductions(MaxScalableVF)) { 5684 reportVectorizationInfo( 5685 "Scalable vectorization not supported for the reduction " 5686 "operations found in this loop.", 5687 "ScalableVFUnfeasible", ORE, TheLoop); 5688 return ElementCount::getScalable(0); 5689 } 5690 5691 if (Legal->isSafeForAnyVectorWidth()) 5692 return MaxScalableVF; 5693 5694 // Limit MaxScalableVF by the maximum safe dependence distance. 5695 Optional<unsigned> MaxVScale = TTI.getMaxVScale(); 5696 MaxScalableVF = ElementCount::getScalable( 5697 MaxVScale ? (MaxSafeElements / MaxVScale.getValue()) : 0); 5698 if (!MaxScalableVF) 5699 reportVectorizationInfo( 5700 "Max legal vector width too small, scalable vectorization " 5701 "unfeasible.", 5702 "ScalableVFUnfeasible", ORE, TheLoop); 5703 5704 return MaxScalableVF; 5705 } 5706 5707 FixedScalableVFPair 5708 LoopVectorizationCostModel::computeFeasibleMaxVF(unsigned ConstTripCount, 5709 ElementCount UserVF) { 5710 MinBWs = computeMinimumValueSizes(TheLoop->getBlocks(), *DB, &TTI); 5711 unsigned SmallestType, WidestType; 5712 std::tie(SmallestType, WidestType) = getSmallestAndWidestTypes(); 5713 5714 // Get the maximum safe dependence distance in bits computed by LAA. 5715 // It is computed by MaxVF * sizeOf(type) * 8, where type is taken from 5716 // the memory accesses that is most restrictive (involved in the smallest 5717 // dependence distance). 5718 unsigned MaxSafeElements = 5719 PowerOf2Floor(Legal->getMaxSafeVectorWidthInBits() / WidestType); 5720 5721 auto MaxSafeFixedVF = ElementCount::getFixed(MaxSafeElements); 5722 auto MaxSafeScalableVF = getMaxLegalScalableVF(MaxSafeElements); 5723 5724 LLVM_DEBUG(dbgs() << "LV: The max safe fixed VF is: " << MaxSafeFixedVF 5725 << ".\n"); 5726 LLVM_DEBUG(dbgs() << "LV: The max safe scalable VF is: " << MaxSafeScalableVF 5727 << ".\n"); 5728 5729 // First analyze the UserVF, fall back if the UserVF should be ignored. 5730 if (UserVF) { 5731 auto MaxSafeUserVF = 5732 UserVF.isScalable() ? MaxSafeScalableVF : MaxSafeFixedVF; 5733 5734 if (ElementCount::isKnownLE(UserVF, MaxSafeUserVF)) 5735 return UserVF; 5736 5737 assert(ElementCount::isKnownGT(UserVF, MaxSafeUserVF)); 5738 5739 // Only clamp if the UserVF is not scalable. If the UserVF is scalable, it 5740 // is better to ignore the hint and let the compiler choose a suitable VF. 5741 if (!UserVF.isScalable()) { 5742 LLVM_DEBUG(dbgs() << "LV: User VF=" << UserVF 5743 << " is unsafe, clamping to max safe VF=" 5744 << MaxSafeFixedVF << ".\n"); 5745 ORE->emit([&]() { 5746 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationFactor", 5747 TheLoop->getStartLoc(), 5748 TheLoop->getHeader()) 5749 << "User-specified vectorization factor " 5750 << ore::NV("UserVectorizationFactor", UserVF) 5751 << " is unsafe, clamping to maximum safe vectorization factor " 5752 << ore::NV("VectorizationFactor", MaxSafeFixedVF); 5753 }); 5754 return MaxSafeFixedVF; 5755 } 5756 5757 LLVM_DEBUG(dbgs() << "LV: User VF=" << UserVF 5758 << " is unsafe. Ignoring scalable UserVF.\n"); 5759 ORE->emit([&]() { 5760 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationFactor", 5761 TheLoop->getStartLoc(), 5762 TheLoop->getHeader()) 5763 << "User-specified vectorization factor " 5764 << ore::NV("UserVectorizationFactor", UserVF) 5765 << " is unsafe. Ignoring the hint to let the compiler pick a " 5766 "suitable VF."; 5767 }); 5768 } 5769 5770 LLVM_DEBUG(dbgs() << "LV: The Smallest and Widest types: " << SmallestType 5771 << " / " << WidestType << " bits.\n"); 5772 5773 FixedScalableVFPair Result(ElementCount::getFixed(1), 5774 ElementCount::getScalable(0)); 5775 if (auto MaxVF = getMaximizedVFForTarget(ConstTripCount, SmallestType, 5776 WidestType, MaxSafeFixedVF)) 5777 Result.FixedVF = MaxVF; 5778 5779 if (auto MaxVF = getMaximizedVFForTarget(ConstTripCount, SmallestType, 5780 WidestType, MaxSafeScalableVF)) 5781 if (MaxVF.isScalable()) { 5782 Result.ScalableVF = MaxVF; 5783 LLVM_DEBUG(dbgs() << "LV: Found feasible scalable VF = " << MaxVF 5784 << "\n"); 5785 } 5786 5787 return Result; 5788 } 5789 5790 FixedScalableVFPair 5791 LoopVectorizationCostModel::computeMaxVF(ElementCount UserVF, unsigned UserIC) { 5792 if (Legal->getRuntimePointerChecking()->Need && TTI.hasBranchDivergence()) { 5793 // TODO: It may by useful to do since it's still likely to be dynamically 5794 // uniform if the target can skip. 5795 reportVectorizationFailure( 5796 "Not inserting runtime ptr check for divergent target", 5797 "runtime pointer checks needed. Not enabled for divergent target", 5798 "CantVersionLoopWithDivergentTarget", ORE, TheLoop); 5799 return FixedScalableVFPair::getNone(); 5800 } 5801 5802 unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop); 5803 LLVM_DEBUG(dbgs() << "LV: Found trip count: " << TC << '\n'); 5804 if (TC == 1) { 5805 reportVectorizationFailure("Single iteration (non) loop", 5806 "loop trip count is one, irrelevant for vectorization", 5807 "SingleIterationLoop", ORE, TheLoop); 5808 return FixedScalableVFPair::getNone(); 5809 } 5810 5811 switch (ScalarEpilogueStatus) { 5812 case CM_ScalarEpilogueAllowed: 5813 return computeFeasibleMaxVF(TC, UserVF); 5814 case CM_ScalarEpilogueNotAllowedUsePredicate: 5815 LLVM_FALLTHROUGH; 5816 case CM_ScalarEpilogueNotNeededUsePredicate: 5817 LLVM_DEBUG( 5818 dbgs() << "LV: vector predicate hint/switch found.\n" 5819 << "LV: Not allowing scalar epilogue, creating predicated " 5820 << "vector loop.\n"); 5821 break; 5822 case CM_ScalarEpilogueNotAllowedLowTripLoop: 5823 // fallthrough as a special case of OptForSize 5824 case CM_ScalarEpilogueNotAllowedOptSize: 5825 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotAllowedOptSize) 5826 LLVM_DEBUG( 5827 dbgs() << "LV: Not allowing scalar epilogue due to -Os/-Oz.\n"); 5828 else 5829 LLVM_DEBUG(dbgs() << "LV: Not allowing scalar epilogue due to low trip " 5830 << "count.\n"); 5831 5832 // Bail if runtime checks are required, which are not good when optimising 5833 // for size. 5834 if (runtimeChecksRequired()) 5835 return FixedScalableVFPair::getNone(); 5836 5837 break; 5838 } 5839 5840 // The only loops we can vectorize without a scalar epilogue, are loops with 5841 // a bottom-test and a single exiting block. We'd have to handle the fact 5842 // that not every instruction executes on the last iteration. This will 5843 // require a lane mask which varies through the vector loop body. (TODO) 5844 if (TheLoop->getExitingBlock() != TheLoop->getLoopLatch()) { 5845 // If there was a tail-folding hint/switch, but we can't fold the tail by 5846 // masking, fallback to a vectorization with a scalar epilogue. 5847 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotNeededUsePredicate) { 5848 LLVM_DEBUG(dbgs() << "LV: Cannot fold tail by masking: vectorize with a " 5849 "scalar epilogue instead.\n"); 5850 ScalarEpilogueStatus = CM_ScalarEpilogueAllowed; 5851 return computeFeasibleMaxVF(TC, UserVF); 5852 } 5853 return FixedScalableVFPair::getNone(); 5854 } 5855 5856 // Now try the tail folding 5857 5858 // Invalidate interleave groups that require an epilogue if we can't mask 5859 // the interleave-group. 5860 if (!useMaskedInterleavedAccesses(TTI)) { 5861 assert(WideningDecisions.empty() && Uniforms.empty() && Scalars.empty() && 5862 "No decisions should have been taken at this point"); 5863 // Note: There is no need to invalidate any cost modeling decisions here, as 5864 // non where taken so far. 5865 InterleaveInfo.invalidateGroupsRequiringScalarEpilogue(); 5866 } 5867 5868 FixedScalableVFPair MaxFactors = computeFeasibleMaxVF(TC, UserVF); 5869 // Avoid tail folding if the trip count is known to be a multiple of any VF 5870 // we chose. 5871 // FIXME: The condition below pessimises the case for fixed-width vectors, 5872 // when scalable VFs are also candidates for vectorization. 5873 if (MaxFactors.FixedVF.isVector() && !MaxFactors.ScalableVF) { 5874 ElementCount MaxFixedVF = MaxFactors.FixedVF; 5875 assert((UserVF.isNonZero() || isPowerOf2_32(MaxFixedVF.getFixedValue())) && 5876 "MaxFixedVF must be a power of 2"); 5877 unsigned MaxVFtimesIC = UserIC ? MaxFixedVF.getFixedValue() * UserIC 5878 : MaxFixedVF.getFixedValue(); 5879 ScalarEvolution *SE = PSE.getSE(); 5880 const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount(); 5881 const SCEV *ExitCount = SE->getAddExpr( 5882 BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType())); 5883 const SCEV *Rem = SE->getURemExpr( 5884 SE->applyLoopGuards(ExitCount, TheLoop), 5885 SE->getConstant(BackedgeTakenCount->getType(), MaxVFtimesIC)); 5886 if (Rem->isZero()) { 5887 // Accept MaxFixedVF if we do not have a tail. 5888 LLVM_DEBUG(dbgs() << "LV: No tail will remain for any chosen VF.\n"); 5889 return MaxFactors; 5890 } 5891 } 5892 5893 // If we don't know the precise trip count, or if the trip count that we 5894 // found modulo the vectorization factor is not zero, try to fold the tail 5895 // by masking. 5896 // FIXME: look for a smaller MaxVF that does divide TC rather than masking. 5897 if (Legal->prepareToFoldTailByMasking()) { 5898 FoldTailByMasking = true; 5899 return MaxFactors; 5900 } 5901 5902 // If there was a tail-folding hint/switch, but we can't fold the tail by 5903 // masking, fallback to a vectorization with a scalar epilogue. 5904 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotNeededUsePredicate) { 5905 LLVM_DEBUG(dbgs() << "LV: Cannot fold tail by masking: vectorize with a " 5906 "scalar epilogue instead.\n"); 5907 ScalarEpilogueStatus = CM_ScalarEpilogueAllowed; 5908 return MaxFactors; 5909 } 5910 5911 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotAllowedUsePredicate) { 5912 LLVM_DEBUG(dbgs() << "LV: Can't fold tail by masking: don't vectorize\n"); 5913 return FixedScalableVFPair::getNone(); 5914 } 5915 5916 if (TC == 0) { 5917 reportVectorizationFailure( 5918 "Unable to calculate the loop count due to complex control flow", 5919 "unable to calculate the loop count due to complex control flow", 5920 "UnknownLoopCountComplexCFG", ORE, TheLoop); 5921 return FixedScalableVFPair::getNone(); 5922 } 5923 5924 reportVectorizationFailure( 5925 "Cannot optimize for size and vectorize at the same time.", 5926 "cannot optimize for size and vectorize at the same time. " 5927 "Enable vectorization of this loop with '#pragma clang loop " 5928 "vectorize(enable)' when compiling with -Os/-Oz", 5929 "NoTailLoopWithOptForSize", ORE, TheLoop); 5930 return FixedScalableVFPair::getNone(); 5931 } 5932 5933 ElementCount LoopVectorizationCostModel::getMaximizedVFForTarget( 5934 unsigned ConstTripCount, unsigned SmallestType, unsigned WidestType, 5935 const ElementCount &MaxSafeVF) { 5936 bool ComputeScalableMaxVF = MaxSafeVF.isScalable(); 5937 TypeSize WidestRegister = TTI.getRegisterBitWidth( 5938 ComputeScalableMaxVF ? TargetTransformInfo::RGK_ScalableVector 5939 : TargetTransformInfo::RGK_FixedWidthVector); 5940 5941 // Convenience function to return the minimum of two ElementCounts. 5942 auto MinVF = [](const ElementCount &LHS, const ElementCount &RHS) { 5943 assert((LHS.isScalable() == RHS.isScalable()) && 5944 "Scalable flags must match"); 5945 return ElementCount::isKnownLT(LHS, RHS) ? LHS : RHS; 5946 }; 5947 5948 // Ensure MaxVF is a power of 2; the dependence distance bound may not be. 5949 // Note that both WidestRegister and WidestType may not be a powers of 2. 5950 auto MaxVectorElementCount = ElementCount::get( 5951 PowerOf2Floor(WidestRegister.getKnownMinSize() / WidestType), 5952 ComputeScalableMaxVF); 5953 MaxVectorElementCount = MinVF(MaxVectorElementCount, MaxSafeVF); 5954 LLVM_DEBUG(dbgs() << "LV: The Widest register safe to use is: " 5955 << (MaxVectorElementCount * WidestType) << " bits.\n"); 5956 5957 if (!MaxVectorElementCount) { 5958 LLVM_DEBUG(dbgs() << "LV: The target has no " 5959 << (ComputeScalableMaxVF ? "scalable" : "fixed") 5960 << " vector registers.\n"); 5961 return ElementCount::getFixed(1); 5962 } 5963 5964 const auto TripCountEC = ElementCount::getFixed(ConstTripCount); 5965 if (ConstTripCount && 5966 ElementCount::isKnownLE(TripCountEC, MaxVectorElementCount) && 5967 isPowerOf2_32(ConstTripCount)) { 5968 // We need to clamp the VF to be the ConstTripCount. There is no point in 5969 // choosing a higher viable VF as done in the loop below. If 5970 // MaxVectorElementCount is scalable, we only fall back on a fixed VF when 5971 // the TC is less than or equal to the known number of lanes. 5972 LLVM_DEBUG(dbgs() << "LV: Clamping the MaxVF to the constant trip count: " 5973 << ConstTripCount << "\n"); 5974 return TripCountEC; 5975 } 5976 5977 ElementCount MaxVF = MaxVectorElementCount; 5978 if (TTI.shouldMaximizeVectorBandwidth() || 5979 (MaximizeBandwidth && isScalarEpilogueAllowed())) { 5980 auto MaxVectorElementCountMaxBW = ElementCount::get( 5981 PowerOf2Floor(WidestRegister.getKnownMinSize() / SmallestType), 5982 ComputeScalableMaxVF); 5983 MaxVectorElementCountMaxBW = MinVF(MaxVectorElementCountMaxBW, MaxSafeVF); 5984 5985 // Collect all viable vectorization factors larger than the default MaxVF 5986 // (i.e. MaxVectorElementCount). 5987 SmallVector<ElementCount, 8> VFs; 5988 for (ElementCount VS = MaxVectorElementCount * 2; 5989 ElementCount::isKnownLE(VS, MaxVectorElementCountMaxBW); VS *= 2) 5990 VFs.push_back(VS); 5991 5992 // For each VF calculate its register usage. 5993 auto RUs = calculateRegisterUsage(VFs); 5994 5995 // Select the largest VF which doesn't require more registers than existing 5996 // ones. 5997 for (int i = RUs.size() - 1; i >= 0; --i) { 5998 bool Selected = true; 5999 for (auto &pair : RUs[i].MaxLocalUsers) { 6000 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(pair.first); 6001 if (pair.second > TargetNumRegisters) 6002 Selected = false; 6003 } 6004 if (Selected) { 6005 MaxVF = VFs[i]; 6006 break; 6007 } 6008 } 6009 if (ElementCount MinVF = 6010 TTI.getMinimumVF(SmallestType, ComputeScalableMaxVF)) { 6011 if (ElementCount::isKnownLT(MaxVF, MinVF)) { 6012 LLVM_DEBUG(dbgs() << "LV: Overriding calculated MaxVF(" << MaxVF 6013 << ") with target's minimum: " << MinVF << '\n'); 6014 MaxVF = MinVF; 6015 } 6016 } 6017 } 6018 return MaxVF; 6019 } 6020 6021 bool LoopVectorizationCostModel::isMoreProfitable( 6022 const VectorizationFactor &A, const VectorizationFactor &B) const { 6023 InstructionCost::CostType CostA = *A.Cost.getValue(); 6024 InstructionCost::CostType CostB = *B.Cost.getValue(); 6025 6026 unsigned MaxTripCount = PSE.getSE()->getSmallConstantMaxTripCount(TheLoop); 6027 6028 if (!A.Width.isScalable() && !B.Width.isScalable() && FoldTailByMasking && 6029 MaxTripCount) { 6030 // If we are folding the tail and the trip count is a known (possibly small) 6031 // constant, the trip count will be rounded up to an integer number of 6032 // iterations. The total cost will be PerIterationCost*ceil(TripCount/VF), 6033 // which we compare directly. When not folding the tail, the total cost will 6034 // be PerIterationCost*floor(TC/VF) + Scalar remainder cost, and so is 6035 // approximated with the per-lane cost below instead of using the tripcount 6036 // as here. 6037 int64_t RTCostA = CostA * divideCeil(MaxTripCount, A.Width.getFixedValue()); 6038 int64_t RTCostB = CostB * divideCeil(MaxTripCount, B.Width.getFixedValue()); 6039 return RTCostA < RTCostB; 6040 } 6041 6042 // When set to preferred, for now assume vscale may be larger than 1, so 6043 // that scalable vectorization is slightly favorable over fixed-width 6044 // vectorization. 6045 if (Hints->isScalableVectorizationPreferred()) 6046 if (A.Width.isScalable() && !B.Width.isScalable()) 6047 return (CostA * B.Width.getKnownMinValue()) <= 6048 (CostB * A.Width.getKnownMinValue()); 6049 6050 // To avoid the need for FP division: 6051 // (CostA / A.Width) < (CostB / B.Width) 6052 // <=> (CostA * B.Width) < (CostB * A.Width) 6053 return (CostA * B.Width.getKnownMinValue()) < 6054 (CostB * A.Width.getKnownMinValue()); 6055 } 6056 6057 VectorizationFactor LoopVectorizationCostModel::selectVectorizationFactor( 6058 const ElementCountSet &VFCandidates) { 6059 InstructionCost ExpectedCost = expectedCost(ElementCount::getFixed(1)).first; 6060 LLVM_DEBUG(dbgs() << "LV: Scalar loop costs: " << ExpectedCost << ".\n"); 6061 assert(ExpectedCost.isValid() && "Unexpected invalid cost for scalar loop"); 6062 assert(VFCandidates.count(ElementCount::getFixed(1)) && 6063 "Expected Scalar VF to be a candidate"); 6064 6065 const VectorizationFactor ScalarCost(ElementCount::getFixed(1), ExpectedCost); 6066 VectorizationFactor ChosenFactor = ScalarCost; 6067 6068 bool ForceVectorization = Hints->getForce() == LoopVectorizeHints::FK_Enabled; 6069 if (ForceVectorization && VFCandidates.size() > 1) { 6070 // Ignore scalar width, because the user explicitly wants vectorization. 6071 // Initialize cost to max so that VF = 2 is, at least, chosen during cost 6072 // evaluation. 6073 ChosenFactor.Cost = std::numeric_limits<InstructionCost::CostType>::max(); 6074 } 6075 6076 for (const auto &i : VFCandidates) { 6077 // The cost for scalar VF=1 is already calculated, so ignore it. 6078 if (i.isScalar()) 6079 continue; 6080 6081 // Notice that the vector loop needs to be executed less times, so 6082 // we need to divide the cost of the vector loops by the width of 6083 // the vector elements. 6084 VectorizationCostTy C = expectedCost(i); 6085 6086 assert(C.first.isValid() && "Unexpected invalid cost for vector loop"); 6087 VectorizationFactor Candidate(i, C.first); 6088 LLVM_DEBUG( 6089 dbgs() << "LV: Vector loop of width " << i << " costs: " 6090 << (*Candidate.Cost.getValue() / 6091 Candidate.Width.getKnownMinValue()) 6092 << (i.isScalable() ? " (assuming a minimum vscale of 1)" : "") 6093 << ".\n"); 6094 6095 if (!C.second && !ForceVectorization) { 6096 LLVM_DEBUG( 6097 dbgs() << "LV: Not considering vector loop of width " << i 6098 << " because it will not generate any vector instructions.\n"); 6099 continue; 6100 } 6101 6102 // If profitable add it to ProfitableVF list. 6103 if (isMoreProfitable(Candidate, ScalarCost)) 6104 ProfitableVFs.push_back(Candidate); 6105 6106 if (isMoreProfitable(Candidate, ChosenFactor)) 6107 ChosenFactor = Candidate; 6108 } 6109 6110 if (!EnableCondStoresVectorization && NumPredStores) { 6111 reportVectorizationFailure("There are conditional stores.", 6112 "store that is conditionally executed prevents vectorization", 6113 "ConditionalStore", ORE, TheLoop); 6114 ChosenFactor = ScalarCost; 6115 } 6116 6117 LLVM_DEBUG(if (ForceVectorization && !ChosenFactor.Width.isScalar() && 6118 *ChosenFactor.Cost.getValue() >= *ScalarCost.Cost.getValue()) 6119 dbgs() 6120 << "LV: Vectorization seems to be not beneficial, " 6121 << "but was forced by a user.\n"); 6122 LLVM_DEBUG(dbgs() << "LV: Selecting VF: " << ChosenFactor.Width << ".\n"); 6123 return ChosenFactor; 6124 } 6125 6126 bool LoopVectorizationCostModel::isCandidateForEpilogueVectorization( 6127 const Loop &L, ElementCount VF) const { 6128 // Cross iteration phis such as reductions need special handling and are 6129 // currently unsupported. 6130 if (any_of(L.getHeader()->phis(), [&](PHINode &Phi) { 6131 return Legal->isFirstOrderRecurrence(&Phi) || 6132 Legal->isReductionVariable(&Phi); 6133 })) 6134 return false; 6135 6136 // Phis with uses outside of the loop require special handling and are 6137 // currently unsupported. 6138 for (auto &Entry : Legal->getInductionVars()) { 6139 // Look for uses of the value of the induction at the last iteration. 6140 Value *PostInc = Entry.first->getIncomingValueForBlock(L.getLoopLatch()); 6141 for (User *U : PostInc->users()) 6142 if (!L.contains(cast<Instruction>(U))) 6143 return false; 6144 // Look for uses of penultimate value of the induction. 6145 for (User *U : Entry.first->users()) 6146 if (!L.contains(cast<Instruction>(U))) 6147 return false; 6148 } 6149 6150 // Induction variables that are widened require special handling that is 6151 // currently not supported. 6152 if (any_of(Legal->getInductionVars(), [&](auto &Entry) { 6153 return !(this->isScalarAfterVectorization(Entry.first, VF) || 6154 this->isProfitableToScalarize(Entry.first, VF)); 6155 })) 6156 return false; 6157 6158 return true; 6159 } 6160 6161 bool LoopVectorizationCostModel::isEpilogueVectorizationProfitable( 6162 const ElementCount VF) const { 6163 // FIXME: We need a much better cost-model to take different parameters such 6164 // as register pressure, code size increase and cost of extra branches into 6165 // account. For now we apply a very crude heuristic and only consider loops 6166 // with vectorization factors larger than a certain value. 6167 // We also consider epilogue vectorization unprofitable for targets that don't 6168 // consider interleaving beneficial (eg. MVE). 6169 if (TTI.getMaxInterleaveFactor(VF.getKnownMinValue()) <= 1) 6170 return false; 6171 if (VF.getFixedValue() >= EpilogueVectorizationMinVF) 6172 return true; 6173 return false; 6174 } 6175 6176 VectorizationFactor 6177 LoopVectorizationCostModel::selectEpilogueVectorizationFactor( 6178 const ElementCount MainLoopVF, const LoopVectorizationPlanner &LVP) { 6179 VectorizationFactor Result = VectorizationFactor::Disabled(); 6180 if (!EnableEpilogueVectorization) { 6181 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization is disabled.\n";); 6182 return Result; 6183 } 6184 6185 if (!isScalarEpilogueAllowed()) { 6186 LLVM_DEBUG( 6187 dbgs() << "LEV: Unable to vectorize epilogue because no epilogue is " 6188 "allowed.\n";); 6189 return Result; 6190 } 6191 6192 // FIXME: This can be fixed for scalable vectors later, because at this stage 6193 // the LoopVectorizer will only consider vectorizing a loop with scalable 6194 // vectors when the loop has a hint to enable vectorization for a given VF. 6195 if (MainLoopVF.isScalable()) { 6196 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization for scalable vectors not " 6197 "yet supported.\n"); 6198 return Result; 6199 } 6200 6201 // Not really a cost consideration, but check for unsupported cases here to 6202 // simplify the logic. 6203 if (!isCandidateForEpilogueVectorization(*TheLoop, MainLoopVF)) { 6204 LLVM_DEBUG( 6205 dbgs() << "LEV: Unable to vectorize epilogue because the loop is " 6206 "not a supported candidate.\n";); 6207 return Result; 6208 } 6209 6210 if (EpilogueVectorizationForceVF > 1) { 6211 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization factor is forced.\n";); 6212 if (LVP.hasPlanWithVFs( 6213 {MainLoopVF, ElementCount::getFixed(EpilogueVectorizationForceVF)})) 6214 return {ElementCount::getFixed(EpilogueVectorizationForceVF), 0}; 6215 else { 6216 LLVM_DEBUG( 6217 dbgs() 6218 << "LEV: Epilogue vectorization forced factor is not viable.\n";); 6219 return Result; 6220 } 6221 } 6222 6223 if (TheLoop->getHeader()->getParent()->hasOptSize() || 6224 TheLoop->getHeader()->getParent()->hasMinSize()) { 6225 LLVM_DEBUG( 6226 dbgs() 6227 << "LEV: Epilogue vectorization skipped due to opt for size.\n";); 6228 return Result; 6229 } 6230 6231 if (!isEpilogueVectorizationProfitable(MainLoopVF)) 6232 return Result; 6233 6234 for (auto &NextVF : ProfitableVFs) 6235 if (ElementCount::isKnownLT(NextVF.Width, MainLoopVF) && 6236 (Result.Width.getFixedValue() == 1 || 6237 isMoreProfitable(NextVF, Result)) && 6238 LVP.hasPlanWithVFs({MainLoopVF, NextVF.Width})) 6239 Result = NextVF; 6240 6241 if (Result != VectorizationFactor::Disabled()) 6242 LLVM_DEBUG(dbgs() << "LEV: Vectorizing epilogue loop with VF = " 6243 << Result.Width.getFixedValue() << "\n";); 6244 return Result; 6245 } 6246 6247 std::pair<unsigned, unsigned> 6248 LoopVectorizationCostModel::getSmallestAndWidestTypes() { 6249 unsigned MinWidth = -1U; 6250 unsigned MaxWidth = 8; 6251 const DataLayout &DL = TheFunction->getParent()->getDataLayout(); 6252 6253 // For each block. 6254 for (BasicBlock *BB : TheLoop->blocks()) { 6255 // For each instruction in the loop. 6256 for (Instruction &I : BB->instructionsWithoutDebug()) { 6257 Type *T = I.getType(); 6258 6259 // Skip ignored values. 6260 if (ValuesToIgnore.count(&I)) 6261 continue; 6262 6263 // Only examine Loads, Stores and PHINodes. 6264 if (!isa<LoadInst>(I) && !isa<StoreInst>(I) && !isa<PHINode>(I)) 6265 continue; 6266 6267 // Examine PHI nodes that are reduction variables. Update the type to 6268 // account for the recurrence type. 6269 if (auto *PN = dyn_cast<PHINode>(&I)) { 6270 if (!Legal->isReductionVariable(PN)) 6271 continue; 6272 const RecurrenceDescriptor &RdxDesc = Legal->getReductionVars()[PN]; 6273 if (PreferInLoopReductions || useOrderedReductions(RdxDesc) || 6274 TTI.preferInLoopReduction(RdxDesc.getOpcode(), 6275 RdxDesc.getRecurrenceType(), 6276 TargetTransformInfo::ReductionFlags())) 6277 continue; 6278 T = RdxDesc.getRecurrenceType(); 6279 } 6280 6281 // Examine the stored values. 6282 if (auto *ST = dyn_cast<StoreInst>(&I)) 6283 T = ST->getValueOperand()->getType(); 6284 6285 // Ignore loaded pointer types and stored pointer types that are not 6286 // vectorizable. 6287 // 6288 // FIXME: The check here attempts to predict whether a load or store will 6289 // be vectorized. We only know this for certain after a VF has 6290 // been selected. Here, we assume that if an access can be 6291 // vectorized, it will be. We should also look at extending this 6292 // optimization to non-pointer types. 6293 // 6294 if (T->isPointerTy() && !isConsecutiveLoadOrStore(&I) && 6295 !isAccessInterleaved(&I) && !isLegalGatherOrScatter(&I)) 6296 continue; 6297 6298 MinWidth = std::min(MinWidth, 6299 (unsigned)DL.getTypeSizeInBits(T->getScalarType())); 6300 MaxWidth = std::max(MaxWidth, 6301 (unsigned)DL.getTypeSizeInBits(T->getScalarType())); 6302 } 6303 } 6304 6305 return {MinWidth, MaxWidth}; 6306 } 6307 6308 unsigned LoopVectorizationCostModel::selectInterleaveCount(ElementCount VF, 6309 unsigned LoopCost) { 6310 // -- The interleave heuristics -- 6311 // We interleave the loop in order to expose ILP and reduce the loop overhead. 6312 // There are many micro-architectural considerations that we can't predict 6313 // at this level. For example, frontend pressure (on decode or fetch) due to 6314 // code size, or the number and capabilities of the execution ports. 6315 // 6316 // We use the following heuristics to select the interleave count: 6317 // 1. If the code has reductions, then we interleave to break the cross 6318 // iteration dependency. 6319 // 2. If the loop is really small, then we interleave to reduce the loop 6320 // overhead. 6321 // 3. We don't interleave if we think that we will spill registers to memory 6322 // due to the increased register pressure. 6323 6324 if (!isScalarEpilogueAllowed()) 6325 return 1; 6326 6327 // We used the distance for the interleave count. 6328 if (Legal->getMaxSafeDepDistBytes() != -1U) 6329 return 1; 6330 6331 auto BestKnownTC = getSmallBestKnownTC(*PSE.getSE(), TheLoop); 6332 const bool HasReductions = !Legal->getReductionVars().empty(); 6333 // Do not interleave loops with a relatively small known or estimated trip 6334 // count. But we will interleave when InterleaveSmallLoopScalarReduction is 6335 // enabled, and the code has scalar reductions(HasReductions && VF = 1), 6336 // because with the above conditions interleaving can expose ILP and break 6337 // cross iteration dependences for reductions. 6338 if (BestKnownTC && (*BestKnownTC < TinyTripCountInterleaveThreshold) && 6339 !(InterleaveSmallLoopScalarReduction && HasReductions && VF.isScalar())) 6340 return 1; 6341 6342 RegisterUsage R = calculateRegisterUsage({VF})[0]; 6343 // We divide by these constants so assume that we have at least one 6344 // instruction that uses at least one register. 6345 for (auto& pair : R.MaxLocalUsers) { 6346 pair.second = std::max(pair.second, 1U); 6347 } 6348 6349 // We calculate the interleave count using the following formula. 6350 // Subtract the number of loop invariants from the number of available 6351 // registers. These registers are used by all of the interleaved instances. 6352 // Next, divide the remaining registers by the number of registers that is 6353 // required by the loop, in order to estimate how many parallel instances 6354 // fit without causing spills. All of this is rounded down if necessary to be 6355 // a power of two. We want power of two interleave count to simplify any 6356 // addressing operations or alignment considerations. 6357 // We also want power of two interleave counts to ensure that the induction 6358 // variable of the vector loop wraps to zero, when tail is folded by masking; 6359 // this currently happens when OptForSize, in which case IC is set to 1 above. 6360 unsigned IC = UINT_MAX; 6361 6362 for (auto& pair : R.MaxLocalUsers) { 6363 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(pair.first); 6364 LLVM_DEBUG(dbgs() << "LV: The target has " << TargetNumRegisters 6365 << " registers of " 6366 << TTI.getRegisterClassName(pair.first) << " register class\n"); 6367 if (VF.isScalar()) { 6368 if (ForceTargetNumScalarRegs.getNumOccurrences() > 0) 6369 TargetNumRegisters = ForceTargetNumScalarRegs; 6370 } else { 6371 if (ForceTargetNumVectorRegs.getNumOccurrences() > 0) 6372 TargetNumRegisters = ForceTargetNumVectorRegs; 6373 } 6374 unsigned MaxLocalUsers = pair.second; 6375 unsigned LoopInvariantRegs = 0; 6376 if (R.LoopInvariantRegs.find(pair.first) != R.LoopInvariantRegs.end()) 6377 LoopInvariantRegs = R.LoopInvariantRegs[pair.first]; 6378 6379 unsigned TmpIC = PowerOf2Floor((TargetNumRegisters - LoopInvariantRegs) / MaxLocalUsers); 6380 // Don't count the induction variable as interleaved. 6381 if (EnableIndVarRegisterHeur) { 6382 TmpIC = 6383 PowerOf2Floor((TargetNumRegisters - LoopInvariantRegs - 1) / 6384 std::max(1U, (MaxLocalUsers - 1))); 6385 } 6386 6387 IC = std::min(IC, TmpIC); 6388 } 6389 6390 // Clamp the interleave ranges to reasonable counts. 6391 unsigned MaxInterleaveCount = 6392 TTI.getMaxInterleaveFactor(VF.getKnownMinValue()); 6393 6394 // Check if the user has overridden the max. 6395 if (VF.isScalar()) { 6396 if (ForceTargetMaxScalarInterleaveFactor.getNumOccurrences() > 0) 6397 MaxInterleaveCount = ForceTargetMaxScalarInterleaveFactor; 6398 } else { 6399 if (ForceTargetMaxVectorInterleaveFactor.getNumOccurrences() > 0) 6400 MaxInterleaveCount = ForceTargetMaxVectorInterleaveFactor; 6401 } 6402 6403 // If trip count is known or estimated compile time constant, limit the 6404 // interleave count to be less than the trip count divided by VF, provided it 6405 // is at least 1. 6406 // 6407 // For scalable vectors we can't know if interleaving is beneficial. It may 6408 // not be beneficial for small loops if none of the lanes in the second vector 6409 // iterations is enabled. However, for larger loops, there is likely to be a 6410 // similar benefit as for fixed-width vectors. For now, we choose to leave 6411 // the InterleaveCount as if vscale is '1', although if some information about 6412 // the vector is known (e.g. min vector size), we can make a better decision. 6413 if (BestKnownTC) { 6414 MaxInterleaveCount = 6415 std::min(*BestKnownTC / VF.getKnownMinValue(), MaxInterleaveCount); 6416 // Make sure MaxInterleaveCount is greater than 0. 6417 MaxInterleaveCount = std::max(1u, MaxInterleaveCount); 6418 } 6419 6420 assert(MaxInterleaveCount > 0 && 6421 "Maximum interleave count must be greater than 0"); 6422 6423 // Clamp the calculated IC to be between the 1 and the max interleave count 6424 // that the target and trip count allows. 6425 if (IC > MaxInterleaveCount) 6426 IC = MaxInterleaveCount; 6427 else 6428 // Make sure IC is greater than 0. 6429 IC = std::max(1u, IC); 6430 6431 assert(IC > 0 && "Interleave count must be greater than 0."); 6432 6433 // If we did not calculate the cost for VF (because the user selected the VF) 6434 // then we calculate the cost of VF here. 6435 if (LoopCost == 0) { 6436 assert(expectedCost(VF).first.isValid() && "Expected a valid cost"); 6437 LoopCost = *expectedCost(VF).first.getValue(); 6438 } 6439 6440 assert(LoopCost && "Non-zero loop cost expected"); 6441 6442 // Interleave if we vectorized this loop and there is a reduction that could 6443 // benefit from interleaving. 6444 if (VF.isVector() && HasReductions) { 6445 LLVM_DEBUG(dbgs() << "LV: Interleaving because of reductions.\n"); 6446 return IC; 6447 } 6448 6449 // Note that if we've already vectorized the loop we will have done the 6450 // runtime check and so interleaving won't require further checks. 6451 bool InterleavingRequiresRuntimePointerCheck = 6452 (VF.isScalar() && Legal->getRuntimePointerChecking()->Need); 6453 6454 // We want to interleave small loops in order to reduce the loop overhead and 6455 // potentially expose ILP opportunities. 6456 LLVM_DEBUG(dbgs() << "LV: Loop cost is " << LoopCost << '\n' 6457 << "LV: IC is " << IC << '\n' 6458 << "LV: VF is " << VF << '\n'); 6459 const bool AggressivelyInterleaveReductions = 6460 TTI.enableAggressiveInterleaving(HasReductions); 6461 if (!InterleavingRequiresRuntimePointerCheck && LoopCost < SmallLoopCost) { 6462 // We assume that the cost overhead is 1 and we use the cost model 6463 // to estimate the cost of the loop and interleave until the cost of the 6464 // loop overhead is about 5% of the cost of the loop. 6465 unsigned SmallIC = 6466 std::min(IC, (unsigned)PowerOf2Floor(SmallLoopCost / LoopCost)); 6467 6468 // Interleave until store/load ports (estimated by max interleave count) are 6469 // saturated. 6470 unsigned NumStores = Legal->getNumStores(); 6471 unsigned NumLoads = Legal->getNumLoads(); 6472 unsigned StoresIC = IC / (NumStores ? NumStores : 1); 6473 unsigned LoadsIC = IC / (NumLoads ? NumLoads : 1); 6474 6475 // If we have a scalar reduction (vector reductions are already dealt with 6476 // by this point), we can increase the critical path length if the loop 6477 // we're interleaving is inside another loop. Limit, by default to 2, so the 6478 // critical path only gets increased by one reduction operation. 6479 if (HasReductions && TheLoop->getLoopDepth() > 1) { 6480 unsigned F = static_cast<unsigned>(MaxNestedScalarReductionIC); 6481 SmallIC = std::min(SmallIC, F); 6482 StoresIC = std::min(StoresIC, F); 6483 LoadsIC = std::min(LoadsIC, F); 6484 } 6485 6486 if (EnableLoadStoreRuntimeInterleave && 6487 std::max(StoresIC, LoadsIC) > SmallIC) { 6488 LLVM_DEBUG( 6489 dbgs() << "LV: Interleaving to saturate store or load ports.\n"); 6490 return std::max(StoresIC, LoadsIC); 6491 } 6492 6493 // If there are scalar reductions and TTI has enabled aggressive 6494 // interleaving for reductions, we will interleave to expose ILP. 6495 if (InterleaveSmallLoopScalarReduction && VF.isScalar() && 6496 AggressivelyInterleaveReductions) { 6497 LLVM_DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n"); 6498 // Interleave no less than SmallIC but not as aggressive as the normal IC 6499 // to satisfy the rare situation when resources are too limited. 6500 return std::max(IC / 2, SmallIC); 6501 } else { 6502 LLVM_DEBUG(dbgs() << "LV: Interleaving to reduce branch cost.\n"); 6503 return SmallIC; 6504 } 6505 } 6506 6507 // Interleave if this is a large loop (small loops are already dealt with by 6508 // this point) that could benefit from interleaving. 6509 if (AggressivelyInterleaveReductions) { 6510 LLVM_DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n"); 6511 return IC; 6512 } 6513 6514 LLVM_DEBUG(dbgs() << "LV: Not Interleaving.\n"); 6515 return 1; 6516 } 6517 6518 SmallVector<LoopVectorizationCostModel::RegisterUsage, 8> 6519 LoopVectorizationCostModel::calculateRegisterUsage(ArrayRef<ElementCount> VFs) { 6520 // This function calculates the register usage by measuring the highest number 6521 // of values that are alive at a single location. Obviously, this is a very 6522 // rough estimation. We scan the loop in a topological order in order and 6523 // assign a number to each instruction. We use RPO to ensure that defs are 6524 // met before their users. We assume that each instruction that has in-loop 6525 // users starts an interval. We record every time that an in-loop value is 6526 // used, so we have a list of the first and last occurrences of each 6527 // instruction. Next, we transpose this data structure into a multi map that 6528 // holds the list of intervals that *end* at a specific location. This multi 6529 // map allows us to perform a linear search. We scan the instructions linearly 6530 // and record each time that a new interval starts, by placing it in a set. 6531 // If we find this value in the multi-map then we remove it from the set. 6532 // The max register usage is the maximum size of the set. 6533 // We also search for instructions that are defined outside the loop, but are 6534 // used inside the loop. We need this number separately from the max-interval 6535 // usage number because when we unroll, loop-invariant values do not take 6536 // more register. 6537 LoopBlocksDFS DFS(TheLoop); 6538 DFS.perform(LI); 6539 6540 RegisterUsage RU; 6541 6542 // Each 'key' in the map opens a new interval. The values 6543 // of the map are the index of the 'last seen' usage of the 6544 // instruction that is the key. 6545 using IntervalMap = DenseMap<Instruction *, unsigned>; 6546 6547 // Maps instruction to its index. 6548 SmallVector<Instruction *, 64> IdxToInstr; 6549 // Marks the end of each interval. 6550 IntervalMap EndPoint; 6551 // Saves the list of instruction indices that are used in the loop. 6552 SmallPtrSet<Instruction *, 8> Ends; 6553 // Saves the list of values that are used in the loop but are 6554 // defined outside the loop, such as arguments and constants. 6555 SmallPtrSet<Value *, 8> LoopInvariants; 6556 6557 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) { 6558 for (Instruction &I : BB->instructionsWithoutDebug()) { 6559 IdxToInstr.push_back(&I); 6560 6561 // Save the end location of each USE. 6562 for (Value *U : I.operands()) { 6563 auto *Instr = dyn_cast<Instruction>(U); 6564 6565 // Ignore non-instruction values such as arguments, constants, etc. 6566 if (!Instr) 6567 continue; 6568 6569 // If this instruction is outside the loop then record it and continue. 6570 if (!TheLoop->contains(Instr)) { 6571 LoopInvariants.insert(Instr); 6572 continue; 6573 } 6574 6575 // Overwrite previous end points. 6576 EndPoint[Instr] = IdxToInstr.size(); 6577 Ends.insert(Instr); 6578 } 6579 } 6580 } 6581 6582 // Saves the list of intervals that end with the index in 'key'. 6583 using InstrList = SmallVector<Instruction *, 2>; 6584 DenseMap<unsigned, InstrList> TransposeEnds; 6585 6586 // Transpose the EndPoints to a list of values that end at each index. 6587 for (auto &Interval : EndPoint) 6588 TransposeEnds[Interval.second].push_back(Interval.first); 6589 6590 SmallPtrSet<Instruction *, 8> OpenIntervals; 6591 SmallVector<RegisterUsage, 8> RUs(VFs.size()); 6592 SmallVector<SmallMapVector<unsigned, unsigned, 4>, 8> MaxUsages(VFs.size()); 6593 6594 LLVM_DEBUG(dbgs() << "LV(REG): Calculating max register usage:\n"); 6595 6596 // A lambda that gets the register usage for the given type and VF. 6597 const auto &TTICapture = TTI; 6598 auto GetRegUsage = [&TTICapture](Type *Ty, ElementCount VF) { 6599 if (Ty->isTokenTy() || !VectorType::isValidElementType(Ty)) 6600 return 0; 6601 return *TTICapture.getRegUsageForType(VectorType::get(Ty, VF)).getValue(); 6602 }; 6603 6604 for (unsigned int i = 0, s = IdxToInstr.size(); i < s; ++i) { 6605 Instruction *I = IdxToInstr[i]; 6606 6607 // Remove all of the instructions that end at this location. 6608 InstrList &List = TransposeEnds[i]; 6609 for (Instruction *ToRemove : List) 6610 OpenIntervals.erase(ToRemove); 6611 6612 // Ignore instructions that are never used within the loop. 6613 if (!Ends.count(I)) 6614 continue; 6615 6616 // Skip ignored values. 6617 if (ValuesToIgnore.count(I)) 6618 continue; 6619 6620 // For each VF find the maximum usage of registers. 6621 for (unsigned j = 0, e = VFs.size(); j < e; ++j) { 6622 // Count the number of live intervals. 6623 SmallMapVector<unsigned, unsigned, 4> RegUsage; 6624 6625 if (VFs[j].isScalar()) { 6626 for (auto Inst : OpenIntervals) { 6627 unsigned ClassID = TTI.getRegisterClassForType(false, Inst->getType()); 6628 if (RegUsage.find(ClassID) == RegUsage.end()) 6629 RegUsage[ClassID] = 1; 6630 else 6631 RegUsage[ClassID] += 1; 6632 } 6633 } else { 6634 collectUniformsAndScalars(VFs[j]); 6635 for (auto Inst : OpenIntervals) { 6636 // Skip ignored values for VF > 1. 6637 if (VecValuesToIgnore.count(Inst)) 6638 continue; 6639 if (isScalarAfterVectorization(Inst, VFs[j])) { 6640 unsigned ClassID = TTI.getRegisterClassForType(false, Inst->getType()); 6641 if (RegUsage.find(ClassID) == RegUsage.end()) 6642 RegUsage[ClassID] = 1; 6643 else 6644 RegUsage[ClassID] += 1; 6645 } else { 6646 unsigned ClassID = TTI.getRegisterClassForType(true, Inst->getType()); 6647 if (RegUsage.find(ClassID) == RegUsage.end()) 6648 RegUsage[ClassID] = GetRegUsage(Inst->getType(), VFs[j]); 6649 else 6650 RegUsage[ClassID] += GetRegUsage(Inst->getType(), VFs[j]); 6651 } 6652 } 6653 } 6654 6655 for (auto& pair : RegUsage) { 6656 if (MaxUsages[j].find(pair.first) != MaxUsages[j].end()) 6657 MaxUsages[j][pair.first] = std::max(MaxUsages[j][pair.first], pair.second); 6658 else 6659 MaxUsages[j][pair.first] = pair.second; 6660 } 6661 } 6662 6663 LLVM_DEBUG(dbgs() << "LV(REG): At #" << i << " Interval # " 6664 << OpenIntervals.size() << '\n'); 6665 6666 // Add the current instruction to the list of open intervals. 6667 OpenIntervals.insert(I); 6668 } 6669 6670 for (unsigned i = 0, e = VFs.size(); i < e; ++i) { 6671 SmallMapVector<unsigned, unsigned, 4> Invariant; 6672 6673 for (auto Inst : LoopInvariants) { 6674 unsigned Usage = 6675 VFs[i].isScalar() ? 1 : GetRegUsage(Inst->getType(), VFs[i]); 6676 unsigned ClassID = 6677 TTI.getRegisterClassForType(VFs[i].isVector(), Inst->getType()); 6678 if (Invariant.find(ClassID) == Invariant.end()) 6679 Invariant[ClassID] = Usage; 6680 else 6681 Invariant[ClassID] += Usage; 6682 } 6683 6684 LLVM_DEBUG({ 6685 dbgs() << "LV(REG): VF = " << VFs[i] << '\n'; 6686 dbgs() << "LV(REG): Found max usage: " << MaxUsages[i].size() 6687 << " item\n"; 6688 for (const auto &pair : MaxUsages[i]) { 6689 dbgs() << "LV(REG): RegisterClass: " 6690 << TTI.getRegisterClassName(pair.first) << ", " << pair.second 6691 << " registers\n"; 6692 } 6693 dbgs() << "LV(REG): Found invariant usage: " << Invariant.size() 6694 << " item\n"; 6695 for (const auto &pair : Invariant) { 6696 dbgs() << "LV(REG): RegisterClass: " 6697 << TTI.getRegisterClassName(pair.first) << ", " << pair.second 6698 << " registers\n"; 6699 } 6700 }); 6701 6702 RU.LoopInvariantRegs = Invariant; 6703 RU.MaxLocalUsers = MaxUsages[i]; 6704 RUs[i] = RU; 6705 } 6706 6707 return RUs; 6708 } 6709 6710 bool LoopVectorizationCostModel::useEmulatedMaskMemRefHack(Instruction *I){ 6711 // TODO: Cost model for emulated masked load/store is completely 6712 // broken. This hack guides the cost model to use an artificially 6713 // high enough value to practically disable vectorization with such 6714 // operations, except where previously deployed legality hack allowed 6715 // using very low cost values. This is to avoid regressions coming simply 6716 // from moving "masked load/store" check from legality to cost model. 6717 // Masked Load/Gather emulation was previously never allowed. 6718 // Limited number of Masked Store/Scatter emulation was allowed. 6719 assert(isPredicatedInst(I) && 6720 "Expecting a scalar emulated instruction"); 6721 return isa<LoadInst>(I) || 6722 (isa<StoreInst>(I) && 6723 NumPredStores > NumberOfStoresToPredicate); 6724 } 6725 6726 void LoopVectorizationCostModel::collectInstsToScalarize(ElementCount VF) { 6727 // If we aren't vectorizing the loop, or if we've already collected the 6728 // instructions to scalarize, there's nothing to do. Collection may already 6729 // have occurred if we have a user-selected VF and are now computing the 6730 // expected cost for interleaving. 6731 if (VF.isScalar() || VF.isZero() || 6732 InstsToScalarize.find(VF) != InstsToScalarize.end()) 6733 return; 6734 6735 // Initialize a mapping for VF in InstsToScalalarize. If we find that it's 6736 // not profitable to scalarize any instructions, the presence of VF in the 6737 // map will indicate that we've analyzed it already. 6738 ScalarCostsTy &ScalarCostsVF = InstsToScalarize[VF]; 6739 6740 // Find all the instructions that are scalar with predication in the loop and 6741 // determine if it would be better to not if-convert the blocks they are in. 6742 // If so, we also record the instructions to scalarize. 6743 for (BasicBlock *BB : TheLoop->blocks()) { 6744 if (!blockNeedsPredication(BB)) 6745 continue; 6746 for (Instruction &I : *BB) 6747 if (isScalarWithPredication(&I)) { 6748 ScalarCostsTy ScalarCosts; 6749 // Do not apply discount logic if hacked cost is needed 6750 // for emulated masked memrefs. 6751 if (!useEmulatedMaskMemRefHack(&I) && 6752 computePredInstDiscount(&I, ScalarCosts, VF) >= 0) 6753 ScalarCostsVF.insert(ScalarCosts.begin(), ScalarCosts.end()); 6754 // Remember that BB will remain after vectorization. 6755 PredicatedBBsAfterVectorization.insert(BB); 6756 } 6757 } 6758 } 6759 6760 int LoopVectorizationCostModel::computePredInstDiscount( 6761 Instruction *PredInst, ScalarCostsTy &ScalarCosts, ElementCount VF) { 6762 assert(!isUniformAfterVectorization(PredInst, VF) && 6763 "Instruction marked uniform-after-vectorization will be predicated"); 6764 6765 // Initialize the discount to zero, meaning that the scalar version and the 6766 // vector version cost the same. 6767 InstructionCost Discount = 0; 6768 6769 // Holds instructions to analyze. The instructions we visit are mapped in 6770 // ScalarCosts. Those instructions are the ones that would be scalarized if 6771 // we find that the scalar version costs less. 6772 SmallVector<Instruction *, 8> Worklist; 6773 6774 // Returns true if the given instruction can be scalarized. 6775 auto canBeScalarized = [&](Instruction *I) -> bool { 6776 // We only attempt to scalarize instructions forming a single-use chain 6777 // from the original predicated block that would otherwise be vectorized. 6778 // Although not strictly necessary, we give up on instructions we know will 6779 // already be scalar to avoid traversing chains that are unlikely to be 6780 // beneficial. 6781 if (!I->hasOneUse() || PredInst->getParent() != I->getParent() || 6782 isScalarAfterVectorization(I, VF)) 6783 return false; 6784 6785 // If the instruction is scalar with predication, it will be analyzed 6786 // separately. We ignore it within the context of PredInst. 6787 if (isScalarWithPredication(I)) 6788 return false; 6789 6790 // If any of the instruction's operands are uniform after vectorization, 6791 // the instruction cannot be scalarized. This prevents, for example, a 6792 // masked load from being scalarized. 6793 // 6794 // We assume we will only emit a value for lane zero of an instruction 6795 // marked uniform after vectorization, rather than VF identical values. 6796 // Thus, if we scalarize an instruction that uses a uniform, we would 6797 // create uses of values corresponding to the lanes we aren't emitting code 6798 // for. This behavior can be changed by allowing getScalarValue to clone 6799 // the lane zero values for uniforms rather than asserting. 6800 for (Use &U : I->operands()) 6801 if (auto *J = dyn_cast<Instruction>(U.get())) 6802 if (isUniformAfterVectorization(J, VF)) 6803 return false; 6804 6805 // Otherwise, we can scalarize the instruction. 6806 return true; 6807 }; 6808 6809 // Compute the expected cost discount from scalarizing the entire expression 6810 // feeding the predicated instruction. We currently only consider expressions 6811 // that are single-use instruction chains. 6812 Worklist.push_back(PredInst); 6813 while (!Worklist.empty()) { 6814 Instruction *I = Worklist.pop_back_val(); 6815 6816 // If we've already analyzed the instruction, there's nothing to do. 6817 if (ScalarCosts.find(I) != ScalarCosts.end()) 6818 continue; 6819 6820 // Compute the cost of the vector instruction. Note that this cost already 6821 // includes the scalarization overhead of the predicated instruction. 6822 InstructionCost VectorCost = getInstructionCost(I, VF).first; 6823 6824 // Compute the cost of the scalarized instruction. This cost is the cost of 6825 // the instruction as if it wasn't if-converted and instead remained in the 6826 // predicated block. We will scale this cost by block probability after 6827 // computing the scalarization overhead. 6828 assert(!VF.isScalable() && "scalable vectors not yet supported."); 6829 InstructionCost ScalarCost = 6830 VF.getKnownMinValue() * 6831 getInstructionCost(I, ElementCount::getFixed(1)).first; 6832 6833 // Compute the scalarization overhead of needed insertelement instructions 6834 // and phi nodes. 6835 if (isScalarWithPredication(I) && !I->getType()->isVoidTy()) { 6836 ScalarCost += TTI.getScalarizationOverhead( 6837 cast<VectorType>(ToVectorTy(I->getType(), VF)), 6838 APInt::getAllOnesValue(VF.getKnownMinValue()), true, false); 6839 assert(!VF.isScalable() && "scalable vectors not yet supported."); 6840 ScalarCost += 6841 VF.getKnownMinValue() * 6842 TTI.getCFInstrCost(Instruction::PHI, TTI::TCK_RecipThroughput); 6843 } 6844 6845 // Compute the scalarization overhead of needed extractelement 6846 // instructions. For each of the instruction's operands, if the operand can 6847 // be scalarized, add it to the worklist; otherwise, account for the 6848 // overhead. 6849 for (Use &U : I->operands()) 6850 if (auto *J = dyn_cast<Instruction>(U.get())) { 6851 assert(VectorType::isValidElementType(J->getType()) && 6852 "Instruction has non-scalar type"); 6853 if (canBeScalarized(J)) 6854 Worklist.push_back(J); 6855 else if (needsExtract(J, VF)) { 6856 assert(!VF.isScalable() && "scalable vectors not yet supported."); 6857 ScalarCost += TTI.getScalarizationOverhead( 6858 cast<VectorType>(ToVectorTy(J->getType(), VF)), 6859 APInt::getAllOnesValue(VF.getKnownMinValue()), false, true); 6860 } 6861 } 6862 6863 // Scale the total scalar cost by block probability. 6864 ScalarCost /= getReciprocalPredBlockProb(); 6865 6866 // Compute the discount. A non-negative discount means the vector version 6867 // of the instruction costs more, and scalarizing would be beneficial. 6868 Discount += VectorCost - ScalarCost; 6869 ScalarCosts[I] = ScalarCost; 6870 } 6871 6872 return *Discount.getValue(); 6873 } 6874 6875 LoopVectorizationCostModel::VectorizationCostTy 6876 LoopVectorizationCostModel::expectedCost(ElementCount VF) { 6877 VectorizationCostTy Cost; 6878 6879 // For each block. 6880 for (BasicBlock *BB : TheLoop->blocks()) { 6881 VectorizationCostTy BlockCost; 6882 6883 // For each instruction in the old loop. 6884 for (Instruction &I : BB->instructionsWithoutDebug()) { 6885 // Skip ignored values. 6886 if (ValuesToIgnore.count(&I) || 6887 (VF.isVector() && VecValuesToIgnore.count(&I))) 6888 continue; 6889 6890 VectorizationCostTy C = getInstructionCost(&I, VF); 6891 6892 // Check if we should override the cost. 6893 if (ForceTargetInstructionCost.getNumOccurrences() > 0) 6894 C.first = InstructionCost(ForceTargetInstructionCost); 6895 6896 BlockCost.first += C.first; 6897 BlockCost.second |= C.second; 6898 LLVM_DEBUG(dbgs() << "LV: Found an estimated cost of " << C.first 6899 << " for VF " << VF << " For instruction: " << I 6900 << '\n'); 6901 } 6902 6903 // If we are vectorizing a predicated block, it will have been 6904 // if-converted. This means that the block's instructions (aside from 6905 // stores and instructions that may divide by zero) will now be 6906 // unconditionally executed. For the scalar case, we may not always execute 6907 // the predicated block, if it is an if-else block. Thus, scale the block's 6908 // cost by the probability of executing it. blockNeedsPredication from 6909 // Legal is used so as to not include all blocks in tail folded loops. 6910 if (VF.isScalar() && Legal->blockNeedsPredication(BB)) 6911 BlockCost.first /= getReciprocalPredBlockProb(); 6912 6913 Cost.first += BlockCost.first; 6914 Cost.second |= BlockCost.second; 6915 } 6916 6917 return Cost; 6918 } 6919 6920 /// Gets Address Access SCEV after verifying that the access pattern 6921 /// is loop invariant except the induction variable dependence. 6922 /// 6923 /// This SCEV can be sent to the Target in order to estimate the address 6924 /// calculation cost. 6925 static const SCEV *getAddressAccessSCEV( 6926 Value *Ptr, 6927 LoopVectorizationLegality *Legal, 6928 PredicatedScalarEvolution &PSE, 6929 const Loop *TheLoop) { 6930 6931 auto *Gep = dyn_cast<GetElementPtrInst>(Ptr); 6932 if (!Gep) 6933 return nullptr; 6934 6935 // We are looking for a gep with all loop invariant indices except for one 6936 // which should be an induction variable. 6937 auto SE = PSE.getSE(); 6938 unsigned NumOperands = Gep->getNumOperands(); 6939 for (unsigned i = 1; i < NumOperands; ++i) { 6940 Value *Opd = Gep->getOperand(i); 6941 if (!SE->isLoopInvariant(SE->getSCEV(Opd), TheLoop) && 6942 !Legal->isInductionVariable(Opd)) 6943 return nullptr; 6944 } 6945 6946 // Now we know we have a GEP ptr, %inv, %ind, %inv. return the Ptr SCEV. 6947 return PSE.getSCEV(Ptr); 6948 } 6949 6950 static bool isStrideMul(Instruction *I, LoopVectorizationLegality *Legal) { 6951 return Legal->hasStride(I->getOperand(0)) || 6952 Legal->hasStride(I->getOperand(1)); 6953 } 6954 6955 InstructionCost 6956 LoopVectorizationCostModel::getMemInstScalarizationCost(Instruction *I, 6957 ElementCount VF) { 6958 assert(VF.isVector() && 6959 "Scalarization cost of instruction implies vectorization."); 6960 if (VF.isScalable()) 6961 return InstructionCost::getInvalid(); 6962 6963 Type *ValTy = getLoadStoreType(I); 6964 auto SE = PSE.getSE(); 6965 6966 unsigned AS = getLoadStoreAddressSpace(I); 6967 Value *Ptr = getLoadStorePointerOperand(I); 6968 Type *PtrTy = ToVectorTy(Ptr->getType(), VF); 6969 6970 // Figure out whether the access is strided and get the stride value 6971 // if it's known in compile time 6972 const SCEV *PtrSCEV = getAddressAccessSCEV(Ptr, Legal, PSE, TheLoop); 6973 6974 // Get the cost of the scalar memory instruction and address computation. 6975 InstructionCost Cost = 6976 VF.getKnownMinValue() * TTI.getAddressComputationCost(PtrTy, SE, PtrSCEV); 6977 6978 // Don't pass *I here, since it is scalar but will actually be part of a 6979 // vectorized loop where the user of it is a vectorized instruction. 6980 const Align Alignment = getLoadStoreAlignment(I); 6981 Cost += VF.getKnownMinValue() * 6982 TTI.getMemoryOpCost(I->getOpcode(), ValTy->getScalarType(), Alignment, 6983 AS, TTI::TCK_RecipThroughput); 6984 6985 // Get the overhead of the extractelement and insertelement instructions 6986 // we might create due to scalarization. 6987 Cost += getScalarizationOverhead(I, VF); 6988 6989 // If we have a predicated load/store, it will need extra i1 extracts and 6990 // conditional branches, but may not be executed for each vector lane. Scale 6991 // the cost by the probability of executing the predicated block. 6992 if (isPredicatedInst(I)) { 6993 Cost /= getReciprocalPredBlockProb(); 6994 6995 // Add the cost of an i1 extract and a branch 6996 auto *Vec_i1Ty = 6997 VectorType::get(IntegerType::getInt1Ty(ValTy->getContext()), VF); 6998 Cost += TTI.getScalarizationOverhead( 6999 Vec_i1Ty, APInt::getAllOnesValue(VF.getKnownMinValue()), 7000 /*Insert=*/false, /*Extract=*/true); 7001 Cost += TTI.getCFInstrCost(Instruction::Br, TTI::TCK_RecipThroughput); 7002 7003 if (useEmulatedMaskMemRefHack(I)) 7004 // Artificially setting to a high enough value to practically disable 7005 // vectorization with such operations. 7006 Cost = 3000000; 7007 } 7008 7009 return Cost; 7010 } 7011 7012 InstructionCost 7013 LoopVectorizationCostModel::getConsecutiveMemOpCost(Instruction *I, 7014 ElementCount VF) { 7015 Type *ValTy = getLoadStoreType(I); 7016 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 7017 Value *Ptr = getLoadStorePointerOperand(I); 7018 unsigned AS = getLoadStoreAddressSpace(I); 7019 int ConsecutiveStride = Legal->isConsecutivePtr(Ptr); 7020 enum TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 7021 7022 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) && 7023 "Stride should be 1 or -1 for consecutive memory access"); 7024 const Align Alignment = getLoadStoreAlignment(I); 7025 InstructionCost Cost = 0; 7026 if (Legal->isMaskRequired(I)) 7027 Cost += TTI.getMaskedMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS, 7028 CostKind); 7029 else 7030 Cost += TTI.getMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS, 7031 CostKind, I); 7032 7033 bool Reverse = ConsecutiveStride < 0; 7034 if (Reverse) 7035 Cost += 7036 TTI.getShuffleCost(TargetTransformInfo::SK_Reverse, VectorTy, None, 0); 7037 return Cost; 7038 } 7039 7040 InstructionCost 7041 LoopVectorizationCostModel::getUniformMemOpCost(Instruction *I, 7042 ElementCount VF) { 7043 assert(Legal->isUniformMemOp(*I)); 7044 7045 Type *ValTy = getLoadStoreType(I); 7046 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 7047 const Align Alignment = getLoadStoreAlignment(I); 7048 unsigned AS = getLoadStoreAddressSpace(I); 7049 enum TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 7050 if (isa<LoadInst>(I)) { 7051 return TTI.getAddressComputationCost(ValTy) + 7052 TTI.getMemoryOpCost(Instruction::Load, ValTy, Alignment, AS, 7053 CostKind) + 7054 TTI.getShuffleCost(TargetTransformInfo::SK_Broadcast, VectorTy); 7055 } 7056 StoreInst *SI = cast<StoreInst>(I); 7057 7058 bool isLoopInvariantStoreValue = Legal->isUniform(SI->getValueOperand()); 7059 return TTI.getAddressComputationCost(ValTy) + 7060 TTI.getMemoryOpCost(Instruction::Store, ValTy, Alignment, AS, 7061 CostKind) + 7062 (isLoopInvariantStoreValue 7063 ? 0 7064 : TTI.getVectorInstrCost(Instruction::ExtractElement, VectorTy, 7065 VF.getKnownMinValue() - 1)); 7066 } 7067 7068 InstructionCost 7069 LoopVectorizationCostModel::getGatherScatterCost(Instruction *I, 7070 ElementCount VF) { 7071 Type *ValTy = getLoadStoreType(I); 7072 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 7073 const Align Alignment = getLoadStoreAlignment(I); 7074 const Value *Ptr = getLoadStorePointerOperand(I); 7075 7076 return TTI.getAddressComputationCost(VectorTy) + 7077 TTI.getGatherScatterOpCost( 7078 I->getOpcode(), VectorTy, Ptr, Legal->isMaskRequired(I), Alignment, 7079 TargetTransformInfo::TCK_RecipThroughput, I); 7080 } 7081 7082 InstructionCost 7083 LoopVectorizationCostModel::getInterleaveGroupCost(Instruction *I, 7084 ElementCount VF) { 7085 // TODO: Once we have support for interleaving with scalable vectors 7086 // we can calculate the cost properly here. 7087 if (VF.isScalable()) 7088 return InstructionCost::getInvalid(); 7089 7090 Type *ValTy = getLoadStoreType(I); 7091 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 7092 unsigned AS = getLoadStoreAddressSpace(I); 7093 7094 auto Group = getInterleavedAccessGroup(I); 7095 assert(Group && "Fail to get an interleaved access group."); 7096 7097 unsigned InterleaveFactor = Group->getFactor(); 7098 auto *WideVecTy = VectorType::get(ValTy, VF * InterleaveFactor); 7099 7100 // Holds the indices of existing members in an interleaved load group. 7101 // An interleaved store group doesn't need this as it doesn't allow gaps. 7102 SmallVector<unsigned, 4> Indices; 7103 if (isa<LoadInst>(I)) { 7104 for (unsigned i = 0; i < InterleaveFactor; i++) 7105 if (Group->getMember(i)) 7106 Indices.push_back(i); 7107 } 7108 7109 // Calculate the cost of the whole interleaved group. 7110 bool UseMaskForGaps = 7111 Group->requiresScalarEpilogue() && !isScalarEpilogueAllowed(); 7112 InstructionCost Cost = TTI.getInterleavedMemoryOpCost( 7113 I->getOpcode(), WideVecTy, Group->getFactor(), Indices, Group->getAlign(), 7114 AS, TTI::TCK_RecipThroughput, Legal->isMaskRequired(I), UseMaskForGaps); 7115 7116 if (Group->isReverse()) { 7117 // TODO: Add support for reversed masked interleaved access. 7118 assert(!Legal->isMaskRequired(I) && 7119 "Reverse masked interleaved access not supported."); 7120 Cost += 7121 Group->getNumMembers() * 7122 TTI.getShuffleCost(TargetTransformInfo::SK_Reverse, VectorTy, None, 0); 7123 } 7124 return Cost; 7125 } 7126 7127 InstructionCost LoopVectorizationCostModel::getReductionPatternCost( 7128 Instruction *I, ElementCount VF, Type *Ty, TTI::TargetCostKind CostKind) { 7129 // Early exit for no inloop reductions 7130 if (InLoopReductionChains.empty() || VF.isScalar() || !isa<VectorType>(Ty)) 7131 return InstructionCost::getInvalid(); 7132 auto *VectorTy = cast<VectorType>(Ty); 7133 7134 // We are looking for a pattern of, and finding the minimal acceptable cost: 7135 // reduce(mul(ext(A), ext(B))) or 7136 // reduce(mul(A, B)) or 7137 // reduce(ext(A)) or 7138 // reduce(A). 7139 // The basic idea is that we walk down the tree to do that, finding the root 7140 // reduction instruction in InLoopReductionImmediateChains. From there we find 7141 // the pattern of mul/ext and test the cost of the entire pattern vs the cost 7142 // of the components. If the reduction cost is lower then we return it for the 7143 // reduction instruction and 0 for the other instructions in the pattern. If 7144 // it is not we return an invalid cost specifying the orignal cost method 7145 // should be used. 7146 Instruction *RetI = I; 7147 if ((RetI->getOpcode() == Instruction::SExt || 7148 RetI->getOpcode() == Instruction::ZExt)) { 7149 if (!RetI->hasOneUser()) 7150 return InstructionCost::getInvalid(); 7151 RetI = RetI->user_back(); 7152 } 7153 if (RetI->getOpcode() == Instruction::Mul && 7154 RetI->user_back()->getOpcode() == Instruction::Add) { 7155 if (!RetI->hasOneUser()) 7156 return InstructionCost::getInvalid(); 7157 RetI = RetI->user_back(); 7158 } 7159 7160 // Test if the found instruction is a reduction, and if not return an invalid 7161 // cost specifying the parent to use the original cost modelling. 7162 if (!InLoopReductionImmediateChains.count(RetI)) 7163 return InstructionCost::getInvalid(); 7164 7165 // Find the reduction this chain is a part of and calculate the basic cost of 7166 // the reduction on its own. 7167 Instruction *LastChain = InLoopReductionImmediateChains[RetI]; 7168 Instruction *ReductionPhi = LastChain; 7169 while (!isa<PHINode>(ReductionPhi)) 7170 ReductionPhi = InLoopReductionImmediateChains[ReductionPhi]; 7171 7172 const RecurrenceDescriptor &RdxDesc = 7173 Legal->getReductionVars()[cast<PHINode>(ReductionPhi)]; 7174 InstructionCost BaseCost = TTI.getArithmeticReductionCost( 7175 RdxDesc.getOpcode(), VectorTy, false, CostKind); 7176 7177 // Get the operand that was not the reduction chain and match it to one of the 7178 // patterns, returning the better cost if it is found. 7179 Instruction *RedOp = RetI->getOperand(1) == LastChain 7180 ? dyn_cast<Instruction>(RetI->getOperand(0)) 7181 : dyn_cast<Instruction>(RetI->getOperand(1)); 7182 7183 VectorTy = VectorType::get(I->getOperand(0)->getType(), VectorTy); 7184 7185 if (RedOp && (isa<SExtInst>(RedOp) || isa<ZExtInst>(RedOp)) && 7186 !TheLoop->isLoopInvariant(RedOp)) { 7187 bool IsUnsigned = isa<ZExtInst>(RedOp); 7188 auto *ExtType = VectorType::get(RedOp->getOperand(0)->getType(), VectorTy); 7189 InstructionCost RedCost = TTI.getExtendedAddReductionCost( 7190 /*IsMLA=*/false, IsUnsigned, RdxDesc.getRecurrenceType(), ExtType, 7191 CostKind); 7192 7193 InstructionCost ExtCost = 7194 TTI.getCastInstrCost(RedOp->getOpcode(), VectorTy, ExtType, 7195 TTI::CastContextHint::None, CostKind, RedOp); 7196 if (RedCost.isValid() && RedCost < BaseCost + ExtCost) 7197 return I == RetI ? *RedCost.getValue() : 0; 7198 } else if (RedOp && RedOp->getOpcode() == Instruction::Mul) { 7199 Instruction *Mul = RedOp; 7200 Instruction *Op0 = dyn_cast<Instruction>(Mul->getOperand(0)); 7201 Instruction *Op1 = dyn_cast<Instruction>(Mul->getOperand(1)); 7202 if (Op0 && Op1 && (isa<SExtInst>(Op0) || isa<ZExtInst>(Op0)) && 7203 Op0->getOpcode() == Op1->getOpcode() && 7204 Op0->getOperand(0)->getType() == Op1->getOperand(0)->getType() && 7205 !TheLoop->isLoopInvariant(Op0) && !TheLoop->isLoopInvariant(Op1)) { 7206 bool IsUnsigned = isa<ZExtInst>(Op0); 7207 auto *ExtType = VectorType::get(Op0->getOperand(0)->getType(), VectorTy); 7208 // reduce(mul(ext, ext)) 7209 InstructionCost ExtCost = 7210 TTI.getCastInstrCost(Op0->getOpcode(), VectorTy, ExtType, 7211 TTI::CastContextHint::None, CostKind, Op0); 7212 InstructionCost MulCost = 7213 TTI.getArithmeticInstrCost(Mul->getOpcode(), VectorTy, CostKind); 7214 7215 InstructionCost RedCost = TTI.getExtendedAddReductionCost( 7216 /*IsMLA=*/true, IsUnsigned, RdxDesc.getRecurrenceType(), ExtType, 7217 CostKind); 7218 7219 if (RedCost.isValid() && RedCost < ExtCost * 2 + MulCost + BaseCost) 7220 return I == RetI ? *RedCost.getValue() : 0; 7221 } else { 7222 InstructionCost MulCost = 7223 TTI.getArithmeticInstrCost(Mul->getOpcode(), VectorTy, CostKind); 7224 7225 InstructionCost RedCost = TTI.getExtendedAddReductionCost( 7226 /*IsMLA=*/true, true, RdxDesc.getRecurrenceType(), VectorTy, 7227 CostKind); 7228 7229 if (RedCost.isValid() && RedCost < MulCost + BaseCost) 7230 return I == RetI ? *RedCost.getValue() : 0; 7231 } 7232 } 7233 7234 return I == RetI ? BaseCost : InstructionCost::getInvalid(); 7235 } 7236 7237 InstructionCost 7238 LoopVectorizationCostModel::getMemoryInstructionCost(Instruction *I, 7239 ElementCount VF) { 7240 // Calculate scalar cost only. Vectorization cost should be ready at this 7241 // moment. 7242 if (VF.isScalar()) { 7243 Type *ValTy = getLoadStoreType(I); 7244 const Align Alignment = getLoadStoreAlignment(I); 7245 unsigned AS = getLoadStoreAddressSpace(I); 7246 7247 return TTI.getAddressComputationCost(ValTy) + 7248 TTI.getMemoryOpCost(I->getOpcode(), ValTy, Alignment, AS, 7249 TTI::TCK_RecipThroughput, I); 7250 } 7251 return getWideningCost(I, VF); 7252 } 7253 7254 LoopVectorizationCostModel::VectorizationCostTy 7255 LoopVectorizationCostModel::getInstructionCost(Instruction *I, 7256 ElementCount VF) { 7257 // If we know that this instruction will remain uniform, check the cost of 7258 // the scalar version. 7259 if (isUniformAfterVectorization(I, VF)) 7260 VF = ElementCount::getFixed(1); 7261 7262 if (VF.isVector() && isProfitableToScalarize(I, VF)) 7263 return VectorizationCostTy(InstsToScalarize[VF][I], false); 7264 7265 // Forced scalars do not have any scalarization overhead. 7266 auto ForcedScalar = ForcedScalars.find(VF); 7267 if (VF.isVector() && ForcedScalar != ForcedScalars.end()) { 7268 auto InstSet = ForcedScalar->second; 7269 if (InstSet.count(I)) 7270 return VectorizationCostTy( 7271 (getInstructionCost(I, ElementCount::getFixed(1)).first * 7272 VF.getKnownMinValue()), 7273 false); 7274 } 7275 7276 Type *VectorTy; 7277 InstructionCost C = getInstructionCost(I, VF, VectorTy); 7278 7279 bool TypeNotScalarized = 7280 VF.isVector() && VectorTy->isVectorTy() && 7281 TTI.getNumberOfParts(VectorTy) < VF.getKnownMinValue(); 7282 return VectorizationCostTy(C, TypeNotScalarized); 7283 } 7284 7285 InstructionCost 7286 LoopVectorizationCostModel::getScalarizationOverhead(Instruction *I, 7287 ElementCount VF) const { 7288 7289 if (VF.isScalable()) 7290 return InstructionCost::getInvalid(); 7291 7292 if (VF.isScalar()) 7293 return 0; 7294 7295 InstructionCost Cost = 0; 7296 Type *RetTy = ToVectorTy(I->getType(), VF); 7297 if (!RetTy->isVoidTy() && 7298 (!isa<LoadInst>(I) || !TTI.supportsEfficientVectorElementLoadStore())) 7299 Cost += TTI.getScalarizationOverhead( 7300 cast<VectorType>(RetTy), APInt::getAllOnesValue(VF.getKnownMinValue()), 7301 true, false); 7302 7303 // Some targets keep addresses scalar. 7304 if (isa<LoadInst>(I) && !TTI.prefersVectorizedAddressing()) 7305 return Cost; 7306 7307 // Some targets support efficient element stores. 7308 if (isa<StoreInst>(I) && TTI.supportsEfficientVectorElementLoadStore()) 7309 return Cost; 7310 7311 // Collect operands to consider. 7312 CallInst *CI = dyn_cast<CallInst>(I); 7313 Instruction::op_range Ops = CI ? CI->arg_operands() : I->operands(); 7314 7315 // Skip operands that do not require extraction/scalarization and do not incur 7316 // any overhead. 7317 SmallVector<Type *> Tys; 7318 for (auto *V : filterExtractingOperands(Ops, VF)) 7319 Tys.push_back(MaybeVectorizeType(V->getType(), VF)); 7320 return Cost + TTI.getOperandsScalarizationOverhead( 7321 filterExtractingOperands(Ops, VF), Tys); 7322 } 7323 7324 void LoopVectorizationCostModel::setCostBasedWideningDecision(ElementCount VF) { 7325 if (VF.isScalar()) 7326 return; 7327 NumPredStores = 0; 7328 for (BasicBlock *BB : TheLoop->blocks()) { 7329 // For each instruction in the old loop. 7330 for (Instruction &I : *BB) { 7331 Value *Ptr = getLoadStorePointerOperand(&I); 7332 if (!Ptr) 7333 continue; 7334 7335 // TODO: We should generate better code and update the cost model for 7336 // predicated uniform stores. Today they are treated as any other 7337 // predicated store (see added test cases in 7338 // invariant-store-vectorization.ll). 7339 if (isa<StoreInst>(&I) && isScalarWithPredication(&I)) 7340 NumPredStores++; 7341 7342 if (Legal->isUniformMemOp(I)) { 7343 // TODO: Avoid replicating loads and stores instead of 7344 // relying on instcombine to remove them. 7345 // Load: Scalar load + broadcast 7346 // Store: Scalar store + isLoopInvariantStoreValue ? 0 : extract 7347 InstructionCost Cost = getUniformMemOpCost(&I, VF); 7348 setWideningDecision(&I, VF, CM_Scalarize, Cost); 7349 continue; 7350 } 7351 7352 // We assume that widening is the best solution when possible. 7353 if (memoryInstructionCanBeWidened(&I, VF)) { 7354 InstructionCost Cost = getConsecutiveMemOpCost(&I, VF); 7355 int ConsecutiveStride = 7356 Legal->isConsecutivePtr(getLoadStorePointerOperand(&I)); 7357 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) && 7358 "Expected consecutive stride."); 7359 InstWidening Decision = 7360 ConsecutiveStride == 1 ? CM_Widen : CM_Widen_Reverse; 7361 setWideningDecision(&I, VF, Decision, Cost); 7362 continue; 7363 } 7364 7365 // Choose between Interleaving, Gather/Scatter or Scalarization. 7366 InstructionCost InterleaveCost = InstructionCost::getInvalid(); 7367 unsigned NumAccesses = 1; 7368 if (isAccessInterleaved(&I)) { 7369 auto Group = getInterleavedAccessGroup(&I); 7370 assert(Group && "Fail to get an interleaved access group."); 7371 7372 // Make one decision for the whole group. 7373 if (getWideningDecision(&I, VF) != CM_Unknown) 7374 continue; 7375 7376 NumAccesses = Group->getNumMembers(); 7377 if (interleavedAccessCanBeWidened(&I, VF)) 7378 InterleaveCost = getInterleaveGroupCost(&I, VF); 7379 } 7380 7381 InstructionCost GatherScatterCost = 7382 isLegalGatherOrScatter(&I) 7383 ? getGatherScatterCost(&I, VF) * NumAccesses 7384 : InstructionCost::getInvalid(); 7385 7386 InstructionCost ScalarizationCost = 7387 getMemInstScalarizationCost(&I, VF) * NumAccesses; 7388 7389 // Choose better solution for the current VF, 7390 // write down this decision and use it during vectorization. 7391 InstructionCost Cost; 7392 InstWidening Decision; 7393 if (InterleaveCost <= GatherScatterCost && 7394 InterleaveCost < ScalarizationCost) { 7395 Decision = CM_Interleave; 7396 Cost = InterleaveCost; 7397 } else if (GatherScatterCost < ScalarizationCost) { 7398 Decision = CM_GatherScatter; 7399 Cost = GatherScatterCost; 7400 } else { 7401 assert(!VF.isScalable() && 7402 "We cannot yet scalarise for scalable vectors"); 7403 Decision = CM_Scalarize; 7404 Cost = ScalarizationCost; 7405 } 7406 // If the instructions belongs to an interleave group, the whole group 7407 // receives the same decision. The whole group receives the cost, but 7408 // the cost will actually be assigned to one instruction. 7409 if (auto Group = getInterleavedAccessGroup(&I)) 7410 setWideningDecision(Group, VF, Decision, Cost); 7411 else 7412 setWideningDecision(&I, VF, Decision, Cost); 7413 } 7414 } 7415 7416 // Make sure that any load of address and any other address computation 7417 // remains scalar unless there is gather/scatter support. This avoids 7418 // inevitable extracts into address registers, and also has the benefit of 7419 // activating LSR more, since that pass can't optimize vectorized 7420 // addresses. 7421 if (TTI.prefersVectorizedAddressing()) 7422 return; 7423 7424 // Start with all scalar pointer uses. 7425 SmallPtrSet<Instruction *, 8> AddrDefs; 7426 for (BasicBlock *BB : TheLoop->blocks()) 7427 for (Instruction &I : *BB) { 7428 Instruction *PtrDef = 7429 dyn_cast_or_null<Instruction>(getLoadStorePointerOperand(&I)); 7430 if (PtrDef && TheLoop->contains(PtrDef) && 7431 getWideningDecision(&I, VF) != CM_GatherScatter) 7432 AddrDefs.insert(PtrDef); 7433 } 7434 7435 // Add all instructions used to generate the addresses. 7436 SmallVector<Instruction *, 4> Worklist; 7437 append_range(Worklist, AddrDefs); 7438 while (!Worklist.empty()) { 7439 Instruction *I = Worklist.pop_back_val(); 7440 for (auto &Op : I->operands()) 7441 if (auto *InstOp = dyn_cast<Instruction>(Op)) 7442 if ((InstOp->getParent() == I->getParent()) && !isa<PHINode>(InstOp) && 7443 AddrDefs.insert(InstOp).second) 7444 Worklist.push_back(InstOp); 7445 } 7446 7447 for (auto *I : AddrDefs) { 7448 if (isa<LoadInst>(I)) { 7449 // Setting the desired widening decision should ideally be handled in 7450 // by cost functions, but since this involves the task of finding out 7451 // if the loaded register is involved in an address computation, it is 7452 // instead changed here when we know this is the case. 7453 InstWidening Decision = getWideningDecision(I, VF); 7454 if (Decision == CM_Widen || Decision == CM_Widen_Reverse) 7455 // Scalarize a widened load of address. 7456 setWideningDecision( 7457 I, VF, CM_Scalarize, 7458 (VF.getKnownMinValue() * 7459 getMemoryInstructionCost(I, ElementCount::getFixed(1)))); 7460 else if (auto Group = getInterleavedAccessGroup(I)) { 7461 // Scalarize an interleave group of address loads. 7462 for (unsigned I = 0; I < Group->getFactor(); ++I) { 7463 if (Instruction *Member = Group->getMember(I)) 7464 setWideningDecision( 7465 Member, VF, CM_Scalarize, 7466 (VF.getKnownMinValue() * 7467 getMemoryInstructionCost(Member, ElementCount::getFixed(1)))); 7468 } 7469 } 7470 } else 7471 // Make sure I gets scalarized and a cost estimate without 7472 // scalarization overhead. 7473 ForcedScalars[VF].insert(I); 7474 } 7475 } 7476 7477 InstructionCost 7478 LoopVectorizationCostModel::getInstructionCost(Instruction *I, ElementCount VF, 7479 Type *&VectorTy) { 7480 Type *RetTy = I->getType(); 7481 if (canTruncateToMinimalBitwidth(I, VF)) 7482 RetTy = IntegerType::get(RetTy->getContext(), MinBWs[I]); 7483 auto SE = PSE.getSE(); 7484 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 7485 7486 auto hasSingleCopyAfterVectorization = [this](Instruction *I, 7487 ElementCount VF) -> bool { 7488 if (VF.isScalar()) 7489 return true; 7490 7491 auto Scalarized = InstsToScalarize.find(VF); 7492 assert(Scalarized != InstsToScalarize.end() && 7493 "VF not yet analyzed for scalarization profitability"); 7494 return !Scalarized->second.count(I) && 7495 llvm::all_of(I->users(), [&](User *U) { 7496 auto *UI = cast<Instruction>(U); 7497 return !Scalarized->second.count(UI); 7498 }); 7499 }; 7500 (void) hasSingleCopyAfterVectorization; 7501 7502 if (isScalarAfterVectorization(I, VF)) { 7503 // With the exception of GEPs and PHIs, after scalarization there should 7504 // only be one copy of the instruction generated in the loop. This is 7505 // because the VF is either 1, or any instructions that need scalarizing 7506 // have already been dealt with by the the time we get here. As a result, 7507 // it means we don't have to multiply the instruction cost by VF. 7508 assert(I->getOpcode() == Instruction::GetElementPtr || 7509 I->getOpcode() == Instruction::PHI || 7510 (I->getOpcode() == Instruction::BitCast && 7511 I->getType()->isPointerTy()) || 7512 hasSingleCopyAfterVectorization(I, VF)); 7513 VectorTy = RetTy; 7514 } else 7515 VectorTy = ToVectorTy(RetTy, VF); 7516 7517 // TODO: We need to estimate the cost of intrinsic calls. 7518 switch (I->getOpcode()) { 7519 case Instruction::GetElementPtr: 7520 // We mark this instruction as zero-cost because the cost of GEPs in 7521 // vectorized code depends on whether the corresponding memory instruction 7522 // is scalarized or not. Therefore, we handle GEPs with the memory 7523 // instruction cost. 7524 return 0; 7525 case Instruction::Br: { 7526 // In cases of scalarized and predicated instructions, there will be VF 7527 // predicated blocks in the vectorized loop. Each branch around these 7528 // blocks requires also an extract of its vector compare i1 element. 7529 bool ScalarPredicatedBB = false; 7530 BranchInst *BI = cast<BranchInst>(I); 7531 if (VF.isVector() && BI->isConditional() && 7532 (PredicatedBBsAfterVectorization.count(BI->getSuccessor(0)) || 7533 PredicatedBBsAfterVectorization.count(BI->getSuccessor(1)))) 7534 ScalarPredicatedBB = true; 7535 7536 if (ScalarPredicatedBB) { 7537 // Return cost for branches around scalarized and predicated blocks. 7538 assert(!VF.isScalable() && "scalable vectors not yet supported."); 7539 auto *Vec_i1Ty = 7540 VectorType::get(IntegerType::getInt1Ty(RetTy->getContext()), VF); 7541 return (TTI.getScalarizationOverhead( 7542 Vec_i1Ty, APInt::getAllOnesValue(VF.getKnownMinValue()), 7543 false, true) + 7544 (TTI.getCFInstrCost(Instruction::Br, CostKind) * 7545 VF.getKnownMinValue())); 7546 } else if (I->getParent() == TheLoop->getLoopLatch() || VF.isScalar()) 7547 // The back-edge branch will remain, as will all scalar branches. 7548 return TTI.getCFInstrCost(Instruction::Br, CostKind); 7549 else 7550 // This branch will be eliminated by if-conversion. 7551 return 0; 7552 // Note: We currently assume zero cost for an unconditional branch inside 7553 // a predicated block since it will become a fall-through, although we 7554 // may decide in the future to call TTI for all branches. 7555 } 7556 case Instruction::PHI: { 7557 auto *Phi = cast<PHINode>(I); 7558 7559 // First-order recurrences are replaced by vector shuffles inside the loop. 7560 // NOTE: Don't use ToVectorTy as SK_ExtractSubvector expects a vector type. 7561 if (VF.isVector() && Legal->isFirstOrderRecurrence(Phi)) 7562 return TTI.getShuffleCost( 7563 TargetTransformInfo::SK_ExtractSubvector, cast<VectorType>(VectorTy), 7564 None, VF.getKnownMinValue() - 1, FixedVectorType::get(RetTy, 1)); 7565 7566 // Phi nodes in non-header blocks (not inductions, reductions, etc.) are 7567 // converted into select instructions. We require N - 1 selects per phi 7568 // node, where N is the number of incoming values. 7569 if (VF.isVector() && Phi->getParent() != TheLoop->getHeader()) 7570 return (Phi->getNumIncomingValues() - 1) * 7571 TTI.getCmpSelInstrCost( 7572 Instruction::Select, ToVectorTy(Phi->getType(), VF), 7573 ToVectorTy(Type::getInt1Ty(Phi->getContext()), VF), 7574 CmpInst::BAD_ICMP_PREDICATE, CostKind); 7575 7576 return TTI.getCFInstrCost(Instruction::PHI, CostKind); 7577 } 7578 case Instruction::UDiv: 7579 case Instruction::SDiv: 7580 case Instruction::URem: 7581 case Instruction::SRem: 7582 // If we have a predicated instruction, it may not be executed for each 7583 // vector lane. Get the scalarization cost and scale this amount by the 7584 // probability of executing the predicated block. If the instruction is not 7585 // predicated, we fall through to the next case. 7586 if (VF.isVector() && isScalarWithPredication(I)) { 7587 InstructionCost Cost = 0; 7588 7589 // These instructions have a non-void type, so account for the phi nodes 7590 // that we will create. This cost is likely to be zero. The phi node 7591 // cost, if any, should be scaled by the block probability because it 7592 // models a copy at the end of each predicated block. 7593 Cost += VF.getKnownMinValue() * 7594 TTI.getCFInstrCost(Instruction::PHI, CostKind); 7595 7596 // The cost of the non-predicated instruction. 7597 Cost += VF.getKnownMinValue() * 7598 TTI.getArithmeticInstrCost(I->getOpcode(), RetTy, CostKind); 7599 7600 // The cost of insertelement and extractelement instructions needed for 7601 // scalarization. 7602 Cost += getScalarizationOverhead(I, VF); 7603 7604 // Scale the cost by the probability of executing the predicated blocks. 7605 // This assumes the predicated block for each vector lane is equally 7606 // likely. 7607 return Cost / getReciprocalPredBlockProb(); 7608 } 7609 LLVM_FALLTHROUGH; 7610 case Instruction::Add: 7611 case Instruction::FAdd: 7612 case Instruction::Sub: 7613 case Instruction::FSub: 7614 case Instruction::Mul: 7615 case Instruction::FMul: 7616 case Instruction::FDiv: 7617 case Instruction::FRem: 7618 case Instruction::Shl: 7619 case Instruction::LShr: 7620 case Instruction::AShr: 7621 case Instruction::And: 7622 case Instruction::Or: 7623 case Instruction::Xor: { 7624 // Since we will replace the stride by 1 the multiplication should go away. 7625 if (I->getOpcode() == Instruction::Mul && isStrideMul(I, Legal)) 7626 return 0; 7627 7628 // Detect reduction patterns 7629 InstructionCost RedCost; 7630 if ((RedCost = getReductionPatternCost(I, VF, VectorTy, CostKind)) 7631 .isValid()) 7632 return RedCost; 7633 7634 // Certain instructions can be cheaper to vectorize if they have a constant 7635 // second vector operand. One example of this are shifts on x86. 7636 Value *Op2 = I->getOperand(1); 7637 TargetTransformInfo::OperandValueProperties Op2VP; 7638 TargetTransformInfo::OperandValueKind Op2VK = 7639 TTI.getOperandInfo(Op2, Op2VP); 7640 if (Op2VK == TargetTransformInfo::OK_AnyValue && Legal->isUniform(Op2)) 7641 Op2VK = TargetTransformInfo::OK_UniformValue; 7642 7643 SmallVector<const Value *, 4> Operands(I->operand_values()); 7644 return TTI.getArithmeticInstrCost( 7645 I->getOpcode(), VectorTy, CostKind, TargetTransformInfo::OK_AnyValue, 7646 Op2VK, TargetTransformInfo::OP_None, Op2VP, Operands, I); 7647 } 7648 case Instruction::FNeg: { 7649 return TTI.getArithmeticInstrCost( 7650 I->getOpcode(), VectorTy, CostKind, TargetTransformInfo::OK_AnyValue, 7651 TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OP_None, 7652 TargetTransformInfo::OP_None, I->getOperand(0), I); 7653 } 7654 case Instruction::Select: { 7655 SelectInst *SI = cast<SelectInst>(I); 7656 const SCEV *CondSCEV = SE->getSCEV(SI->getCondition()); 7657 bool ScalarCond = (SE->isLoopInvariant(CondSCEV, TheLoop)); 7658 7659 const Value *Op0, *Op1; 7660 using namespace llvm::PatternMatch; 7661 if (!ScalarCond && (match(I, m_LogicalAnd(m_Value(Op0), m_Value(Op1))) || 7662 match(I, m_LogicalOr(m_Value(Op0), m_Value(Op1))))) { 7663 // select x, y, false --> x & y 7664 // select x, true, y --> x | y 7665 TTI::OperandValueProperties Op1VP = TTI::OP_None; 7666 TTI::OperandValueProperties Op2VP = TTI::OP_None; 7667 TTI::OperandValueKind Op1VK = TTI::getOperandInfo(Op0, Op1VP); 7668 TTI::OperandValueKind Op2VK = TTI::getOperandInfo(Op1, Op2VP); 7669 assert(Op0->getType()->getScalarSizeInBits() == 1 && 7670 Op1->getType()->getScalarSizeInBits() == 1); 7671 7672 SmallVector<const Value *, 2> Operands{Op0, Op1}; 7673 return TTI.getArithmeticInstrCost( 7674 match(I, m_LogicalOr()) ? Instruction::Or : Instruction::And, VectorTy, 7675 CostKind, Op1VK, Op2VK, Op1VP, Op2VP, Operands, I); 7676 } 7677 7678 Type *CondTy = SI->getCondition()->getType(); 7679 if (!ScalarCond) 7680 CondTy = VectorType::get(CondTy, VF); 7681 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, CondTy, 7682 CmpInst::BAD_ICMP_PREDICATE, CostKind, I); 7683 } 7684 case Instruction::ICmp: 7685 case Instruction::FCmp: { 7686 Type *ValTy = I->getOperand(0)->getType(); 7687 Instruction *Op0AsInstruction = dyn_cast<Instruction>(I->getOperand(0)); 7688 if (canTruncateToMinimalBitwidth(Op0AsInstruction, VF)) 7689 ValTy = IntegerType::get(ValTy->getContext(), MinBWs[Op0AsInstruction]); 7690 VectorTy = ToVectorTy(ValTy, VF); 7691 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, nullptr, 7692 CmpInst::BAD_ICMP_PREDICATE, CostKind, I); 7693 } 7694 case Instruction::Store: 7695 case Instruction::Load: { 7696 ElementCount Width = VF; 7697 if (Width.isVector()) { 7698 InstWidening Decision = getWideningDecision(I, Width); 7699 assert(Decision != CM_Unknown && 7700 "CM decision should be taken at this point"); 7701 if (Decision == CM_Scalarize) 7702 Width = ElementCount::getFixed(1); 7703 } 7704 VectorTy = ToVectorTy(getLoadStoreType(I), Width); 7705 return getMemoryInstructionCost(I, VF); 7706 } 7707 case Instruction::BitCast: 7708 if (I->getType()->isPointerTy()) 7709 return 0; 7710 LLVM_FALLTHROUGH; 7711 case Instruction::ZExt: 7712 case Instruction::SExt: 7713 case Instruction::FPToUI: 7714 case Instruction::FPToSI: 7715 case Instruction::FPExt: 7716 case Instruction::PtrToInt: 7717 case Instruction::IntToPtr: 7718 case Instruction::SIToFP: 7719 case Instruction::UIToFP: 7720 case Instruction::Trunc: 7721 case Instruction::FPTrunc: { 7722 // Computes the CastContextHint from a Load/Store instruction. 7723 auto ComputeCCH = [&](Instruction *I) -> TTI::CastContextHint { 7724 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) && 7725 "Expected a load or a store!"); 7726 7727 if (VF.isScalar() || !TheLoop->contains(I)) 7728 return TTI::CastContextHint::Normal; 7729 7730 switch (getWideningDecision(I, VF)) { 7731 case LoopVectorizationCostModel::CM_GatherScatter: 7732 return TTI::CastContextHint::GatherScatter; 7733 case LoopVectorizationCostModel::CM_Interleave: 7734 return TTI::CastContextHint::Interleave; 7735 case LoopVectorizationCostModel::CM_Scalarize: 7736 case LoopVectorizationCostModel::CM_Widen: 7737 return Legal->isMaskRequired(I) ? TTI::CastContextHint::Masked 7738 : TTI::CastContextHint::Normal; 7739 case LoopVectorizationCostModel::CM_Widen_Reverse: 7740 return TTI::CastContextHint::Reversed; 7741 case LoopVectorizationCostModel::CM_Unknown: 7742 llvm_unreachable("Instr did not go through cost modelling?"); 7743 } 7744 7745 llvm_unreachable("Unhandled case!"); 7746 }; 7747 7748 unsigned Opcode = I->getOpcode(); 7749 TTI::CastContextHint CCH = TTI::CastContextHint::None; 7750 // For Trunc, the context is the only user, which must be a StoreInst. 7751 if (Opcode == Instruction::Trunc || Opcode == Instruction::FPTrunc) { 7752 if (I->hasOneUse()) 7753 if (StoreInst *Store = dyn_cast<StoreInst>(*I->user_begin())) 7754 CCH = ComputeCCH(Store); 7755 } 7756 // For Z/Sext, the context is the operand, which must be a LoadInst. 7757 else if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt || 7758 Opcode == Instruction::FPExt) { 7759 if (LoadInst *Load = dyn_cast<LoadInst>(I->getOperand(0))) 7760 CCH = ComputeCCH(Load); 7761 } 7762 7763 // We optimize the truncation of induction variables having constant 7764 // integer steps. The cost of these truncations is the same as the scalar 7765 // operation. 7766 if (isOptimizableIVTruncate(I, VF)) { 7767 auto *Trunc = cast<TruncInst>(I); 7768 return TTI.getCastInstrCost(Instruction::Trunc, Trunc->getDestTy(), 7769 Trunc->getSrcTy(), CCH, CostKind, Trunc); 7770 } 7771 7772 // Detect reduction patterns 7773 InstructionCost RedCost; 7774 if ((RedCost = getReductionPatternCost(I, VF, VectorTy, CostKind)) 7775 .isValid()) 7776 return RedCost; 7777 7778 Type *SrcScalarTy = I->getOperand(0)->getType(); 7779 Type *SrcVecTy = 7780 VectorTy->isVectorTy() ? ToVectorTy(SrcScalarTy, VF) : SrcScalarTy; 7781 if (canTruncateToMinimalBitwidth(I, VF)) { 7782 // This cast is going to be shrunk. This may remove the cast or it might 7783 // turn it into slightly different cast. For example, if MinBW == 16, 7784 // "zext i8 %1 to i32" becomes "zext i8 %1 to i16". 7785 // 7786 // Calculate the modified src and dest types. 7787 Type *MinVecTy = VectorTy; 7788 if (Opcode == Instruction::Trunc) { 7789 SrcVecTy = smallestIntegerVectorType(SrcVecTy, MinVecTy); 7790 VectorTy = 7791 largestIntegerVectorType(ToVectorTy(I->getType(), VF), MinVecTy); 7792 } else if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) { 7793 SrcVecTy = largestIntegerVectorType(SrcVecTy, MinVecTy); 7794 VectorTy = 7795 smallestIntegerVectorType(ToVectorTy(I->getType(), VF), MinVecTy); 7796 } 7797 } 7798 7799 return TTI.getCastInstrCost(Opcode, VectorTy, SrcVecTy, CCH, CostKind, I); 7800 } 7801 case Instruction::Call: { 7802 bool NeedToScalarize; 7803 CallInst *CI = cast<CallInst>(I); 7804 InstructionCost CallCost = getVectorCallCost(CI, VF, NeedToScalarize); 7805 if (getVectorIntrinsicIDForCall(CI, TLI)) { 7806 InstructionCost IntrinsicCost = getVectorIntrinsicCost(CI, VF); 7807 return std::min(CallCost, IntrinsicCost); 7808 } 7809 return CallCost; 7810 } 7811 case Instruction::ExtractValue: 7812 return TTI.getInstructionCost(I, TTI::TCK_RecipThroughput); 7813 default: 7814 // This opcode is unknown. Assume that it is the same as 'mul'. 7815 return TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy, CostKind); 7816 } // end of switch. 7817 } 7818 7819 char LoopVectorize::ID = 0; 7820 7821 static const char lv_name[] = "Loop Vectorization"; 7822 7823 INITIALIZE_PASS_BEGIN(LoopVectorize, LV_NAME, lv_name, false, false) 7824 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass) 7825 INITIALIZE_PASS_DEPENDENCY(BasicAAWrapperPass) 7826 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) 7827 INITIALIZE_PASS_DEPENDENCY(GlobalsAAWrapperPass) 7828 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker) 7829 INITIALIZE_PASS_DEPENDENCY(BlockFrequencyInfoWrapperPass) 7830 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass) 7831 INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass) 7832 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass) 7833 INITIALIZE_PASS_DEPENDENCY(LoopAccessLegacyAnalysis) 7834 INITIALIZE_PASS_DEPENDENCY(DemandedBitsWrapperPass) 7835 INITIALIZE_PASS_DEPENDENCY(OptimizationRemarkEmitterWrapperPass) 7836 INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass) 7837 INITIALIZE_PASS_DEPENDENCY(InjectTLIMappingsLegacy) 7838 INITIALIZE_PASS_END(LoopVectorize, LV_NAME, lv_name, false, false) 7839 7840 namespace llvm { 7841 7842 Pass *createLoopVectorizePass() { return new LoopVectorize(); } 7843 7844 Pass *createLoopVectorizePass(bool InterleaveOnlyWhenForced, 7845 bool VectorizeOnlyWhenForced) { 7846 return new LoopVectorize(InterleaveOnlyWhenForced, VectorizeOnlyWhenForced); 7847 } 7848 7849 } // end namespace llvm 7850 7851 bool LoopVectorizationCostModel::isConsecutiveLoadOrStore(Instruction *Inst) { 7852 // Check if the pointer operand of a load or store instruction is 7853 // consecutive. 7854 if (auto *Ptr = getLoadStorePointerOperand(Inst)) 7855 return Legal->isConsecutivePtr(Ptr); 7856 return false; 7857 } 7858 7859 void LoopVectorizationCostModel::collectValuesToIgnore() { 7860 // Ignore ephemeral values. 7861 CodeMetrics::collectEphemeralValues(TheLoop, AC, ValuesToIgnore); 7862 7863 // Ignore type-promoting instructions we identified during reduction 7864 // detection. 7865 for (auto &Reduction : Legal->getReductionVars()) { 7866 RecurrenceDescriptor &RedDes = Reduction.second; 7867 const SmallPtrSetImpl<Instruction *> &Casts = RedDes.getCastInsts(); 7868 VecValuesToIgnore.insert(Casts.begin(), Casts.end()); 7869 } 7870 // Ignore type-casting instructions we identified during induction 7871 // detection. 7872 for (auto &Induction : Legal->getInductionVars()) { 7873 InductionDescriptor &IndDes = Induction.second; 7874 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts(); 7875 VecValuesToIgnore.insert(Casts.begin(), Casts.end()); 7876 } 7877 } 7878 7879 void LoopVectorizationCostModel::collectInLoopReductions() { 7880 for (auto &Reduction : Legal->getReductionVars()) { 7881 PHINode *Phi = Reduction.first; 7882 RecurrenceDescriptor &RdxDesc = Reduction.second; 7883 7884 // We don't collect reductions that are type promoted (yet). 7885 if (RdxDesc.getRecurrenceType() != Phi->getType()) 7886 continue; 7887 7888 // If the target would prefer this reduction to happen "in-loop", then we 7889 // want to record it as such. 7890 unsigned Opcode = RdxDesc.getOpcode(); 7891 if (!PreferInLoopReductions && !useOrderedReductions(RdxDesc) && 7892 !TTI.preferInLoopReduction(Opcode, Phi->getType(), 7893 TargetTransformInfo::ReductionFlags())) 7894 continue; 7895 7896 // Check that we can correctly put the reductions into the loop, by 7897 // finding the chain of operations that leads from the phi to the loop 7898 // exit value. 7899 SmallVector<Instruction *, 4> ReductionOperations = 7900 RdxDesc.getReductionOpChain(Phi, TheLoop); 7901 bool InLoop = !ReductionOperations.empty(); 7902 if (InLoop) { 7903 InLoopReductionChains[Phi] = ReductionOperations; 7904 // Add the elements to InLoopReductionImmediateChains for cost modelling. 7905 Instruction *LastChain = Phi; 7906 for (auto *I : ReductionOperations) { 7907 InLoopReductionImmediateChains[I] = LastChain; 7908 LastChain = I; 7909 } 7910 } 7911 LLVM_DEBUG(dbgs() << "LV: Using " << (InLoop ? "inloop" : "out of loop") 7912 << " reduction for phi: " << *Phi << "\n"); 7913 } 7914 } 7915 7916 // TODO: we could return a pair of values that specify the max VF and 7917 // min VF, to be used in `buildVPlans(MinVF, MaxVF)` instead of 7918 // `buildVPlans(VF, VF)`. We cannot do it because VPLAN at the moment 7919 // doesn't have a cost model that can choose which plan to execute if 7920 // more than one is generated. 7921 static unsigned determineVPlanVF(const unsigned WidestVectorRegBits, 7922 LoopVectorizationCostModel &CM) { 7923 unsigned WidestType; 7924 std::tie(std::ignore, WidestType) = CM.getSmallestAndWidestTypes(); 7925 return WidestVectorRegBits / WidestType; 7926 } 7927 7928 VectorizationFactor 7929 LoopVectorizationPlanner::planInVPlanNativePath(ElementCount UserVF) { 7930 assert(!UserVF.isScalable() && "scalable vectors not yet supported"); 7931 ElementCount VF = UserVF; 7932 // Outer loop handling: They may require CFG and instruction level 7933 // transformations before even evaluating whether vectorization is profitable. 7934 // Since we cannot modify the incoming IR, we need to build VPlan upfront in 7935 // the vectorization pipeline. 7936 if (!OrigLoop->isInnermost()) { 7937 // If the user doesn't provide a vectorization factor, determine a 7938 // reasonable one. 7939 if (UserVF.isZero()) { 7940 VF = ElementCount::getFixed(determineVPlanVF( 7941 TTI->getRegisterBitWidth(TargetTransformInfo::RGK_FixedWidthVector) 7942 .getFixedSize(), 7943 CM)); 7944 LLVM_DEBUG(dbgs() << "LV: VPlan computed VF " << VF << ".\n"); 7945 7946 // Make sure we have a VF > 1 for stress testing. 7947 if (VPlanBuildStressTest && (VF.isScalar() || VF.isZero())) { 7948 LLVM_DEBUG(dbgs() << "LV: VPlan stress testing: " 7949 << "overriding computed VF.\n"); 7950 VF = ElementCount::getFixed(4); 7951 } 7952 } 7953 assert(EnableVPlanNativePath && "VPlan-native path is not enabled."); 7954 assert(isPowerOf2_32(VF.getKnownMinValue()) && 7955 "VF needs to be a power of two"); 7956 LLVM_DEBUG(dbgs() << "LV: Using " << (!UserVF.isZero() ? "user " : "") 7957 << "VF " << VF << " to build VPlans.\n"); 7958 buildVPlans(VF, VF); 7959 7960 // For VPlan build stress testing, we bail out after VPlan construction. 7961 if (VPlanBuildStressTest) 7962 return VectorizationFactor::Disabled(); 7963 7964 return {VF, 0 /*Cost*/}; 7965 } 7966 7967 LLVM_DEBUG( 7968 dbgs() << "LV: Not vectorizing. Inner loops aren't supported in the " 7969 "VPlan-native path.\n"); 7970 return VectorizationFactor::Disabled(); 7971 } 7972 7973 Optional<VectorizationFactor> 7974 LoopVectorizationPlanner::plan(ElementCount UserVF, unsigned UserIC) { 7975 assert(OrigLoop->isInnermost() && "Inner loop expected."); 7976 FixedScalableVFPair MaxFactors = CM.computeMaxVF(UserVF, UserIC); 7977 if (!MaxFactors) // Cases that should not to be vectorized nor interleaved. 7978 return None; 7979 7980 // Invalidate interleave groups if all blocks of loop will be predicated. 7981 if (CM.blockNeedsPredication(OrigLoop->getHeader()) && 7982 !useMaskedInterleavedAccesses(*TTI)) { 7983 LLVM_DEBUG( 7984 dbgs() 7985 << "LV: Invalidate all interleaved groups due to fold-tail by masking " 7986 "which requires masked-interleaved support.\n"); 7987 if (CM.InterleaveInfo.invalidateGroups()) 7988 // Invalidating interleave groups also requires invalidating all decisions 7989 // based on them, which includes widening decisions and uniform and scalar 7990 // values. 7991 CM.invalidateCostModelingDecisions(); 7992 } 7993 7994 ElementCount MaxUserVF = 7995 UserVF.isScalable() ? MaxFactors.ScalableVF : MaxFactors.FixedVF; 7996 bool UserVFIsLegal = ElementCount::isKnownLE(UserVF, MaxUserVF); 7997 if (!UserVF.isZero() && UserVFIsLegal) { 7998 LLVM_DEBUG(dbgs() << "LV: Using " << (UserVFIsLegal ? "user" : "max") 7999 << " VF " << UserVF << ".\n"); 8000 assert(isPowerOf2_32(UserVF.getKnownMinValue()) && 8001 "VF needs to be a power of two"); 8002 // Collect the instructions (and their associated costs) that will be more 8003 // profitable to scalarize. 8004 CM.selectUserVectorizationFactor(UserVF); 8005 CM.collectInLoopReductions(); 8006 buildVPlansWithVPRecipes(UserVF, UserVF); 8007 LLVM_DEBUG(printPlans(dbgs())); 8008 return {{UserVF, 0}}; 8009 } 8010 8011 // Populate the set of Vectorization Factor Candidates. 8012 ElementCountSet VFCandidates; 8013 for (auto VF = ElementCount::getFixed(1); 8014 ElementCount::isKnownLE(VF, MaxFactors.FixedVF); VF *= 2) 8015 VFCandidates.insert(VF); 8016 for (auto VF = ElementCount::getScalable(1); 8017 ElementCount::isKnownLE(VF, MaxFactors.ScalableVF); VF *= 2) 8018 VFCandidates.insert(VF); 8019 8020 for (const auto &VF : VFCandidates) { 8021 // Collect Uniform and Scalar instructions after vectorization with VF. 8022 CM.collectUniformsAndScalars(VF); 8023 8024 // Collect the instructions (and their associated costs) that will be more 8025 // profitable to scalarize. 8026 if (VF.isVector()) 8027 CM.collectInstsToScalarize(VF); 8028 } 8029 8030 CM.collectInLoopReductions(); 8031 buildVPlansWithVPRecipes(ElementCount::getFixed(1), MaxFactors.FixedVF); 8032 buildVPlansWithVPRecipes(ElementCount::getScalable(1), MaxFactors.ScalableVF); 8033 8034 LLVM_DEBUG(printPlans(dbgs())); 8035 if (!MaxFactors.hasVector()) 8036 return VectorizationFactor::Disabled(); 8037 8038 // Select the optimal vectorization factor. 8039 auto SelectedVF = CM.selectVectorizationFactor(VFCandidates); 8040 8041 // Check if it is profitable to vectorize with runtime checks. 8042 unsigned NumRuntimePointerChecks = Requirements.getNumRuntimePointerChecks(); 8043 if (SelectedVF.Width.getKnownMinValue() > 1 && NumRuntimePointerChecks) { 8044 bool PragmaThresholdReached = 8045 NumRuntimePointerChecks > PragmaVectorizeMemoryCheckThreshold; 8046 bool ThresholdReached = 8047 NumRuntimePointerChecks > VectorizerParams::RuntimeMemoryCheckThreshold; 8048 if ((ThresholdReached && !Hints.allowReordering()) || 8049 PragmaThresholdReached) { 8050 ORE->emit([&]() { 8051 return OptimizationRemarkAnalysisAliasing( 8052 DEBUG_TYPE, "CantReorderMemOps", OrigLoop->getStartLoc(), 8053 OrigLoop->getHeader()) 8054 << "loop not vectorized: cannot prove it is safe to reorder " 8055 "memory operations"; 8056 }); 8057 LLVM_DEBUG(dbgs() << "LV: Too many memory checks needed.\n"); 8058 Hints.emitRemarkWithHints(); 8059 return VectorizationFactor::Disabled(); 8060 } 8061 } 8062 return SelectedVF; 8063 } 8064 8065 void LoopVectorizationPlanner::setBestPlan(ElementCount VF, unsigned UF) { 8066 LLVM_DEBUG(dbgs() << "Setting best plan to VF=" << VF << ", UF=" << UF 8067 << '\n'); 8068 BestVF = VF; 8069 BestUF = UF; 8070 8071 erase_if(VPlans, [VF](const VPlanPtr &Plan) { 8072 return !Plan->hasVF(VF); 8073 }); 8074 assert(VPlans.size() == 1 && "Best VF has not a single VPlan."); 8075 } 8076 8077 void LoopVectorizationPlanner::executePlan(InnerLoopVectorizer &ILV, 8078 DominatorTree *DT) { 8079 // Perform the actual loop transformation. 8080 8081 // 1. Create a new empty loop. Unlink the old loop and connect the new one. 8082 assert(BestVF.hasValue() && "Vectorization Factor is missing"); 8083 assert(VPlans.size() == 1 && "Not a single VPlan to execute."); 8084 8085 VPTransformState State{ 8086 *BestVF, BestUF, LI, DT, ILV.Builder, &ILV, VPlans.front().get()}; 8087 State.CFG.PrevBB = ILV.createVectorizedLoopSkeleton(); 8088 State.TripCount = ILV.getOrCreateTripCount(nullptr); 8089 State.CanonicalIV = ILV.Induction; 8090 8091 ILV.printDebugTracesAtStart(); 8092 8093 //===------------------------------------------------===// 8094 // 8095 // Notice: any optimization or new instruction that go 8096 // into the code below should also be implemented in 8097 // the cost-model. 8098 // 8099 //===------------------------------------------------===// 8100 8101 // 2. Copy and widen instructions from the old loop into the new loop. 8102 VPlans.front()->execute(&State); 8103 8104 // 3. Fix the vectorized code: take care of header phi's, live-outs, 8105 // predication, updating analyses. 8106 ILV.fixVectorizedLoop(State); 8107 8108 ILV.printDebugTracesAtEnd(); 8109 } 8110 8111 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 8112 void LoopVectorizationPlanner::printPlans(raw_ostream &O) { 8113 for (const auto &Plan : VPlans) 8114 if (PrintVPlansInDotFormat) 8115 Plan->printDOT(O); 8116 else 8117 Plan->print(O); 8118 } 8119 #endif 8120 8121 void LoopVectorizationPlanner::collectTriviallyDeadInstructions( 8122 SmallPtrSetImpl<Instruction *> &DeadInstructions) { 8123 8124 // We create new control-flow for the vectorized loop, so the original exit 8125 // conditions will be dead after vectorization if it's only used by the 8126 // terminator 8127 SmallVector<BasicBlock*> ExitingBlocks; 8128 OrigLoop->getExitingBlocks(ExitingBlocks); 8129 for (auto *BB : ExitingBlocks) { 8130 auto *Cmp = dyn_cast<Instruction>(BB->getTerminator()->getOperand(0)); 8131 if (!Cmp || !Cmp->hasOneUse()) 8132 continue; 8133 8134 // TODO: we should introduce a getUniqueExitingBlocks on Loop 8135 if (!DeadInstructions.insert(Cmp).second) 8136 continue; 8137 8138 // The operands of the icmp is often a dead trunc, used by IndUpdate. 8139 // TODO: can recurse through operands in general 8140 for (Value *Op : Cmp->operands()) { 8141 if (isa<TruncInst>(Op) && Op->hasOneUse()) 8142 DeadInstructions.insert(cast<Instruction>(Op)); 8143 } 8144 } 8145 8146 // We create new "steps" for induction variable updates to which the original 8147 // induction variables map. An original update instruction will be dead if 8148 // all its users except the induction variable are dead. 8149 auto *Latch = OrigLoop->getLoopLatch(); 8150 for (auto &Induction : Legal->getInductionVars()) { 8151 PHINode *Ind = Induction.first; 8152 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch)); 8153 8154 // If the tail is to be folded by masking, the primary induction variable, 8155 // if exists, isn't dead: it will be used for masking. Don't kill it. 8156 if (CM.foldTailByMasking() && IndUpdate == Legal->getPrimaryInduction()) 8157 continue; 8158 8159 if (llvm::all_of(IndUpdate->users(), [&](User *U) -> bool { 8160 return U == Ind || DeadInstructions.count(cast<Instruction>(U)); 8161 })) 8162 DeadInstructions.insert(IndUpdate); 8163 8164 // We record as "Dead" also the type-casting instructions we had identified 8165 // during induction analysis. We don't need any handling for them in the 8166 // vectorized loop because we have proven that, under a proper runtime 8167 // test guarding the vectorized loop, the value of the phi, and the casted 8168 // value of the phi, are the same. The last instruction in this casting chain 8169 // will get its scalar/vector/widened def from the scalar/vector/widened def 8170 // of the respective phi node. Any other casts in the induction def-use chain 8171 // have no other uses outside the phi update chain, and will be ignored. 8172 InductionDescriptor &IndDes = Induction.second; 8173 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts(); 8174 DeadInstructions.insert(Casts.begin(), Casts.end()); 8175 } 8176 } 8177 8178 Value *InnerLoopUnroller::reverseVector(Value *Vec) { return Vec; } 8179 8180 Value *InnerLoopUnroller::getBroadcastInstrs(Value *V) { return V; } 8181 8182 Value *InnerLoopUnroller::getStepVector(Value *Val, int StartIdx, Value *Step, 8183 Instruction::BinaryOps BinOp) { 8184 // When unrolling and the VF is 1, we only need to add a simple scalar. 8185 Type *Ty = Val->getType(); 8186 assert(!Ty->isVectorTy() && "Val must be a scalar"); 8187 8188 if (Ty->isFloatingPointTy()) { 8189 Constant *C = ConstantFP::get(Ty, (double)StartIdx); 8190 8191 // Floating-point operations inherit FMF via the builder's flags. 8192 Value *MulOp = Builder.CreateFMul(C, Step); 8193 return Builder.CreateBinOp(BinOp, Val, MulOp); 8194 } 8195 Constant *C = ConstantInt::get(Ty, StartIdx); 8196 return Builder.CreateAdd(Val, Builder.CreateMul(C, Step), "induction"); 8197 } 8198 8199 static void AddRuntimeUnrollDisableMetaData(Loop *L) { 8200 SmallVector<Metadata *, 4> MDs; 8201 // Reserve first location for self reference to the LoopID metadata node. 8202 MDs.push_back(nullptr); 8203 bool IsUnrollMetadata = false; 8204 MDNode *LoopID = L->getLoopID(); 8205 if (LoopID) { 8206 // First find existing loop unrolling disable metadata. 8207 for (unsigned i = 1, ie = LoopID->getNumOperands(); i < ie; ++i) { 8208 auto *MD = dyn_cast<MDNode>(LoopID->getOperand(i)); 8209 if (MD) { 8210 const auto *S = dyn_cast<MDString>(MD->getOperand(0)); 8211 IsUnrollMetadata = 8212 S && S->getString().startswith("llvm.loop.unroll.disable"); 8213 } 8214 MDs.push_back(LoopID->getOperand(i)); 8215 } 8216 } 8217 8218 if (!IsUnrollMetadata) { 8219 // Add runtime unroll disable metadata. 8220 LLVMContext &Context = L->getHeader()->getContext(); 8221 SmallVector<Metadata *, 1> DisableOperands; 8222 DisableOperands.push_back( 8223 MDString::get(Context, "llvm.loop.unroll.runtime.disable")); 8224 MDNode *DisableNode = MDNode::get(Context, DisableOperands); 8225 MDs.push_back(DisableNode); 8226 MDNode *NewLoopID = MDNode::get(Context, MDs); 8227 // Set operand 0 to refer to the loop id itself. 8228 NewLoopID->replaceOperandWith(0, NewLoopID); 8229 L->setLoopID(NewLoopID); 8230 } 8231 } 8232 8233 //===--------------------------------------------------------------------===// 8234 // EpilogueVectorizerMainLoop 8235 //===--------------------------------------------------------------------===// 8236 8237 /// This function is partially responsible for generating the control flow 8238 /// depicted in https://llvm.org/docs/Vectorizers.html#epilogue-vectorization. 8239 BasicBlock *EpilogueVectorizerMainLoop::createEpilogueVectorizedLoopSkeleton() { 8240 MDNode *OrigLoopID = OrigLoop->getLoopID(); 8241 Loop *Lp = createVectorLoopSkeleton(""); 8242 8243 // Generate the code to check the minimum iteration count of the vector 8244 // epilogue (see below). 8245 EPI.EpilogueIterationCountCheck = 8246 emitMinimumIterationCountCheck(Lp, LoopScalarPreHeader, true); 8247 EPI.EpilogueIterationCountCheck->setName("iter.check"); 8248 8249 // Generate the code to check any assumptions that we've made for SCEV 8250 // expressions. 8251 EPI.SCEVSafetyCheck = emitSCEVChecks(Lp, LoopScalarPreHeader); 8252 8253 // Generate the code that checks at runtime if arrays overlap. We put the 8254 // checks into a separate block to make the more common case of few elements 8255 // faster. 8256 EPI.MemSafetyCheck = emitMemRuntimeChecks(Lp, LoopScalarPreHeader); 8257 8258 // Generate the iteration count check for the main loop, *after* the check 8259 // for the epilogue loop, so that the path-length is shorter for the case 8260 // that goes directly through the vector epilogue. The longer-path length for 8261 // the main loop is compensated for, by the gain from vectorizing the larger 8262 // trip count. Note: the branch will get updated later on when we vectorize 8263 // the epilogue. 8264 EPI.MainLoopIterationCountCheck = 8265 emitMinimumIterationCountCheck(Lp, LoopScalarPreHeader, false); 8266 8267 // Generate the induction variable. 8268 OldInduction = Legal->getPrimaryInduction(); 8269 Type *IdxTy = Legal->getWidestInductionType(); 8270 Value *StartIdx = ConstantInt::get(IdxTy, 0); 8271 Constant *Step = ConstantInt::get(IdxTy, VF.getKnownMinValue() * UF); 8272 Value *CountRoundDown = getOrCreateVectorTripCount(Lp); 8273 EPI.VectorTripCount = CountRoundDown; 8274 Induction = 8275 createInductionVariable(Lp, StartIdx, CountRoundDown, Step, 8276 getDebugLocFromInstOrOperands(OldInduction)); 8277 8278 // Skip induction resume value creation here because they will be created in 8279 // the second pass. If we created them here, they wouldn't be used anyway, 8280 // because the vplan in the second pass still contains the inductions from the 8281 // original loop. 8282 8283 return completeLoopSkeleton(Lp, OrigLoopID); 8284 } 8285 8286 void EpilogueVectorizerMainLoop::printDebugTracesAtStart() { 8287 LLVM_DEBUG({ 8288 dbgs() << "Create Skeleton for epilogue vectorized loop (first pass)\n" 8289 << "Main Loop VF:" << EPI.MainLoopVF.getKnownMinValue() 8290 << ", Main Loop UF:" << EPI.MainLoopUF 8291 << ", Epilogue Loop VF:" << EPI.EpilogueVF.getKnownMinValue() 8292 << ", Epilogue Loop UF:" << EPI.EpilogueUF << "\n"; 8293 }); 8294 } 8295 8296 void EpilogueVectorizerMainLoop::printDebugTracesAtEnd() { 8297 DEBUG_WITH_TYPE(VerboseDebug, { 8298 dbgs() << "intermediate fn:\n" << *Induction->getFunction() << "\n"; 8299 }); 8300 } 8301 8302 BasicBlock *EpilogueVectorizerMainLoop::emitMinimumIterationCountCheck( 8303 Loop *L, BasicBlock *Bypass, bool ForEpilogue) { 8304 assert(L && "Expected valid Loop."); 8305 assert(Bypass && "Expected valid bypass basic block."); 8306 unsigned VFactor = 8307 ForEpilogue ? EPI.EpilogueVF.getKnownMinValue() : VF.getKnownMinValue(); 8308 unsigned UFactor = ForEpilogue ? EPI.EpilogueUF : UF; 8309 Value *Count = getOrCreateTripCount(L); 8310 // Reuse existing vector loop preheader for TC checks. 8311 // Note that new preheader block is generated for vector loop. 8312 BasicBlock *const TCCheckBlock = LoopVectorPreHeader; 8313 IRBuilder<> Builder(TCCheckBlock->getTerminator()); 8314 8315 // Generate code to check if the loop's trip count is less than VF * UF of the 8316 // main vector loop. 8317 auto P = 8318 Cost->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE : ICmpInst::ICMP_ULT; 8319 8320 Value *CheckMinIters = Builder.CreateICmp( 8321 P, Count, ConstantInt::get(Count->getType(), VFactor * UFactor), 8322 "min.iters.check"); 8323 8324 if (!ForEpilogue) 8325 TCCheckBlock->setName("vector.main.loop.iter.check"); 8326 8327 // Create new preheader for vector loop. 8328 LoopVectorPreHeader = SplitBlock(TCCheckBlock, TCCheckBlock->getTerminator(), 8329 DT, LI, nullptr, "vector.ph"); 8330 8331 if (ForEpilogue) { 8332 assert(DT->properlyDominates(DT->getNode(TCCheckBlock), 8333 DT->getNode(Bypass)->getIDom()) && 8334 "TC check is expected to dominate Bypass"); 8335 8336 // Update dominator for Bypass & LoopExit. 8337 DT->changeImmediateDominator(Bypass, TCCheckBlock); 8338 DT->changeImmediateDominator(LoopExitBlock, TCCheckBlock); 8339 8340 LoopBypassBlocks.push_back(TCCheckBlock); 8341 8342 // Save the trip count so we don't have to regenerate it in the 8343 // vec.epilog.iter.check. This is safe to do because the trip count 8344 // generated here dominates the vector epilog iter check. 8345 EPI.TripCount = Count; 8346 } 8347 8348 ReplaceInstWithInst( 8349 TCCheckBlock->getTerminator(), 8350 BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters)); 8351 8352 return TCCheckBlock; 8353 } 8354 8355 //===--------------------------------------------------------------------===// 8356 // EpilogueVectorizerEpilogueLoop 8357 //===--------------------------------------------------------------------===// 8358 8359 /// This function is partially responsible for generating the control flow 8360 /// depicted in https://llvm.org/docs/Vectorizers.html#epilogue-vectorization. 8361 BasicBlock * 8362 EpilogueVectorizerEpilogueLoop::createEpilogueVectorizedLoopSkeleton() { 8363 MDNode *OrigLoopID = OrigLoop->getLoopID(); 8364 Loop *Lp = createVectorLoopSkeleton("vec.epilog."); 8365 8366 // Now, compare the remaining count and if there aren't enough iterations to 8367 // execute the vectorized epilogue skip to the scalar part. 8368 BasicBlock *VecEpilogueIterationCountCheck = LoopVectorPreHeader; 8369 VecEpilogueIterationCountCheck->setName("vec.epilog.iter.check"); 8370 LoopVectorPreHeader = 8371 SplitBlock(LoopVectorPreHeader, LoopVectorPreHeader->getTerminator(), DT, 8372 LI, nullptr, "vec.epilog.ph"); 8373 emitMinimumVectorEpilogueIterCountCheck(Lp, LoopScalarPreHeader, 8374 VecEpilogueIterationCountCheck); 8375 8376 // Adjust the control flow taking the state info from the main loop 8377 // vectorization into account. 8378 assert(EPI.MainLoopIterationCountCheck && EPI.EpilogueIterationCountCheck && 8379 "expected this to be saved from the previous pass."); 8380 EPI.MainLoopIterationCountCheck->getTerminator()->replaceUsesOfWith( 8381 VecEpilogueIterationCountCheck, LoopVectorPreHeader); 8382 8383 DT->changeImmediateDominator(LoopVectorPreHeader, 8384 EPI.MainLoopIterationCountCheck); 8385 8386 EPI.EpilogueIterationCountCheck->getTerminator()->replaceUsesOfWith( 8387 VecEpilogueIterationCountCheck, LoopScalarPreHeader); 8388 8389 if (EPI.SCEVSafetyCheck) 8390 EPI.SCEVSafetyCheck->getTerminator()->replaceUsesOfWith( 8391 VecEpilogueIterationCountCheck, LoopScalarPreHeader); 8392 if (EPI.MemSafetyCheck) 8393 EPI.MemSafetyCheck->getTerminator()->replaceUsesOfWith( 8394 VecEpilogueIterationCountCheck, LoopScalarPreHeader); 8395 8396 DT->changeImmediateDominator( 8397 VecEpilogueIterationCountCheck, 8398 VecEpilogueIterationCountCheck->getSinglePredecessor()); 8399 8400 DT->changeImmediateDominator(LoopScalarPreHeader, 8401 EPI.EpilogueIterationCountCheck); 8402 DT->changeImmediateDominator(LoopExitBlock, EPI.EpilogueIterationCountCheck); 8403 8404 // Keep track of bypass blocks, as they feed start values to the induction 8405 // phis in the scalar loop preheader. 8406 if (EPI.SCEVSafetyCheck) 8407 LoopBypassBlocks.push_back(EPI.SCEVSafetyCheck); 8408 if (EPI.MemSafetyCheck) 8409 LoopBypassBlocks.push_back(EPI.MemSafetyCheck); 8410 LoopBypassBlocks.push_back(EPI.EpilogueIterationCountCheck); 8411 8412 // Generate a resume induction for the vector epilogue and put it in the 8413 // vector epilogue preheader 8414 Type *IdxTy = Legal->getWidestInductionType(); 8415 PHINode *EPResumeVal = PHINode::Create(IdxTy, 2, "vec.epilog.resume.val", 8416 LoopVectorPreHeader->getFirstNonPHI()); 8417 EPResumeVal->addIncoming(EPI.VectorTripCount, VecEpilogueIterationCountCheck); 8418 EPResumeVal->addIncoming(ConstantInt::get(IdxTy, 0), 8419 EPI.MainLoopIterationCountCheck); 8420 8421 // Generate the induction variable. 8422 OldInduction = Legal->getPrimaryInduction(); 8423 Value *CountRoundDown = getOrCreateVectorTripCount(Lp); 8424 Constant *Step = ConstantInt::get(IdxTy, VF.getKnownMinValue() * UF); 8425 Value *StartIdx = EPResumeVal; 8426 Induction = 8427 createInductionVariable(Lp, StartIdx, CountRoundDown, Step, 8428 getDebugLocFromInstOrOperands(OldInduction)); 8429 8430 // Generate induction resume values. These variables save the new starting 8431 // indexes for the scalar loop. They are used to test if there are any tail 8432 // iterations left once the vector loop has completed. 8433 // Note that when the vectorized epilogue is skipped due to iteration count 8434 // check, then the resume value for the induction variable comes from 8435 // the trip count of the main vector loop, hence passing the AdditionalBypass 8436 // argument. 8437 createInductionResumeValues(Lp, CountRoundDown, 8438 {VecEpilogueIterationCountCheck, 8439 EPI.VectorTripCount} /* AdditionalBypass */); 8440 8441 AddRuntimeUnrollDisableMetaData(Lp); 8442 return completeLoopSkeleton(Lp, OrigLoopID); 8443 } 8444 8445 BasicBlock * 8446 EpilogueVectorizerEpilogueLoop::emitMinimumVectorEpilogueIterCountCheck( 8447 Loop *L, BasicBlock *Bypass, BasicBlock *Insert) { 8448 8449 assert(EPI.TripCount && 8450 "Expected trip count to have been safed in the first pass."); 8451 assert( 8452 (!isa<Instruction>(EPI.TripCount) || 8453 DT->dominates(cast<Instruction>(EPI.TripCount)->getParent(), Insert)) && 8454 "saved trip count does not dominate insertion point."); 8455 Value *TC = EPI.TripCount; 8456 IRBuilder<> Builder(Insert->getTerminator()); 8457 Value *Count = Builder.CreateSub(TC, EPI.VectorTripCount, "n.vec.remaining"); 8458 8459 // Generate code to check if the loop's trip count is less than VF * UF of the 8460 // vector epilogue loop. 8461 auto P = 8462 Cost->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE : ICmpInst::ICMP_ULT; 8463 8464 Value *CheckMinIters = Builder.CreateICmp( 8465 P, Count, 8466 ConstantInt::get(Count->getType(), 8467 EPI.EpilogueVF.getKnownMinValue() * EPI.EpilogueUF), 8468 "min.epilog.iters.check"); 8469 8470 ReplaceInstWithInst( 8471 Insert->getTerminator(), 8472 BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters)); 8473 8474 LoopBypassBlocks.push_back(Insert); 8475 return Insert; 8476 } 8477 8478 void EpilogueVectorizerEpilogueLoop::printDebugTracesAtStart() { 8479 LLVM_DEBUG({ 8480 dbgs() << "Create Skeleton for epilogue vectorized loop (second pass)\n" 8481 << "Epilogue Loop VF:" << EPI.EpilogueVF.getKnownMinValue() 8482 << ", Epilogue Loop UF:" << EPI.EpilogueUF << "\n"; 8483 }); 8484 } 8485 8486 void EpilogueVectorizerEpilogueLoop::printDebugTracesAtEnd() { 8487 DEBUG_WITH_TYPE(VerboseDebug, { 8488 dbgs() << "final fn:\n" << *Induction->getFunction() << "\n"; 8489 }); 8490 } 8491 8492 bool LoopVectorizationPlanner::getDecisionAndClampRange( 8493 const std::function<bool(ElementCount)> &Predicate, VFRange &Range) { 8494 assert(!Range.isEmpty() && "Trying to test an empty VF range."); 8495 bool PredicateAtRangeStart = Predicate(Range.Start); 8496 8497 for (ElementCount TmpVF = Range.Start * 2; 8498 ElementCount::isKnownLT(TmpVF, Range.End); TmpVF *= 2) 8499 if (Predicate(TmpVF) != PredicateAtRangeStart) { 8500 Range.End = TmpVF; 8501 break; 8502 } 8503 8504 return PredicateAtRangeStart; 8505 } 8506 8507 /// Build VPlans for the full range of feasible VF's = {\p MinVF, 2 * \p MinVF, 8508 /// 4 * \p MinVF, ..., \p MaxVF} by repeatedly building a VPlan for a sub-range 8509 /// of VF's starting at a given VF and extending it as much as possible. Each 8510 /// vectorization decision can potentially shorten this sub-range during 8511 /// buildVPlan(). 8512 void LoopVectorizationPlanner::buildVPlans(ElementCount MinVF, 8513 ElementCount MaxVF) { 8514 auto MaxVFPlusOne = MaxVF.getWithIncrement(1); 8515 for (ElementCount VF = MinVF; ElementCount::isKnownLT(VF, MaxVFPlusOne);) { 8516 VFRange SubRange = {VF, MaxVFPlusOne}; 8517 VPlans.push_back(buildVPlan(SubRange)); 8518 VF = SubRange.End; 8519 } 8520 } 8521 8522 VPValue *VPRecipeBuilder::createEdgeMask(BasicBlock *Src, BasicBlock *Dst, 8523 VPlanPtr &Plan) { 8524 assert(is_contained(predecessors(Dst), Src) && "Invalid edge"); 8525 8526 // Look for cached value. 8527 std::pair<BasicBlock *, BasicBlock *> Edge(Src, Dst); 8528 EdgeMaskCacheTy::iterator ECEntryIt = EdgeMaskCache.find(Edge); 8529 if (ECEntryIt != EdgeMaskCache.end()) 8530 return ECEntryIt->second; 8531 8532 VPValue *SrcMask = createBlockInMask(Src, Plan); 8533 8534 // The terminator has to be a branch inst! 8535 BranchInst *BI = dyn_cast<BranchInst>(Src->getTerminator()); 8536 assert(BI && "Unexpected terminator found"); 8537 8538 if (!BI->isConditional() || BI->getSuccessor(0) == BI->getSuccessor(1)) 8539 return EdgeMaskCache[Edge] = SrcMask; 8540 8541 // If source is an exiting block, we know the exit edge is dynamically dead 8542 // in the vector loop, and thus we don't need to restrict the mask. Avoid 8543 // adding uses of an otherwise potentially dead instruction. 8544 if (OrigLoop->isLoopExiting(Src)) 8545 return EdgeMaskCache[Edge] = SrcMask; 8546 8547 VPValue *EdgeMask = Plan->getOrAddVPValue(BI->getCondition()); 8548 assert(EdgeMask && "No Edge Mask found for condition"); 8549 8550 if (BI->getSuccessor(0) != Dst) 8551 EdgeMask = Builder.createNot(EdgeMask); 8552 8553 if (SrcMask) { // Otherwise block in-mask is all-one, no need to AND. 8554 // The condition is 'SrcMask && EdgeMask', which is equivalent to 8555 // 'select i1 SrcMask, i1 EdgeMask, i1 false'. 8556 // The select version does not introduce new UB if SrcMask is false and 8557 // EdgeMask is poison. Using 'and' here introduces undefined behavior. 8558 VPValue *False = Plan->getOrAddVPValue( 8559 ConstantInt::getFalse(BI->getCondition()->getType())); 8560 EdgeMask = Builder.createSelect(SrcMask, EdgeMask, False); 8561 } 8562 8563 return EdgeMaskCache[Edge] = EdgeMask; 8564 } 8565 8566 VPValue *VPRecipeBuilder::createBlockInMask(BasicBlock *BB, VPlanPtr &Plan) { 8567 assert(OrigLoop->contains(BB) && "Block is not a part of a loop"); 8568 8569 // Look for cached value. 8570 BlockMaskCacheTy::iterator BCEntryIt = BlockMaskCache.find(BB); 8571 if (BCEntryIt != BlockMaskCache.end()) 8572 return BCEntryIt->second; 8573 8574 // All-one mask is modelled as no-mask following the convention for masked 8575 // load/store/gather/scatter. Initialize BlockMask to no-mask. 8576 VPValue *BlockMask = nullptr; 8577 8578 if (OrigLoop->getHeader() == BB) { 8579 if (!CM.blockNeedsPredication(BB)) 8580 return BlockMaskCache[BB] = BlockMask; // Loop incoming mask is all-one. 8581 8582 // Create the block in mask as the first non-phi instruction in the block. 8583 VPBuilder::InsertPointGuard Guard(Builder); 8584 auto NewInsertionPoint = Builder.getInsertBlock()->getFirstNonPhi(); 8585 Builder.setInsertPoint(Builder.getInsertBlock(), NewInsertionPoint); 8586 8587 // Introduce the early-exit compare IV <= BTC to form header block mask. 8588 // This is used instead of IV < TC because TC may wrap, unlike BTC. 8589 // Start by constructing the desired canonical IV. 8590 VPValue *IV = nullptr; 8591 if (Legal->getPrimaryInduction()) 8592 IV = Plan->getOrAddVPValue(Legal->getPrimaryInduction()); 8593 else { 8594 auto IVRecipe = new VPWidenCanonicalIVRecipe(); 8595 Builder.getInsertBlock()->insert(IVRecipe, NewInsertionPoint); 8596 IV = IVRecipe->getVPSingleValue(); 8597 } 8598 VPValue *BTC = Plan->getOrCreateBackedgeTakenCount(); 8599 bool TailFolded = !CM.isScalarEpilogueAllowed(); 8600 8601 if (TailFolded && CM.TTI.emitGetActiveLaneMask()) { 8602 // While ActiveLaneMask is a binary op that consumes the loop tripcount 8603 // as a second argument, we only pass the IV here and extract the 8604 // tripcount from the transform state where codegen of the VP instructions 8605 // happen. 8606 BlockMask = Builder.createNaryOp(VPInstruction::ActiveLaneMask, {IV}); 8607 } else { 8608 BlockMask = Builder.createNaryOp(VPInstruction::ICmpULE, {IV, BTC}); 8609 } 8610 return BlockMaskCache[BB] = BlockMask; 8611 } 8612 8613 // This is the block mask. We OR all incoming edges. 8614 for (auto *Predecessor : predecessors(BB)) { 8615 VPValue *EdgeMask = createEdgeMask(Predecessor, BB, Plan); 8616 if (!EdgeMask) // Mask of predecessor is all-one so mask of block is too. 8617 return BlockMaskCache[BB] = EdgeMask; 8618 8619 if (!BlockMask) { // BlockMask has its initialized nullptr value. 8620 BlockMask = EdgeMask; 8621 continue; 8622 } 8623 8624 BlockMask = Builder.createOr(BlockMask, EdgeMask); 8625 } 8626 8627 return BlockMaskCache[BB] = BlockMask; 8628 } 8629 8630 VPRecipeBase *VPRecipeBuilder::tryToWidenMemory(Instruction *I, 8631 ArrayRef<VPValue *> Operands, 8632 VFRange &Range, 8633 VPlanPtr &Plan) { 8634 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) && 8635 "Must be called with either a load or store"); 8636 8637 auto willWiden = [&](ElementCount VF) -> bool { 8638 if (VF.isScalar()) 8639 return false; 8640 LoopVectorizationCostModel::InstWidening Decision = 8641 CM.getWideningDecision(I, VF); 8642 assert(Decision != LoopVectorizationCostModel::CM_Unknown && 8643 "CM decision should be taken at this point."); 8644 if (Decision == LoopVectorizationCostModel::CM_Interleave) 8645 return true; 8646 if (CM.isScalarAfterVectorization(I, VF) || 8647 CM.isProfitableToScalarize(I, VF)) 8648 return false; 8649 return Decision != LoopVectorizationCostModel::CM_Scalarize; 8650 }; 8651 8652 if (!LoopVectorizationPlanner::getDecisionAndClampRange(willWiden, Range)) 8653 return nullptr; 8654 8655 VPValue *Mask = nullptr; 8656 if (Legal->isMaskRequired(I)) 8657 Mask = createBlockInMask(I->getParent(), Plan); 8658 8659 if (LoadInst *Load = dyn_cast<LoadInst>(I)) 8660 return new VPWidenMemoryInstructionRecipe(*Load, Operands[0], Mask); 8661 8662 StoreInst *Store = cast<StoreInst>(I); 8663 return new VPWidenMemoryInstructionRecipe(*Store, Operands[1], Operands[0], 8664 Mask); 8665 } 8666 8667 VPWidenIntOrFpInductionRecipe * 8668 VPRecipeBuilder::tryToOptimizeInductionPHI(PHINode *Phi, 8669 ArrayRef<VPValue *> Operands) const { 8670 // Check if this is an integer or fp induction. If so, build the recipe that 8671 // produces its scalar and vector values. 8672 InductionDescriptor II = Legal->getInductionVars().lookup(Phi); 8673 if (II.getKind() == InductionDescriptor::IK_IntInduction || 8674 II.getKind() == InductionDescriptor::IK_FpInduction) { 8675 assert(II.getStartValue() == 8676 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader())); 8677 const SmallVectorImpl<Instruction *> &Casts = II.getCastInsts(); 8678 return new VPWidenIntOrFpInductionRecipe( 8679 Phi, Operands[0], Casts.empty() ? nullptr : Casts.front()); 8680 } 8681 8682 return nullptr; 8683 } 8684 8685 VPWidenIntOrFpInductionRecipe *VPRecipeBuilder::tryToOptimizeInductionTruncate( 8686 TruncInst *I, ArrayRef<VPValue *> Operands, VFRange &Range, 8687 VPlan &Plan) const { 8688 // Optimize the special case where the source is a constant integer 8689 // induction variable. Notice that we can only optimize the 'trunc' case 8690 // because (a) FP conversions lose precision, (b) sext/zext may wrap, and 8691 // (c) other casts depend on pointer size. 8692 8693 // Determine whether \p K is a truncation based on an induction variable that 8694 // can be optimized. 8695 auto isOptimizableIVTruncate = 8696 [&](Instruction *K) -> std::function<bool(ElementCount)> { 8697 return [=](ElementCount VF) -> bool { 8698 return CM.isOptimizableIVTruncate(K, VF); 8699 }; 8700 }; 8701 8702 if (LoopVectorizationPlanner::getDecisionAndClampRange( 8703 isOptimizableIVTruncate(I), Range)) { 8704 8705 InductionDescriptor II = 8706 Legal->getInductionVars().lookup(cast<PHINode>(I->getOperand(0))); 8707 VPValue *Start = Plan.getOrAddVPValue(II.getStartValue()); 8708 return new VPWidenIntOrFpInductionRecipe(cast<PHINode>(I->getOperand(0)), 8709 Start, nullptr, I); 8710 } 8711 return nullptr; 8712 } 8713 8714 VPRecipeOrVPValueTy VPRecipeBuilder::tryToBlend(PHINode *Phi, 8715 ArrayRef<VPValue *> Operands, 8716 VPlanPtr &Plan) { 8717 // If all incoming values are equal, the incoming VPValue can be used directly 8718 // instead of creating a new VPBlendRecipe. 8719 VPValue *FirstIncoming = Operands[0]; 8720 if (all_of(Operands, [FirstIncoming](const VPValue *Inc) { 8721 return FirstIncoming == Inc; 8722 })) { 8723 return Operands[0]; 8724 } 8725 8726 // We know that all PHIs in non-header blocks are converted into selects, so 8727 // we don't have to worry about the insertion order and we can just use the 8728 // builder. At this point we generate the predication tree. There may be 8729 // duplications since this is a simple recursive scan, but future 8730 // optimizations will clean it up. 8731 SmallVector<VPValue *, 2> OperandsWithMask; 8732 unsigned NumIncoming = Phi->getNumIncomingValues(); 8733 8734 for (unsigned In = 0; In < NumIncoming; In++) { 8735 VPValue *EdgeMask = 8736 createEdgeMask(Phi->getIncomingBlock(In), Phi->getParent(), Plan); 8737 assert((EdgeMask || NumIncoming == 1) && 8738 "Multiple predecessors with one having a full mask"); 8739 OperandsWithMask.push_back(Operands[In]); 8740 if (EdgeMask) 8741 OperandsWithMask.push_back(EdgeMask); 8742 } 8743 return toVPRecipeResult(new VPBlendRecipe(Phi, OperandsWithMask)); 8744 } 8745 8746 VPWidenCallRecipe *VPRecipeBuilder::tryToWidenCall(CallInst *CI, 8747 ArrayRef<VPValue *> Operands, 8748 VFRange &Range) const { 8749 8750 bool IsPredicated = LoopVectorizationPlanner::getDecisionAndClampRange( 8751 [this, CI](ElementCount VF) { return CM.isScalarWithPredication(CI); }, 8752 Range); 8753 8754 if (IsPredicated) 8755 return nullptr; 8756 8757 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 8758 if (ID && (ID == Intrinsic::assume || ID == Intrinsic::lifetime_end || 8759 ID == Intrinsic::lifetime_start || ID == Intrinsic::sideeffect || 8760 ID == Intrinsic::pseudoprobe || 8761 ID == Intrinsic::experimental_noalias_scope_decl)) 8762 return nullptr; 8763 8764 auto willWiden = [&](ElementCount VF) -> bool { 8765 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 8766 // The following case may be scalarized depending on the VF. 8767 // The flag shows whether we use Intrinsic or a usual Call for vectorized 8768 // version of the instruction. 8769 // Is it beneficial to perform intrinsic call compared to lib call? 8770 bool NeedToScalarize = false; 8771 InstructionCost CallCost = CM.getVectorCallCost(CI, VF, NeedToScalarize); 8772 InstructionCost IntrinsicCost = ID ? CM.getVectorIntrinsicCost(CI, VF) : 0; 8773 bool UseVectorIntrinsic = ID && IntrinsicCost <= CallCost; 8774 assert((IntrinsicCost.isValid() || CallCost.isValid()) && 8775 "Either the intrinsic cost or vector call cost must be valid"); 8776 return UseVectorIntrinsic || !NeedToScalarize; 8777 }; 8778 8779 if (!LoopVectorizationPlanner::getDecisionAndClampRange(willWiden, Range)) 8780 return nullptr; 8781 8782 ArrayRef<VPValue *> Ops = Operands.take_front(CI->getNumArgOperands()); 8783 return new VPWidenCallRecipe(*CI, make_range(Ops.begin(), Ops.end())); 8784 } 8785 8786 bool VPRecipeBuilder::shouldWiden(Instruction *I, VFRange &Range) const { 8787 assert(!isa<BranchInst>(I) && !isa<PHINode>(I) && !isa<LoadInst>(I) && 8788 !isa<StoreInst>(I) && "Instruction should have been handled earlier"); 8789 // Instruction should be widened, unless it is scalar after vectorization, 8790 // scalarization is profitable or it is predicated. 8791 auto WillScalarize = [this, I](ElementCount VF) -> bool { 8792 return CM.isScalarAfterVectorization(I, VF) || 8793 CM.isProfitableToScalarize(I, VF) || CM.isScalarWithPredication(I); 8794 }; 8795 return !LoopVectorizationPlanner::getDecisionAndClampRange(WillScalarize, 8796 Range); 8797 } 8798 8799 VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I, 8800 ArrayRef<VPValue *> Operands) const { 8801 auto IsVectorizableOpcode = [](unsigned Opcode) { 8802 switch (Opcode) { 8803 case Instruction::Add: 8804 case Instruction::And: 8805 case Instruction::AShr: 8806 case Instruction::BitCast: 8807 case Instruction::FAdd: 8808 case Instruction::FCmp: 8809 case Instruction::FDiv: 8810 case Instruction::FMul: 8811 case Instruction::FNeg: 8812 case Instruction::FPExt: 8813 case Instruction::FPToSI: 8814 case Instruction::FPToUI: 8815 case Instruction::FPTrunc: 8816 case Instruction::FRem: 8817 case Instruction::FSub: 8818 case Instruction::ICmp: 8819 case Instruction::IntToPtr: 8820 case Instruction::LShr: 8821 case Instruction::Mul: 8822 case Instruction::Or: 8823 case Instruction::PtrToInt: 8824 case Instruction::SDiv: 8825 case Instruction::Select: 8826 case Instruction::SExt: 8827 case Instruction::Shl: 8828 case Instruction::SIToFP: 8829 case Instruction::SRem: 8830 case Instruction::Sub: 8831 case Instruction::Trunc: 8832 case Instruction::UDiv: 8833 case Instruction::UIToFP: 8834 case Instruction::URem: 8835 case Instruction::Xor: 8836 case Instruction::ZExt: 8837 return true; 8838 } 8839 return false; 8840 }; 8841 8842 if (!IsVectorizableOpcode(I->getOpcode())) 8843 return nullptr; 8844 8845 // Success: widen this instruction. 8846 return new VPWidenRecipe(*I, make_range(Operands.begin(), Operands.end())); 8847 } 8848 8849 void VPRecipeBuilder::fixHeaderPhis() { 8850 BasicBlock *OrigLatch = OrigLoop->getLoopLatch(); 8851 for (VPWidenPHIRecipe *R : PhisToFix) { 8852 auto *PN = cast<PHINode>(R->getUnderlyingValue()); 8853 VPRecipeBase *IncR = 8854 getRecipe(cast<Instruction>(PN->getIncomingValueForBlock(OrigLatch))); 8855 R->addOperand(IncR->getVPSingleValue()); 8856 } 8857 } 8858 8859 VPBasicBlock *VPRecipeBuilder::handleReplication( 8860 Instruction *I, VFRange &Range, VPBasicBlock *VPBB, 8861 VPlanPtr &Plan) { 8862 bool IsUniform = LoopVectorizationPlanner::getDecisionAndClampRange( 8863 [&](ElementCount VF) { return CM.isUniformAfterVectorization(I, VF); }, 8864 Range); 8865 8866 bool IsPredicated = LoopVectorizationPlanner::getDecisionAndClampRange( 8867 [&](ElementCount VF) { return CM.isPredicatedInst(I); }, Range); 8868 8869 auto *Recipe = new VPReplicateRecipe(I, Plan->mapToVPValues(I->operands()), 8870 IsUniform, IsPredicated); 8871 setRecipe(I, Recipe); 8872 Plan->addVPValue(I, Recipe); 8873 8874 // Find if I uses a predicated instruction. If so, it will use its scalar 8875 // value. Avoid hoisting the insert-element which packs the scalar value into 8876 // a vector value, as that happens iff all users use the vector value. 8877 for (VPValue *Op : Recipe->operands()) { 8878 auto *PredR = dyn_cast_or_null<VPPredInstPHIRecipe>(Op->getDef()); 8879 if (!PredR) 8880 continue; 8881 auto *RepR = 8882 cast_or_null<VPReplicateRecipe>(PredR->getOperand(0)->getDef()); 8883 assert(RepR->isPredicated() && 8884 "expected Replicate recipe to be predicated"); 8885 RepR->setAlsoPack(false); 8886 } 8887 8888 // Finalize the recipe for Instr, first if it is not predicated. 8889 if (!IsPredicated) { 8890 LLVM_DEBUG(dbgs() << "LV: Scalarizing:" << *I << "\n"); 8891 VPBB->appendRecipe(Recipe); 8892 return VPBB; 8893 } 8894 LLVM_DEBUG(dbgs() << "LV: Scalarizing and predicating:" << *I << "\n"); 8895 assert(VPBB->getSuccessors().empty() && 8896 "VPBB has successors when handling predicated replication."); 8897 // Record predicated instructions for above packing optimizations. 8898 VPBlockBase *Region = createReplicateRegion(I, Recipe, Plan); 8899 VPBlockUtils::insertBlockAfter(Region, VPBB); 8900 auto *RegSucc = new VPBasicBlock(); 8901 VPBlockUtils::insertBlockAfter(RegSucc, Region); 8902 return RegSucc; 8903 } 8904 8905 VPRegionBlock *VPRecipeBuilder::createReplicateRegion(Instruction *Instr, 8906 VPRecipeBase *PredRecipe, 8907 VPlanPtr &Plan) { 8908 // Instructions marked for predication are replicated and placed under an 8909 // if-then construct to prevent side-effects. 8910 8911 // Generate recipes to compute the block mask for this region. 8912 VPValue *BlockInMask = createBlockInMask(Instr->getParent(), Plan); 8913 8914 // Build the triangular if-then region. 8915 std::string RegionName = (Twine("pred.") + Instr->getOpcodeName()).str(); 8916 assert(Instr->getParent() && "Predicated instruction not in any basic block"); 8917 auto *BOMRecipe = new VPBranchOnMaskRecipe(BlockInMask); 8918 auto *Entry = new VPBasicBlock(Twine(RegionName) + ".entry", BOMRecipe); 8919 auto *PHIRecipe = Instr->getType()->isVoidTy() 8920 ? nullptr 8921 : new VPPredInstPHIRecipe(Plan->getOrAddVPValue(Instr)); 8922 if (PHIRecipe) { 8923 Plan->removeVPValueFor(Instr); 8924 Plan->addVPValue(Instr, PHIRecipe); 8925 } 8926 auto *Exit = new VPBasicBlock(Twine(RegionName) + ".continue", PHIRecipe); 8927 auto *Pred = new VPBasicBlock(Twine(RegionName) + ".if", PredRecipe); 8928 VPRegionBlock *Region = new VPRegionBlock(Entry, Exit, RegionName, true); 8929 8930 // Note: first set Entry as region entry and then connect successors starting 8931 // from it in order, to propagate the "parent" of each VPBasicBlock. 8932 VPBlockUtils::insertTwoBlocksAfter(Pred, Exit, BlockInMask, Entry); 8933 VPBlockUtils::connectBlocks(Pred, Exit); 8934 8935 return Region; 8936 } 8937 8938 VPRecipeOrVPValueTy 8939 VPRecipeBuilder::tryToCreateWidenRecipe(Instruction *Instr, 8940 ArrayRef<VPValue *> Operands, 8941 VFRange &Range, VPlanPtr &Plan) { 8942 // First, check for specific widening recipes that deal with calls, memory 8943 // operations, inductions and Phi nodes. 8944 if (auto *CI = dyn_cast<CallInst>(Instr)) 8945 return toVPRecipeResult(tryToWidenCall(CI, Operands, Range)); 8946 8947 if (isa<LoadInst>(Instr) || isa<StoreInst>(Instr)) 8948 return toVPRecipeResult(tryToWidenMemory(Instr, Operands, Range, Plan)); 8949 8950 VPRecipeBase *Recipe; 8951 if (auto Phi = dyn_cast<PHINode>(Instr)) { 8952 if (Phi->getParent() != OrigLoop->getHeader()) 8953 return tryToBlend(Phi, Operands, Plan); 8954 if ((Recipe = tryToOptimizeInductionPHI(Phi, Operands))) 8955 return toVPRecipeResult(Recipe); 8956 8957 VPWidenPHIRecipe *PhiRecipe = nullptr; 8958 if (Legal->isReductionVariable(Phi) || Legal->isFirstOrderRecurrence(Phi)) { 8959 VPValue *StartV = Operands[0]; 8960 if (Legal->isReductionVariable(Phi)) { 8961 RecurrenceDescriptor &RdxDesc = Legal->getReductionVars()[Phi]; 8962 assert(RdxDesc.getRecurrenceStartValue() == 8963 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader())); 8964 PhiRecipe = new VPWidenPHIRecipe(Phi, RdxDesc, *StartV); 8965 } else { 8966 PhiRecipe = new VPWidenPHIRecipe(Phi, *StartV); 8967 } 8968 8969 // Record the incoming value from the backedge, so we can add the incoming 8970 // value from the backedge after all recipes have been created. 8971 recordRecipeOf(cast<Instruction>( 8972 Phi->getIncomingValueForBlock(OrigLoop->getLoopLatch()))); 8973 PhisToFix.push_back(PhiRecipe); 8974 } else { 8975 // TODO: record start and backedge value for remaining pointer induction 8976 // phis. 8977 assert(Phi->getType()->isPointerTy() && 8978 "only pointer phis should be handled here"); 8979 PhiRecipe = new VPWidenPHIRecipe(Phi); 8980 } 8981 8982 return toVPRecipeResult(PhiRecipe); 8983 } 8984 8985 if (isa<TruncInst>(Instr) && 8986 (Recipe = tryToOptimizeInductionTruncate(cast<TruncInst>(Instr), Operands, 8987 Range, *Plan))) 8988 return toVPRecipeResult(Recipe); 8989 8990 if (!shouldWiden(Instr, Range)) 8991 return nullptr; 8992 8993 if (auto GEP = dyn_cast<GetElementPtrInst>(Instr)) 8994 return toVPRecipeResult(new VPWidenGEPRecipe( 8995 GEP, make_range(Operands.begin(), Operands.end()), OrigLoop)); 8996 8997 if (auto *SI = dyn_cast<SelectInst>(Instr)) { 8998 bool InvariantCond = 8999 PSE.getSE()->isLoopInvariant(PSE.getSCEV(SI->getOperand(0)), OrigLoop); 9000 return toVPRecipeResult(new VPWidenSelectRecipe( 9001 *SI, make_range(Operands.begin(), Operands.end()), InvariantCond)); 9002 } 9003 9004 return toVPRecipeResult(tryToWiden(Instr, Operands)); 9005 } 9006 9007 void LoopVectorizationPlanner::buildVPlansWithVPRecipes(ElementCount MinVF, 9008 ElementCount MaxVF) { 9009 assert(OrigLoop->isInnermost() && "Inner loop expected."); 9010 9011 // Collect instructions from the original loop that will become trivially dead 9012 // in the vectorized loop. We don't need to vectorize these instructions. For 9013 // example, original induction update instructions can become dead because we 9014 // separately emit induction "steps" when generating code for the new loop. 9015 // Similarly, we create a new latch condition when setting up the structure 9016 // of the new loop, so the old one can become dead. 9017 SmallPtrSet<Instruction *, 4> DeadInstructions; 9018 collectTriviallyDeadInstructions(DeadInstructions); 9019 9020 // Add assume instructions we need to drop to DeadInstructions, to prevent 9021 // them from being added to the VPlan. 9022 // TODO: We only need to drop assumes in blocks that get flattend. If the 9023 // control flow is preserved, we should keep them. 9024 auto &ConditionalAssumes = Legal->getConditionalAssumes(); 9025 DeadInstructions.insert(ConditionalAssumes.begin(), ConditionalAssumes.end()); 9026 9027 MapVector<Instruction *, Instruction *> &SinkAfter = Legal->getSinkAfter(); 9028 // Dead instructions do not need sinking. Remove them from SinkAfter. 9029 for (Instruction *I : DeadInstructions) 9030 SinkAfter.erase(I); 9031 9032 auto MaxVFPlusOne = MaxVF.getWithIncrement(1); 9033 for (ElementCount VF = MinVF; ElementCount::isKnownLT(VF, MaxVFPlusOne);) { 9034 VFRange SubRange = {VF, MaxVFPlusOne}; 9035 VPlans.push_back( 9036 buildVPlanWithVPRecipes(SubRange, DeadInstructions, SinkAfter)); 9037 VF = SubRange.End; 9038 } 9039 } 9040 9041 VPlanPtr LoopVectorizationPlanner::buildVPlanWithVPRecipes( 9042 VFRange &Range, SmallPtrSetImpl<Instruction *> &DeadInstructions, 9043 const MapVector<Instruction *, Instruction *> &SinkAfter) { 9044 9045 SmallPtrSet<const InterleaveGroup<Instruction> *, 1> InterleaveGroups; 9046 9047 VPRecipeBuilder RecipeBuilder(OrigLoop, TLI, Legal, CM, PSE, Builder); 9048 9049 // --------------------------------------------------------------------------- 9050 // Pre-construction: record ingredients whose recipes we'll need to further 9051 // process after constructing the initial VPlan. 9052 // --------------------------------------------------------------------------- 9053 9054 // Mark instructions we'll need to sink later and their targets as 9055 // ingredients whose recipe we'll need to record. 9056 for (auto &Entry : SinkAfter) { 9057 RecipeBuilder.recordRecipeOf(Entry.first); 9058 RecipeBuilder.recordRecipeOf(Entry.second); 9059 } 9060 for (auto &Reduction : CM.getInLoopReductionChains()) { 9061 PHINode *Phi = Reduction.first; 9062 RecurKind Kind = Legal->getReductionVars()[Phi].getRecurrenceKind(); 9063 const SmallVector<Instruction *, 4> &ReductionOperations = Reduction.second; 9064 9065 RecipeBuilder.recordRecipeOf(Phi); 9066 for (auto &R : ReductionOperations) { 9067 RecipeBuilder.recordRecipeOf(R); 9068 // For min/max reducitons, where we have a pair of icmp/select, we also 9069 // need to record the ICmp recipe, so it can be removed later. 9070 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) 9071 RecipeBuilder.recordRecipeOf(cast<Instruction>(R->getOperand(0))); 9072 } 9073 } 9074 9075 // For each interleave group which is relevant for this (possibly trimmed) 9076 // Range, add it to the set of groups to be later applied to the VPlan and add 9077 // placeholders for its members' Recipes which we'll be replacing with a 9078 // single VPInterleaveRecipe. 9079 for (InterleaveGroup<Instruction> *IG : IAI.getInterleaveGroups()) { 9080 auto applyIG = [IG, this](ElementCount VF) -> bool { 9081 return (VF.isVector() && // Query is illegal for VF == 1 9082 CM.getWideningDecision(IG->getInsertPos(), VF) == 9083 LoopVectorizationCostModel::CM_Interleave); 9084 }; 9085 if (!getDecisionAndClampRange(applyIG, Range)) 9086 continue; 9087 InterleaveGroups.insert(IG); 9088 for (unsigned i = 0; i < IG->getFactor(); i++) 9089 if (Instruction *Member = IG->getMember(i)) 9090 RecipeBuilder.recordRecipeOf(Member); 9091 }; 9092 9093 // --------------------------------------------------------------------------- 9094 // Build initial VPlan: Scan the body of the loop in a topological order to 9095 // visit each basic block after having visited its predecessor basic blocks. 9096 // --------------------------------------------------------------------------- 9097 9098 // Create a dummy pre-entry VPBasicBlock to start building the VPlan. 9099 auto Plan = std::make_unique<VPlan>(); 9100 VPBasicBlock *VPBB = new VPBasicBlock("Pre-Entry"); 9101 Plan->setEntry(VPBB); 9102 9103 // Scan the body of the loop in a topological order to visit each basic block 9104 // after having visited its predecessor basic blocks. 9105 LoopBlocksDFS DFS(OrigLoop); 9106 DFS.perform(LI); 9107 9108 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) { 9109 // Relevant instructions from basic block BB will be grouped into VPRecipe 9110 // ingredients and fill a new VPBasicBlock. 9111 unsigned VPBBsForBB = 0; 9112 auto *FirstVPBBForBB = new VPBasicBlock(BB->getName()); 9113 VPBlockUtils::insertBlockAfter(FirstVPBBForBB, VPBB); 9114 VPBB = FirstVPBBForBB; 9115 Builder.setInsertPoint(VPBB); 9116 9117 // Introduce each ingredient into VPlan. 9118 // TODO: Model and preserve debug instrinsics in VPlan. 9119 for (Instruction &I : BB->instructionsWithoutDebug()) { 9120 Instruction *Instr = &I; 9121 9122 // First filter out irrelevant instructions, to ensure no recipes are 9123 // built for them. 9124 if (isa<BranchInst>(Instr) || DeadInstructions.count(Instr)) 9125 continue; 9126 9127 SmallVector<VPValue *, 4> Operands; 9128 auto *Phi = dyn_cast<PHINode>(Instr); 9129 if (Phi && Phi->getParent() == OrigLoop->getHeader()) { 9130 Operands.push_back(Plan->getOrAddVPValue( 9131 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader()))); 9132 } else { 9133 auto OpRange = Plan->mapToVPValues(Instr->operands()); 9134 Operands = {OpRange.begin(), OpRange.end()}; 9135 } 9136 if (auto RecipeOrValue = RecipeBuilder.tryToCreateWidenRecipe( 9137 Instr, Operands, Range, Plan)) { 9138 // If Instr can be simplified to an existing VPValue, use it. 9139 if (RecipeOrValue.is<VPValue *>()) { 9140 auto *VPV = RecipeOrValue.get<VPValue *>(); 9141 Plan->addVPValue(Instr, VPV); 9142 // If the re-used value is a recipe, register the recipe for the 9143 // instruction, in case the recipe for Instr needs to be recorded. 9144 if (auto *R = dyn_cast_or_null<VPRecipeBase>(VPV->getDef())) 9145 RecipeBuilder.setRecipe(Instr, R); 9146 continue; 9147 } 9148 // Otherwise, add the new recipe. 9149 VPRecipeBase *Recipe = RecipeOrValue.get<VPRecipeBase *>(); 9150 for (auto *Def : Recipe->definedValues()) { 9151 auto *UV = Def->getUnderlyingValue(); 9152 Plan->addVPValue(UV, Def); 9153 } 9154 9155 RecipeBuilder.setRecipe(Instr, Recipe); 9156 VPBB->appendRecipe(Recipe); 9157 continue; 9158 } 9159 9160 // Otherwise, if all widening options failed, Instruction is to be 9161 // replicated. This may create a successor for VPBB. 9162 VPBasicBlock *NextVPBB = 9163 RecipeBuilder.handleReplication(Instr, Range, VPBB, Plan); 9164 if (NextVPBB != VPBB) { 9165 VPBB = NextVPBB; 9166 VPBB->setName(BB->hasName() ? BB->getName() + "." + Twine(VPBBsForBB++) 9167 : ""); 9168 } 9169 } 9170 } 9171 9172 RecipeBuilder.fixHeaderPhis(); 9173 9174 // Discard empty dummy pre-entry VPBasicBlock. Note that other VPBasicBlocks 9175 // may also be empty, such as the last one VPBB, reflecting original 9176 // basic-blocks with no recipes. 9177 VPBasicBlock *PreEntry = cast<VPBasicBlock>(Plan->getEntry()); 9178 assert(PreEntry->empty() && "Expecting empty pre-entry block."); 9179 VPBlockBase *Entry = Plan->setEntry(PreEntry->getSingleSuccessor()); 9180 VPBlockUtils::disconnectBlocks(PreEntry, Entry); 9181 delete PreEntry; 9182 9183 // --------------------------------------------------------------------------- 9184 // Transform initial VPlan: Apply previously taken decisions, in order, to 9185 // bring the VPlan to its final state. 9186 // --------------------------------------------------------------------------- 9187 9188 // Apply Sink-After legal constraints. 9189 for (auto &Entry : SinkAfter) { 9190 VPRecipeBase *Sink = RecipeBuilder.getRecipe(Entry.first); 9191 VPRecipeBase *Target = RecipeBuilder.getRecipe(Entry.second); 9192 9193 auto GetReplicateRegion = [](VPRecipeBase *R) -> VPRegionBlock * { 9194 auto *Region = 9195 dyn_cast_or_null<VPRegionBlock>(R->getParent()->getParent()); 9196 if (Region && Region->isReplicator()) { 9197 assert(Region->getNumSuccessors() == 1 && 9198 Region->getNumPredecessors() == 1 && "Expected SESE region!"); 9199 assert(R->getParent()->size() == 1 && 9200 "A recipe in an original replicator region must be the only " 9201 "recipe in its block"); 9202 return Region; 9203 } 9204 return nullptr; 9205 }; 9206 auto *TargetRegion = GetReplicateRegion(Target); 9207 auto *SinkRegion = GetReplicateRegion(Sink); 9208 if (!SinkRegion) { 9209 // If the sink source is not a replicate region, sink the recipe directly. 9210 if (TargetRegion) { 9211 // The target is in a replication region, make sure to move Sink to 9212 // the block after it, not into the replication region itself. 9213 VPBasicBlock *NextBlock = 9214 cast<VPBasicBlock>(TargetRegion->getSuccessors().front()); 9215 Sink->moveBefore(*NextBlock, NextBlock->getFirstNonPhi()); 9216 } else 9217 Sink->moveAfter(Target); 9218 continue; 9219 } 9220 9221 // The sink source is in a replicate region. Unhook the region from the CFG. 9222 auto *SinkPred = SinkRegion->getSinglePredecessor(); 9223 auto *SinkSucc = SinkRegion->getSingleSuccessor(); 9224 VPBlockUtils::disconnectBlocks(SinkPred, SinkRegion); 9225 VPBlockUtils::disconnectBlocks(SinkRegion, SinkSucc); 9226 VPBlockUtils::connectBlocks(SinkPred, SinkSucc); 9227 9228 if (TargetRegion) { 9229 // The target recipe is also in a replicate region, move the sink region 9230 // after the target region. 9231 auto *TargetSucc = TargetRegion->getSingleSuccessor(); 9232 VPBlockUtils::disconnectBlocks(TargetRegion, TargetSucc); 9233 VPBlockUtils::connectBlocks(TargetRegion, SinkRegion); 9234 VPBlockUtils::connectBlocks(SinkRegion, TargetSucc); 9235 } else { 9236 // The sink source is in a replicate region, we need to move the whole 9237 // replicate region, which should only contain a single recipe in the main 9238 // block. 9239 auto *SplitBlock = 9240 Target->getParent()->splitAt(std::next(Target->getIterator())); 9241 9242 auto *SplitPred = SplitBlock->getSinglePredecessor(); 9243 9244 VPBlockUtils::disconnectBlocks(SplitPred, SplitBlock); 9245 VPBlockUtils::connectBlocks(SplitPred, SinkRegion); 9246 VPBlockUtils::connectBlocks(SinkRegion, SplitBlock); 9247 if (VPBB == SplitPred) 9248 VPBB = SplitBlock; 9249 } 9250 } 9251 9252 // Interleave memory: for each Interleave Group we marked earlier as relevant 9253 // for this VPlan, replace the Recipes widening its memory instructions with a 9254 // single VPInterleaveRecipe at its insertion point. 9255 for (auto IG : InterleaveGroups) { 9256 auto *Recipe = cast<VPWidenMemoryInstructionRecipe>( 9257 RecipeBuilder.getRecipe(IG->getInsertPos())); 9258 SmallVector<VPValue *, 4> StoredValues; 9259 for (unsigned i = 0; i < IG->getFactor(); ++i) 9260 if (auto *SI = dyn_cast_or_null<StoreInst>(IG->getMember(i))) 9261 StoredValues.push_back(Plan->getOrAddVPValue(SI->getOperand(0))); 9262 9263 auto *VPIG = new VPInterleaveRecipe(IG, Recipe->getAddr(), StoredValues, 9264 Recipe->getMask()); 9265 VPIG->insertBefore(Recipe); 9266 unsigned J = 0; 9267 for (unsigned i = 0; i < IG->getFactor(); ++i) 9268 if (Instruction *Member = IG->getMember(i)) { 9269 if (!Member->getType()->isVoidTy()) { 9270 VPValue *OriginalV = Plan->getVPValue(Member); 9271 Plan->removeVPValueFor(Member); 9272 Plan->addVPValue(Member, VPIG->getVPValue(J)); 9273 OriginalV->replaceAllUsesWith(VPIG->getVPValue(J)); 9274 J++; 9275 } 9276 RecipeBuilder.getRecipe(Member)->eraseFromParent(); 9277 } 9278 } 9279 9280 // Adjust the recipes for any inloop reductions. 9281 adjustRecipesForInLoopReductions(Plan, RecipeBuilder, Range.Start); 9282 9283 // Finally, if tail is folded by masking, introduce selects between the phi 9284 // and the live-out instruction of each reduction, at the end of the latch. 9285 if (CM.foldTailByMasking() && !Legal->getReductionVars().empty()) { 9286 Builder.setInsertPoint(VPBB); 9287 auto *Cond = RecipeBuilder.createBlockInMask(OrigLoop->getHeader(), Plan); 9288 for (auto &Reduction : Legal->getReductionVars()) { 9289 if (CM.isInLoopReduction(Reduction.first)) 9290 continue; 9291 VPValue *Phi = Plan->getOrAddVPValue(Reduction.first); 9292 VPValue *Red = Plan->getOrAddVPValue(Reduction.second.getLoopExitInstr()); 9293 Builder.createNaryOp(Instruction::Select, {Cond, Red, Phi}); 9294 } 9295 } 9296 9297 VPlanTransforms::sinkScalarOperands(*Plan); 9298 VPlanTransforms::mergeReplicateRegions(*Plan); 9299 9300 std::string PlanName; 9301 raw_string_ostream RSO(PlanName); 9302 ElementCount VF = Range.Start; 9303 Plan->addVF(VF); 9304 RSO << "Initial VPlan for VF={" << VF; 9305 for (VF *= 2; ElementCount::isKnownLT(VF, Range.End); VF *= 2) { 9306 Plan->addVF(VF); 9307 RSO << "," << VF; 9308 } 9309 RSO << "},UF>=1"; 9310 RSO.flush(); 9311 Plan->setName(PlanName); 9312 9313 return Plan; 9314 } 9315 9316 VPlanPtr LoopVectorizationPlanner::buildVPlan(VFRange &Range) { 9317 // Outer loop handling: They may require CFG and instruction level 9318 // transformations before even evaluating whether vectorization is profitable. 9319 // Since we cannot modify the incoming IR, we need to build VPlan upfront in 9320 // the vectorization pipeline. 9321 assert(!OrigLoop->isInnermost()); 9322 assert(EnableVPlanNativePath && "VPlan-native path is not enabled."); 9323 9324 // Create new empty VPlan 9325 auto Plan = std::make_unique<VPlan>(); 9326 9327 // Build hierarchical CFG 9328 VPlanHCFGBuilder HCFGBuilder(OrigLoop, LI, *Plan); 9329 HCFGBuilder.buildHierarchicalCFG(); 9330 9331 for (ElementCount VF = Range.Start; ElementCount::isKnownLT(VF, Range.End); 9332 VF *= 2) 9333 Plan->addVF(VF); 9334 9335 if (EnableVPlanPredication) { 9336 VPlanPredicator VPP(*Plan); 9337 VPP.predicate(); 9338 9339 // Avoid running transformation to recipes until masked code generation in 9340 // VPlan-native path is in place. 9341 return Plan; 9342 } 9343 9344 SmallPtrSet<Instruction *, 1> DeadInstructions; 9345 VPlanTransforms::VPInstructionsToVPRecipes(OrigLoop, Plan, 9346 Legal->getInductionVars(), 9347 DeadInstructions, *PSE.getSE()); 9348 return Plan; 9349 } 9350 9351 // Adjust the recipes for any inloop reductions. The chain of instructions 9352 // leading from the loop exit instr to the phi need to be converted to 9353 // reductions, with one operand being vector and the other being the scalar 9354 // reduction chain. 9355 void LoopVectorizationPlanner::adjustRecipesForInLoopReductions( 9356 VPlanPtr &Plan, VPRecipeBuilder &RecipeBuilder, ElementCount MinVF) { 9357 for (auto &Reduction : CM.getInLoopReductionChains()) { 9358 PHINode *Phi = Reduction.first; 9359 RecurrenceDescriptor &RdxDesc = Legal->getReductionVars()[Phi]; 9360 const SmallVector<Instruction *, 4> &ReductionOperations = Reduction.second; 9361 9362 if (MinVF.isScalar() && !CM.useOrderedReductions(RdxDesc)) 9363 continue; 9364 9365 // ReductionOperations are orders top-down from the phi's use to the 9366 // LoopExitValue. We keep a track of the previous item (the Chain) to tell 9367 // which of the two operands will remain scalar and which will be reduced. 9368 // For minmax the chain will be the select instructions. 9369 Instruction *Chain = Phi; 9370 for (Instruction *R : ReductionOperations) { 9371 VPRecipeBase *WidenRecipe = RecipeBuilder.getRecipe(R); 9372 RecurKind Kind = RdxDesc.getRecurrenceKind(); 9373 9374 VPValue *ChainOp = Plan->getVPValue(Chain); 9375 unsigned FirstOpId; 9376 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) { 9377 assert(isa<VPWidenSelectRecipe>(WidenRecipe) && 9378 "Expected to replace a VPWidenSelectSC"); 9379 FirstOpId = 1; 9380 } else { 9381 assert((MinVF.isScalar() || isa<VPWidenRecipe>(WidenRecipe)) && 9382 "Expected to replace a VPWidenSC"); 9383 FirstOpId = 0; 9384 } 9385 unsigned VecOpId = 9386 R->getOperand(FirstOpId) == Chain ? FirstOpId + 1 : FirstOpId; 9387 VPValue *VecOp = Plan->getVPValue(R->getOperand(VecOpId)); 9388 9389 auto *CondOp = CM.foldTailByMasking() 9390 ? RecipeBuilder.createBlockInMask(R->getParent(), Plan) 9391 : nullptr; 9392 VPReductionRecipe *RedRecipe = new VPReductionRecipe( 9393 &RdxDesc, R, ChainOp, VecOp, CondOp, TTI); 9394 WidenRecipe->getVPSingleValue()->replaceAllUsesWith(RedRecipe); 9395 Plan->removeVPValueFor(R); 9396 Plan->addVPValue(R, RedRecipe); 9397 WidenRecipe->getParent()->insert(RedRecipe, WidenRecipe->getIterator()); 9398 WidenRecipe->getVPSingleValue()->replaceAllUsesWith(RedRecipe); 9399 WidenRecipe->eraseFromParent(); 9400 9401 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) { 9402 VPRecipeBase *CompareRecipe = 9403 RecipeBuilder.getRecipe(cast<Instruction>(R->getOperand(0))); 9404 assert(isa<VPWidenRecipe>(CompareRecipe) && 9405 "Expected to replace a VPWidenSC"); 9406 assert(cast<VPWidenRecipe>(CompareRecipe)->getNumUsers() == 0 && 9407 "Expected no remaining users"); 9408 CompareRecipe->eraseFromParent(); 9409 } 9410 Chain = R; 9411 } 9412 } 9413 } 9414 9415 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 9416 void VPInterleaveRecipe::print(raw_ostream &O, const Twine &Indent, 9417 VPSlotTracker &SlotTracker) const { 9418 O << Indent << "INTERLEAVE-GROUP with factor " << IG->getFactor() << " at "; 9419 IG->getInsertPos()->printAsOperand(O, false); 9420 O << ", "; 9421 getAddr()->printAsOperand(O, SlotTracker); 9422 VPValue *Mask = getMask(); 9423 if (Mask) { 9424 O << ", "; 9425 Mask->printAsOperand(O, SlotTracker); 9426 } 9427 for (unsigned i = 0; i < IG->getFactor(); ++i) 9428 if (Instruction *I = IG->getMember(i)) 9429 O << "\n" << Indent << " " << VPlanIngredient(I) << " " << i; 9430 } 9431 #endif 9432 9433 void VPWidenCallRecipe::execute(VPTransformState &State) { 9434 State.ILV->widenCallInstruction(*cast<CallInst>(getUnderlyingInstr()), this, 9435 *this, State); 9436 } 9437 9438 void VPWidenSelectRecipe::execute(VPTransformState &State) { 9439 State.ILV->widenSelectInstruction(*cast<SelectInst>(getUnderlyingInstr()), 9440 this, *this, InvariantCond, State); 9441 } 9442 9443 void VPWidenRecipe::execute(VPTransformState &State) { 9444 State.ILV->widenInstruction(*getUnderlyingInstr(), this, *this, State); 9445 } 9446 9447 void VPWidenGEPRecipe::execute(VPTransformState &State) { 9448 State.ILV->widenGEP(cast<GetElementPtrInst>(getUnderlyingInstr()), this, 9449 *this, State.UF, State.VF, IsPtrLoopInvariant, 9450 IsIndexLoopInvariant, State); 9451 } 9452 9453 void VPWidenIntOrFpInductionRecipe::execute(VPTransformState &State) { 9454 assert(!State.Instance && "Int or FP induction being replicated."); 9455 State.ILV->widenIntOrFpInduction(IV, getStartValue()->getLiveInIRValue(), 9456 getTruncInst(), getVPValue(0), 9457 getCastValue(), State); 9458 } 9459 9460 void VPWidenPHIRecipe::execute(VPTransformState &State) { 9461 State.ILV->widenPHIInstruction(cast<PHINode>(getUnderlyingValue()), RdxDesc, 9462 this, State); 9463 } 9464 9465 void VPBlendRecipe::execute(VPTransformState &State) { 9466 State.ILV->setDebugLocFromInst(State.Builder, Phi); 9467 // We know that all PHIs in non-header blocks are converted into 9468 // selects, so we don't have to worry about the insertion order and we 9469 // can just use the builder. 9470 // At this point we generate the predication tree. There may be 9471 // duplications since this is a simple recursive scan, but future 9472 // optimizations will clean it up. 9473 9474 unsigned NumIncoming = getNumIncomingValues(); 9475 9476 // Generate a sequence of selects of the form: 9477 // SELECT(Mask3, In3, 9478 // SELECT(Mask2, In2, 9479 // SELECT(Mask1, In1, 9480 // In0))) 9481 // Note that Mask0 is never used: lanes for which no path reaches this phi and 9482 // are essentially undef are taken from In0. 9483 InnerLoopVectorizer::VectorParts Entry(State.UF); 9484 for (unsigned In = 0; In < NumIncoming; ++In) { 9485 for (unsigned Part = 0; Part < State.UF; ++Part) { 9486 // We might have single edge PHIs (blocks) - use an identity 9487 // 'select' for the first PHI operand. 9488 Value *In0 = State.get(getIncomingValue(In), Part); 9489 if (In == 0) 9490 Entry[Part] = In0; // Initialize with the first incoming value. 9491 else { 9492 // Select between the current value and the previous incoming edge 9493 // based on the incoming mask. 9494 Value *Cond = State.get(getMask(In), Part); 9495 Entry[Part] = 9496 State.Builder.CreateSelect(Cond, In0, Entry[Part], "predphi"); 9497 } 9498 } 9499 } 9500 for (unsigned Part = 0; Part < State.UF; ++Part) 9501 State.set(this, Entry[Part], Part); 9502 } 9503 9504 void VPInterleaveRecipe::execute(VPTransformState &State) { 9505 assert(!State.Instance && "Interleave group being replicated."); 9506 State.ILV->vectorizeInterleaveGroup(IG, definedValues(), State, getAddr(), 9507 getStoredValues(), getMask()); 9508 } 9509 9510 void VPReductionRecipe::execute(VPTransformState &State) { 9511 assert(!State.Instance && "Reduction being replicated."); 9512 Value *PrevInChain = State.get(getChainOp(), 0); 9513 for (unsigned Part = 0; Part < State.UF; ++Part) { 9514 RecurKind Kind = RdxDesc->getRecurrenceKind(); 9515 bool IsOrdered = State.ILV->useOrderedReductions(*RdxDesc); 9516 Value *NewVecOp = State.get(getVecOp(), Part); 9517 if (VPValue *Cond = getCondOp()) { 9518 Value *NewCond = State.get(Cond, Part); 9519 VectorType *VecTy = cast<VectorType>(NewVecOp->getType()); 9520 Constant *Iden = RecurrenceDescriptor::getRecurrenceIdentity( 9521 Kind, VecTy->getElementType(), RdxDesc->getFastMathFlags()); 9522 Constant *IdenVec = 9523 ConstantVector::getSplat(VecTy->getElementCount(), Iden); 9524 Value *Select = State.Builder.CreateSelect(NewCond, NewVecOp, IdenVec); 9525 NewVecOp = Select; 9526 } 9527 Value *NewRed; 9528 Value *NextInChain; 9529 if (IsOrdered) { 9530 if (State.VF.isVector()) 9531 NewRed = createOrderedReduction(State.Builder, *RdxDesc, NewVecOp, 9532 PrevInChain); 9533 else 9534 NewRed = State.Builder.CreateBinOp( 9535 (Instruction::BinaryOps)getUnderlyingInstr()->getOpcode(), 9536 PrevInChain, NewVecOp); 9537 PrevInChain = NewRed; 9538 } else { 9539 PrevInChain = State.get(getChainOp(), Part); 9540 NewRed = createTargetReduction(State.Builder, TTI, *RdxDesc, NewVecOp); 9541 } 9542 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) { 9543 NextInChain = 9544 createMinMaxOp(State.Builder, RdxDesc->getRecurrenceKind(), 9545 NewRed, PrevInChain); 9546 } else if (IsOrdered) 9547 NextInChain = NewRed; 9548 else { 9549 NextInChain = State.Builder.CreateBinOp( 9550 (Instruction::BinaryOps)getUnderlyingInstr()->getOpcode(), NewRed, 9551 PrevInChain); 9552 } 9553 State.set(this, NextInChain, Part); 9554 } 9555 } 9556 9557 void VPReplicateRecipe::execute(VPTransformState &State) { 9558 if (State.Instance) { // Generate a single instance. 9559 assert(!State.VF.isScalable() && "Can't scalarize a scalable vector"); 9560 State.ILV->scalarizeInstruction(getUnderlyingInstr(), this, *this, 9561 *State.Instance, IsPredicated, State); 9562 // Insert scalar instance packing it into a vector. 9563 if (AlsoPack && State.VF.isVector()) { 9564 // If we're constructing lane 0, initialize to start from poison. 9565 if (State.Instance->Lane.isFirstLane()) { 9566 assert(!State.VF.isScalable() && "VF is assumed to be non scalable."); 9567 Value *Poison = PoisonValue::get( 9568 VectorType::get(getUnderlyingValue()->getType(), State.VF)); 9569 State.set(this, Poison, State.Instance->Part); 9570 } 9571 State.ILV->packScalarIntoVectorValue(this, *State.Instance, State); 9572 } 9573 return; 9574 } 9575 9576 // Generate scalar instances for all VF lanes of all UF parts, unless the 9577 // instruction is uniform inwhich case generate only the first lane for each 9578 // of the UF parts. 9579 unsigned EndLane = IsUniform ? 1 : State.VF.getKnownMinValue(); 9580 assert((!State.VF.isScalable() || IsUniform) && 9581 "Can't scalarize a scalable vector"); 9582 for (unsigned Part = 0; Part < State.UF; ++Part) 9583 for (unsigned Lane = 0; Lane < EndLane; ++Lane) 9584 State.ILV->scalarizeInstruction(getUnderlyingInstr(), this, *this, 9585 VPIteration(Part, Lane), IsPredicated, 9586 State); 9587 } 9588 9589 void VPBranchOnMaskRecipe::execute(VPTransformState &State) { 9590 assert(State.Instance && "Branch on Mask works only on single instance."); 9591 9592 unsigned Part = State.Instance->Part; 9593 unsigned Lane = State.Instance->Lane.getKnownLane(); 9594 9595 Value *ConditionBit = nullptr; 9596 VPValue *BlockInMask = getMask(); 9597 if (BlockInMask) { 9598 ConditionBit = State.get(BlockInMask, Part); 9599 if (ConditionBit->getType()->isVectorTy()) 9600 ConditionBit = State.Builder.CreateExtractElement( 9601 ConditionBit, State.Builder.getInt32(Lane)); 9602 } else // Block in mask is all-one. 9603 ConditionBit = State.Builder.getTrue(); 9604 9605 // Replace the temporary unreachable terminator with a new conditional branch, 9606 // whose two destinations will be set later when they are created. 9607 auto *CurrentTerminator = State.CFG.PrevBB->getTerminator(); 9608 assert(isa<UnreachableInst>(CurrentTerminator) && 9609 "Expected to replace unreachable terminator with conditional branch."); 9610 auto *CondBr = BranchInst::Create(State.CFG.PrevBB, nullptr, ConditionBit); 9611 CondBr->setSuccessor(0, nullptr); 9612 ReplaceInstWithInst(CurrentTerminator, CondBr); 9613 } 9614 9615 void VPPredInstPHIRecipe::execute(VPTransformState &State) { 9616 assert(State.Instance && "Predicated instruction PHI works per instance."); 9617 Instruction *ScalarPredInst = 9618 cast<Instruction>(State.get(getOperand(0), *State.Instance)); 9619 BasicBlock *PredicatedBB = ScalarPredInst->getParent(); 9620 BasicBlock *PredicatingBB = PredicatedBB->getSinglePredecessor(); 9621 assert(PredicatingBB && "Predicated block has no single predecessor."); 9622 assert(isa<VPReplicateRecipe>(getOperand(0)) && 9623 "operand must be VPReplicateRecipe"); 9624 9625 // By current pack/unpack logic we need to generate only a single phi node: if 9626 // a vector value for the predicated instruction exists at this point it means 9627 // the instruction has vector users only, and a phi for the vector value is 9628 // needed. In this case the recipe of the predicated instruction is marked to 9629 // also do that packing, thereby "hoisting" the insert-element sequence. 9630 // Otherwise, a phi node for the scalar value is needed. 9631 unsigned Part = State.Instance->Part; 9632 if (State.hasVectorValue(getOperand(0), Part)) { 9633 Value *VectorValue = State.get(getOperand(0), Part); 9634 InsertElementInst *IEI = cast<InsertElementInst>(VectorValue); 9635 PHINode *VPhi = State.Builder.CreatePHI(IEI->getType(), 2); 9636 VPhi->addIncoming(IEI->getOperand(0), PredicatingBB); // Unmodified vector. 9637 VPhi->addIncoming(IEI, PredicatedBB); // New vector with inserted element. 9638 if (State.hasVectorValue(this, Part)) 9639 State.reset(this, VPhi, Part); 9640 else 9641 State.set(this, VPhi, Part); 9642 // NOTE: Currently we need to update the value of the operand, so the next 9643 // predicated iteration inserts its generated value in the correct vector. 9644 State.reset(getOperand(0), VPhi, Part); 9645 } else { 9646 Type *PredInstType = getOperand(0)->getUnderlyingValue()->getType(); 9647 PHINode *Phi = State.Builder.CreatePHI(PredInstType, 2); 9648 Phi->addIncoming(PoisonValue::get(ScalarPredInst->getType()), 9649 PredicatingBB); 9650 Phi->addIncoming(ScalarPredInst, PredicatedBB); 9651 if (State.hasScalarValue(this, *State.Instance)) 9652 State.reset(this, Phi, *State.Instance); 9653 else 9654 State.set(this, Phi, *State.Instance); 9655 // NOTE: Currently we need to update the value of the operand, so the next 9656 // predicated iteration inserts its generated value in the correct vector. 9657 State.reset(getOperand(0), Phi, *State.Instance); 9658 } 9659 } 9660 9661 void VPWidenMemoryInstructionRecipe::execute(VPTransformState &State) { 9662 VPValue *StoredValue = isStore() ? getStoredValue() : nullptr; 9663 State.ILV->vectorizeMemoryInstruction( 9664 &Ingredient, State, StoredValue ? nullptr : getVPSingleValue(), getAddr(), 9665 StoredValue, getMask()); 9666 } 9667 9668 // Determine how to lower the scalar epilogue, which depends on 1) optimising 9669 // for minimum code-size, 2) predicate compiler options, 3) loop hints forcing 9670 // predication, and 4) a TTI hook that analyses whether the loop is suitable 9671 // for predication. 9672 static ScalarEpilogueLowering getScalarEpilogueLowering( 9673 Function *F, Loop *L, LoopVectorizeHints &Hints, ProfileSummaryInfo *PSI, 9674 BlockFrequencyInfo *BFI, TargetTransformInfo *TTI, TargetLibraryInfo *TLI, 9675 AssumptionCache *AC, LoopInfo *LI, ScalarEvolution *SE, DominatorTree *DT, 9676 LoopVectorizationLegality &LVL) { 9677 // 1) OptSize takes precedence over all other options, i.e. if this is set, 9678 // don't look at hints or options, and don't request a scalar epilogue. 9679 // (For PGSO, as shouldOptimizeForSize isn't currently accessible from 9680 // LoopAccessInfo (due to code dependency and not being able to reliably get 9681 // PSI/BFI from a loop analysis under NPM), we cannot suppress the collection 9682 // of strides in LoopAccessInfo::analyzeLoop() and vectorize without 9683 // versioning when the vectorization is forced, unlike hasOptSize. So revert 9684 // back to the old way and vectorize with versioning when forced. See D81345.) 9685 if (F->hasOptSize() || (llvm::shouldOptimizeForSize(L->getHeader(), PSI, BFI, 9686 PGSOQueryType::IRPass) && 9687 Hints.getForce() != LoopVectorizeHints::FK_Enabled)) 9688 return CM_ScalarEpilogueNotAllowedOptSize; 9689 9690 // 2) If set, obey the directives 9691 if (PreferPredicateOverEpilogue.getNumOccurrences()) { 9692 switch (PreferPredicateOverEpilogue) { 9693 case PreferPredicateTy::ScalarEpilogue: 9694 return CM_ScalarEpilogueAllowed; 9695 case PreferPredicateTy::PredicateElseScalarEpilogue: 9696 return CM_ScalarEpilogueNotNeededUsePredicate; 9697 case PreferPredicateTy::PredicateOrDontVectorize: 9698 return CM_ScalarEpilogueNotAllowedUsePredicate; 9699 }; 9700 } 9701 9702 // 3) If set, obey the hints 9703 switch (Hints.getPredicate()) { 9704 case LoopVectorizeHints::FK_Enabled: 9705 return CM_ScalarEpilogueNotNeededUsePredicate; 9706 case LoopVectorizeHints::FK_Disabled: 9707 return CM_ScalarEpilogueAllowed; 9708 }; 9709 9710 // 4) if the TTI hook indicates this is profitable, request predication. 9711 if (TTI->preferPredicateOverEpilogue(L, LI, *SE, *AC, TLI, DT, 9712 LVL.getLAI())) 9713 return CM_ScalarEpilogueNotNeededUsePredicate; 9714 9715 return CM_ScalarEpilogueAllowed; 9716 } 9717 9718 Value *VPTransformState::get(VPValue *Def, unsigned Part) { 9719 // If Values have been set for this Def return the one relevant for \p Part. 9720 if (hasVectorValue(Def, Part)) 9721 return Data.PerPartOutput[Def][Part]; 9722 9723 if (!hasScalarValue(Def, {Part, 0})) { 9724 Value *IRV = Def->getLiveInIRValue(); 9725 Value *B = ILV->getBroadcastInstrs(IRV); 9726 set(Def, B, Part); 9727 return B; 9728 } 9729 9730 Value *ScalarValue = get(Def, {Part, 0}); 9731 // If we aren't vectorizing, we can just copy the scalar map values over 9732 // to the vector map. 9733 if (VF.isScalar()) { 9734 set(Def, ScalarValue, Part); 9735 return ScalarValue; 9736 } 9737 9738 auto *RepR = dyn_cast<VPReplicateRecipe>(Def); 9739 bool IsUniform = RepR && RepR->isUniform(); 9740 9741 unsigned LastLane = IsUniform ? 0 : VF.getKnownMinValue() - 1; 9742 // Check if there is a scalar value for the selected lane. 9743 if (!hasScalarValue(Def, {Part, LastLane})) { 9744 // At the moment, VPWidenIntOrFpInductionRecipes can also be uniform. 9745 assert(isa<VPWidenIntOrFpInductionRecipe>(Def->getDef()) && 9746 "unexpected recipe found to be invariant"); 9747 IsUniform = true; 9748 LastLane = 0; 9749 } 9750 9751 auto *LastInst = cast<Instruction>(get(Def, {Part, LastLane})); 9752 // Set the insert point after the last scalarized instruction or after the 9753 // last PHI, if LastInst is a PHI. This ensures the insertelement sequence 9754 // will directly follow the scalar definitions. 9755 auto OldIP = Builder.saveIP(); 9756 auto NewIP = 9757 isa<PHINode>(LastInst) 9758 ? BasicBlock::iterator(LastInst->getParent()->getFirstNonPHI()) 9759 : std::next(BasicBlock::iterator(LastInst)); 9760 Builder.SetInsertPoint(&*NewIP); 9761 9762 // However, if we are vectorizing, we need to construct the vector values. 9763 // If the value is known to be uniform after vectorization, we can just 9764 // broadcast the scalar value corresponding to lane zero for each unroll 9765 // iteration. Otherwise, we construct the vector values using 9766 // insertelement instructions. Since the resulting vectors are stored in 9767 // State, we will only generate the insertelements once. 9768 Value *VectorValue = nullptr; 9769 if (IsUniform) { 9770 VectorValue = ILV->getBroadcastInstrs(ScalarValue); 9771 set(Def, VectorValue, Part); 9772 } else { 9773 // Initialize packing with insertelements to start from undef. 9774 assert(!VF.isScalable() && "VF is assumed to be non scalable."); 9775 Value *Undef = PoisonValue::get(VectorType::get(LastInst->getType(), VF)); 9776 set(Def, Undef, Part); 9777 for (unsigned Lane = 0; Lane < VF.getKnownMinValue(); ++Lane) 9778 ILV->packScalarIntoVectorValue(Def, {Part, Lane}, *this); 9779 VectorValue = get(Def, Part); 9780 } 9781 Builder.restoreIP(OldIP); 9782 return VectorValue; 9783 } 9784 9785 // Process the loop in the VPlan-native vectorization path. This path builds 9786 // VPlan upfront in the vectorization pipeline, which allows to apply 9787 // VPlan-to-VPlan transformations from the very beginning without modifying the 9788 // input LLVM IR. 9789 static bool processLoopInVPlanNativePath( 9790 Loop *L, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, 9791 LoopVectorizationLegality *LVL, TargetTransformInfo *TTI, 9792 TargetLibraryInfo *TLI, DemandedBits *DB, AssumptionCache *AC, 9793 OptimizationRemarkEmitter *ORE, BlockFrequencyInfo *BFI, 9794 ProfileSummaryInfo *PSI, LoopVectorizeHints &Hints, 9795 LoopVectorizationRequirements &Requirements) { 9796 9797 if (isa<SCEVCouldNotCompute>(PSE.getBackedgeTakenCount())) { 9798 LLVM_DEBUG(dbgs() << "LV: cannot compute the outer-loop trip count\n"); 9799 return false; 9800 } 9801 assert(EnableVPlanNativePath && "VPlan-native path is disabled."); 9802 Function *F = L->getHeader()->getParent(); 9803 InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL->getLAI()); 9804 9805 ScalarEpilogueLowering SEL = getScalarEpilogueLowering( 9806 F, L, Hints, PSI, BFI, TTI, TLI, AC, LI, PSE.getSE(), DT, *LVL); 9807 9808 LoopVectorizationCostModel CM(SEL, L, PSE, LI, LVL, *TTI, TLI, DB, AC, ORE, F, 9809 &Hints, IAI); 9810 // Use the planner for outer loop vectorization. 9811 // TODO: CM is not used at this point inside the planner. Turn CM into an 9812 // optional argument if we don't need it in the future. 9813 LoopVectorizationPlanner LVP(L, LI, TLI, TTI, LVL, CM, IAI, PSE, Hints, 9814 Requirements, ORE); 9815 9816 // Get user vectorization factor. 9817 ElementCount UserVF = Hints.getWidth(); 9818 9819 // Plan how to best vectorize, return the best VF and its cost. 9820 const VectorizationFactor VF = LVP.planInVPlanNativePath(UserVF); 9821 9822 // If we are stress testing VPlan builds, do not attempt to generate vector 9823 // code. Masked vector code generation support will follow soon. 9824 // Also, do not attempt to vectorize if no vector code will be produced. 9825 if (VPlanBuildStressTest || EnableVPlanPredication || 9826 VectorizationFactor::Disabled() == VF) 9827 return false; 9828 9829 LVP.setBestPlan(VF.Width, 1); 9830 9831 { 9832 GeneratedRTChecks Checks(*PSE.getSE(), DT, LI, 9833 F->getParent()->getDataLayout()); 9834 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width, 1, LVL, 9835 &CM, BFI, PSI, Checks); 9836 LLVM_DEBUG(dbgs() << "Vectorizing outer loop in \"" 9837 << L->getHeader()->getParent()->getName() << "\"\n"); 9838 LVP.executePlan(LB, DT); 9839 } 9840 9841 // Mark the loop as already vectorized to avoid vectorizing again. 9842 Hints.setAlreadyVectorized(); 9843 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs())); 9844 return true; 9845 } 9846 9847 // Emit a remark if there are stores to floats that required a floating point 9848 // extension. If the vectorized loop was generated with floating point there 9849 // will be a performance penalty from the conversion overhead and the change in 9850 // the vector width. 9851 static void checkMixedPrecision(Loop *L, OptimizationRemarkEmitter *ORE) { 9852 SmallVector<Instruction *, 4> Worklist; 9853 for (BasicBlock *BB : L->getBlocks()) { 9854 for (Instruction &Inst : *BB) { 9855 if (auto *S = dyn_cast<StoreInst>(&Inst)) { 9856 if (S->getValueOperand()->getType()->isFloatTy()) 9857 Worklist.push_back(S); 9858 } 9859 } 9860 } 9861 9862 // Traverse the floating point stores upwards searching, for floating point 9863 // conversions. 9864 SmallPtrSet<const Instruction *, 4> Visited; 9865 SmallPtrSet<const Instruction *, 4> EmittedRemark; 9866 while (!Worklist.empty()) { 9867 auto *I = Worklist.pop_back_val(); 9868 if (!L->contains(I)) 9869 continue; 9870 if (!Visited.insert(I).second) 9871 continue; 9872 9873 // Emit a remark if the floating point store required a floating 9874 // point conversion. 9875 // TODO: More work could be done to identify the root cause such as a 9876 // constant or a function return type and point the user to it. 9877 if (isa<FPExtInst>(I) && EmittedRemark.insert(I).second) 9878 ORE->emit([&]() { 9879 return OptimizationRemarkAnalysis(LV_NAME, "VectorMixedPrecision", 9880 I->getDebugLoc(), L->getHeader()) 9881 << "floating point conversion changes vector width. " 9882 << "Mixed floating point precision requires an up/down " 9883 << "cast that will negatively impact performance."; 9884 }); 9885 9886 for (Use &Op : I->operands()) 9887 if (auto *OpI = dyn_cast<Instruction>(Op)) 9888 Worklist.push_back(OpI); 9889 } 9890 } 9891 9892 LoopVectorizePass::LoopVectorizePass(LoopVectorizeOptions Opts) 9893 : InterleaveOnlyWhenForced(Opts.InterleaveOnlyWhenForced || 9894 !EnableLoopInterleaving), 9895 VectorizeOnlyWhenForced(Opts.VectorizeOnlyWhenForced || 9896 !EnableLoopVectorization) {} 9897 9898 bool LoopVectorizePass::processLoop(Loop *L) { 9899 assert((EnableVPlanNativePath || L->isInnermost()) && 9900 "VPlan-native path is not enabled. Only process inner loops."); 9901 9902 #ifndef NDEBUG 9903 const std::string DebugLocStr = getDebugLocString(L); 9904 #endif /* NDEBUG */ 9905 9906 LLVM_DEBUG(dbgs() << "\nLV: Checking a loop in \"" 9907 << L->getHeader()->getParent()->getName() << "\" from " 9908 << DebugLocStr << "\n"); 9909 9910 LoopVectorizeHints Hints(L, InterleaveOnlyWhenForced, *ORE); 9911 9912 LLVM_DEBUG( 9913 dbgs() << "LV: Loop hints:" 9914 << " force=" 9915 << (Hints.getForce() == LoopVectorizeHints::FK_Disabled 9916 ? "disabled" 9917 : (Hints.getForce() == LoopVectorizeHints::FK_Enabled 9918 ? "enabled" 9919 : "?")) 9920 << " width=" << Hints.getWidth() 9921 << " interleave=" << Hints.getInterleave() << "\n"); 9922 9923 // Function containing loop 9924 Function *F = L->getHeader()->getParent(); 9925 9926 // Looking at the diagnostic output is the only way to determine if a loop 9927 // was vectorized (other than looking at the IR or machine code), so it 9928 // is important to generate an optimization remark for each loop. Most of 9929 // these messages are generated as OptimizationRemarkAnalysis. Remarks 9930 // generated as OptimizationRemark and OptimizationRemarkMissed are 9931 // less verbose reporting vectorized loops and unvectorized loops that may 9932 // benefit from vectorization, respectively. 9933 9934 if (!Hints.allowVectorization(F, L, VectorizeOnlyWhenForced)) { 9935 LLVM_DEBUG(dbgs() << "LV: Loop hints prevent vectorization.\n"); 9936 return false; 9937 } 9938 9939 PredicatedScalarEvolution PSE(*SE, *L); 9940 9941 // Check if it is legal to vectorize the loop. 9942 LoopVectorizationRequirements Requirements; 9943 LoopVectorizationLegality LVL(L, PSE, DT, TTI, TLI, AA, F, GetLAA, LI, ORE, 9944 &Requirements, &Hints, DB, AC, BFI, PSI); 9945 if (!LVL.canVectorize(EnableVPlanNativePath)) { 9946 LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Cannot prove legality.\n"); 9947 Hints.emitRemarkWithHints(); 9948 return false; 9949 } 9950 9951 // Check the function attributes and profiles to find out if this function 9952 // should be optimized for size. 9953 ScalarEpilogueLowering SEL = getScalarEpilogueLowering( 9954 F, L, Hints, PSI, BFI, TTI, TLI, AC, LI, PSE.getSE(), DT, LVL); 9955 9956 // Entrance to the VPlan-native vectorization path. Outer loops are processed 9957 // here. They may require CFG and instruction level transformations before 9958 // even evaluating whether vectorization is profitable. Since we cannot modify 9959 // the incoming IR, we need to build VPlan upfront in the vectorization 9960 // pipeline. 9961 if (!L->isInnermost()) 9962 return processLoopInVPlanNativePath(L, PSE, LI, DT, &LVL, TTI, TLI, DB, AC, 9963 ORE, BFI, PSI, Hints, Requirements); 9964 9965 assert(L->isInnermost() && "Inner loop expected."); 9966 9967 // Check the loop for a trip count threshold: vectorize loops with a tiny trip 9968 // count by optimizing for size, to minimize overheads. 9969 auto ExpectedTC = getSmallBestKnownTC(*SE, L); 9970 if (ExpectedTC && *ExpectedTC < TinyTripCountVectorThreshold) { 9971 LLVM_DEBUG(dbgs() << "LV: Found a loop with a very small trip count. " 9972 << "This loop is worth vectorizing only if no scalar " 9973 << "iteration overheads are incurred."); 9974 if (Hints.getForce() == LoopVectorizeHints::FK_Enabled) 9975 LLVM_DEBUG(dbgs() << " But vectorizing was explicitly forced.\n"); 9976 else { 9977 LLVM_DEBUG(dbgs() << "\n"); 9978 SEL = CM_ScalarEpilogueNotAllowedLowTripLoop; 9979 } 9980 } 9981 9982 // Check the function attributes to see if implicit floats are allowed. 9983 // FIXME: This check doesn't seem possibly correct -- what if the loop is 9984 // an integer loop and the vector instructions selected are purely integer 9985 // vector instructions? 9986 if (F->hasFnAttribute(Attribute::NoImplicitFloat)) { 9987 reportVectorizationFailure( 9988 "Can't vectorize when the NoImplicitFloat attribute is used", 9989 "loop not vectorized due to NoImplicitFloat attribute", 9990 "NoImplicitFloat", ORE, L); 9991 Hints.emitRemarkWithHints(); 9992 return false; 9993 } 9994 9995 // Check if the target supports potentially unsafe FP vectorization. 9996 // FIXME: Add a check for the type of safety issue (denormal, signaling) 9997 // for the target we're vectorizing for, to make sure none of the 9998 // additional fp-math flags can help. 9999 if (Hints.isPotentiallyUnsafe() && 10000 TTI->isFPVectorizationPotentiallyUnsafe()) { 10001 reportVectorizationFailure( 10002 "Potentially unsafe FP op prevents vectorization", 10003 "loop not vectorized due to unsafe FP support.", 10004 "UnsafeFP", ORE, L); 10005 Hints.emitRemarkWithHints(); 10006 return false; 10007 } 10008 10009 if (!LVL.canVectorizeFPMath(EnableStrictReductions)) { 10010 ORE->emit([&]() { 10011 auto *ExactFPMathInst = Requirements.getExactFPInst(); 10012 return OptimizationRemarkAnalysisFPCommute(DEBUG_TYPE, "CantReorderFPOps", 10013 ExactFPMathInst->getDebugLoc(), 10014 ExactFPMathInst->getParent()) 10015 << "loop not vectorized: cannot prove it is safe to reorder " 10016 "floating-point operations"; 10017 }); 10018 LLVM_DEBUG(dbgs() << "LV: loop not vectorized: cannot prove it is safe to " 10019 "reorder floating-point operations\n"); 10020 Hints.emitRemarkWithHints(); 10021 return false; 10022 } 10023 10024 bool UseInterleaved = TTI->enableInterleavedAccessVectorization(); 10025 InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL.getLAI()); 10026 10027 // If an override option has been passed in for interleaved accesses, use it. 10028 if (EnableInterleavedMemAccesses.getNumOccurrences() > 0) 10029 UseInterleaved = EnableInterleavedMemAccesses; 10030 10031 // Analyze interleaved memory accesses. 10032 if (UseInterleaved) { 10033 IAI.analyzeInterleaving(useMaskedInterleavedAccesses(*TTI)); 10034 } 10035 10036 // Use the cost model. 10037 LoopVectorizationCostModel CM(SEL, L, PSE, LI, &LVL, *TTI, TLI, DB, AC, ORE, 10038 F, &Hints, IAI); 10039 CM.collectValuesToIgnore(); 10040 10041 // Use the planner for vectorization. 10042 LoopVectorizationPlanner LVP(L, LI, TLI, TTI, &LVL, CM, IAI, PSE, Hints, 10043 Requirements, ORE); 10044 10045 // Get user vectorization factor and interleave count. 10046 ElementCount UserVF = Hints.getWidth(); 10047 unsigned UserIC = Hints.getInterleave(); 10048 10049 // Plan how to best vectorize, return the best VF and its cost. 10050 Optional<VectorizationFactor> MaybeVF = LVP.plan(UserVF, UserIC); 10051 10052 VectorizationFactor VF = VectorizationFactor::Disabled(); 10053 unsigned IC = 1; 10054 10055 if (MaybeVF) { 10056 VF = *MaybeVF; 10057 // Select the interleave count. 10058 IC = CM.selectInterleaveCount(VF.Width, *VF.Cost.getValue()); 10059 } 10060 10061 // Identify the diagnostic messages that should be produced. 10062 std::pair<StringRef, std::string> VecDiagMsg, IntDiagMsg; 10063 bool VectorizeLoop = true, InterleaveLoop = true; 10064 if (VF.Width.isScalar()) { 10065 LLVM_DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n"); 10066 VecDiagMsg = std::make_pair( 10067 "VectorizationNotBeneficial", 10068 "the cost-model indicates that vectorization is not beneficial"); 10069 VectorizeLoop = false; 10070 } 10071 10072 if (!MaybeVF && UserIC > 1) { 10073 // Tell the user interleaving was avoided up-front, despite being explicitly 10074 // requested. 10075 LLVM_DEBUG(dbgs() << "LV: Ignoring UserIC, because vectorization and " 10076 "interleaving should be avoided up front\n"); 10077 IntDiagMsg = std::make_pair( 10078 "InterleavingAvoided", 10079 "Ignoring UserIC, because interleaving was avoided up front"); 10080 InterleaveLoop = false; 10081 } else if (IC == 1 && UserIC <= 1) { 10082 // Tell the user interleaving is not beneficial. 10083 LLVM_DEBUG(dbgs() << "LV: Interleaving is not beneficial.\n"); 10084 IntDiagMsg = std::make_pair( 10085 "InterleavingNotBeneficial", 10086 "the cost-model indicates that interleaving is not beneficial"); 10087 InterleaveLoop = false; 10088 if (UserIC == 1) { 10089 IntDiagMsg.first = "InterleavingNotBeneficialAndDisabled"; 10090 IntDiagMsg.second += 10091 " and is explicitly disabled or interleave count is set to 1"; 10092 } 10093 } else if (IC > 1 && UserIC == 1) { 10094 // Tell the user interleaving is beneficial, but it explicitly disabled. 10095 LLVM_DEBUG( 10096 dbgs() << "LV: Interleaving is beneficial but is explicitly disabled."); 10097 IntDiagMsg = std::make_pair( 10098 "InterleavingBeneficialButDisabled", 10099 "the cost-model indicates that interleaving is beneficial " 10100 "but is explicitly disabled or interleave count is set to 1"); 10101 InterleaveLoop = false; 10102 } 10103 10104 // Override IC if user provided an interleave count. 10105 IC = UserIC > 0 ? UserIC : IC; 10106 10107 // Emit diagnostic messages, if any. 10108 const char *VAPassName = Hints.vectorizeAnalysisPassName(); 10109 if (!VectorizeLoop && !InterleaveLoop) { 10110 // Do not vectorize or interleaving the loop. 10111 ORE->emit([&]() { 10112 return OptimizationRemarkMissed(VAPassName, VecDiagMsg.first, 10113 L->getStartLoc(), L->getHeader()) 10114 << VecDiagMsg.second; 10115 }); 10116 ORE->emit([&]() { 10117 return OptimizationRemarkMissed(LV_NAME, IntDiagMsg.first, 10118 L->getStartLoc(), L->getHeader()) 10119 << IntDiagMsg.second; 10120 }); 10121 return false; 10122 } else if (!VectorizeLoop && InterleaveLoop) { 10123 LLVM_DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n'); 10124 ORE->emit([&]() { 10125 return OptimizationRemarkAnalysis(VAPassName, VecDiagMsg.first, 10126 L->getStartLoc(), L->getHeader()) 10127 << VecDiagMsg.second; 10128 }); 10129 } else if (VectorizeLoop && !InterleaveLoop) { 10130 LLVM_DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width 10131 << ") in " << DebugLocStr << '\n'); 10132 ORE->emit([&]() { 10133 return OptimizationRemarkAnalysis(LV_NAME, IntDiagMsg.first, 10134 L->getStartLoc(), L->getHeader()) 10135 << IntDiagMsg.second; 10136 }); 10137 } else if (VectorizeLoop && InterleaveLoop) { 10138 LLVM_DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width 10139 << ") in " << DebugLocStr << '\n'); 10140 LLVM_DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n'); 10141 } 10142 10143 bool DisableRuntimeUnroll = false; 10144 MDNode *OrigLoopID = L->getLoopID(); 10145 { 10146 // Optimistically generate runtime checks. Drop them if they turn out to not 10147 // be profitable. Limit the scope of Checks, so the cleanup happens 10148 // immediately after vector codegeneration is done. 10149 GeneratedRTChecks Checks(*PSE.getSE(), DT, LI, 10150 F->getParent()->getDataLayout()); 10151 if (!VF.Width.isScalar() || IC > 1) 10152 Checks.Create(L, *LVL.getLAI(), PSE.getUnionPredicate()); 10153 LVP.setBestPlan(VF.Width, IC); 10154 10155 using namespace ore; 10156 if (!VectorizeLoop) { 10157 assert(IC > 1 && "interleave count should not be 1 or 0"); 10158 // If we decided that it is not legal to vectorize the loop, then 10159 // interleave it. 10160 InnerLoopUnroller Unroller(L, PSE, LI, DT, TLI, TTI, AC, ORE, IC, &LVL, 10161 &CM, BFI, PSI, Checks); 10162 LVP.executePlan(Unroller, DT); 10163 10164 ORE->emit([&]() { 10165 return OptimizationRemark(LV_NAME, "Interleaved", L->getStartLoc(), 10166 L->getHeader()) 10167 << "interleaved loop (interleaved count: " 10168 << NV("InterleaveCount", IC) << ")"; 10169 }); 10170 } else { 10171 // If we decided that it is *legal* to vectorize the loop, then do it. 10172 10173 // Consider vectorizing the epilogue too if it's profitable. 10174 VectorizationFactor EpilogueVF = 10175 CM.selectEpilogueVectorizationFactor(VF.Width, LVP); 10176 if (EpilogueVF.Width.isVector()) { 10177 10178 // The first pass vectorizes the main loop and creates a scalar epilogue 10179 // to be vectorized by executing the plan (potentially with a different 10180 // factor) again shortly afterwards. 10181 EpilogueLoopVectorizationInfo EPI(VF.Width.getKnownMinValue(), IC, 10182 EpilogueVF.Width.getKnownMinValue(), 10183 1); 10184 EpilogueVectorizerMainLoop MainILV(L, PSE, LI, DT, TLI, TTI, AC, ORE, 10185 EPI, &LVL, &CM, BFI, PSI, Checks); 10186 10187 LVP.setBestPlan(EPI.MainLoopVF, EPI.MainLoopUF); 10188 LVP.executePlan(MainILV, DT); 10189 ++LoopsVectorized; 10190 10191 simplifyLoop(L, DT, LI, SE, AC, nullptr, false /* PreserveLCSSA */); 10192 formLCSSARecursively(*L, *DT, LI, SE); 10193 10194 // Second pass vectorizes the epilogue and adjusts the control flow 10195 // edges from the first pass. 10196 LVP.setBestPlan(EPI.EpilogueVF, EPI.EpilogueUF); 10197 EPI.MainLoopVF = EPI.EpilogueVF; 10198 EPI.MainLoopUF = EPI.EpilogueUF; 10199 EpilogueVectorizerEpilogueLoop EpilogILV(L, PSE, LI, DT, TLI, TTI, AC, 10200 ORE, EPI, &LVL, &CM, BFI, PSI, 10201 Checks); 10202 LVP.executePlan(EpilogILV, DT); 10203 ++LoopsEpilogueVectorized; 10204 10205 if (!MainILV.areSafetyChecksAdded()) 10206 DisableRuntimeUnroll = true; 10207 } else { 10208 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width, IC, 10209 &LVL, &CM, BFI, PSI, Checks); 10210 LVP.executePlan(LB, DT); 10211 ++LoopsVectorized; 10212 10213 // Add metadata to disable runtime unrolling a scalar loop when there 10214 // are no runtime checks about strides and memory. A scalar loop that is 10215 // rarely used is not worth unrolling. 10216 if (!LB.areSafetyChecksAdded()) 10217 DisableRuntimeUnroll = true; 10218 } 10219 // Report the vectorization decision. 10220 ORE->emit([&]() { 10221 return OptimizationRemark(LV_NAME, "Vectorized", L->getStartLoc(), 10222 L->getHeader()) 10223 << "vectorized loop (vectorization width: " 10224 << NV("VectorizationFactor", VF.Width) 10225 << ", interleaved count: " << NV("InterleaveCount", IC) << ")"; 10226 }); 10227 } 10228 10229 if (ORE->allowExtraAnalysis(LV_NAME)) 10230 checkMixedPrecision(L, ORE); 10231 } 10232 10233 Optional<MDNode *> RemainderLoopID = 10234 makeFollowupLoopID(OrigLoopID, {LLVMLoopVectorizeFollowupAll, 10235 LLVMLoopVectorizeFollowupEpilogue}); 10236 if (RemainderLoopID.hasValue()) { 10237 L->setLoopID(RemainderLoopID.getValue()); 10238 } else { 10239 if (DisableRuntimeUnroll) 10240 AddRuntimeUnrollDisableMetaData(L); 10241 10242 // Mark the loop as already vectorized to avoid vectorizing again. 10243 Hints.setAlreadyVectorized(); 10244 } 10245 10246 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs())); 10247 return true; 10248 } 10249 10250 LoopVectorizeResult LoopVectorizePass::runImpl( 10251 Function &F, ScalarEvolution &SE_, LoopInfo &LI_, TargetTransformInfo &TTI_, 10252 DominatorTree &DT_, BlockFrequencyInfo &BFI_, TargetLibraryInfo *TLI_, 10253 DemandedBits &DB_, AAResults &AA_, AssumptionCache &AC_, 10254 std::function<const LoopAccessInfo &(Loop &)> &GetLAA_, 10255 OptimizationRemarkEmitter &ORE_, ProfileSummaryInfo *PSI_) { 10256 SE = &SE_; 10257 LI = &LI_; 10258 TTI = &TTI_; 10259 DT = &DT_; 10260 BFI = &BFI_; 10261 TLI = TLI_; 10262 AA = &AA_; 10263 AC = &AC_; 10264 GetLAA = &GetLAA_; 10265 DB = &DB_; 10266 ORE = &ORE_; 10267 PSI = PSI_; 10268 10269 // Don't attempt if 10270 // 1. the target claims to have no vector registers, and 10271 // 2. interleaving won't help ILP. 10272 // 10273 // The second condition is necessary because, even if the target has no 10274 // vector registers, loop vectorization may still enable scalar 10275 // interleaving. 10276 if (!TTI->getNumberOfRegisters(TTI->getRegisterClassForType(true)) && 10277 TTI->getMaxInterleaveFactor(1) < 2) 10278 return LoopVectorizeResult(false, false); 10279 10280 bool Changed = false, CFGChanged = false; 10281 10282 // The vectorizer requires loops to be in simplified form. 10283 // Since simplification may add new inner loops, it has to run before the 10284 // legality and profitability checks. This means running the loop vectorizer 10285 // will simplify all loops, regardless of whether anything end up being 10286 // vectorized. 10287 for (auto &L : *LI) 10288 Changed |= CFGChanged |= 10289 simplifyLoop(L, DT, LI, SE, AC, nullptr, false /* PreserveLCSSA */); 10290 10291 // Build up a worklist of inner-loops to vectorize. This is necessary as 10292 // the act of vectorizing or partially unrolling a loop creates new loops 10293 // and can invalidate iterators across the loops. 10294 SmallVector<Loop *, 8> Worklist; 10295 10296 for (Loop *L : *LI) 10297 collectSupportedLoops(*L, LI, ORE, Worklist); 10298 10299 LoopsAnalyzed += Worklist.size(); 10300 10301 // Now walk the identified inner loops. 10302 while (!Worklist.empty()) { 10303 Loop *L = Worklist.pop_back_val(); 10304 10305 // For the inner loops we actually process, form LCSSA to simplify the 10306 // transform. 10307 Changed |= formLCSSARecursively(*L, *DT, LI, SE); 10308 10309 Changed |= CFGChanged |= processLoop(L); 10310 } 10311 10312 // Process each loop nest in the function. 10313 return LoopVectorizeResult(Changed, CFGChanged); 10314 } 10315 10316 PreservedAnalyses LoopVectorizePass::run(Function &F, 10317 FunctionAnalysisManager &AM) { 10318 auto &SE = AM.getResult<ScalarEvolutionAnalysis>(F); 10319 auto &LI = AM.getResult<LoopAnalysis>(F); 10320 auto &TTI = AM.getResult<TargetIRAnalysis>(F); 10321 auto &DT = AM.getResult<DominatorTreeAnalysis>(F); 10322 auto &BFI = AM.getResult<BlockFrequencyAnalysis>(F); 10323 auto &TLI = AM.getResult<TargetLibraryAnalysis>(F); 10324 auto &AA = AM.getResult<AAManager>(F); 10325 auto &AC = AM.getResult<AssumptionAnalysis>(F); 10326 auto &DB = AM.getResult<DemandedBitsAnalysis>(F); 10327 auto &ORE = AM.getResult<OptimizationRemarkEmitterAnalysis>(F); 10328 MemorySSA *MSSA = EnableMSSALoopDependency 10329 ? &AM.getResult<MemorySSAAnalysis>(F).getMSSA() 10330 : nullptr; 10331 10332 auto &LAM = AM.getResult<LoopAnalysisManagerFunctionProxy>(F).getManager(); 10333 std::function<const LoopAccessInfo &(Loop &)> GetLAA = 10334 [&](Loop &L) -> const LoopAccessInfo & { 10335 LoopStandardAnalysisResults AR = {AA, AC, DT, LI, SE, 10336 TLI, TTI, nullptr, MSSA}; 10337 return LAM.getResult<LoopAccessAnalysis>(L, AR); 10338 }; 10339 auto &MAMProxy = AM.getResult<ModuleAnalysisManagerFunctionProxy>(F); 10340 ProfileSummaryInfo *PSI = 10341 MAMProxy.getCachedResult<ProfileSummaryAnalysis>(*F.getParent()); 10342 LoopVectorizeResult Result = 10343 runImpl(F, SE, LI, TTI, DT, BFI, &TLI, DB, AA, AC, GetLAA, ORE, PSI); 10344 if (!Result.MadeAnyChange) 10345 return PreservedAnalyses::all(); 10346 PreservedAnalyses PA; 10347 10348 // We currently do not preserve loopinfo/dominator analyses with outer loop 10349 // vectorization. Until this is addressed, mark these analyses as preserved 10350 // only for non-VPlan-native path. 10351 // TODO: Preserve Loop and Dominator analyses for VPlan-native path. 10352 if (!EnableVPlanNativePath) { 10353 PA.preserve<LoopAnalysis>(); 10354 PA.preserve<DominatorTreeAnalysis>(); 10355 } 10356 if (!Result.MadeCFGChange) 10357 PA.preserveSet<CFGAnalyses>(); 10358 return PA; 10359 } 10360