1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This is the LLVM loop vectorizer. This pass modifies 'vectorizable' loops 10 // and generates target-independent LLVM-IR. 11 // The vectorizer uses the TargetTransformInfo analysis to estimate the costs 12 // of instructions in order to estimate the profitability of vectorization. 13 // 14 // The loop vectorizer combines consecutive loop iterations into a single 15 // 'wide' iteration. After this transformation the index is incremented 16 // by the SIMD vector width, and not by one. 17 // 18 // This pass has three parts: 19 // 1. The main loop pass that drives the different parts. 20 // 2. LoopVectorizationLegality - A unit that checks for the legality 21 // of the vectorization. 22 // 3. InnerLoopVectorizer - A unit that performs the actual 23 // widening of instructions. 24 // 4. LoopVectorizationCostModel - A unit that checks for the profitability 25 // of vectorization. It decides on the optimal vector width, which 26 // can be one, if vectorization is not profitable. 27 // 28 // There is a development effort going on to migrate loop vectorizer to the 29 // VPlan infrastructure and to introduce outer loop vectorization support (see 30 // docs/Proposal/VectorizationPlan.rst and 31 // http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this 32 // purpose, we temporarily introduced the VPlan-native vectorization path: an 33 // alternative vectorization path that is natively implemented on top of the 34 // VPlan infrastructure. See EnableVPlanNativePath for enabling. 35 // 36 //===----------------------------------------------------------------------===// 37 // 38 // The reduction-variable vectorization is based on the paper: 39 // D. Nuzman and R. Henderson. Multi-platform Auto-vectorization. 40 // 41 // Variable uniformity checks are inspired by: 42 // Karrenberg, R. and Hack, S. Whole Function Vectorization. 43 // 44 // The interleaved access vectorization is based on the paper: 45 // Dorit Nuzman, Ira Rosen and Ayal Zaks. Auto-Vectorization of Interleaved 46 // Data for SIMD 47 // 48 // Other ideas/concepts are from: 49 // A. Zaks and D. Nuzman. Autovectorization in GCC-two years later. 50 // 51 // S. Maleki, Y. Gao, M. Garzaran, T. Wong and D. Padua. An Evaluation of 52 // Vectorizing Compilers. 53 // 54 //===----------------------------------------------------------------------===// 55 56 #include "llvm/Transforms/Vectorize/LoopVectorize.h" 57 #include "LoopVectorizationPlanner.h" 58 #include "VPRecipeBuilder.h" 59 #include "VPlan.h" 60 #include "VPlanHCFGBuilder.h" 61 #include "VPlanPredicator.h" 62 #include "VPlanTransforms.h" 63 #include "llvm/ADT/APInt.h" 64 #include "llvm/ADT/ArrayRef.h" 65 #include "llvm/ADT/DenseMap.h" 66 #include "llvm/ADT/DenseMapInfo.h" 67 #include "llvm/ADT/Hashing.h" 68 #include "llvm/ADT/MapVector.h" 69 #include "llvm/ADT/None.h" 70 #include "llvm/ADT/Optional.h" 71 #include "llvm/ADT/STLExtras.h" 72 #include "llvm/ADT/SmallPtrSet.h" 73 #include "llvm/ADT/SmallVector.h" 74 #include "llvm/ADT/Statistic.h" 75 #include "llvm/ADT/StringRef.h" 76 #include "llvm/ADT/Twine.h" 77 #include "llvm/ADT/iterator_range.h" 78 #include "llvm/Analysis/AssumptionCache.h" 79 #include "llvm/Analysis/BasicAliasAnalysis.h" 80 #include "llvm/Analysis/BlockFrequencyInfo.h" 81 #include "llvm/Analysis/CFG.h" 82 #include "llvm/Analysis/CodeMetrics.h" 83 #include "llvm/Analysis/DemandedBits.h" 84 #include "llvm/Analysis/GlobalsModRef.h" 85 #include "llvm/Analysis/LoopAccessAnalysis.h" 86 #include "llvm/Analysis/LoopAnalysisManager.h" 87 #include "llvm/Analysis/LoopInfo.h" 88 #include "llvm/Analysis/LoopIterator.h" 89 #include "llvm/Analysis/MemorySSA.h" 90 #include "llvm/Analysis/OptimizationRemarkEmitter.h" 91 #include "llvm/Analysis/ProfileSummaryInfo.h" 92 #include "llvm/Analysis/ScalarEvolution.h" 93 #include "llvm/Analysis/ScalarEvolutionExpressions.h" 94 #include "llvm/Analysis/TargetLibraryInfo.h" 95 #include "llvm/Analysis/TargetTransformInfo.h" 96 #include "llvm/Analysis/VectorUtils.h" 97 #include "llvm/IR/Attributes.h" 98 #include "llvm/IR/BasicBlock.h" 99 #include "llvm/IR/CFG.h" 100 #include "llvm/IR/Constant.h" 101 #include "llvm/IR/Constants.h" 102 #include "llvm/IR/DataLayout.h" 103 #include "llvm/IR/DebugInfoMetadata.h" 104 #include "llvm/IR/DebugLoc.h" 105 #include "llvm/IR/DerivedTypes.h" 106 #include "llvm/IR/DiagnosticInfo.h" 107 #include "llvm/IR/Dominators.h" 108 #include "llvm/IR/Function.h" 109 #include "llvm/IR/IRBuilder.h" 110 #include "llvm/IR/InstrTypes.h" 111 #include "llvm/IR/Instruction.h" 112 #include "llvm/IR/Instructions.h" 113 #include "llvm/IR/IntrinsicInst.h" 114 #include "llvm/IR/Intrinsics.h" 115 #include "llvm/IR/LLVMContext.h" 116 #include "llvm/IR/Metadata.h" 117 #include "llvm/IR/Module.h" 118 #include "llvm/IR/Operator.h" 119 #include "llvm/IR/PatternMatch.h" 120 #include "llvm/IR/Type.h" 121 #include "llvm/IR/Use.h" 122 #include "llvm/IR/User.h" 123 #include "llvm/IR/Value.h" 124 #include "llvm/IR/ValueHandle.h" 125 #include "llvm/IR/Verifier.h" 126 #include "llvm/InitializePasses.h" 127 #include "llvm/Pass.h" 128 #include "llvm/Support/Casting.h" 129 #include "llvm/Support/CommandLine.h" 130 #include "llvm/Support/Compiler.h" 131 #include "llvm/Support/Debug.h" 132 #include "llvm/Support/ErrorHandling.h" 133 #include "llvm/Support/InstructionCost.h" 134 #include "llvm/Support/MathExtras.h" 135 #include "llvm/Support/raw_ostream.h" 136 #include "llvm/Transforms/Utils/BasicBlockUtils.h" 137 #include "llvm/Transforms/Utils/InjectTLIMappings.h" 138 #include "llvm/Transforms/Utils/LoopSimplify.h" 139 #include "llvm/Transforms/Utils/LoopUtils.h" 140 #include "llvm/Transforms/Utils/LoopVersioning.h" 141 #include "llvm/Transforms/Utils/ScalarEvolutionExpander.h" 142 #include "llvm/Transforms/Utils/SizeOpts.h" 143 #include "llvm/Transforms/Vectorize/LoopVectorizationLegality.h" 144 #include <algorithm> 145 #include <cassert> 146 #include <cstdint> 147 #include <cstdlib> 148 #include <functional> 149 #include <iterator> 150 #include <limits> 151 #include <memory> 152 #include <string> 153 #include <tuple> 154 #include <utility> 155 156 using namespace llvm; 157 158 #define LV_NAME "loop-vectorize" 159 #define DEBUG_TYPE LV_NAME 160 161 #ifndef NDEBUG 162 const char VerboseDebug[] = DEBUG_TYPE "-verbose"; 163 #endif 164 165 /// @{ 166 /// Metadata attribute names 167 const char LLVMLoopVectorizeFollowupAll[] = "llvm.loop.vectorize.followup_all"; 168 const char LLVMLoopVectorizeFollowupVectorized[] = 169 "llvm.loop.vectorize.followup_vectorized"; 170 const char LLVMLoopVectorizeFollowupEpilogue[] = 171 "llvm.loop.vectorize.followup_epilogue"; 172 /// @} 173 174 STATISTIC(LoopsVectorized, "Number of loops vectorized"); 175 STATISTIC(LoopsAnalyzed, "Number of loops analyzed for vectorization"); 176 STATISTIC(LoopsEpilogueVectorized, "Number of epilogues vectorized"); 177 178 static cl::opt<bool> EnableEpilogueVectorization( 179 "enable-epilogue-vectorization", cl::init(true), cl::Hidden, 180 cl::desc("Enable vectorization of epilogue loops.")); 181 182 static cl::opt<unsigned> EpilogueVectorizationForceVF( 183 "epilogue-vectorization-force-VF", cl::init(1), cl::Hidden, 184 cl::desc("When epilogue vectorization is enabled, and a value greater than " 185 "1 is specified, forces the given VF for all applicable epilogue " 186 "loops.")); 187 188 static cl::opt<unsigned> EpilogueVectorizationMinVF( 189 "epilogue-vectorization-minimum-VF", cl::init(16), cl::Hidden, 190 cl::desc("Only loops with vectorization factor equal to or larger than " 191 "the specified value are considered for epilogue vectorization.")); 192 193 /// Loops with a known constant trip count below this number are vectorized only 194 /// if no scalar iteration overheads are incurred. 195 static cl::opt<unsigned> TinyTripCountVectorThreshold( 196 "vectorizer-min-trip-count", cl::init(16), cl::Hidden, 197 cl::desc("Loops with a constant trip count that is smaller than this " 198 "value are vectorized only if no scalar iteration overheads " 199 "are incurred.")); 200 201 static cl::opt<unsigned> PragmaVectorizeMemoryCheckThreshold( 202 "pragma-vectorize-memory-check-threshold", cl::init(128), cl::Hidden, 203 cl::desc("The maximum allowed number of runtime memory checks with a " 204 "vectorize(enable) pragma.")); 205 206 // Option prefer-predicate-over-epilogue indicates that an epilogue is undesired, 207 // that predication is preferred, and this lists all options. I.e., the 208 // vectorizer will try to fold the tail-loop (epilogue) into the vector body 209 // and predicate the instructions accordingly. If tail-folding fails, there are 210 // different fallback strategies depending on these values: 211 namespace PreferPredicateTy { 212 enum Option { 213 ScalarEpilogue = 0, 214 PredicateElseScalarEpilogue, 215 PredicateOrDontVectorize 216 }; 217 } // namespace PreferPredicateTy 218 219 static cl::opt<PreferPredicateTy::Option> PreferPredicateOverEpilogue( 220 "prefer-predicate-over-epilogue", 221 cl::init(PreferPredicateTy::ScalarEpilogue), 222 cl::Hidden, 223 cl::desc("Tail-folding and predication preferences over creating a scalar " 224 "epilogue loop."), 225 cl::values(clEnumValN(PreferPredicateTy::ScalarEpilogue, 226 "scalar-epilogue", 227 "Don't tail-predicate loops, create scalar epilogue"), 228 clEnumValN(PreferPredicateTy::PredicateElseScalarEpilogue, 229 "predicate-else-scalar-epilogue", 230 "prefer tail-folding, create scalar epilogue if tail " 231 "folding fails."), 232 clEnumValN(PreferPredicateTy::PredicateOrDontVectorize, 233 "predicate-dont-vectorize", 234 "prefers tail-folding, don't attempt vectorization if " 235 "tail-folding fails."))); 236 237 static cl::opt<bool> MaximizeBandwidth( 238 "vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden, 239 cl::desc("Maximize bandwidth when selecting vectorization factor which " 240 "will be determined by the smallest type in loop.")); 241 242 static cl::opt<bool> EnableInterleavedMemAccesses( 243 "enable-interleaved-mem-accesses", cl::init(false), cl::Hidden, 244 cl::desc("Enable vectorization on interleaved memory accesses in a loop")); 245 246 /// An interleave-group may need masking if it resides in a block that needs 247 /// predication, or in order to mask away gaps. 248 static cl::opt<bool> EnableMaskedInterleavedMemAccesses( 249 "enable-masked-interleaved-mem-accesses", cl::init(false), cl::Hidden, 250 cl::desc("Enable vectorization on masked interleaved memory accesses in a loop")); 251 252 static cl::opt<unsigned> TinyTripCountInterleaveThreshold( 253 "tiny-trip-count-interleave-threshold", cl::init(128), cl::Hidden, 254 cl::desc("We don't interleave loops with a estimated constant trip count " 255 "below this number")); 256 257 static cl::opt<unsigned> ForceTargetNumScalarRegs( 258 "force-target-num-scalar-regs", cl::init(0), cl::Hidden, 259 cl::desc("A flag that overrides the target's number of scalar registers.")); 260 261 static cl::opt<unsigned> ForceTargetNumVectorRegs( 262 "force-target-num-vector-regs", cl::init(0), cl::Hidden, 263 cl::desc("A flag that overrides the target's number of vector registers.")); 264 265 static cl::opt<unsigned> ForceTargetMaxScalarInterleaveFactor( 266 "force-target-max-scalar-interleave", cl::init(0), cl::Hidden, 267 cl::desc("A flag that overrides the target's max interleave factor for " 268 "scalar loops.")); 269 270 static cl::opt<unsigned> ForceTargetMaxVectorInterleaveFactor( 271 "force-target-max-vector-interleave", cl::init(0), cl::Hidden, 272 cl::desc("A flag that overrides the target's max interleave factor for " 273 "vectorized loops.")); 274 275 static cl::opt<unsigned> ForceTargetInstructionCost( 276 "force-target-instruction-cost", cl::init(0), cl::Hidden, 277 cl::desc("A flag that overrides the target's expected cost for " 278 "an instruction to a single constant value. Mostly " 279 "useful for getting consistent testing.")); 280 281 static cl::opt<bool> ForceTargetSupportsScalableVectors( 282 "force-target-supports-scalable-vectors", cl::init(false), cl::Hidden, 283 cl::desc( 284 "Pretend that scalable vectors are supported, even if the target does " 285 "not support them. This flag should only be used for testing.")); 286 287 static cl::opt<unsigned> SmallLoopCost( 288 "small-loop-cost", cl::init(20), cl::Hidden, 289 cl::desc( 290 "The cost of a loop that is considered 'small' by the interleaver.")); 291 292 static cl::opt<bool> LoopVectorizeWithBlockFrequency( 293 "loop-vectorize-with-block-frequency", cl::init(true), cl::Hidden, 294 cl::desc("Enable the use of the block frequency analysis to access PGO " 295 "heuristics minimizing code growth in cold regions and being more " 296 "aggressive in hot regions.")); 297 298 // Runtime interleave loops for load/store throughput. 299 static cl::opt<bool> EnableLoadStoreRuntimeInterleave( 300 "enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden, 301 cl::desc( 302 "Enable runtime interleaving until load/store ports are saturated")); 303 304 /// Interleave small loops with scalar reductions. 305 static cl::opt<bool> InterleaveSmallLoopScalarReduction( 306 "interleave-small-loop-scalar-reduction", cl::init(false), cl::Hidden, 307 cl::desc("Enable interleaving for loops with small iteration counts that " 308 "contain scalar reductions to expose ILP.")); 309 310 /// The number of stores in a loop that are allowed to need predication. 311 static cl::opt<unsigned> NumberOfStoresToPredicate( 312 "vectorize-num-stores-pred", cl::init(1), cl::Hidden, 313 cl::desc("Max number of stores to be predicated behind an if.")); 314 315 static cl::opt<bool> EnableIndVarRegisterHeur( 316 "enable-ind-var-reg-heur", cl::init(true), cl::Hidden, 317 cl::desc("Count the induction variable only once when interleaving")); 318 319 static cl::opt<bool> EnableCondStoresVectorization( 320 "enable-cond-stores-vec", cl::init(true), cl::Hidden, 321 cl::desc("Enable if predication of stores during vectorization.")); 322 323 static cl::opt<unsigned> MaxNestedScalarReductionIC( 324 "max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden, 325 cl::desc("The maximum interleave count to use when interleaving a scalar " 326 "reduction in a nested loop.")); 327 328 static cl::opt<bool> 329 PreferInLoopReductions("prefer-inloop-reductions", cl::init(false), 330 cl::Hidden, 331 cl::desc("Prefer in-loop vector reductions, " 332 "overriding the targets preference.")); 333 334 cl::opt<bool> EnableStrictReductions( 335 "enable-strict-reductions", cl::init(false), cl::Hidden, 336 cl::desc("Enable the vectorisation of loops with in-order (strict) " 337 "FP reductions")); 338 339 static cl::opt<bool> PreferPredicatedReductionSelect( 340 "prefer-predicated-reduction-select", cl::init(false), cl::Hidden, 341 cl::desc( 342 "Prefer predicating a reduction operation over an after loop select.")); 343 344 cl::opt<bool> EnableVPlanNativePath( 345 "enable-vplan-native-path", cl::init(false), cl::Hidden, 346 cl::desc("Enable VPlan-native vectorization path with " 347 "support for outer loop vectorization.")); 348 349 // FIXME: Remove this switch once we have divergence analysis. Currently we 350 // assume divergent non-backedge branches when this switch is true. 351 cl::opt<bool> EnableVPlanPredication( 352 "enable-vplan-predication", cl::init(false), cl::Hidden, 353 cl::desc("Enable VPlan-native vectorization path predicator with " 354 "support for outer loop vectorization.")); 355 356 // This flag enables the stress testing of the VPlan H-CFG construction in the 357 // VPlan-native vectorization path. It must be used in conjuction with 358 // -enable-vplan-native-path. -vplan-verify-hcfg can also be used to enable the 359 // verification of the H-CFGs built. 360 static cl::opt<bool> VPlanBuildStressTest( 361 "vplan-build-stress-test", cl::init(false), cl::Hidden, 362 cl::desc( 363 "Build VPlan for every supported loop nest in the function and bail " 364 "out right after the build (stress test the VPlan H-CFG construction " 365 "in the VPlan-native vectorization path).")); 366 367 cl::opt<bool> llvm::EnableLoopInterleaving( 368 "interleave-loops", cl::init(true), cl::Hidden, 369 cl::desc("Enable loop interleaving in Loop vectorization passes")); 370 cl::opt<bool> llvm::EnableLoopVectorization( 371 "vectorize-loops", cl::init(true), cl::Hidden, 372 cl::desc("Run the Loop vectorization passes")); 373 374 cl::opt<bool> PrintVPlansInDotFormat( 375 "vplan-print-in-dot-format", cl::init(false), cl::Hidden, 376 cl::desc("Use dot format instead of plain text when dumping VPlans")); 377 378 /// A helper function that returns the type of loaded or stored value. 379 static Type *getMemInstValueType(Value *I) { 380 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) && 381 "Expected Load or Store instruction"); 382 if (auto *LI = dyn_cast<LoadInst>(I)) 383 return LI->getType(); 384 return cast<StoreInst>(I)->getValueOperand()->getType(); 385 } 386 387 /// A helper function that returns true if the given type is irregular. The 388 /// type is irregular if its allocated size doesn't equal the store size of an 389 /// element of the corresponding vector type. 390 static bool hasIrregularType(Type *Ty, const DataLayout &DL) { 391 // Determine if an array of N elements of type Ty is "bitcast compatible" 392 // with a <N x Ty> vector. 393 // This is only true if there is no padding between the array elements. 394 return DL.getTypeAllocSizeInBits(Ty) != DL.getTypeSizeInBits(Ty); 395 } 396 397 /// A helper function that returns the reciprocal of the block probability of 398 /// predicated blocks. If we return X, we are assuming the predicated block 399 /// will execute once for every X iterations of the loop header. 400 /// 401 /// TODO: We should use actual block probability here, if available. Currently, 402 /// we always assume predicated blocks have a 50% chance of executing. 403 static unsigned getReciprocalPredBlockProb() { return 2; } 404 405 /// A helper function that returns an integer or floating-point constant with 406 /// value C. 407 static Constant *getSignedIntOrFpConstant(Type *Ty, int64_t C) { 408 return Ty->isIntegerTy() ? ConstantInt::getSigned(Ty, C) 409 : ConstantFP::get(Ty, C); 410 } 411 412 /// Returns "best known" trip count for the specified loop \p L as defined by 413 /// the following procedure: 414 /// 1) Returns exact trip count if it is known. 415 /// 2) Returns expected trip count according to profile data if any. 416 /// 3) Returns upper bound estimate if it is known. 417 /// 4) Returns None if all of the above failed. 418 static Optional<unsigned> getSmallBestKnownTC(ScalarEvolution &SE, Loop *L) { 419 // Check if exact trip count is known. 420 if (unsigned ExpectedTC = SE.getSmallConstantTripCount(L)) 421 return ExpectedTC; 422 423 // Check if there is an expected trip count available from profile data. 424 if (LoopVectorizeWithBlockFrequency) 425 if (auto EstimatedTC = getLoopEstimatedTripCount(L)) 426 return EstimatedTC; 427 428 // Check if upper bound estimate is known. 429 if (unsigned ExpectedTC = SE.getSmallConstantMaxTripCount(L)) 430 return ExpectedTC; 431 432 return None; 433 } 434 435 // Forward declare GeneratedRTChecks. 436 class GeneratedRTChecks; 437 438 namespace llvm { 439 440 /// InnerLoopVectorizer vectorizes loops which contain only one basic 441 /// block to a specified vectorization factor (VF). 442 /// This class performs the widening of scalars into vectors, or multiple 443 /// scalars. This class also implements the following features: 444 /// * It inserts an epilogue loop for handling loops that don't have iteration 445 /// counts that are known to be a multiple of the vectorization factor. 446 /// * It handles the code generation for reduction variables. 447 /// * Scalarization (implementation using scalars) of un-vectorizable 448 /// instructions. 449 /// InnerLoopVectorizer does not perform any vectorization-legality 450 /// checks, and relies on the caller to check for the different legality 451 /// aspects. The InnerLoopVectorizer relies on the 452 /// LoopVectorizationLegality class to provide information about the induction 453 /// and reduction variables that were found to a given vectorization factor. 454 class InnerLoopVectorizer { 455 public: 456 InnerLoopVectorizer(Loop *OrigLoop, PredicatedScalarEvolution &PSE, 457 LoopInfo *LI, DominatorTree *DT, 458 const TargetLibraryInfo *TLI, 459 const TargetTransformInfo *TTI, AssumptionCache *AC, 460 OptimizationRemarkEmitter *ORE, ElementCount VecWidth, 461 unsigned UnrollFactor, LoopVectorizationLegality *LVL, 462 LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, 463 ProfileSummaryInfo *PSI, GeneratedRTChecks &RTChecks) 464 : OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI), 465 AC(AC), ORE(ORE), VF(VecWidth), UF(UnrollFactor), 466 Builder(PSE.getSE()->getContext()), Legal(LVL), Cost(CM), BFI(BFI), 467 PSI(PSI), RTChecks(RTChecks) { 468 // Query this against the original loop and save it here because the profile 469 // of the original loop header may change as the transformation happens. 470 OptForSizeBasedOnProfile = llvm::shouldOptimizeForSize( 471 OrigLoop->getHeader(), PSI, BFI, PGSOQueryType::IRPass); 472 } 473 474 virtual ~InnerLoopVectorizer() = default; 475 476 /// Create a new empty loop that will contain vectorized instructions later 477 /// on, while the old loop will be used as the scalar remainder. Control flow 478 /// is generated around the vectorized (and scalar epilogue) loops consisting 479 /// of various checks and bypasses. Return the pre-header block of the new 480 /// loop. 481 /// In the case of epilogue vectorization, this function is overriden to 482 /// handle the more complex control flow around the loops. 483 virtual BasicBlock *createVectorizedLoopSkeleton(); 484 485 /// Widen a single instruction within the innermost loop. 486 void widenInstruction(Instruction &I, VPValue *Def, VPUser &Operands, 487 VPTransformState &State); 488 489 /// Widen a single call instruction within the innermost loop. 490 void widenCallInstruction(CallInst &I, VPValue *Def, VPUser &ArgOperands, 491 VPTransformState &State); 492 493 /// Widen a single select instruction within the innermost loop. 494 void widenSelectInstruction(SelectInst &I, VPValue *VPDef, VPUser &Operands, 495 bool InvariantCond, VPTransformState &State); 496 497 /// Fix the vectorized code, taking care of header phi's, live-outs, and more. 498 void fixVectorizedLoop(VPTransformState &State); 499 500 // Return true if any runtime check is added. 501 bool areSafetyChecksAdded() { return AddedSafetyChecks; } 502 503 /// A type for vectorized values in the new loop. Each value from the 504 /// original loop, when vectorized, is represented by UF vector values in the 505 /// new unrolled loop, where UF is the unroll factor. 506 using VectorParts = SmallVector<Value *, 2>; 507 508 /// Vectorize a single GetElementPtrInst based on information gathered and 509 /// decisions taken during planning. 510 void widenGEP(GetElementPtrInst *GEP, VPValue *VPDef, VPUser &Indices, 511 unsigned UF, ElementCount VF, bool IsPtrLoopInvariant, 512 SmallBitVector &IsIndexLoopInvariant, VPTransformState &State); 513 514 /// Vectorize a single PHINode in a block. This method handles the induction 515 /// variable canonicalization. It supports both VF = 1 for unrolled loops and 516 /// arbitrary length vectors. 517 void widenPHIInstruction(Instruction *PN, RecurrenceDescriptor *RdxDesc, 518 VPWidenPHIRecipe *PhiR, VPTransformState &State); 519 520 /// A helper function to scalarize a single Instruction in the innermost loop. 521 /// Generates a sequence of scalar instances for each lane between \p MinLane 522 /// and \p MaxLane, times each part between \p MinPart and \p MaxPart, 523 /// inclusive. Uses the VPValue operands from \p Operands instead of \p 524 /// Instr's operands. 525 void scalarizeInstruction(Instruction *Instr, VPValue *Def, VPUser &Operands, 526 const VPIteration &Instance, bool IfPredicateInstr, 527 VPTransformState &State); 528 529 /// Widen an integer or floating-point induction variable \p IV. If \p Trunc 530 /// is provided, the integer induction variable will first be truncated to 531 /// the corresponding type. 532 void widenIntOrFpInduction(PHINode *IV, Value *Start, TruncInst *Trunc, 533 VPValue *Def, VPValue *CastDef, 534 VPTransformState &State); 535 536 /// Construct the vector value of a scalarized value \p V one lane at a time. 537 void packScalarIntoVectorValue(VPValue *Def, const VPIteration &Instance, 538 VPTransformState &State); 539 540 /// Try to vectorize interleaved access group \p Group with the base address 541 /// given in \p Addr, optionally masking the vector operations if \p 542 /// BlockInMask is non-null. Use \p State to translate given VPValues to IR 543 /// values in the vectorized loop. 544 void vectorizeInterleaveGroup(const InterleaveGroup<Instruction> *Group, 545 ArrayRef<VPValue *> VPDefs, 546 VPTransformState &State, VPValue *Addr, 547 ArrayRef<VPValue *> StoredValues, 548 VPValue *BlockInMask = nullptr); 549 550 /// Vectorize Load and Store instructions with the base address given in \p 551 /// Addr, optionally masking the vector operations if \p BlockInMask is 552 /// non-null. Use \p State to translate given VPValues to IR values in the 553 /// vectorized loop. 554 void vectorizeMemoryInstruction(Instruction *Instr, VPTransformState &State, 555 VPValue *Def, VPValue *Addr, 556 VPValue *StoredValue, VPValue *BlockInMask); 557 558 /// Set the debug location in the builder using the debug location in 559 /// the instruction. 560 void setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr); 561 562 /// Fix the non-induction PHIs in the OrigPHIsToFix vector. 563 void fixNonInductionPHIs(VPTransformState &State); 564 565 /// Create a broadcast instruction. This method generates a broadcast 566 /// instruction (shuffle) for loop invariant values and for the induction 567 /// value. If this is the induction variable then we extend it to N, N+1, ... 568 /// this is needed because each iteration in the loop corresponds to a SIMD 569 /// element. 570 virtual Value *getBroadcastInstrs(Value *V); 571 572 protected: 573 friend class LoopVectorizationPlanner; 574 575 /// A small list of PHINodes. 576 using PhiVector = SmallVector<PHINode *, 4>; 577 578 /// A type for scalarized values in the new loop. Each value from the 579 /// original loop, when scalarized, is represented by UF x VF scalar values 580 /// in the new unrolled loop, where UF is the unroll factor and VF is the 581 /// vectorization factor. 582 using ScalarParts = SmallVector<SmallVector<Value *, 4>, 2>; 583 584 /// Set up the values of the IVs correctly when exiting the vector loop. 585 void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II, 586 Value *CountRoundDown, Value *EndValue, 587 BasicBlock *MiddleBlock); 588 589 /// Create a new induction variable inside L. 590 PHINode *createInductionVariable(Loop *L, Value *Start, Value *End, 591 Value *Step, Instruction *DL); 592 593 /// Handle all cross-iteration phis in the header. 594 void fixCrossIterationPHIs(VPTransformState &State); 595 596 /// Fix a first-order recurrence. This is the second phase of vectorizing 597 /// this phi node. 598 void fixFirstOrderRecurrence(PHINode *Phi, VPTransformState &State); 599 600 /// Fix a reduction cross-iteration phi. This is the second phase of 601 /// vectorizing this phi node. 602 void fixReduction(PHINode *Phi, VPTransformState &State); 603 604 /// Clear NSW/NUW flags from reduction instructions if necessary. 605 void clearReductionWrapFlags(RecurrenceDescriptor &RdxDesc, 606 VPTransformState &State); 607 608 /// Fixup the LCSSA phi nodes in the unique exit block. This simply 609 /// means we need to add the appropriate incoming value from the middle 610 /// block as exiting edges from the scalar epilogue loop (if present) are 611 /// already in place, and we exit the vector loop exclusively to the middle 612 /// block. 613 void fixLCSSAPHIs(VPTransformState &State); 614 615 /// Iteratively sink the scalarized operands of a predicated instruction into 616 /// the block that was created for it. 617 void sinkScalarOperands(Instruction *PredInst); 618 619 /// Shrinks vector element sizes to the smallest bitwidth they can be legally 620 /// represented as. 621 void truncateToMinimalBitwidths(VPTransformState &State); 622 623 /// This function adds 624 /// (StartIdx * Step, (StartIdx + 1) * Step, (StartIdx + 2) * Step, ...) 625 /// to each vector element of Val. The sequence starts at StartIndex. 626 /// \p Opcode is relevant for FP induction variable. 627 virtual Value *getStepVector(Value *Val, int StartIdx, Value *Step, 628 Instruction::BinaryOps Opcode = 629 Instruction::BinaryOpsEnd); 630 631 /// Compute scalar induction steps. \p ScalarIV is the scalar induction 632 /// variable on which to base the steps, \p Step is the size of the step, and 633 /// \p EntryVal is the value from the original loop that maps to the steps. 634 /// Note that \p EntryVal doesn't have to be an induction variable - it 635 /// can also be a truncate instruction. 636 void buildScalarSteps(Value *ScalarIV, Value *Step, Instruction *EntryVal, 637 const InductionDescriptor &ID, VPValue *Def, 638 VPValue *CastDef, VPTransformState &State); 639 640 /// Create a vector induction phi node based on an existing scalar one. \p 641 /// EntryVal is the value from the original loop that maps to the vector phi 642 /// node, and \p Step is the loop-invariant step. If \p EntryVal is a 643 /// truncate instruction, instead of widening the original IV, we widen a 644 /// version of the IV truncated to \p EntryVal's type. 645 void createVectorIntOrFpInductionPHI(const InductionDescriptor &II, 646 Value *Step, Value *Start, 647 Instruction *EntryVal, VPValue *Def, 648 VPValue *CastDef, 649 VPTransformState &State); 650 651 /// Returns true if an instruction \p I should be scalarized instead of 652 /// vectorized for the chosen vectorization factor. 653 bool shouldScalarizeInstruction(Instruction *I) const; 654 655 /// Returns true if we should generate a scalar version of \p IV. 656 bool needsScalarInduction(Instruction *IV) const; 657 658 /// If there is a cast involved in the induction variable \p ID, which should 659 /// be ignored in the vectorized loop body, this function records the 660 /// VectorLoopValue of the respective Phi also as the VectorLoopValue of the 661 /// cast. We had already proved that the casted Phi is equal to the uncasted 662 /// Phi in the vectorized loop (under a runtime guard), and therefore 663 /// there is no need to vectorize the cast - the same value can be used in the 664 /// vector loop for both the Phi and the cast. 665 /// If \p VectorLoopValue is a scalarized value, \p Lane is also specified, 666 /// Otherwise, \p VectorLoopValue is a widened/vectorized value. 667 /// 668 /// \p EntryVal is the value from the original loop that maps to the vector 669 /// phi node and is used to distinguish what is the IV currently being 670 /// processed - original one (if \p EntryVal is a phi corresponding to the 671 /// original IV) or the "newly-created" one based on the proof mentioned above 672 /// (see also buildScalarSteps() and createVectorIntOrFPInductionPHI()). In the 673 /// latter case \p EntryVal is a TruncInst and we must not record anything for 674 /// that IV, but it's error-prone to expect callers of this routine to care 675 /// about that, hence this explicit parameter. 676 void recordVectorLoopValueForInductionCast( 677 const InductionDescriptor &ID, const Instruction *EntryVal, 678 Value *VectorLoopValue, VPValue *CastDef, VPTransformState &State, 679 unsigned Part, unsigned Lane = UINT_MAX); 680 681 /// Generate a shuffle sequence that will reverse the vector Vec. 682 virtual Value *reverseVector(Value *Vec); 683 684 /// Returns (and creates if needed) the original loop trip count. 685 Value *getOrCreateTripCount(Loop *NewLoop); 686 687 /// Returns (and creates if needed) the trip count of the widened loop. 688 Value *getOrCreateVectorTripCount(Loop *NewLoop); 689 690 /// Returns a bitcasted value to the requested vector type. 691 /// Also handles bitcasts of vector<float> <-> vector<pointer> types. 692 Value *createBitOrPointerCast(Value *V, VectorType *DstVTy, 693 const DataLayout &DL); 694 695 /// Emit a bypass check to see if the vector trip count is zero, including if 696 /// it overflows. 697 void emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass); 698 699 /// Emit a bypass check to see if all of the SCEV assumptions we've 700 /// had to make are correct. Returns the block containing the checks or 701 /// nullptr if no checks have been added. 702 BasicBlock *emitSCEVChecks(Loop *L, BasicBlock *Bypass); 703 704 /// Emit bypass checks to check any memory assumptions we may have made. 705 /// Returns the block containing the checks or nullptr if no checks have been 706 /// added. 707 BasicBlock *emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass); 708 709 /// Compute the transformed value of Index at offset StartValue using step 710 /// StepValue. 711 /// For integer induction, returns StartValue + Index * StepValue. 712 /// For pointer induction, returns StartValue[Index * StepValue]. 713 /// FIXME: The newly created binary instructions should contain nsw/nuw 714 /// flags, which can be found from the original scalar operations. 715 Value *emitTransformedIndex(IRBuilder<> &B, Value *Index, ScalarEvolution *SE, 716 const DataLayout &DL, 717 const InductionDescriptor &ID) const; 718 719 /// Emit basic blocks (prefixed with \p Prefix) for the iteration check, 720 /// vector loop preheader, middle block and scalar preheader. Also 721 /// allocate a loop object for the new vector loop and return it. 722 Loop *createVectorLoopSkeleton(StringRef Prefix); 723 724 /// Create new phi nodes for the induction variables to resume iteration count 725 /// in the scalar epilogue, from where the vectorized loop left off (given by 726 /// \p VectorTripCount). 727 /// In cases where the loop skeleton is more complicated (eg. epilogue 728 /// vectorization) and the resume values can come from an additional bypass 729 /// block, the \p AdditionalBypass pair provides information about the bypass 730 /// block and the end value on the edge from bypass to this loop. 731 void createInductionResumeValues( 732 Loop *L, Value *VectorTripCount, 733 std::pair<BasicBlock *, Value *> AdditionalBypass = {nullptr, nullptr}); 734 735 /// Complete the loop skeleton by adding debug MDs, creating appropriate 736 /// conditional branches in the middle block, preparing the builder and 737 /// running the verifier. Take in the vector loop \p L as argument, and return 738 /// the preheader of the completed vector loop. 739 BasicBlock *completeLoopSkeleton(Loop *L, MDNode *OrigLoopID); 740 741 /// Add additional metadata to \p To that was not present on \p Orig. 742 /// 743 /// Currently this is used to add the noalias annotations based on the 744 /// inserted memchecks. Use this for instructions that are *cloned* into the 745 /// vector loop. 746 void addNewMetadata(Instruction *To, const Instruction *Orig); 747 748 /// Add metadata from one instruction to another. 749 /// 750 /// This includes both the original MDs from \p From and additional ones (\see 751 /// addNewMetadata). Use this for *newly created* instructions in the vector 752 /// loop. 753 void addMetadata(Instruction *To, Instruction *From); 754 755 /// Similar to the previous function but it adds the metadata to a 756 /// vector of instructions. 757 void addMetadata(ArrayRef<Value *> To, Instruction *From); 758 759 /// Allow subclasses to override and print debug traces before/after vplan 760 /// execution, when trace information is requested. 761 virtual void printDebugTracesAtStart(){}; 762 virtual void printDebugTracesAtEnd(){}; 763 764 /// The original loop. 765 Loop *OrigLoop; 766 767 /// A wrapper around ScalarEvolution used to add runtime SCEV checks. Applies 768 /// dynamic knowledge to simplify SCEV expressions and converts them to a 769 /// more usable form. 770 PredicatedScalarEvolution &PSE; 771 772 /// Loop Info. 773 LoopInfo *LI; 774 775 /// Dominator Tree. 776 DominatorTree *DT; 777 778 /// Alias Analysis. 779 AAResults *AA; 780 781 /// Target Library Info. 782 const TargetLibraryInfo *TLI; 783 784 /// Target Transform Info. 785 const TargetTransformInfo *TTI; 786 787 /// Assumption Cache. 788 AssumptionCache *AC; 789 790 /// Interface to emit optimization remarks. 791 OptimizationRemarkEmitter *ORE; 792 793 /// LoopVersioning. It's only set up (non-null) if memchecks were 794 /// used. 795 /// 796 /// This is currently only used to add no-alias metadata based on the 797 /// memchecks. The actually versioning is performed manually. 798 std::unique_ptr<LoopVersioning> LVer; 799 800 /// The vectorization SIMD factor to use. Each vector will have this many 801 /// vector elements. 802 ElementCount VF; 803 804 /// The vectorization unroll factor to use. Each scalar is vectorized to this 805 /// many different vector instructions. 806 unsigned UF; 807 808 /// The builder that we use 809 IRBuilder<> Builder; 810 811 // --- Vectorization state --- 812 813 /// The vector-loop preheader. 814 BasicBlock *LoopVectorPreHeader; 815 816 /// The scalar-loop preheader. 817 BasicBlock *LoopScalarPreHeader; 818 819 /// Middle Block between the vector and the scalar. 820 BasicBlock *LoopMiddleBlock; 821 822 /// The (unique) ExitBlock of the scalar loop. Note that 823 /// there can be multiple exiting edges reaching this block. 824 BasicBlock *LoopExitBlock; 825 826 /// The vector loop body. 827 BasicBlock *LoopVectorBody; 828 829 /// The scalar loop body. 830 BasicBlock *LoopScalarBody; 831 832 /// A list of all bypass blocks. The first block is the entry of the loop. 833 SmallVector<BasicBlock *, 4> LoopBypassBlocks; 834 835 /// The new Induction variable which was added to the new block. 836 PHINode *Induction = nullptr; 837 838 /// The induction variable of the old basic block. 839 PHINode *OldInduction = nullptr; 840 841 /// Store instructions that were predicated. 842 SmallVector<Instruction *, 4> PredicatedInstructions; 843 844 /// Trip count of the original loop. 845 Value *TripCount = nullptr; 846 847 /// Trip count of the widened loop (TripCount - TripCount % (VF*UF)) 848 Value *VectorTripCount = nullptr; 849 850 /// The legality analysis. 851 LoopVectorizationLegality *Legal; 852 853 /// The profitablity analysis. 854 LoopVectorizationCostModel *Cost; 855 856 // Record whether runtime checks are added. 857 bool AddedSafetyChecks = false; 858 859 // Holds the end values for each induction variable. We save the end values 860 // so we can later fix-up the external users of the induction variables. 861 DenseMap<PHINode *, Value *> IVEndValues; 862 863 // Vector of original scalar PHIs whose corresponding widened PHIs need to be 864 // fixed up at the end of vector code generation. 865 SmallVector<PHINode *, 8> OrigPHIsToFix; 866 867 /// BFI and PSI are used to check for profile guided size optimizations. 868 BlockFrequencyInfo *BFI; 869 ProfileSummaryInfo *PSI; 870 871 // Whether this loop should be optimized for size based on profile guided size 872 // optimizatios. 873 bool OptForSizeBasedOnProfile; 874 875 /// Structure to hold information about generated runtime checks, responsible 876 /// for cleaning the checks, if vectorization turns out unprofitable. 877 GeneratedRTChecks &RTChecks; 878 }; 879 880 class InnerLoopUnroller : public InnerLoopVectorizer { 881 public: 882 InnerLoopUnroller(Loop *OrigLoop, PredicatedScalarEvolution &PSE, 883 LoopInfo *LI, DominatorTree *DT, 884 const TargetLibraryInfo *TLI, 885 const TargetTransformInfo *TTI, AssumptionCache *AC, 886 OptimizationRemarkEmitter *ORE, unsigned UnrollFactor, 887 LoopVectorizationLegality *LVL, 888 LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, 889 ProfileSummaryInfo *PSI, GeneratedRTChecks &Check) 890 : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 891 ElementCount::getFixed(1), UnrollFactor, LVL, CM, 892 BFI, PSI, Check) {} 893 894 private: 895 Value *getBroadcastInstrs(Value *V) override; 896 Value *getStepVector(Value *Val, int StartIdx, Value *Step, 897 Instruction::BinaryOps Opcode = 898 Instruction::BinaryOpsEnd) override; 899 Value *reverseVector(Value *Vec) override; 900 }; 901 902 /// Encapsulate information regarding vectorization of a loop and its epilogue. 903 /// This information is meant to be updated and used across two stages of 904 /// epilogue vectorization. 905 struct EpilogueLoopVectorizationInfo { 906 ElementCount MainLoopVF = ElementCount::getFixed(0); 907 unsigned MainLoopUF = 0; 908 ElementCount EpilogueVF = ElementCount::getFixed(0); 909 unsigned EpilogueUF = 0; 910 BasicBlock *MainLoopIterationCountCheck = nullptr; 911 BasicBlock *EpilogueIterationCountCheck = nullptr; 912 BasicBlock *SCEVSafetyCheck = nullptr; 913 BasicBlock *MemSafetyCheck = nullptr; 914 Value *TripCount = nullptr; 915 Value *VectorTripCount = nullptr; 916 917 EpilogueLoopVectorizationInfo(unsigned MVF, unsigned MUF, unsigned EVF, 918 unsigned EUF) 919 : MainLoopVF(ElementCount::getFixed(MVF)), MainLoopUF(MUF), 920 EpilogueVF(ElementCount::getFixed(EVF)), EpilogueUF(EUF) { 921 assert(EUF == 1 && 922 "A high UF for the epilogue loop is likely not beneficial."); 923 } 924 }; 925 926 /// An extension of the inner loop vectorizer that creates a skeleton for a 927 /// vectorized loop that has its epilogue (residual) also vectorized. 928 /// The idea is to run the vplan on a given loop twice, firstly to setup the 929 /// skeleton and vectorize the main loop, and secondly to complete the skeleton 930 /// from the first step and vectorize the epilogue. This is achieved by 931 /// deriving two concrete strategy classes from this base class and invoking 932 /// them in succession from the loop vectorizer planner. 933 class InnerLoopAndEpilogueVectorizer : public InnerLoopVectorizer { 934 public: 935 InnerLoopAndEpilogueVectorizer( 936 Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, 937 DominatorTree *DT, const TargetLibraryInfo *TLI, 938 const TargetTransformInfo *TTI, AssumptionCache *AC, 939 OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, 940 LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, 941 BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, 942 GeneratedRTChecks &Checks) 943 : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 944 EPI.MainLoopVF, EPI.MainLoopUF, LVL, CM, BFI, PSI, 945 Checks), 946 EPI(EPI) {} 947 948 // Override this function to handle the more complex control flow around the 949 // three loops. 950 BasicBlock *createVectorizedLoopSkeleton() final override { 951 return createEpilogueVectorizedLoopSkeleton(); 952 } 953 954 /// The interface for creating a vectorized skeleton using one of two 955 /// different strategies, each corresponding to one execution of the vplan 956 /// as described above. 957 virtual BasicBlock *createEpilogueVectorizedLoopSkeleton() = 0; 958 959 /// Holds and updates state information required to vectorize the main loop 960 /// and its epilogue in two separate passes. This setup helps us avoid 961 /// regenerating and recomputing runtime safety checks. It also helps us to 962 /// shorten the iteration-count-check path length for the cases where the 963 /// iteration count of the loop is so small that the main vector loop is 964 /// completely skipped. 965 EpilogueLoopVectorizationInfo &EPI; 966 }; 967 968 /// A specialized derived class of inner loop vectorizer that performs 969 /// vectorization of *main* loops in the process of vectorizing loops and their 970 /// epilogues. 971 class EpilogueVectorizerMainLoop : public InnerLoopAndEpilogueVectorizer { 972 public: 973 EpilogueVectorizerMainLoop( 974 Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, 975 DominatorTree *DT, const TargetLibraryInfo *TLI, 976 const TargetTransformInfo *TTI, AssumptionCache *AC, 977 OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, 978 LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, 979 BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, 980 GeneratedRTChecks &Check) 981 : InnerLoopAndEpilogueVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 982 EPI, LVL, CM, BFI, PSI, Check) {} 983 /// Implements the interface for creating a vectorized skeleton using the 984 /// *main loop* strategy (ie the first pass of vplan execution). 985 BasicBlock *createEpilogueVectorizedLoopSkeleton() final override; 986 987 protected: 988 /// Emits an iteration count bypass check once for the main loop (when \p 989 /// ForEpilogue is false) and once for the epilogue loop (when \p 990 /// ForEpilogue is true). 991 BasicBlock *emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass, 992 bool ForEpilogue); 993 void printDebugTracesAtStart() override; 994 void printDebugTracesAtEnd() override; 995 }; 996 997 // A specialized derived class of inner loop vectorizer that performs 998 // vectorization of *epilogue* loops in the process of vectorizing loops and 999 // their epilogues. 1000 class EpilogueVectorizerEpilogueLoop : public InnerLoopAndEpilogueVectorizer { 1001 public: 1002 EpilogueVectorizerEpilogueLoop( 1003 Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, 1004 DominatorTree *DT, const TargetLibraryInfo *TLI, 1005 const TargetTransformInfo *TTI, AssumptionCache *AC, 1006 OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, 1007 LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, 1008 BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, 1009 GeneratedRTChecks &Checks) 1010 : InnerLoopAndEpilogueVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 1011 EPI, LVL, CM, BFI, PSI, Checks) {} 1012 /// Implements the interface for creating a vectorized skeleton using the 1013 /// *epilogue loop* strategy (ie the second pass of vplan execution). 1014 BasicBlock *createEpilogueVectorizedLoopSkeleton() final override; 1015 1016 protected: 1017 /// Emits an iteration count bypass check after the main vector loop has 1018 /// finished to see if there are any iterations left to execute by either 1019 /// the vector epilogue or the scalar epilogue. 1020 BasicBlock *emitMinimumVectorEpilogueIterCountCheck(Loop *L, 1021 BasicBlock *Bypass, 1022 BasicBlock *Insert); 1023 void printDebugTracesAtStart() override; 1024 void printDebugTracesAtEnd() override; 1025 }; 1026 } // end namespace llvm 1027 1028 /// Look for a meaningful debug location on the instruction or it's 1029 /// operands. 1030 static Instruction *getDebugLocFromInstOrOperands(Instruction *I) { 1031 if (!I) 1032 return I; 1033 1034 DebugLoc Empty; 1035 if (I->getDebugLoc() != Empty) 1036 return I; 1037 1038 for (Use &Op : I->operands()) { 1039 if (Instruction *OpInst = dyn_cast<Instruction>(Op)) 1040 if (OpInst->getDebugLoc() != Empty) 1041 return OpInst; 1042 } 1043 1044 return I; 1045 } 1046 1047 void InnerLoopVectorizer::setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr) { 1048 if (const Instruction *Inst = dyn_cast_or_null<Instruction>(Ptr)) { 1049 const DILocation *DIL = Inst->getDebugLoc(); 1050 if (DIL && Inst->getFunction()->isDebugInfoForProfiling() && 1051 !isa<DbgInfoIntrinsic>(Inst)) { 1052 assert(!VF.isScalable() && "scalable vectors not yet supported."); 1053 auto NewDIL = 1054 DIL->cloneByMultiplyingDuplicationFactor(UF * VF.getKnownMinValue()); 1055 if (NewDIL) 1056 B.SetCurrentDebugLocation(NewDIL.getValue()); 1057 else 1058 LLVM_DEBUG(dbgs() 1059 << "Failed to create new discriminator: " 1060 << DIL->getFilename() << " Line: " << DIL->getLine()); 1061 } 1062 else 1063 B.SetCurrentDebugLocation(DIL); 1064 } else 1065 B.SetCurrentDebugLocation(DebugLoc()); 1066 } 1067 1068 /// Write a record \p DebugMsg about vectorization failure to the debug 1069 /// output stream. If \p I is passed, it is an instruction that prevents 1070 /// vectorization. 1071 #ifndef NDEBUG 1072 static void debugVectorizationFailure(const StringRef DebugMsg, 1073 Instruction *I) { 1074 dbgs() << "LV: Not vectorizing: " << DebugMsg; 1075 if (I != nullptr) 1076 dbgs() << " " << *I; 1077 else 1078 dbgs() << '.'; 1079 dbgs() << '\n'; 1080 } 1081 #endif 1082 1083 /// Create an analysis remark that explains why vectorization failed 1084 /// 1085 /// \p PassName is the name of the pass (e.g. can be AlwaysPrint). \p 1086 /// RemarkName is the identifier for the remark. If \p I is passed it is an 1087 /// instruction that prevents vectorization. Otherwise \p TheLoop is used for 1088 /// the location of the remark. \return the remark object that can be 1089 /// streamed to. 1090 static OptimizationRemarkAnalysis createLVAnalysis(const char *PassName, 1091 StringRef RemarkName, Loop *TheLoop, Instruction *I) { 1092 Value *CodeRegion = TheLoop->getHeader(); 1093 DebugLoc DL = TheLoop->getStartLoc(); 1094 1095 if (I) { 1096 CodeRegion = I->getParent(); 1097 // If there is no debug location attached to the instruction, revert back to 1098 // using the loop's. 1099 if (I->getDebugLoc()) 1100 DL = I->getDebugLoc(); 1101 } 1102 1103 OptimizationRemarkAnalysis R(PassName, RemarkName, DL, CodeRegion); 1104 R << "loop not vectorized: "; 1105 return R; 1106 } 1107 1108 /// Return a value for Step multiplied by VF. 1109 static Value *createStepForVF(IRBuilder<> &B, Constant *Step, ElementCount VF) { 1110 assert(isa<ConstantInt>(Step) && "Expected an integer step"); 1111 Constant *StepVal = ConstantInt::get( 1112 Step->getType(), 1113 cast<ConstantInt>(Step)->getSExtValue() * VF.getKnownMinValue()); 1114 return VF.isScalable() ? B.CreateVScale(StepVal) : StepVal; 1115 } 1116 1117 namespace llvm { 1118 1119 /// Return the runtime value for VF. 1120 Value *getRuntimeVF(IRBuilder<> &B, Type *Ty, ElementCount VF) { 1121 Constant *EC = ConstantInt::get(Ty, VF.getKnownMinValue()); 1122 return VF.isScalable() ? B.CreateVScale(EC) : EC; 1123 } 1124 1125 void reportVectorizationFailure(const StringRef DebugMsg, 1126 const StringRef OREMsg, const StringRef ORETag, 1127 OptimizationRemarkEmitter *ORE, Loop *TheLoop, Instruction *I) { 1128 LLVM_DEBUG(debugVectorizationFailure(DebugMsg, I)); 1129 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE); 1130 ORE->emit(createLVAnalysis(Hints.vectorizeAnalysisPassName(), 1131 ORETag, TheLoop, I) << OREMsg); 1132 } 1133 1134 } // end namespace llvm 1135 1136 #ifndef NDEBUG 1137 /// \return string containing a file name and a line # for the given loop. 1138 static std::string getDebugLocString(const Loop *L) { 1139 std::string Result; 1140 if (L) { 1141 raw_string_ostream OS(Result); 1142 if (const DebugLoc LoopDbgLoc = L->getStartLoc()) 1143 LoopDbgLoc.print(OS); 1144 else 1145 // Just print the module name. 1146 OS << L->getHeader()->getParent()->getParent()->getModuleIdentifier(); 1147 OS.flush(); 1148 } 1149 return Result; 1150 } 1151 #endif 1152 1153 void InnerLoopVectorizer::addNewMetadata(Instruction *To, 1154 const Instruction *Orig) { 1155 // If the loop was versioned with memchecks, add the corresponding no-alias 1156 // metadata. 1157 if (LVer && (isa<LoadInst>(Orig) || isa<StoreInst>(Orig))) 1158 LVer->annotateInstWithNoAlias(To, Orig); 1159 } 1160 1161 void InnerLoopVectorizer::addMetadata(Instruction *To, 1162 Instruction *From) { 1163 propagateMetadata(To, From); 1164 addNewMetadata(To, From); 1165 } 1166 1167 void InnerLoopVectorizer::addMetadata(ArrayRef<Value *> To, 1168 Instruction *From) { 1169 for (Value *V : To) { 1170 if (Instruction *I = dyn_cast<Instruction>(V)) 1171 addMetadata(I, From); 1172 } 1173 } 1174 1175 namespace llvm { 1176 1177 // Loop vectorization cost-model hints how the scalar epilogue loop should be 1178 // lowered. 1179 enum ScalarEpilogueLowering { 1180 1181 // The default: allowing scalar epilogues. 1182 CM_ScalarEpilogueAllowed, 1183 1184 // Vectorization with OptForSize: don't allow epilogues. 1185 CM_ScalarEpilogueNotAllowedOptSize, 1186 1187 // A special case of vectorisation with OptForSize: loops with a very small 1188 // trip count are considered for vectorization under OptForSize, thereby 1189 // making sure the cost of their loop body is dominant, free of runtime 1190 // guards and scalar iteration overheads. 1191 CM_ScalarEpilogueNotAllowedLowTripLoop, 1192 1193 // Loop hint predicate indicating an epilogue is undesired. 1194 CM_ScalarEpilogueNotNeededUsePredicate, 1195 1196 // Directive indicating we must either tail fold or not vectorize 1197 CM_ScalarEpilogueNotAllowedUsePredicate 1198 }; 1199 1200 /// LoopVectorizationCostModel - estimates the expected speedups due to 1201 /// vectorization. 1202 /// In many cases vectorization is not profitable. This can happen because of 1203 /// a number of reasons. In this class we mainly attempt to predict the 1204 /// expected speedup/slowdowns due to the supported instruction set. We use the 1205 /// TargetTransformInfo to query the different backends for the cost of 1206 /// different operations. 1207 class LoopVectorizationCostModel { 1208 public: 1209 LoopVectorizationCostModel(ScalarEpilogueLowering SEL, Loop *L, 1210 PredicatedScalarEvolution &PSE, LoopInfo *LI, 1211 LoopVectorizationLegality *Legal, 1212 const TargetTransformInfo &TTI, 1213 const TargetLibraryInfo *TLI, DemandedBits *DB, 1214 AssumptionCache *AC, 1215 OptimizationRemarkEmitter *ORE, const Function *F, 1216 const LoopVectorizeHints *Hints, 1217 InterleavedAccessInfo &IAI) 1218 : ScalarEpilogueStatus(SEL), TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), 1219 TTI(TTI), TLI(TLI), DB(DB), AC(AC), ORE(ORE), TheFunction(F), 1220 Hints(Hints), InterleaveInfo(IAI) {} 1221 1222 /// \return An upper bound for the vectorization factor, or None if 1223 /// vectorization and interleaving should be avoided up front. 1224 Optional<ElementCount> computeMaxVF(ElementCount UserVF, unsigned UserIC); 1225 1226 /// \return True if runtime checks are required for vectorization, and false 1227 /// otherwise. 1228 bool runtimeChecksRequired(); 1229 1230 /// \return The most profitable vectorization factor and the cost of that VF. 1231 /// This method checks every power of two up to MaxVF. If UserVF is not ZERO 1232 /// then this vectorization factor will be selected if vectorization is 1233 /// possible. 1234 VectorizationFactor selectVectorizationFactor(ElementCount MaxVF); 1235 VectorizationFactor 1236 selectEpilogueVectorizationFactor(const ElementCount MaxVF, 1237 const LoopVectorizationPlanner &LVP); 1238 1239 /// Setup cost-based decisions for user vectorization factor. 1240 void selectUserVectorizationFactor(ElementCount UserVF) { 1241 collectUniformsAndScalars(UserVF); 1242 collectInstsToScalarize(UserVF); 1243 } 1244 1245 /// \return The size (in bits) of the smallest and widest types in the code 1246 /// that needs to be vectorized. We ignore values that remain scalar such as 1247 /// 64 bit loop indices. 1248 std::pair<unsigned, unsigned> getSmallestAndWidestTypes(); 1249 1250 /// \return The desired interleave count. 1251 /// If interleave count has been specified by metadata it will be returned. 1252 /// Otherwise, the interleave count is computed and returned. VF and LoopCost 1253 /// are the selected vectorization factor and the cost of the selected VF. 1254 unsigned selectInterleaveCount(ElementCount VF, unsigned LoopCost); 1255 1256 /// Memory access instruction may be vectorized in more than one way. 1257 /// Form of instruction after vectorization depends on cost. 1258 /// This function takes cost-based decisions for Load/Store instructions 1259 /// and collects them in a map. This decisions map is used for building 1260 /// the lists of loop-uniform and loop-scalar instructions. 1261 /// The calculated cost is saved with widening decision in order to 1262 /// avoid redundant calculations. 1263 void setCostBasedWideningDecision(ElementCount VF); 1264 1265 /// A struct that represents some properties of the register usage 1266 /// of a loop. 1267 struct RegisterUsage { 1268 /// Holds the number of loop invariant values that are used in the loop. 1269 /// The key is ClassID of target-provided register class. 1270 SmallMapVector<unsigned, unsigned, 4> LoopInvariantRegs; 1271 /// Holds the maximum number of concurrent live intervals in the loop. 1272 /// The key is ClassID of target-provided register class. 1273 SmallMapVector<unsigned, unsigned, 4> MaxLocalUsers; 1274 }; 1275 1276 /// \return Returns information about the register usages of the loop for the 1277 /// given vectorization factors. 1278 SmallVector<RegisterUsage, 8> 1279 calculateRegisterUsage(ArrayRef<ElementCount> VFs); 1280 1281 /// Collect values we want to ignore in the cost model. 1282 void collectValuesToIgnore(); 1283 1284 /// Split reductions into those that happen in the loop, and those that happen 1285 /// outside. In loop reductions are collected into InLoopReductionChains. 1286 void collectInLoopReductions(); 1287 1288 /// \returns The smallest bitwidth each instruction can be represented with. 1289 /// The vector equivalents of these instructions should be truncated to this 1290 /// type. 1291 const MapVector<Instruction *, uint64_t> &getMinimalBitwidths() const { 1292 return MinBWs; 1293 } 1294 1295 /// \returns True if it is more profitable to scalarize instruction \p I for 1296 /// vectorization factor \p VF. 1297 bool isProfitableToScalarize(Instruction *I, ElementCount VF) const { 1298 assert(VF.isVector() && 1299 "Profitable to scalarize relevant only for VF > 1."); 1300 1301 // Cost model is not run in the VPlan-native path - return conservative 1302 // result until this changes. 1303 if (EnableVPlanNativePath) 1304 return false; 1305 1306 auto Scalars = InstsToScalarize.find(VF); 1307 assert(Scalars != InstsToScalarize.end() && 1308 "VF not yet analyzed for scalarization profitability"); 1309 return Scalars->second.find(I) != Scalars->second.end(); 1310 } 1311 1312 /// Returns true if \p I is known to be uniform after vectorization. 1313 bool isUniformAfterVectorization(Instruction *I, ElementCount VF) const { 1314 if (VF.isScalar()) 1315 return true; 1316 1317 // Cost model is not run in the VPlan-native path - return conservative 1318 // result until this changes. 1319 if (EnableVPlanNativePath) 1320 return false; 1321 1322 auto UniformsPerVF = Uniforms.find(VF); 1323 assert(UniformsPerVF != Uniforms.end() && 1324 "VF not yet analyzed for uniformity"); 1325 return UniformsPerVF->second.count(I); 1326 } 1327 1328 /// Returns true if \p I is known to be scalar after vectorization. 1329 bool isScalarAfterVectorization(Instruction *I, ElementCount VF) const { 1330 if (VF.isScalar()) 1331 return true; 1332 1333 // Cost model is not run in the VPlan-native path - return conservative 1334 // result until this changes. 1335 if (EnableVPlanNativePath) 1336 return false; 1337 1338 auto ScalarsPerVF = Scalars.find(VF); 1339 assert(ScalarsPerVF != Scalars.end() && 1340 "Scalar values are not calculated for VF"); 1341 return ScalarsPerVF->second.count(I); 1342 } 1343 1344 /// \returns True if instruction \p I can be truncated to a smaller bitwidth 1345 /// for vectorization factor \p VF. 1346 bool canTruncateToMinimalBitwidth(Instruction *I, ElementCount VF) const { 1347 return VF.isVector() && MinBWs.find(I) != MinBWs.end() && 1348 !isProfitableToScalarize(I, VF) && 1349 !isScalarAfterVectorization(I, VF); 1350 } 1351 1352 /// Decision that was taken during cost calculation for memory instruction. 1353 enum InstWidening { 1354 CM_Unknown, 1355 CM_Widen, // For consecutive accesses with stride +1. 1356 CM_Widen_Reverse, // For consecutive accesses with stride -1. 1357 CM_Interleave, 1358 CM_GatherScatter, 1359 CM_Scalarize 1360 }; 1361 1362 /// Save vectorization decision \p W and \p Cost taken by the cost model for 1363 /// instruction \p I and vector width \p VF. 1364 void setWideningDecision(Instruction *I, ElementCount VF, InstWidening W, 1365 InstructionCost Cost) { 1366 assert(VF.isVector() && "Expected VF >=2"); 1367 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost); 1368 } 1369 1370 /// Save vectorization decision \p W and \p Cost taken by the cost model for 1371 /// interleaving group \p Grp and vector width \p VF. 1372 void setWideningDecision(const InterleaveGroup<Instruction> *Grp, 1373 ElementCount VF, InstWidening W, 1374 InstructionCost Cost) { 1375 assert(VF.isVector() && "Expected VF >=2"); 1376 /// Broadcast this decicion to all instructions inside the group. 1377 /// But the cost will be assigned to one instruction only. 1378 for (unsigned i = 0; i < Grp->getFactor(); ++i) { 1379 if (auto *I = Grp->getMember(i)) { 1380 if (Grp->getInsertPos() == I) 1381 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost); 1382 else 1383 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, 0); 1384 } 1385 } 1386 } 1387 1388 /// Return the cost model decision for the given instruction \p I and vector 1389 /// width \p VF. Return CM_Unknown if this instruction did not pass 1390 /// through the cost modeling. 1391 InstWidening getWideningDecision(Instruction *I, ElementCount VF) const { 1392 assert(VF.isVector() && "Expected VF to be a vector VF"); 1393 // Cost model is not run in the VPlan-native path - return conservative 1394 // result until this changes. 1395 if (EnableVPlanNativePath) 1396 return CM_GatherScatter; 1397 1398 std::pair<Instruction *, ElementCount> InstOnVF = std::make_pair(I, VF); 1399 auto Itr = WideningDecisions.find(InstOnVF); 1400 if (Itr == WideningDecisions.end()) 1401 return CM_Unknown; 1402 return Itr->second.first; 1403 } 1404 1405 /// Return the vectorization cost for the given instruction \p I and vector 1406 /// width \p VF. 1407 InstructionCost getWideningCost(Instruction *I, ElementCount VF) { 1408 assert(VF.isVector() && "Expected VF >=2"); 1409 std::pair<Instruction *, ElementCount> InstOnVF = std::make_pair(I, VF); 1410 assert(WideningDecisions.find(InstOnVF) != WideningDecisions.end() && 1411 "The cost is not calculated"); 1412 return WideningDecisions[InstOnVF].second; 1413 } 1414 1415 /// Return True if instruction \p I is an optimizable truncate whose operand 1416 /// is an induction variable. Such a truncate will be removed by adding a new 1417 /// induction variable with the destination type. 1418 bool isOptimizableIVTruncate(Instruction *I, ElementCount VF) { 1419 // If the instruction is not a truncate, return false. 1420 auto *Trunc = dyn_cast<TruncInst>(I); 1421 if (!Trunc) 1422 return false; 1423 1424 // Get the source and destination types of the truncate. 1425 Type *SrcTy = ToVectorTy(cast<CastInst>(I)->getSrcTy(), VF); 1426 Type *DestTy = ToVectorTy(cast<CastInst>(I)->getDestTy(), VF); 1427 1428 // If the truncate is free for the given types, return false. Replacing a 1429 // free truncate with an induction variable would add an induction variable 1430 // update instruction to each iteration of the loop. We exclude from this 1431 // check the primary induction variable since it will need an update 1432 // instruction regardless. 1433 Value *Op = Trunc->getOperand(0); 1434 if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy)) 1435 return false; 1436 1437 // If the truncated value is not an induction variable, return false. 1438 return Legal->isInductionPhi(Op); 1439 } 1440 1441 /// Collects the instructions to scalarize for each predicated instruction in 1442 /// the loop. 1443 void collectInstsToScalarize(ElementCount VF); 1444 1445 /// Collect Uniform and Scalar values for the given \p VF. 1446 /// The sets depend on CM decision for Load/Store instructions 1447 /// that may be vectorized as interleave, gather-scatter or scalarized. 1448 void collectUniformsAndScalars(ElementCount VF) { 1449 // Do the analysis once. 1450 if (VF.isScalar() || Uniforms.find(VF) != Uniforms.end()) 1451 return; 1452 setCostBasedWideningDecision(VF); 1453 collectLoopUniforms(VF); 1454 collectLoopScalars(VF); 1455 } 1456 1457 /// Returns true if the target machine supports masked store operation 1458 /// for the given \p DataType and kind of access to \p Ptr. 1459 bool isLegalMaskedStore(Type *DataType, Value *Ptr, Align Alignment) const { 1460 return Legal->isConsecutivePtr(Ptr) && 1461 TTI.isLegalMaskedStore(DataType, Alignment); 1462 } 1463 1464 /// Returns true if the target machine supports masked load operation 1465 /// for the given \p DataType and kind of access to \p Ptr. 1466 bool isLegalMaskedLoad(Type *DataType, Value *Ptr, Align Alignment) const { 1467 return Legal->isConsecutivePtr(Ptr) && 1468 TTI.isLegalMaskedLoad(DataType, Alignment); 1469 } 1470 1471 /// Returns true if the target machine supports masked scatter operation 1472 /// for the given \p DataType. 1473 bool isLegalMaskedScatter(Type *DataType, Align Alignment) const { 1474 return TTI.isLegalMaskedScatter(DataType, Alignment); 1475 } 1476 1477 /// Returns true if the target machine supports masked gather operation 1478 /// for the given \p DataType. 1479 bool isLegalMaskedGather(Type *DataType, Align Alignment) const { 1480 return TTI.isLegalMaskedGather(DataType, Alignment); 1481 } 1482 1483 /// Returns true if the target machine can represent \p V as a masked gather 1484 /// or scatter operation. 1485 bool isLegalGatherOrScatter(Value *V) { 1486 bool LI = isa<LoadInst>(V); 1487 bool SI = isa<StoreInst>(V); 1488 if (!LI && !SI) 1489 return false; 1490 auto *Ty = getMemInstValueType(V); 1491 Align Align = getLoadStoreAlignment(V); 1492 return (LI && isLegalMaskedGather(Ty, Align)) || 1493 (SI && isLegalMaskedScatter(Ty, Align)); 1494 } 1495 1496 /// Returns true if the target machine supports all of the reduction 1497 /// variables found for the given VF. 1498 bool canVectorizeReductions(ElementCount VF) { 1499 return (all_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool { 1500 RecurrenceDescriptor RdxDesc = Reduction.second; 1501 return TTI.isLegalToVectorizeReduction(RdxDesc, VF); 1502 })); 1503 } 1504 1505 /// Returns true if \p I is an instruction that will be scalarized with 1506 /// predication. Such instructions include conditional stores and 1507 /// instructions that may divide by zero. 1508 /// If a non-zero VF has been calculated, we check if I will be scalarized 1509 /// predication for that VF. 1510 bool 1511 isScalarWithPredication(Instruction *I, 1512 ElementCount VF = ElementCount::getFixed(1)) const; 1513 1514 // Returns true if \p I is an instruction that will be predicated either 1515 // through scalar predication or masked load/store or masked gather/scatter. 1516 // Superset of instructions that return true for isScalarWithPredication. 1517 bool isPredicatedInst(Instruction *I, ElementCount VF) { 1518 if (!blockNeedsPredication(I->getParent())) 1519 return false; 1520 // Loads and stores that need some form of masked operation are predicated 1521 // instructions. 1522 if (isa<LoadInst>(I) || isa<StoreInst>(I)) 1523 return Legal->isMaskRequired(I); 1524 return isScalarWithPredication(I, VF); 1525 } 1526 1527 /// Returns true if \p I is a memory instruction with consecutive memory 1528 /// access that can be widened. 1529 bool 1530 memoryInstructionCanBeWidened(Instruction *I, 1531 ElementCount VF = ElementCount::getFixed(1)); 1532 1533 /// Returns true if \p I is a memory instruction in an interleaved-group 1534 /// of memory accesses that can be vectorized with wide vector loads/stores 1535 /// and shuffles. 1536 bool 1537 interleavedAccessCanBeWidened(Instruction *I, 1538 ElementCount VF = ElementCount::getFixed(1)); 1539 1540 /// Check if \p Instr belongs to any interleaved access group. 1541 bool isAccessInterleaved(Instruction *Instr) { 1542 return InterleaveInfo.isInterleaved(Instr); 1543 } 1544 1545 /// Get the interleaved access group that \p Instr belongs to. 1546 const InterleaveGroup<Instruction> * 1547 getInterleavedAccessGroup(Instruction *Instr) { 1548 return InterleaveInfo.getInterleaveGroup(Instr); 1549 } 1550 1551 /// Returns true if we're required to use a scalar epilogue for at least 1552 /// the final iteration of the original loop. 1553 bool requiresScalarEpilogue() const { 1554 if (!isScalarEpilogueAllowed()) 1555 return false; 1556 // If we might exit from anywhere but the latch, must run the exiting 1557 // iteration in scalar form. 1558 if (TheLoop->getExitingBlock() != TheLoop->getLoopLatch()) 1559 return true; 1560 return InterleaveInfo.requiresScalarEpilogue(); 1561 } 1562 1563 /// Returns true if a scalar epilogue is not allowed due to optsize or a 1564 /// loop hint annotation. 1565 bool isScalarEpilogueAllowed() const { 1566 return ScalarEpilogueStatus == CM_ScalarEpilogueAllowed; 1567 } 1568 1569 /// Returns true if all loop blocks should be masked to fold tail loop. 1570 bool foldTailByMasking() const { return FoldTailByMasking; } 1571 1572 bool blockNeedsPredication(BasicBlock *BB) const { 1573 return foldTailByMasking() || Legal->blockNeedsPredication(BB); 1574 } 1575 1576 /// A SmallMapVector to store the InLoop reduction op chains, mapping phi 1577 /// nodes to the chain of instructions representing the reductions. Uses a 1578 /// MapVector to ensure deterministic iteration order. 1579 using ReductionChainMap = 1580 SmallMapVector<PHINode *, SmallVector<Instruction *, 4>, 4>; 1581 1582 /// Return the chain of instructions representing an inloop reduction. 1583 const ReductionChainMap &getInLoopReductionChains() const { 1584 return InLoopReductionChains; 1585 } 1586 1587 /// Returns true if the Phi is part of an inloop reduction. 1588 bool isInLoopReduction(PHINode *Phi) const { 1589 return InLoopReductionChains.count(Phi); 1590 } 1591 1592 /// Estimate cost of an intrinsic call instruction CI if it were vectorized 1593 /// with factor VF. Return the cost of the instruction, including 1594 /// scalarization overhead if it's needed. 1595 InstructionCost getVectorIntrinsicCost(CallInst *CI, ElementCount VF) const; 1596 1597 /// Estimate cost of a call instruction CI if it were vectorized with factor 1598 /// VF. Return the cost of the instruction, including scalarization overhead 1599 /// if it's needed. The flag NeedToScalarize shows if the call needs to be 1600 /// scalarized - 1601 /// i.e. either vector version isn't available, or is too expensive. 1602 InstructionCost getVectorCallCost(CallInst *CI, ElementCount VF, 1603 bool &NeedToScalarize) const; 1604 1605 /// Returns true if the per-lane cost of VectorizationFactor A is lower than 1606 /// that of B. 1607 bool isMoreProfitable(const VectorizationFactor &A, 1608 const VectorizationFactor &B) const; 1609 1610 /// Invalidates decisions already taken by the cost model. 1611 void invalidateCostModelingDecisions() { 1612 WideningDecisions.clear(); 1613 Uniforms.clear(); 1614 Scalars.clear(); 1615 } 1616 1617 private: 1618 unsigned NumPredStores = 0; 1619 1620 /// \return An upper bound for the vectorization factor, a power-of-2 larger 1621 /// than zero. One is returned if vectorization should best be avoided due 1622 /// to cost. 1623 ElementCount computeFeasibleMaxVF(unsigned ConstTripCount, 1624 ElementCount UserVF); 1625 1626 /// The vectorization cost is a combination of the cost itself and a boolean 1627 /// indicating whether any of the contributing operations will actually 1628 /// operate on 1629 /// vector values after type legalization in the backend. If this latter value 1630 /// is 1631 /// false, then all operations will be scalarized (i.e. no vectorization has 1632 /// actually taken place). 1633 using VectorizationCostTy = std::pair<InstructionCost, bool>; 1634 1635 /// Returns the expected execution cost. The unit of the cost does 1636 /// not matter because we use the 'cost' units to compare different 1637 /// vector widths. The cost that is returned is *not* normalized by 1638 /// the factor width. 1639 VectorizationCostTy expectedCost(ElementCount VF); 1640 1641 /// Returns the execution time cost of an instruction for a given vector 1642 /// width. Vector width of one means scalar. 1643 VectorizationCostTy getInstructionCost(Instruction *I, ElementCount VF); 1644 1645 /// The cost-computation logic from getInstructionCost which provides 1646 /// the vector type as an output parameter. 1647 InstructionCost getInstructionCost(Instruction *I, ElementCount VF, 1648 Type *&VectorTy); 1649 1650 /// Return the cost of instructions in an inloop reduction pattern, if I is 1651 /// part of that pattern. 1652 InstructionCost getReductionPatternCost(Instruction *I, ElementCount VF, 1653 Type *VectorTy, 1654 TTI::TargetCostKind CostKind); 1655 1656 /// Calculate vectorization cost of memory instruction \p I. 1657 InstructionCost getMemoryInstructionCost(Instruction *I, ElementCount VF); 1658 1659 /// The cost computation for scalarized memory instruction. 1660 InstructionCost getMemInstScalarizationCost(Instruction *I, ElementCount VF); 1661 1662 /// The cost computation for interleaving group of memory instructions. 1663 InstructionCost getInterleaveGroupCost(Instruction *I, ElementCount VF); 1664 1665 /// The cost computation for Gather/Scatter instruction. 1666 InstructionCost getGatherScatterCost(Instruction *I, ElementCount VF); 1667 1668 /// The cost computation for widening instruction \p I with consecutive 1669 /// memory access. 1670 InstructionCost getConsecutiveMemOpCost(Instruction *I, ElementCount VF); 1671 1672 /// The cost calculation for Load/Store instruction \p I with uniform pointer - 1673 /// Load: scalar load + broadcast. 1674 /// Store: scalar store + (loop invariant value stored? 0 : extract of last 1675 /// element) 1676 InstructionCost getUniformMemOpCost(Instruction *I, ElementCount VF); 1677 1678 /// Estimate the overhead of scalarizing an instruction. This is a 1679 /// convenience wrapper for the type-based getScalarizationOverhead API. 1680 InstructionCost getScalarizationOverhead(Instruction *I, 1681 ElementCount VF) const; 1682 1683 /// Returns whether the instruction is a load or store and will be a emitted 1684 /// as a vector operation. 1685 bool isConsecutiveLoadOrStore(Instruction *I); 1686 1687 /// Returns true if an artificially high cost for emulated masked memrefs 1688 /// should be used. 1689 bool useEmulatedMaskMemRefHack(Instruction *I); 1690 1691 /// Map of scalar integer values to the smallest bitwidth they can be legally 1692 /// represented as. The vector equivalents of these values should be truncated 1693 /// to this type. 1694 MapVector<Instruction *, uint64_t> MinBWs; 1695 1696 /// A type representing the costs for instructions if they were to be 1697 /// scalarized rather than vectorized. The entries are Instruction-Cost 1698 /// pairs. 1699 using ScalarCostsTy = DenseMap<Instruction *, InstructionCost>; 1700 1701 /// A set containing all BasicBlocks that are known to present after 1702 /// vectorization as a predicated block. 1703 SmallPtrSet<BasicBlock *, 4> PredicatedBBsAfterVectorization; 1704 1705 /// Records whether it is allowed to have the original scalar loop execute at 1706 /// least once. This may be needed as a fallback loop in case runtime 1707 /// aliasing/dependence checks fail, or to handle the tail/remainder 1708 /// iterations when the trip count is unknown or doesn't divide by the VF, 1709 /// or as a peel-loop to handle gaps in interleave-groups. 1710 /// Under optsize and when the trip count is very small we don't allow any 1711 /// iterations to execute in the scalar loop. 1712 ScalarEpilogueLowering ScalarEpilogueStatus = CM_ScalarEpilogueAllowed; 1713 1714 /// All blocks of loop are to be masked to fold tail of scalar iterations. 1715 bool FoldTailByMasking = false; 1716 1717 /// A map holding scalar costs for different vectorization factors. The 1718 /// presence of a cost for an instruction in the mapping indicates that the 1719 /// instruction will be scalarized when vectorizing with the associated 1720 /// vectorization factor. The entries are VF-ScalarCostTy pairs. 1721 DenseMap<ElementCount, ScalarCostsTy> InstsToScalarize; 1722 1723 /// Holds the instructions known to be uniform after vectorization. 1724 /// The data is collected per VF. 1725 DenseMap<ElementCount, SmallPtrSet<Instruction *, 4>> Uniforms; 1726 1727 /// Holds the instructions known to be scalar after vectorization. 1728 /// The data is collected per VF. 1729 DenseMap<ElementCount, SmallPtrSet<Instruction *, 4>> Scalars; 1730 1731 /// Holds the instructions (address computations) that are forced to be 1732 /// scalarized. 1733 DenseMap<ElementCount, SmallPtrSet<Instruction *, 4>> ForcedScalars; 1734 1735 /// PHINodes of the reductions that should be expanded in-loop along with 1736 /// their associated chains of reduction operations, in program order from top 1737 /// (PHI) to bottom 1738 ReductionChainMap InLoopReductionChains; 1739 1740 /// A Map of inloop reduction operations and their immediate chain operand. 1741 /// FIXME: This can be removed once reductions can be costed correctly in 1742 /// vplan. This was added to allow quick lookup to the inloop operations, 1743 /// without having to loop through InLoopReductionChains. 1744 DenseMap<Instruction *, Instruction *> InLoopReductionImmediateChains; 1745 1746 /// Returns the expected difference in cost from scalarizing the expression 1747 /// feeding a predicated instruction \p PredInst. The instructions to 1748 /// scalarize and their scalar costs are collected in \p ScalarCosts. A 1749 /// non-negative return value implies the expression will be scalarized. 1750 /// Currently, only single-use chains are considered for scalarization. 1751 int computePredInstDiscount(Instruction *PredInst, ScalarCostsTy &ScalarCosts, 1752 ElementCount VF); 1753 1754 /// Collect the instructions that are uniform after vectorization. An 1755 /// instruction is uniform if we represent it with a single scalar value in 1756 /// the vectorized loop corresponding to each vector iteration. Examples of 1757 /// uniform instructions include pointer operands of consecutive or 1758 /// interleaved memory accesses. Note that although uniformity implies an 1759 /// instruction will be scalar, the reverse is not true. In general, a 1760 /// scalarized instruction will be represented by VF scalar values in the 1761 /// vectorized loop, each corresponding to an iteration of the original 1762 /// scalar loop. 1763 void collectLoopUniforms(ElementCount VF); 1764 1765 /// Collect the instructions that are scalar after vectorization. An 1766 /// instruction is scalar if it is known to be uniform or will be scalarized 1767 /// during vectorization. Non-uniform scalarized instructions will be 1768 /// represented by VF values in the vectorized loop, each corresponding to an 1769 /// iteration of the original scalar loop. 1770 void collectLoopScalars(ElementCount VF); 1771 1772 /// Keeps cost model vectorization decision and cost for instructions. 1773 /// Right now it is used for memory instructions only. 1774 using DecisionList = DenseMap<std::pair<Instruction *, ElementCount>, 1775 std::pair<InstWidening, InstructionCost>>; 1776 1777 DecisionList WideningDecisions; 1778 1779 /// Returns true if \p V is expected to be vectorized and it needs to be 1780 /// extracted. 1781 bool needsExtract(Value *V, ElementCount VF) const { 1782 Instruction *I = dyn_cast<Instruction>(V); 1783 if (VF.isScalar() || !I || !TheLoop->contains(I) || 1784 TheLoop->isLoopInvariant(I)) 1785 return false; 1786 1787 // Assume we can vectorize V (and hence we need extraction) if the 1788 // scalars are not computed yet. This can happen, because it is called 1789 // via getScalarizationOverhead from setCostBasedWideningDecision, before 1790 // the scalars are collected. That should be a safe assumption in most 1791 // cases, because we check if the operands have vectorizable types 1792 // beforehand in LoopVectorizationLegality. 1793 return Scalars.find(VF) == Scalars.end() || 1794 !isScalarAfterVectorization(I, VF); 1795 }; 1796 1797 /// Returns a range containing only operands needing to be extracted. 1798 SmallVector<Value *, 4> filterExtractingOperands(Instruction::op_range Ops, 1799 ElementCount VF) const { 1800 return SmallVector<Value *, 4>(make_filter_range( 1801 Ops, [this, VF](Value *V) { return this->needsExtract(V, VF); })); 1802 } 1803 1804 /// Determines if we have the infrastructure to vectorize loop \p L and its 1805 /// epilogue, assuming the main loop is vectorized by \p VF. 1806 bool isCandidateForEpilogueVectorization(const Loop &L, 1807 const ElementCount VF) const; 1808 1809 /// Returns true if epilogue vectorization is considered profitable, and 1810 /// false otherwise. 1811 /// \p VF is the vectorization factor chosen for the original loop. 1812 bool isEpilogueVectorizationProfitable(const ElementCount VF) const; 1813 1814 public: 1815 /// The loop that we evaluate. 1816 Loop *TheLoop; 1817 1818 /// Predicated scalar evolution analysis. 1819 PredicatedScalarEvolution &PSE; 1820 1821 /// Loop Info analysis. 1822 LoopInfo *LI; 1823 1824 /// Vectorization legality. 1825 LoopVectorizationLegality *Legal; 1826 1827 /// Vector target information. 1828 const TargetTransformInfo &TTI; 1829 1830 /// Target Library Info. 1831 const TargetLibraryInfo *TLI; 1832 1833 /// Demanded bits analysis. 1834 DemandedBits *DB; 1835 1836 /// Assumption cache. 1837 AssumptionCache *AC; 1838 1839 /// Interface to emit optimization remarks. 1840 OptimizationRemarkEmitter *ORE; 1841 1842 const Function *TheFunction; 1843 1844 /// Loop Vectorize Hint. 1845 const LoopVectorizeHints *Hints; 1846 1847 /// The interleave access information contains groups of interleaved accesses 1848 /// with the same stride and close to each other. 1849 InterleavedAccessInfo &InterleaveInfo; 1850 1851 /// Values to ignore in the cost model. 1852 SmallPtrSet<const Value *, 16> ValuesToIgnore; 1853 1854 /// Values to ignore in the cost model when VF > 1. 1855 SmallPtrSet<const Value *, 16> VecValuesToIgnore; 1856 1857 /// Profitable vector factors. 1858 SmallVector<VectorizationFactor, 8> ProfitableVFs; 1859 }; 1860 } // end namespace llvm 1861 1862 /// Helper struct to manage generating runtime checks for vectorization. 1863 /// 1864 /// The runtime checks are created up-front in temporary blocks to allow better 1865 /// estimating the cost and un-linked from the existing IR. After deciding to 1866 /// vectorize, the checks are moved back. If deciding not to vectorize, the 1867 /// temporary blocks are completely removed. 1868 class GeneratedRTChecks { 1869 /// Basic block which contains the generated SCEV checks, if any. 1870 BasicBlock *SCEVCheckBlock = nullptr; 1871 1872 /// The value representing the result of the generated SCEV checks. If it is 1873 /// nullptr, either no SCEV checks have been generated or they have been used. 1874 Value *SCEVCheckCond = nullptr; 1875 1876 /// Basic block which contains the generated memory runtime checks, if any. 1877 BasicBlock *MemCheckBlock = nullptr; 1878 1879 /// The value representing the result of the generated memory runtime checks. 1880 /// If it is nullptr, either no memory runtime checks have been generated or 1881 /// they have been used. 1882 Instruction *MemRuntimeCheckCond = nullptr; 1883 1884 DominatorTree *DT; 1885 LoopInfo *LI; 1886 1887 SCEVExpander SCEVExp; 1888 SCEVExpander MemCheckExp; 1889 1890 public: 1891 GeneratedRTChecks(ScalarEvolution &SE, DominatorTree *DT, LoopInfo *LI, 1892 const DataLayout &DL) 1893 : DT(DT), LI(LI), SCEVExp(SE, DL, "scev.check"), 1894 MemCheckExp(SE, DL, "scev.check") {} 1895 1896 /// Generate runtime checks in SCEVCheckBlock and MemCheckBlock, so we can 1897 /// accurately estimate the cost of the runtime checks. The blocks are 1898 /// un-linked from the IR and is added back during vector code generation. If 1899 /// there is no vector code generation, the check blocks are removed 1900 /// completely. 1901 void Create(Loop *L, const LoopAccessInfo &LAI, 1902 const SCEVUnionPredicate &UnionPred) { 1903 1904 BasicBlock *LoopHeader = L->getHeader(); 1905 BasicBlock *Preheader = L->getLoopPreheader(); 1906 1907 // Use SplitBlock to create blocks for SCEV & memory runtime checks to 1908 // ensure the blocks are properly added to LoopInfo & DominatorTree. Those 1909 // may be used by SCEVExpander. The blocks will be un-linked from their 1910 // predecessors and removed from LI & DT at the end of the function. 1911 if (!UnionPred.isAlwaysTrue()) { 1912 SCEVCheckBlock = SplitBlock(Preheader, Preheader->getTerminator(), DT, LI, 1913 nullptr, "vector.scevcheck"); 1914 1915 SCEVCheckCond = SCEVExp.expandCodeForPredicate( 1916 &UnionPred, SCEVCheckBlock->getTerminator()); 1917 } 1918 1919 const auto &RtPtrChecking = *LAI.getRuntimePointerChecking(); 1920 if (RtPtrChecking.Need) { 1921 auto *Pred = SCEVCheckBlock ? SCEVCheckBlock : Preheader; 1922 MemCheckBlock = SplitBlock(Pred, Pred->getTerminator(), DT, LI, nullptr, 1923 "vector.memcheck"); 1924 1925 std::tie(std::ignore, MemRuntimeCheckCond) = 1926 addRuntimeChecks(MemCheckBlock->getTerminator(), L, 1927 RtPtrChecking.getChecks(), MemCheckExp); 1928 assert(MemRuntimeCheckCond && 1929 "no RT checks generated although RtPtrChecking " 1930 "claimed checks are required"); 1931 } 1932 1933 if (!MemCheckBlock && !SCEVCheckBlock) 1934 return; 1935 1936 // Unhook the temporary block with the checks, update various places 1937 // accordingly. 1938 if (SCEVCheckBlock) 1939 SCEVCheckBlock->replaceAllUsesWith(Preheader); 1940 if (MemCheckBlock) 1941 MemCheckBlock->replaceAllUsesWith(Preheader); 1942 1943 if (SCEVCheckBlock) { 1944 SCEVCheckBlock->getTerminator()->moveBefore(Preheader->getTerminator()); 1945 new UnreachableInst(Preheader->getContext(), SCEVCheckBlock); 1946 Preheader->getTerminator()->eraseFromParent(); 1947 } 1948 if (MemCheckBlock) { 1949 MemCheckBlock->getTerminator()->moveBefore(Preheader->getTerminator()); 1950 new UnreachableInst(Preheader->getContext(), MemCheckBlock); 1951 Preheader->getTerminator()->eraseFromParent(); 1952 } 1953 1954 DT->changeImmediateDominator(LoopHeader, Preheader); 1955 if (MemCheckBlock) { 1956 DT->eraseNode(MemCheckBlock); 1957 LI->removeBlock(MemCheckBlock); 1958 } 1959 if (SCEVCheckBlock) { 1960 DT->eraseNode(SCEVCheckBlock); 1961 LI->removeBlock(SCEVCheckBlock); 1962 } 1963 } 1964 1965 /// Remove the created SCEV & memory runtime check blocks & instructions, if 1966 /// unused. 1967 ~GeneratedRTChecks() { 1968 SCEVExpanderCleaner SCEVCleaner(SCEVExp, *DT); 1969 SCEVExpanderCleaner MemCheckCleaner(MemCheckExp, *DT); 1970 if (!SCEVCheckCond) 1971 SCEVCleaner.markResultUsed(); 1972 1973 if (!MemRuntimeCheckCond) 1974 MemCheckCleaner.markResultUsed(); 1975 1976 if (MemRuntimeCheckCond) { 1977 auto &SE = *MemCheckExp.getSE(); 1978 // Memory runtime check generation creates compares that use expanded 1979 // values. Remove them before running the SCEVExpanderCleaners. 1980 for (auto &I : make_early_inc_range(reverse(*MemCheckBlock))) { 1981 if (MemCheckExp.isInsertedInstruction(&I)) 1982 continue; 1983 SE.forgetValue(&I); 1984 SE.eraseValueFromMap(&I); 1985 I.eraseFromParent(); 1986 } 1987 } 1988 MemCheckCleaner.cleanup(); 1989 SCEVCleaner.cleanup(); 1990 1991 if (SCEVCheckCond) 1992 SCEVCheckBlock->eraseFromParent(); 1993 if (MemRuntimeCheckCond) 1994 MemCheckBlock->eraseFromParent(); 1995 } 1996 1997 /// Adds the generated SCEVCheckBlock before \p LoopVectorPreHeader and 1998 /// adjusts the branches to branch to the vector preheader or \p Bypass, 1999 /// depending on the generated condition. 2000 BasicBlock *emitSCEVChecks(Loop *L, BasicBlock *Bypass, 2001 BasicBlock *LoopVectorPreHeader, 2002 BasicBlock *LoopExitBlock) { 2003 if (!SCEVCheckCond) 2004 return nullptr; 2005 if (auto *C = dyn_cast<ConstantInt>(SCEVCheckCond)) 2006 if (C->isZero()) 2007 return nullptr; 2008 2009 auto *Pred = LoopVectorPreHeader->getSinglePredecessor(); 2010 2011 BranchInst::Create(LoopVectorPreHeader, SCEVCheckBlock); 2012 // Create new preheader for vector loop. 2013 if (auto *PL = LI->getLoopFor(LoopVectorPreHeader)) 2014 PL->addBasicBlockToLoop(SCEVCheckBlock, *LI); 2015 2016 SCEVCheckBlock->getTerminator()->eraseFromParent(); 2017 SCEVCheckBlock->moveBefore(LoopVectorPreHeader); 2018 Pred->getTerminator()->replaceSuccessorWith(LoopVectorPreHeader, 2019 SCEVCheckBlock); 2020 2021 DT->addNewBlock(SCEVCheckBlock, Pred); 2022 DT->changeImmediateDominator(LoopVectorPreHeader, SCEVCheckBlock); 2023 2024 ReplaceInstWithInst( 2025 SCEVCheckBlock->getTerminator(), 2026 BranchInst::Create(Bypass, LoopVectorPreHeader, SCEVCheckCond)); 2027 // Mark the check as used, to prevent it from being removed during cleanup. 2028 SCEVCheckCond = nullptr; 2029 return SCEVCheckBlock; 2030 } 2031 2032 /// Adds the generated MemCheckBlock before \p LoopVectorPreHeader and adjusts 2033 /// the branches to branch to the vector preheader or \p Bypass, depending on 2034 /// the generated condition. 2035 BasicBlock *emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass, 2036 BasicBlock *LoopVectorPreHeader) { 2037 // Check if we generated code that checks in runtime if arrays overlap. 2038 if (!MemRuntimeCheckCond) 2039 return nullptr; 2040 2041 auto *Pred = LoopVectorPreHeader->getSinglePredecessor(); 2042 Pred->getTerminator()->replaceSuccessorWith(LoopVectorPreHeader, 2043 MemCheckBlock); 2044 2045 DT->addNewBlock(MemCheckBlock, Pred); 2046 DT->changeImmediateDominator(LoopVectorPreHeader, MemCheckBlock); 2047 MemCheckBlock->moveBefore(LoopVectorPreHeader); 2048 2049 if (auto *PL = LI->getLoopFor(LoopVectorPreHeader)) 2050 PL->addBasicBlockToLoop(MemCheckBlock, *LI); 2051 2052 ReplaceInstWithInst( 2053 MemCheckBlock->getTerminator(), 2054 BranchInst::Create(Bypass, LoopVectorPreHeader, MemRuntimeCheckCond)); 2055 MemCheckBlock->getTerminator()->setDebugLoc( 2056 Pred->getTerminator()->getDebugLoc()); 2057 2058 // Mark the check as used, to prevent it from being removed during cleanup. 2059 MemRuntimeCheckCond = nullptr; 2060 return MemCheckBlock; 2061 } 2062 }; 2063 2064 // Return true if \p OuterLp is an outer loop annotated with hints for explicit 2065 // vectorization. The loop needs to be annotated with #pragma omp simd 2066 // simdlen(#) or #pragma clang vectorize(enable) vectorize_width(#). If the 2067 // vector length information is not provided, vectorization is not considered 2068 // explicit. Interleave hints are not allowed either. These limitations will be 2069 // relaxed in the future. 2070 // Please, note that we are currently forced to abuse the pragma 'clang 2071 // vectorize' semantics. This pragma provides *auto-vectorization hints* 2072 // (i.e., LV must check that vectorization is legal) whereas pragma 'omp simd' 2073 // provides *explicit vectorization hints* (LV can bypass legal checks and 2074 // assume that vectorization is legal). However, both hints are implemented 2075 // using the same metadata (llvm.loop.vectorize, processed by 2076 // LoopVectorizeHints). This will be fixed in the future when the native IR 2077 // representation for pragma 'omp simd' is introduced. 2078 static bool isExplicitVecOuterLoop(Loop *OuterLp, 2079 OptimizationRemarkEmitter *ORE) { 2080 assert(!OuterLp->isInnermost() && "This is not an outer loop"); 2081 LoopVectorizeHints Hints(OuterLp, true /*DisableInterleaving*/, *ORE); 2082 2083 // Only outer loops with an explicit vectorization hint are supported. 2084 // Unannotated outer loops are ignored. 2085 if (Hints.getForce() == LoopVectorizeHints::FK_Undefined) 2086 return false; 2087 2088 Function *Fn = OuterLp->getHeader()->getParent(); 2089 if (!Hints.allowVectorization(Fn, OuterLp, 2090 true /*VectorizeOnlyWhenForced*/)) { 2091 LLVM_DEBUG(dbgs() << "LV: Loop hints prevent outer loop vectorization.\n"); 2092 return false; 2093 } 2094 2095 if (Hints.getInterleave() > 1) { 2096 // TODO: Interleave support is future work. 2097 LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Interleave is not supported for " 2098 "outer loops.\n"); 2099 Hints.emitRemarkWithHints(); 2100 return false; 2101 } 2102 2103 return true; 2104 } 2105 2106 static void collectSupportedLoops(Loop &L, LoopInfo *LI, 2107 OptimizationRemarkEmitter *ORE, 2108 SmallVectorImpl<Loop *> &V) { 2109 // Collect inner loops and outer loops without irreducible control flow. For 2110 // now, only collect outer loops that have explicit vectorization hints. If we 2111 // are stress testing the VPlan H-CFG construction, we collect the outermost 2112 // loop of every loop nest. 2113 if (L.isInnermost() || VPlanBuildStressTest || 2114 (EnableVPlanNativePath && isExplicitVecOuterLoop(&L, ORE))) { 2115 LoopBlocksRPO RPOT(&L); 2116 RPOT.perform(LI); 2117 if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) { 2118 V.push_back(&L); 2119 // TODO: Collect inner loops inside marked outer loops in case 2120 // vectorization fails for the outer loop. Do not invoke 2121 // 'containsIrreducibleCFG' again for inner loops when the outer loop is 2122 // already known to be reducible. We can use an inherited attribute for 2123 // that. 2124 return; 2125 } 2126 } 2127 for (Loop *InnerL : L) 2128 collectSupportedLoops(*InnerL, LI, ORE, V); 2129 } 2130 2131 namespace { 2132 2133 /// The LoopVectorize Pass. 2134 struct LoopVectorize : public FunctionPass { 2135 /// Pass identification, replacement for typeid 2136 static char ID; 2137 2138 LoopVectorizePass Impl; 2139 2140 explicit LoopVectorize(bool InterleaveOnlyWhenForced = false, 2141 bool VectorizeOnlyWhenForced = false) 2142 : FunctionPass(ID), 2143 Impl({InterleaveOnlyWhenForced, VectorizeOnlyWhenForced}) { 2144 initializeLoopVectorizePass(*PassRegistry::getPassRegistry()); 2145 } 2146 2147 bool runOnFunction(Function &F) override { 2148 if (skipFunction(F)) 2149 return false; 2150 2151 auto *SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE(); 2152 auto *LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo(); 2153 auto *TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F); 2154 auto *DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree(); 2155 auto *BFI = &getAnalysis<BlockFrequencyInfoWrapperPass>().getBFI(); 2156 auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>(); 2157 auto *TLI = TLIP ? &TLIP->getTLI(F) : nullptr; 2158 auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); 2159 auto *AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F); 2160 auto *LAA = &getAnalysis<LoopAccessLegacyAnalysis>(); 2161 auto *DB = &getAnalysis<DemandedBitsWrapperPass>().getDemandedBits(); 2162 auto *ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE(); 2163 auto *PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI(); 2164 2165 std::function<const LoopAccessInfo &(Loop &)> GetLAA = 2166 [&](Loop &L) -> const LoopAccessInfo & { return LAA->getInfo(&L); }; 2167 2168 return Impl.runImpl(F, *SE, *LI, *TTI, *DT, *BFI, TLI, *DB, *AA, *AC, 2169 GetLAA, *ORE, PSI).MadeAnyChange; 2170 } 2171 2172 void getAnalysisUsage(AnalysisUsage &AU) const override { 2173 AU.addRequired<AssumptionCacheTracker>(); 2174 AU.addRequired<BlockFrequencyInfoWrapperPass>(); 2175 AU.addRequired<DominatorTreeWrapperPass>(); 2176 AU.addRequired<LoopInfoWrapperPass>(); 2177 AU.addRequired<ScalarEvolutionWrapperPass>(); 2178 AU.addRequired<TargetTransformInfoWrapperPass>(); 2179 AU.addRequired<AAResultsWrapperPass>(); 2180 AU.addRequired<LoopAccessLegacyAnalysis>(); 2181 AU.addRequired<DemandedBitsWrapperPass>(); 2182 AU.addRequired<OptimizationRemarkEmitterWrapperPass>(); 2183 AU.addRequired<InjectTLIMappingsLegacy>(); 2184 2185 // We currently do not preserve loopinfo/dominator analyses with outer loop 2186 // vectorization. Until this is addressed, mark these analyses as preserved 2187 // only for non-VPlan-native path. 2188 // TODO: Preserve Loop and Dominator analyses for VPlan-native path. 2189 if (!EnableVPlanNativePath) { 2190 AU.addPreserved<LoopInfoWrapperPass>(); 2191 AU.addPreserved<DominatorTreeWrapperPass>(); 2192 } 2193 2194 AU.addPreserved<BasicAAWrapperPass>(); 2195 AU.addPreserved<GlobalsAAWrapperPass>(); 2196 AU.addRequired<ProfileSummaryInfoWrapperPass>(); 2197 } 2198 }; 2199 2200 } // end anonymous namespace 2201 2202 //===----------------------------------------------------------------------===// 2203 // Implementation of LoopVectorizationLegality, InnerLoopVectorizer and 2204 // LoopVectorizationCostModel and LoopVectorizationPlanner. 2205 //===----------------------------------------------------------------------===// 2206 2207 Value *InnerLoopVectorizer::getBroadcastInstrs(Value *V) { 2208 // We need to place the broadcast of invariant variables outside the loop, 2209 // but only if it's proven safe to do so. Else, broadcast will be inside 2210 // vector loop body. 2211 Instruction *Instr = dyn_cast<Instruction>(V); 2212 bool SafeToHoist = OrigLoop->isLoopInvariant(V) && 2213 (!Instr || 2214 DT->dominates(Instr->getParent(), LoopVectorPreHeader)); 2215 // Place the code for broadcasting invariant variables in the new preheader. 2216 IRBuilder<>::InsertPointGuard Guard(Builder); 2217 if (SafeToHoist) 2218 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 2219 2220 // Broadcast the scalar into all locations in the vector. 2221 Value *Shuf = Builder.CreateVectorSplat(VF, V, "broadcast"); 2222 2223 return Shuf; 2224 } 2225 2226 void InnerLoopVectorizer::createVectorIntOrFpInductionPHI( 2227 const InductionDescriptor &II, Value *Step, Value *Start, 2228 Instruction *EntryVal, VPValue *Def, VPValue *CastDef, 2229 VPTransformState &State) { 2230 assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) && 2231 "Expected either an induction phi-node or a truncate of it!"); 2232 2233 // Construct the initial value of the vector IV in the vector loop preheader 2234 auto CurrIP = Builder.saveIP(); 2235 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 2236 if (isa<TruncInst>(EntryVal)) { 2237 assert(Start->getType()->isIntegerTy() && 2238 "Truncation requires an integer type"); 2239 auto *TruncType = cast<IntegerType>(EntryVal->getType()); 2240 Step = Builder.CreateTrunc(Step, TruncType); 2241 Start = Builder.CreateCast(Instruction::Trunc, Start, TruncType); 2242 } 2243 Value *SplatStart = Builder.CreateVectorSplat(VF, Start); 2244 Value *SteppedStart = 2245 getStepVector(SplatStart, 0, Step, II.getInductionOpcode()); 2246 2247 // We create vector phi nodes for both integer and floating-point induction 2248 // variables. Here, we determine the kind of arithmetic we will perform. 2249 Instruction::BinaryOps AddOp; 2250 Instruction::BinaryOps MulOp; 2251 if (Step->getType()->isIntegerTy()) { 2252 AddOp = Instruction::Add; 2253 MulOp = Instruction::Mul; 2254 } else { 2255 AddOp = II.getInductionOpcode(); 2256 MulOp = Instruction::FMul; 2257 } 2258 2259 // Multiply the vectorization factor by the step using integer or 2260 // floating-point arithmetic as appropriate. 2261 Type *StepType = Step->getType(); 2262 if (Step->getType()->isFloatingPointTy()) 2263 StepType = IntegerType::get(StepType->getContext(), 2264 StepType->getScalarSizeInBits()); 2265 Value *RuntimeVF = getRuntimeVF(Builder, StepType, VF); 2266 if (Step->getType()->isFloatingPointTy()) 2267 RuntimeVF = Builder.CreateSIToFP(RuntimeVF, Step->getType()); 2268 Value *Mul = Builder.CreateBinOp(MulOp, Step, RuntimeVF); 2269 2270 // Create a vector splat to use in the induction update. 2271 // 2272 // FIXME: If the step is non-constant, we create the vector splat with 2273 // IRBuilder. IRBuilder can constant-fold the multiply, but it doesn't 2274 // handle a constant vector splat. 2275 Value *SplatVF = isa<Constant>(Mul) 2276 ? ConstantVector::getSplat(VF, cast<Constant>(Mul)) 2277 : Builder.CreateVectorSplat(VF, Mul); 2278 Builder.restoreIP(CurrIP); 2279 2280 // We may need to add the step a number of times, depending on the unroll 2281 // factor. The last of those goes into the PHI. 2282 PHINode *VecInd = PHINode::Create(SteppedStart->getType(), 2, "vec.ind", 2283 &*LoopVectorBody->getFirstInsertionPt()); 2284 VecInd->setDebugLoc(EntryVal->getDebugLoc()); 2285 Instruction *LastInduction = VecInd; 2286 for (unsigned Part = 0; Part < UF; ++Part) { 2287 State.set(Def, LastInduction, Part); 2288 2289 if (isa<TruncInst>(EntryVal)) 2290 addMetadata(LastInduction, EntryVal); 2291 recordVectorLoopValueForInductionCast(II, EntryVal, LastInduction, CastDef, 2292 State, Part); 2293 2294 LastInduction = cast<Instruction>( 2295 Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")); 2296 LastInduction->setDebugLoc(EntryVal->getDebugLoc()); 2297 } 2298 2299 // Move the last step to the end of the latch block. This ensures consistent 2300 // placement of all induction updates. 2301 auto *LoopVectorLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch(); 2302 auto *Br = cast<BranchInst>(LoopVectorLatch->getTerminator()); 2303 auto *ICmp = cast<Instruction>(Br->getCondition()); 2304 LastInduction->moveBefore(ICmp); 2305 LastInduction->setName("vec.ind.next"); 2306 2307 VecInd->addIncoming(SteppedStart, LoopVectorPreHeader); 2308 VecInd->addIncoming(LastInduction, LoopVectorLatch); 2309 } 2310 2311 bool InnerLoopVectorizer::shouldScalarizeInstruction(Instruction *I) const { 2312 return Cost->isScalarAfterVectorization(I, VF) || 2313 Cost->isProfitableToScalarize(I, VF); 2314 } 2315 2316 bool InnerLoopVectorizer::needsScalarInduction(Instruction *IV) const { 2317 if (shouldScalarizeInstruction(IV)) 2318 return true; 2319 auto isScalarInst = [&](User *U) -> bool { 2320 auto *I = cast<Instruction>(U); 2321 return (OrigLoop->contains(I) && shouldScalarizeInstruction(I)); 2322 }; 2323 return llvm::any_of(IV->users(), isScalarInst); 2324 } 2325 2326 void InnerLoopVectorizer::recordVectorLoopValueForInductionCast( 2327 const InductionDescriptor &ID, const Instruction *EntryVal, 2328 Value *VectorLoopVal, VPValue *CastDef, VPTransformState &State, 2329 unsigned Part, unsigned Lane) { 2330 assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) && 2331 "Expected either an induction phi-node or a truncate of it!"); 2332 2333 // This induction variable is not the phi from the original loop but the 2334 // newly-created IV based on the proof that casted Phi is equal to the 2335 // uncasted Phi in the vectorized loop (under a runtime guard possibly). It 2336 // re-uses the same InductionDescriptor that original IV uses but we don't 2337 // have to do any recording in this case - that is done when original IV is 2338 // processed. 2339 if (isa<TruncInst>(EntryVal)) 2340 return; 2341 2342 const SmallVectorImpl<Instruction *> &Casts = ID.getCastInsts(); 2343 if (Casts.empty()) 2344 return; 2345 // Only the first Cast instruction in the Casts vector is of interest. 2346 // The rest of the Casts (if exist) have no uses outside the 2347 // induction update chain itself. 2348 if (Lane < UINT_MAX) 2349 State.set(CastDef, VectorLoopVal, VPIteration(Part, Lane)); 2350 else 2351 State.set(CastDef, VectorLoopVal, Part); 2352 } 2353 2354 void InnerLoopVectorizer::widenIntOrFpInduction(PHINode *IV, Value *Start, 2355 TruncInst *Trunc, VPValue *Def, 2356 VPValue *CastDef, 2357 VPTransformState &State) { 2358 assert((IV->getType()->isIntegerTy() || IV != OldInduction) && 2359 "Primary induction variable must have an integer type"); 2360 2361 auto II = Legal->getInductionVars().find(IV); 2362 assert(II != Legal->getInductionVars().end() && "IV is not an induction"); 2363 2364 auto ID = II->second; 2365 assert(IV->getType() == ID.getStartValue()->getType() && "Types must match"); 2366 2367 // The value from the original loop to which we are mapping the new induction 2368 // variable. 2369 Instruction *EntryVal = Trunc ? cast<Instruction>(Trunc) : IV; 2370 2371 auto &DL = OrigLoop->getHeader()->getModule()->getDataLayout(); 2372 2373 // Generate code for the induction step. Note that induction steps are 2374 // required to be loop-invariant 2375 auto CreateStepValue = [&](const SCEV *Step) -> Value * { 2376 assert(PSE.getSE()->isLoopInvariant(Step, OrigLoop) && 2377 "Induction step should be loop invariant"); 2378 if (PSE.getSE()->isSCEVable(IV->getType())) { 2379 SCEVExpander Exp(*PSE.getSE(), DL, "induction"); 2380 return Exp.expandCodeFor(Step, Step->getType(), 2381 LoopVectorPreHeader->getTerminator()); 2382 } 2383 return cast<SCEVUnknown>(Step)->getValue(); 2384 }; 2385 2386 // The scalar value to broadcast. This is derived from the canonical 2387 // induction variable. If a truncation type is given, truncate the canonical 2388 // induction variable and step. Otherwise, derive these values from the 2389 // induction descriptor. 2390 auto CreateScalarIV = [&](Value *&Step) -> Value * { 2391 Value *ScalarIV = Induction; 2392 if (IV != OldInduction) { 2393 ScalarIV = IV->getType()->isIntegerTy() 2394 ? Builder.CreateSExtOrTrunc(Induction, IV->getType()) 2395 : Builder.CreateCast(Instruction::SIToFP, Induction, 2396 IV->getType()); 2397 ScalarIV = emitTransformedIndex(Builder, ScalarIV, PSE.getSE(), DL, ID); 2398 ScalarIV->setName("offset.idx"); 2399 } 2400 if (Trunc) { 2401 auto *TruncType = cast<IntegerType>(Trunc->getType()); 2402 assert(Step->getType()->isIntegerTy() && 2403 "Truncation requires an integer step"); 2404 ScalarIV = Builder.CreateTrunc(ScalarIV, TruncType); 2405 Step = Builder.CreateTrunc(Step, TruncType); 2406 } 2407 return ScalarIV; 2408 }; 2409 2410 // Create the vector values from the scalar IV, in the absence of creating a 2411 // vector IV. 2412 auto CreateSplatIV = [&](Value *ScalarIV, Value *Step) { 2413 Value *Broadcasted = getBroadcastInstrs(ScalarIV); 2414 for (unsigned Part = 0; Part < UF; ++Part) { 2415 assert(!VF.isScalable() && "scalable vectors not yet supported."); 2416 Value *EntryPart = 2417 getStepVector(Broadcasted, VF.getKnownMinValue() * Part, Step, 2418 ID.getInductionOpcode()); 2419 State.set(Def, EntryPart, Part); 2420 if (Trunc) 2421 addMetadata(EntryPart, Trunc); 2422 recordVectorLoopValueForInductionCast(ID, EntryVal, EntryPart, CastDef, 2423 State, Part); 2424 } 2425 }; 2426 2427 // Fast-math-flags propagate from the original induction instruction. 2428 IRBuilder<>::FastMathFlagGuard FMFG(Builder); 2429 if (ID.getInductionBinOp() && isa<FPMathOperator>(ID.getInductionBinOp())) 2430 Builder.setFastMathFlags(ID.getInductionBinOp()->getFastMathFlags()); 2431 2432 // Now do the actual transformations, and start with creating the step value. 2433 Value *Step = CreateStepValue(ID.getStep()); 2434 if (VF.isZero() || VF.isScalar()) { 2435 Value *ScalarIV = CreateScalarIV(Step); 2436 CreateSplatIV(ScalarIV, Step); 2437 return; 2438 } 2439 2440 // Determine if we want a scalar version of the induction variable. This is 2441 // true if the induction variable itself is not widened, or if it has at 2442 // least one user in the loop that is not widened. 2443 auto NeedsScalarIV = needsScalarInduction(EntryVal); 2444 if (!NeedsScalarIV) { 2445 createVectorIntOrFpInductionPHI(ID, Step, Start, EntryVal, Def, CastDef, 2446 State); 2447 return; 2448 } 2449 2450 // Try to create a new independent vector induction variable. If we can't 2451 // create the phi node, we will splat the scalar induction variable in each 2452 // loop iteration. 2453 if (!shouldScalarizeInstruction(EntryVal)) { 2454 createVectorIntOrFpInductionPHI(ID, Step, Start, EntryVal, Def, CastDef, 2455 State); 2456 Value *ScalarIV = CreateScalarIV(Step); 2457 // Create scalar steps that can be used by instructions we will later 2458 // scalarize. Note that the addition of the scalar steps will not increase 2459 // the number of instructions in the loop in the common case prior to 2460 // InstCombine. We will be trading one vector extract for each scalar step. 2461 buildScalarSteps(ScalarIV, Step, EntryVal, ID, Def, CastDef, State); 2462 return; 2463 } 2464 2465 // All IV users are scalar instructions, so only emit a scalar IV, not a 2466 // vectorised IV. Except when we tail-fold, then the splat IV feeds the 2467 // predicate used by the masked loads/stores. 2468 Value *ScalarIV = CreateScalarIV(Step); 2469 if (!Cost->isScalarEpilogueAllowed()) 2470 CreateSplatIV(ScalarIV, Step); 2471 buildScalarSteps(ScalarIV, Step, EntryVal, ID, Def, CastDef, State); 2472 } 2473 2474 Value *InnerLoopVectorizer::getStepVector(Value *Val, int StartIdx, Value *Step, 2475 Instruction::BinaryOps BinOp) { 2476 // Create and check the types. 2477 auto *ValVTy = cast<VectorType>(Val->getType()); 2478 ElementCount VLen = ValVTy->getElementCount(); 2479 2480 Type *STy = Val->getType()->getScalarType(); 2481 assert((STy->isIntegerTy() || STy->isFloatingPointTy()) && 2482 "Induction Step must be an integer or FP"); 2483 assert(Step->getType() == STy && "Step has wrong type"); 2484 2485 SmallVector<Constant *, 8> Indices; 2486 2487 // Create a vector of consecutive numbers from zero to VF. 2488 VectorType *InitVecValVTy = ValVTy; 2489 Type *InitVecValSTy = STy; 2490 if (STy->isFloatingPointTy()) { 2491 InitVecValSTy = 2492 IntegerType::get(STy->getContext(), STy->getScalarSizeInBits()); 2493 InitVecValVTy = VectorType::get(InitVecValSTy, VLen); 2494 } 2495 Value *InitVec = Builder.CreateStepVector(InitVecValVTy); 2496 2497 // Add on StartIdx 2498 Value *StartIdxSplat = Builder.CreateVectorSplat( 2499 VLen, ConstantInt::get(InitVecValSTy, StartIdx)); 2500 InitVec = Builder.CreateAdd(InitVec, StartIdxSplat); 2501 2502 if (STy->isIntegerTy()) { 2503 Step = Builder.CreateVectorSplat(VLen, Step); 2504 assert(Step->getType() == Val->getType() && "Invalid step vec"); 2505 // FIXME: The newly created binary instructions should contain nsw/nuw flags, 2506 // which can be found from the original scalar operations. 2507 Step = Builder.CreateMul(InitVec, Step); 2508 return Builder.CreateAdd(Val, Step, "induction"); 2509 } 2510 2511 // Floating point induction. 2512 assert((BinOp == Instruction::FAdd || BinOp == Instruction::FSub) && 2513 "Binary Opcode should be specified for FP induction"); 2514 InitVec = Builder.CreateUIToFP(InitVec, ValVTy); 2515 Step = Builder.CreateVectorSplat(VLen, Step); 2516 Value *MulOp = Builder.CreateFMul(InitVec, Step); 2517 return Builder.CreateBinOp(BinOp, Val, MulOp, "induction"); 2518 } 2519 2520 void InnerLoopVectorizer::buildScalarSteps(Value *ScalarIV, Value *Step, 2521 Instruction *EntryVal, 2522 const InductionDescriptor &ID, 2523 VPValue *Def, VPValue *CastDef, 2524 VPTransformState &State) { 2525 // We shouldn't have to build scalar steps if we aren't vectorizing. 2526 assert(VF.isVector() && "VF should be greater than one"); 2527 // Get the value type and ensure it and the step have the same integer type. 2528 Type *ScalarIVTy = ScalarIV->getType()->getScalarType(); 2529 assert(ScalarIVTy == Step->getType() && 2530 "Val and Step should have the same type"); 2531 2532 // We build scalar steps for both integer and floating-point induction 2533 // variables. Here, we determine the kind of arithmetic we will perform. 2534 Instruction::BinaryOps AddOp; 2535 Instruction::BinaryOps MulOp; 2536 if (ScalarIVTy->isIntegerTy()) { 2537 AddOp = Instruction::Add; 2538 MulOp = Instruction::Mul; 2539 } else { 2540 AddOp = ID.getInductionOpcode(); 2541 MulOp = Instruction::FMul; 2542 } 2543 2544 // Determine the number of scalars we need to generate for each unroll 2545 // iteration. If EntryVal is uniform, we only need to generate the first 2546 // lane. Otherwise, we generate all VF values. 2547 bool IsUniform = 2548 Cost->isUniformAfterVectorization(cast<Instruction>(EntryVal), VF); 2549 unsigned Lanes = IsUniform ? 1 : VF.getKnownMinValue(); 2550 // Compute the scalar steps and save the results in State. 2551 Type *IntStepTy = IntegerType::get(ScalarIVTy->getContext(), 2552 ScalarIVTy->getScalarSizeInBits()); 2553 Type *VecIVTy = nullptr; 2554 Value *UnitStepVec = nullptr, *SplatStep = nullptr, *SplatIV = nullptr; 2555 if (!IsUniform && VF.isScalable()) { 2556 VecIVTy = VectorType::get(ScalarIVTy, VF); 2557 UnitStepVec = Builder.CreateStepVector(VectorType::get(IntStepTy, VF)); 2558 SplatStep = Builder.CreateVectorSplat(VF, Step); 2559 SplatIV = Builder.CreateVectorSplat(VF, ScalarIV); 2560 } 2561 2562 for (unsigned Part = 0; Part < UF; ++Part) { 2563 Value *StartIdx0 = 2564 createStepForVF(Builder, ConstantInt::get(IntStepTy, Part), VF); 2565 2566 if (!IsUniform && VF.isScalable()) { 2567 auto *SplatStartIdx = Builder.CreateVectorSplat(VF, StartIdx0); 2568 auto *InitVec = Builder.CreateAdd(SplatStartIdx, UnitStepVec); 2569 if (ScalarIVTy->isFloatingPointTy()) 2570 InitVec = Builder.CreateSIToFP(InitVec, VecIVTy); 2571 auto *Mul = Builder.CreateBinOp(MulOp, InitVec, SplatStep); 2572 auto *Add = Builder.CreateBinOp(AddOp, SplatIV, Mul); 2573 State.set(Def, Add, Part); 2574 recordVectorLoopValueForInductionCast(ID, EntryVal, Add, CastDef, State, 2575 Part); 2576 // It's useful to record the lane values too for the known minimum number 2577 // of elements so we do those below. This improves the code quality when 2578 // trying to extract the first element, for example. 2579 } 2580 2581 if (ScalarIVTy->isFloatingPointTy()) 2582 StartIdx0 = Builder.CreateSIToFP(StartIdx0, ScalarIVTy); 2583 2584 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { 2585 Value *StartIdx = Builder.CreateBinOp( 2586 AddOp, StartIdx0, getSignedIntOrFpConstant(ScalarIVTy, Lane)); 2587 // The step returned by `createStepForVF` is a runtime-evaluated value 2588 // when VF is scalable. Otherwise, it should be folded into a Constant. 2589 assert((VF.isScalable() || isa<Constant>(StartIdx)) && 2590 "Expected StartIdx to be folded to a constant when VF is not " 2591 "scalable"); 2592 auto *Mul = Builder.CreateBinOp(MulOp, StartIdx, Step); 2593 auto *Add = Builder.CreateBinOp(AddOp, ScalarIV, Mul); 2594 State.set(Def, Add, VPIteration(Part, Lane)); 2595 recordVectorLoopValueForInductionCast(ID, EntryVal, Add, CastDef, State, 2596 Part, Lane); 2597 } 2598 } 2599 } 2600 2601 void InnerLoopVectorizer::packScalarIntoVectorValue(VPValue *Def, 2602 const VPIteration &Instance, 2603 VPTransformState &State) { 2604 Value *ScalarInst = State.get(Def, Instance); 2605 Value *VectorValue = State.get(Def, Instance.Part); 2606 VectorValue = Builder.CreateInsertElement( 2607 VectorValue, ScalarInst, 2608 Instance.Lane.getAsRuntimeExpr(State.Builder, VF)); 2609 State.set(Def, VectorValue, Instance.Part); 2610 } 2611 2612 Value *InnerLoopVectorizer::reverseVector(Value *Vec) { 2613 assert(Vec->getType()->isVectorTy() && "Invalid type"); 2614 return Builder.CreateVectorReverse(Vec, "reverse"); 2615 } 2616 2617 // Return whether we allow using masked interleave-groups (for dealing with 2618 // strided loads/stores that reside in predicated blocks, or for dealing 2619 // with gaps). 2620 static bool useMaskedInterleavedAccesses(const TargetTransformInfo &TTI) { 2621 // If an override option has been passed in for interleaved accesses, use it. 2622 if (EnableMaskedInterleavedMemAccesses.getNumOccurrences() > 0) 2623 return EnableMaskedInterleavedMemAccesses; 2624 2625 return TTI.enableMaskedInterleavedAccessVectorization(); 2626 } 2627 2628 // Try to vectorize the interleave group that \p Instr belongs to. 2629 // 2630 // E.g. Translate following interleaved load group (factor = 3): 2631 // for (i = 0; i < N; i+=3) { 2632 // R = Pic[i]; // Member of index 0 2633 // G = Pic[i+1]; // Member of index 1 2634 // B = Pic[i+2]; // Member of index 2 2635 // ... // do something to R, G, B 2636 // } 2637 // To: 2638 // %wide.vec = load <12 x i32> ; Read 4 tuples of R,G,B 2639 // %R.vec = shuffle %wide.vec, poison, <0, 3, 6, 9> ; R elements 2640 // %G.vec = shuffle %wide.vec, poison, <1, 4, 7, 10> ; G elements 2641 // %B.vec = shuffle %wide.vec, poison, <2, 5, 8, 11> ; B elements 2642 // 2643 // Or translate following interleaved store group (factor = 3): 2644 // for (i = 0; i < N; i+=3) { 2645 // ... do something to R, G, B 2646 // Pic[i] = R; // Member of index 0 2647 // Pic[i+1] = G; // Member of index 1 2648 // Pic[i+2] = B; // Member of index 2 2649 // } 2650 // To: 2651 // %R_G.vec = shuffle %R.vec, %G.vec, <0, 1, 2, ..., 7> 2652 // %B_U.vec = shuffle %B.vec, poison, <0, 1, 2, 3, u, u, u, u> 2653 // %interleaved.vec = shuffle %R_G.vec, %B_U.vec, 2654 // <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> ; Interleave R,G,B elements 2655 // store <12 x i32> %interleaved.vec ; Write 4 tuples of R,G,B 2656 void InnerLoopVectorizer::vectorizeInterleaveGroup( 2657 const InterleaveGroup<Instruction> *Group, ArrayRef<VPValue *> VPDefs, 2658 VPTransformState &State, VPValue *Addr, ArrayRef<VPValue *> StoredValues, 2659 VPValue *BlockInMask) { 2660 Instruction *Instr = Group->getInsertPos(); 2661 const DataLayout &DL = Instr->getModule()->getDataLayout(); 2662 2663 // Prepare for the vector type of the interleaved load/store. 2664 Type *ScalarTy = getMemInstValueType(Instr); 2665 unsigned InterleaveFactor = Group->getFactor(); 2666 assert(!VF.isScalable() && "scalable vectors not yet supported."); 2667 auto *VecTy = VectorType::get(ScalarTy, VF * InterleaveFactor); 2668 2669 // Prepare for the new pointers. 2670 SmallVector<Value *, 2> AddrParts; 2671 unsigned Index = Group->getIndex(Instr); 2672 2673 // TODO: extend the masked interleaved-group support to reversed access. 2674 assert((!BlockInMask || !Group->isReverse()) && 2675 "Reversed masked interleave-group not supported."); 2676 2677 // If the group is reverse, adjust the index to refer to the last vector lane 2678 // instead of the first. We adjust the index from the first vector lane, 2679 // rather than directly getting the pointer for lane VF - 1, because the 2680 // pointer operand of the interleaved access is supposed to be uniform. For 2681 // uniform instructions, we're only required to generate a value for the 2682 // first vector lane in each unroll iteration. 2683 if (Group->isReverse()) 2684 Index += (VF.getKnownMinValue() - 1) * Group->getFactor(); 2685 2686 for (unsigned Part = 0; Part < UF; Part++) { 2687 Value *AddrPart = State.get(Addr, VPIteration(Part, 0)); 2688 setDebugLocFromInst(Builder, AddrPart); 2689 2690 // Notice current instruction could be any index. Need to adjust the address 2691 // to the member of index 0. 2692 // 2693 // E.g. a = A[i+1]; // Member of index 1 (Current instruction) 2694 // b = A[i]; // Member of index 0 2695 // Current pointer is pointed to A[i+1], adjust it to A[i]. 2696 // 2697 // E.g. A[i+1] = a; // Member of index 1 2698 // A[i] = b; // Member of index 0 2699 // A[i+2] = c; // Member of index 2 (Current instruction) 2700 // Current pointer is pointed to A[i+2], adjust it to A[i]. 2701 2702 bool InBounds = false; 2703 if (auto *gep = dyn_cast<GetElementPtrInst>(AddrPart->stripPointerCasts())) 2704 InBounds = gep->isInBounds(); 2705 AddrPart = Builder.CreateGEP(ScalarTy, AddrPart, Builder.getInt32(-Index)); 2706 cast<GetElementPtrInst>(AddrPart)->setIsInBounds(InBounds); 2707 2708 // Cast to the vector pointer type. 2709 unsigned AddressSpace = AddrPart->getType()->getPointerAddressSpace(); 2710 Type *PtrTy = VecTy->getPointerTo(AddressSpace); 2711 AddrParts.push_back(Builder.CreateBitCast(AddrPart, PtrTy)); 2712 } 2713 2714 setDebugLocFromInst(Builder, Instr); 2715 Value *PoisonVec = PoisonValue::get(VecTy); 2716 2717 Value *MaskForGaps = nullptr; 2718 if (Group->requiresScalarEpilogue() && !Cost->isScalarEpilogueAllowed()) { 2719 MaskForGaps = createBitMaskForGaps(Builder, VF.getKnownMinValue(), *Group); 2720 assert(MaskForGaps && "Mask for Gaps is required but it is null"); 2721 } 2722 2723 // Vectorize the interleaved load group. 2724 if (isa<LoadInst>(Instr)) { 2725 // For each unroll part, create a wide load for the group. 2726 SmallVector<Value *, 2> NewLoads; 2727 for (unsigned Part = 0; Part < UF; Part++) { 2728 Instruction *NewLoad; 2729 if (BlockInMask || MaskForGaps) { 2730 assert(useMaskedInterleavedAccesses(*TTI) && 2731 "masked interleaved groups are not allowed."); 2732 Value *GroupMask = MaskForGaps; 2733 if (BlockInMask) { 2734 Value *BlockInMaskPart = State.get(BlockInMask, Part); 2735 Value *ShuffledMask = Builder.CreateShuffleVector( 2736 BlockInMaskPart, 2737 createReplicatedMask(InterleaveFactor, VF.getKnownMinValue()), 2738 "interleaved.mask"); 2739 GroupMask = MaskForGaps 2740 ? Builder.CreateBinOp(Instruction::And, ShuffledMask, 2741 MaskForGaps) 2742 : ShuffledMask; 2743 } 2744 NewLoad = 2745 Builder.CreateMaskedLoad(AddrParts[Part], Group->getAlign(), 2746 GroupMask, PoisonVec, "wide.masked.vec"); 2747 } 2748 else 2749 NewLoad = Builder.CreateAlignedLoad(VecTy, AddrParts[Part], 2750 Group->getAlign(), "wide.vec"); 2751 Group->addMetadata(NewLoad); 2752 NewLoads.push_back(NewLoad); 2753 } 2754 2755 // For each member in the group, shuffle out the appropriate data from the 2756 // wide loads. 2757 unsigned J = 0; 2758 for (unsigned I = 0; I < InterleaveFactor; ++I) { 2759 Instruction *Member = Group->getMember(I); 2760 2761 // Skip the gaps in the group. 2762 if (!Member) 2763 continue; 2764 2765 auto StrideMask = 2766 createStrideMask(I, InterleaveFactor, VF.getKnownMinValue()); 2767 for (unsigned Part = 0; Part < UF; Part++) { 2768 Value *StridedVec = Builder.CreateShuffleVector( 2769 NewLoads[Part], StrideMask, "strided.vec"); 2770 2771 // If this member has different type, cast the result type. 2772 if (Member->getType() != ScalarTy) { 2773 assert(!VF.isScalable() && "VF is assumed to be non scalable."); 2774 VectorType *OtherVTy = VectorType::get(Member->getType(), VF); 2775 StridedVec = createBitOrPointerCast(StridedVec, OtherVTy, DL); 2776 } 2777 2778 if (Group->isReverse()) 2779 StridedVec = reverseVector(StridedVec); 2780 2781 State.set(VPDefs[J], StridedVec, Part); 2782 } 2783 ++J; 2784 } 2785 return; 2786 } 2787 2788 // The sub vector type for current instruction. 2789 auto *SubVT = VectorType::get(ScalarTy, VF); 2790 2791 // Vectorize the interleaved store group. 2792 for (unsigned Part = 0; Part < UF; Part++) { 2793 // Collect the stored vector from each member. 2794 SmallVector<Value *, 4> StoredVecs; 2795 for (unsigned i = 0; i < InterleaveFactor; i++) { 2796 // Interleaved store group doesn't allow a gap, so each index has a member 2797 assert(Group->getMember(i) && "Fail to get a member from an interleaved store group"); 2798 2799 Value *StoredVec = State.get(StoredValues[i], Part); 2800 2801 if (Group->isReverse()) 2802 StoredVec = reverseVector(StoredVec); 2803 2804 // If this member has different type, cast it to a unified type. 2805 2806 if (StoredVec->getType() != SubVT) 2807 StoredVec = createBitOrPointerCast(StoredVec, SubVT, DL); 2808 2809 StoredVecs.push_back(StoredVec); 2810 } 2811 2812 // Concatenate all vectors into a wide vector. 2813 Value *WideVec = concatenateVectors(Builder, StoredVecs); 2814 2815 // Interleave the elements in the wide vector. 2816 Value *IVec = Builder.CreateShuffleVector( 2817 WideVec, createInterleaveMask(VF.getKnownMinValue(), InterleaveFactor), 2818 "interleaved.vec"); 2819 2820 Instruction *NewStoreInstr; 2821 if (BlockInMask) { 2822 Value *BlockInMaskPart = State.get(BlockInMask, Part); 2823 Value *ShuffledMask = Builder.CreateShuffleVector( 2824 BlockInMaskPart, 2825 createReplicatedMask(InterleaveFactor, VF.getKnownMinValue()), 2826 "interleaved.mask"); 2827 NewStoreInstr = Builder.CreateMaskedStore( 2828 IVec, AddrParts[Part], Group->getAlign(), ShuffledMask); 2829 } 2830 else 2831 NewStoreInstr = 2832 Builder.CreateAlignedStore(IVec, AddrParts[Part], Group->getAlign()); 2833 2834 Group->addMetadata(NewStoreInstr); 2835 } 2836 } 2837 2838 void InnerLoopVectorizer::vectorizeMemoryInstruction( 2839 Instruction *Instr, VPTransformState &State, VPValue *Def, VPValue *Addr, 2840 VPValue *StoredValue, VPValue *BlockInMask) { 2841 // Attempt to issue a wide load. 2842 LoadInst *LI = dyn_cast<LoadInst>(Instr); 2843 StoreInst *SI = dyn_cast<StoreInst>(Instr); 2844 2845 assert((LI || SI) && "Invalid Load/Store instruction"); 2846 assert((!SI || StoredValue) && "No stored value provided for widened store"); 2847 assert((!LI || !StoredValue) && "Stored value provided for widened load"); 2848 2849 LoopVectorizationCostModel::InstWidening Decision = 2850 Cost->getWideningDecision(Instr, VF); 2851 assert((Decision == LoopVectorizationCostModel::CM_Widen || 2852 Decision == LoopVectorizationCostModel::CM_Widen_Reverse || 2853 Decision == LoopVectorizationCostModel::CM_GatherScatter) && 2854 "CM decision is not to widen the memory instruction"); 2855 2856 Type *ScalarDataTy = getMemInstValueType(Instr); 2857 2858 auto *DataTy = VectorType::get(ScalarDataTy, VF); 2859 const Align Alignment = getLoadStoreAlignment(Instr); 2860 2861 // Determine if the pointer operand of the access is either consecutive or 2862 // reverse consecutive. 2863 bool Reverse = (Decision == LoopVectorizationCostModel::CM_Widen_Reverse); 2864 bool ConsecutiveStride = 2865 Reverse || (Decision == LoopVectorizationCostModel::CM_Widen); 2866 bool CreateGatherScatter = 2867 (Decision == LoopVectorizationCostModel::CM_GatherScatter); 2868 2869 // Either Ptr feeds a vector load/store, or a vector GEP should feed a vector 2870 // gather/scatter. Otherwise Decision should have been to Scalarize. 2871 assert((ConsecutiveStride || CreateGatherScatter) && 2872 "The instruction should be scalarized"); 2873 (void)ConsecutiveStride; 2874 2875 VectorParts BlockInMaskParts(UF); 2876 bool isMaskRequired = BlockInMask; 2877 if (isMaskRequired) 2878 for (unsigned Part = 0; Part < UF; ++Part) 2879 BlockInMaskParts[Part] = State.get(BlockInMask, Part); 2880 2881 const auto CreateVecPtr = [&](unsigned Part, Value *Ptr) -> Value * { 2882 // Calculate the pointer for the specific unroll-part. 2883 GetElementPtrInst *PartPtr = nullptr; 2884 2885 bool InBounds = false; 2886 if (auto *gep = dyn_cast<GetElementPtrInst>(Ptr->stripPointerCasts())) 2887 InBounds = gep->isInBounds(); 2888 if (Reverse) { 2889 // If the address is consecutive but reversed, then the 2890 // wide store needs to start at the last vector element. 2891 // RunTimeVF = VScale * VF.getKnownMinValue() 2892 // For fixed-width VScale is 1, then RunTimeVF = VF.getKnownMinValue() 2893 Value *RunTimeVF = getRuntimeVF(Builder, Builder.getInt32Ty(), VF); 2894 // NumElt = -Part * RunTimeVF 2895 Value *NumElt = Builder.CreateMul(Builder.getInt32(-Part), RunTimeVF); 2896 // LastLane = 1 - RunTimeVF 2897 Value *LastLane = Builder.CreateSub(Builder.getInt32(1), RunTimeVF); 2898 PartPtr = 2899 cast<GetElementPtrInst>(Builder.CreateGEP(ScalarDataTy, Ptr, NumElt)); 2900 PartPtr->setIsInBounds(InBounds); 2901 PartPtr = cast<GetElementPtrInst>( 2902 Builder.CreateGEP(ScalarDataTy, PartPtr, LastLane)); 2903 PartPtr->setIsInBounds(InBounds); 2904 if (isMaskRequired) // Reverse of a null all-one mask is a null mask. 2905 BlockInMaskParts[Part] = reverseVector(BlockInMaskParts[Part]); 2906 } else { 2907 Value *Increment = createStepForVF(Builder, Builder.getInt32(Part), VF); 2908 PartPtr = cast<GetElementPtrInst>( 2909 Builder.CreateGEP(ScalarDataTy, Ptr, Increment)); 2910 PartPtr->setIsInBounds(InBounds); 2911 } 2912 2913 unsigned AddressSpace = Ptr->getType()->getPointerAddressSpace(); 2914 return Builder.CreateBitCast(PartPtr, DataTy->getPointerTo(AddressSpace)); 2915 }; 2916 2917 // Handle Stores: 2918 if (SI) { 2919 setDebugLocFromInst(Builder, SI); 2920 2921 for (unsigned Part = 0; Part < UF; ++Part) { 2922 Instruction *NewSI = nullptr; 2923 Value *StoredVal = State.get(StoredValue, Part); 2924 if (CreateGatherScatter) { 2925 Value *MaskPart = isMaskRequired ? BlockInMaskParts[Part] : nullptr; 2926 Value *VectorGep = State.get(Addr, Part); 2927 NewSI = Builder.CreateMaskedScatter(StoredVal, VectorGep, Alignment, 2928 MaskPart); 2929 } else { 2930 if (Reverse) { 2931 // If we store to reverse consecutive memory locations, then we need 2932 // to reverse the order of elements in the stored value. 2933 StoredVal = reverseVector(StoredVal); 2934 // We don't want to update the value in the map as it might be used in 2935 // another expression. So don't call resetVectorValue(StoredVal). 2936 } 2937 auto *VecPtr = CreateVecPtr(Part, State.get(Addr, VPIteration(0, 0))); 2938 if (isMaskRequired) 2939 NewSI = Builder.CreateMaskedStore(StoredVal, VecPtr, Alignment, 2940 BlockInMaskParts[Part]); 2941 else 2942 NewSI = Builder.CreateAlignedStore(StoredVal, VecPtr, Alignment); 2943 } 2944 addMetadata(NewSI, SI); 2945 } 2946 return; 2947 } 2948 2949 // Handle loads. 2950 assert(LI && "Must have a load instruction"); 2951 setDebugLocFromInst(Builder, LI); 2952 for (unsigned Part = 0; Part < UF; ++Part) { 2953 Value *NewLI; 2954 if (CreateGatherScatter) { 2955 Value *MaskPart = isMaskRequired ? BlockInMaskParts[Part] : nullptr; 2956 Value *VectorGep = State.get(Addr, Part); 2957 NewLI = Builder.CreateMaskedGather(VectorGep, Alignment, MaskPart, 2958 nullptr, "wide.masked.gather"); 2959 addMetadata(NewLI, LI); 2960 } else { 2961 auto *VecPtr = CreateVecPtr(Part, State.get(Addr, VPIteration(0, 0))); 2962 if (isMaskRequired) 2963 NewLI = Builder.CreateMaskedLoad( 2964 VecPtr, Alignment, BlockInMaskParts[Part], PoisonValue::get(DataTy), 2965 "wide.masked.load"); 2966 else 2967 NewLI = 2968 Builder.CreateAlignedLoad(DataTy, VecPtr, Alignment, "wide.load"); 2969 2970 // Add metadata to the load, but setVectorValue to the reverse shuffle. 2971 addMetadata(NewLI, LI); 2972 if (Reverse) 2973 NewLI = reverseVector(NewLI); 2974 } 2975 2976 State.set(Def, NewLI, Part); 2977 } 2978 } 2979 2980 void InnerLoopVectorizer::scalarizeInstruction(Instruction *Instr, VPValue *Def, 2981 VPUser &User, 2982 const VPIteration &Instance, 2983 bool IfPredicateInstr, 2984 VPTransformState &State) { 2985 assert(!Instr->getType()->isAggregateType() && "Can't handle vectors"); 2986 2987 // llvm.experimental.noalias.scope.decl intrinsics must only be duplicated for 2988 // the first lane and part. 2989 if (isa<NoAliasScopeDeclInst>(Instr)) 2990 if (!Instance.isFirstIteration()) 2991 return; 2992 2993 setDebugLocFromInst(Builder, Instr); 2994 2995 // Does this instruction return a value ? 2996 bool IsVoidRetTy = Instr->getType()->isVoidTy(); 2997 2998 Instruction *Cloned = Instr->clone(); 2999 if (!IsVoidRetTy) 3000 Cloned->setName(Instr->getName() + ".cloned"); 3001 3002 State.Builder.SetInsertPoint(Builder.GetInsertBlock(), 3003 Builder.GetInsertPoint()); 3004 // Replace the operands of the cloned instructions with their scalar 3005 // equivalents in the new loop. 3006 for (unsigned op = 0, e = User.getNumOperands(); op != e; ++op) { 3007 auto *Operand = dyn_cast<Instruction>(Instr->getOperand(op)); 3008 auto InputInstance = Instance; 3009 if (!Operand || !OrigLoop->contains(Operand) || 3010 (Cost->isUniformAfterVectorization(Operand, State.VF))) 3011 InputInstance.Lane = VPLane::getFirstLane(); 3012 auto *NewOp = State.get(User.getOperand(op), InputInstance); 3013 Cloned->setOperand(op, NewOp); 3014 } 3015 addNewMetadata(Cloned, Instr); 3016 3017 // Place the cloned scalar in the new loop. 3018 Builder.Insert(Cloned); 3019 3020 State.set(Def, Cloned, Instance); 3021 3022 // If we just cloned a new assumption, add it the assumption cache. 3023 if (auto *II = dyn_cast<AssumeInst>(Cloned)) 3024 AC->registerAssumption(II); 3025 3026 // End if-block. 3027 if (IfPredicateInstr) 3028 PredicatedInstructions.push_back(Cloned); 3029 } 3030 3031 PHINode *InnerLoopVectorizer::createInductionVariable(Loop *L, Value *Start, 3032 Value *End, Value *Step, 3033 Instruction *DL) { 3034 BasicBlock *Header = L->getHeader(); 3035 BasicBlock *Latch = L->getLoopLatch(); 3036 // As we're just creating this loop, it's possible no latch exists 3037 // yet. If so, use the header as this will be a single block loop. 3038 if (!Latch) 3039 Latch = Header; 3040 3041 IRBuilder<> Builder(&*Header->getFirstInsertionPt()); 3042 Instruction *OldInst = getDebugLocFromInstOrOperands(OldInduction); 3043 setDebugLocFromInst(Builder, OldInst); 3044 auto *Induction = Builder.CreatePHI(Start->getType(), 2, "index"); 3045 3046 Builder.SetInsertPoint(Latch->getTerminator()); 3047 setDebugLocFromInst(Builder, OldInst); 3048 3049 // Create i+1 and fill the PHINode. 3050 Value *Next = Builder.CreateAdd(Induction, Step, "index.next"); 3051 Induction->addIncoming(Start, L->getLoopPreheader()); 3052 Induction->addIncoming(Next, Latch); 3053 // Create the compare. 3054 Value *ICmp = Builder.CreateICmpEQ(Next, End); 3055 Builder.CreateCondBr(ICmp, L->getUniqueExitBlock(), Header); 3056 3057 // Now we have two terminators. Remove the old one from the block. 3058 Latch->getTerminator()->eraseFromParent(); 3059 3060 return Induction; 3061 } 3062 3063 Value *InnerLoopVectorizer::getOrCreateTripCount(Loop *L) { 3064 if (TripCount) 3065 return TripCount; 3066 3067 assert(L && "Create Trip Count for null loop."); 3068 IRBuilder<> Builder(L->getLoopPreheader()->getTerminator()); 3069 // Find the loop boundaries. 3070 ScalarEvolution *SE = PSE.getSE(); 3071 const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount(); 3072 assert(!isa<SCEVCouldNotCompute>(BackedgeTakenCount) && 3073 "Invalid loop count"); 3074 3075 Type *IdxTy = Legal->getWidestInductionType(); 3076 assert(IdxTy && "No type for induction"); 3077 3078 // The exit count might have the type of i64 while the phi is i32. This can 3079 // happen if we have an induction variable that is sign extended before the 3080 // compare. The only way that we get a backedge taken count is that the 3081 // induction variable was signed and as such will not overflow. In such a case 3082 // truncation is legal. 3083 if (SE->getTypeSizeInBits(BackedgeTakenCount->getType()) > 3084 IdxTy->getPrimitiveSizeInBits()) 3085 BackedgeTakenCount = SE->getTruncateOrNoop(BackedgeTakenCount, IdxTy); 3086 BackedgeTakenCount = SE->getNoopOrZeroExtend(BackedgeTakenCount, IdxTy); 3087 3088 // Get the total trip count from the count by adding 1. 3089 const SCEV *ExitCount = SE->getAddExpr( 3090 BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType())); 3091 3092 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout(); 3093 3094 // Expand the trip count and place the new instructions in the preheader. 3095 // Notice that the pre-header does not change, only the loop body. 3096 SCEVExpander Exp(*SE, DL, "induction"); 3097 3098 // Count holds the overall loop count (N). 3099 TripCount = Exp.expandCodeFor(ExitCount, ExitCount->getType(), 3100 L->getLoopPreheader()->getTerminator()); 3101 3102 if (TripCount->getType()->isPointerTy()) 3103 TripCount = 3104 CastInst::CreatePointerCast(TripCount, IdxTy, "exitcount.ptrcnt.to.int", 3105 L->getLoopPreheader()->getTerminator()); 3106 3107 return TripCount; 3108 } 3109 3110 Value *InnerLoopVectorizer::getOrCreateVectorTripCount(Loop *L) { 3111 if (VectorTripCount) 3112 return VectorTripCount; 3113 3114 Value *TC = getOrCreateTripCount(L); 3115 IRBuilder<> Builder(L->getLoopPreheader()->getTerminator()); 3116 3117 Type *Ty = TC->getType(); 3118 // This is where we can make the step a runtime constant. 3119 Value *Step = createStepForVF(Builder, ConstantInt::get(Ty, UF), VF); 3120 3121 // If the tail is to be folded by masking, round the number of iterations N 3122 // up to a multiple of Step instead of rounding down. This is done by first 3123 // adding Step-1 and then rounding down. Note that it's ok if this addition 3124 // overflows: the vector induction variable will eventually wrap to zero given 3125 // that it starts at zero and its Step is a power of two; the loop will then 3126 // exit, with the last early-exit vector comparison also producing all-true. 3127 if (Cost->foldTailByMasking()) { 3128 assert(isPowerOf2_32(VF.getKnownMinValue() * UF) && 3129 "VF*UF must be a power of 2 when folding tail by masking"); 3130 assert(!VF.isScalable() && 3131 "Tail folding not yet supported for scalable vectors"); 3132 TC = Builder.CreateAdd( 3133 TC, ConstantInt::get(Ty, VF.getKnownMinValue() * UF - 1), "n.rnd.up"); 3134 } 3135 3136 // Now we need to generate the expression for the part of the loop that the 3137 // vectorized body will execute. This is equal to N - (N % Step) if scalar 3138 // iterations are not required for correctness, or N - Step, otherwise. Step 3139 // is equal to the vectorization factor (number of SIMD elements) times the 3140 // unroll factor (number of SIMD instructions). 3141 Value *R = Builder.CreateURem(TC, Step, "n.mod.vf"); 3142 3143 // There are two cases where we need to ensure (at least) the last iteration 3144 // runs in the scalar remainder loop. Thus, if the step evenly divides 3145 // the trip count, we set the remainder to be equal to the step. If the step 3146 // does not evenly divide the trip count, no adjustment is necessary since 3147 // there will already be scalar iterations. Note that the minimum iterations 3148 // check ensures that N >= Step. The cases are: 3149 // 1) If there is a non-reversed interleaved group that may speculatively 3150 // access memory out-of-bounds. 3151 // 2) If any instruction may follow a conditionally taken exit. That is, if 3152 // the loop contains multiple exiting blocks, or a single exiting block 3153 // which is not the latch. 3154 if (VF.isVector() && Cost->requiresScalarEpilogue()) { 3155 auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0)); 3156 R = Builder.CreateSelect(IsZero, Step, R); 3157 } 3158 3159 VectorTripCount = Builder.CreateSub(TC, R, "n.vec"); 3160 3161 return VectorTripCount; 3162 } 3163 3164 Value *InnerLoopVectorizer::createBitOrPointerCast(Value *V, VectorType *DstVTy, 3165 const DataLayout &DL) { 3166 // Verify that V is a vector type with same number of elements as DstVTy. 3167 auto *DstFVTy = cast<FixedVectorType>(DstVTy); 3168 unsigned VF = DstFVTy->getNumElements(); 3169 auto *SrcVecTy = cast<FixedVectorType>(V->getType()); 3170 assert((VF == SrcVecTy->getNumElements()) && "Vector dimensions do not match"); 3171 Type *SrcElemTy = SrcVecTy->getElementType(); 3172 Type *DstElemTy = DstFVTy->getElementType(); 3173 assert((DL.getTypeSizeInBits(SrcElemTy) == DL.getTypeSizeInBits(DstElemTy)) && 3174 "Vector elements must have same size"); 3175 3176 // Do a direct cast if element types are castable. 3177 if (CastInst::isBitOrNoopPointerCastable(SrcElemTy, DstElemTy, DL)) { 3178 return Builder.CreateBitOrPointerCast(V, DstFVTy); 3179 } 3180 // V cannot be directly casted to desired vector type. 3181 // May happen when V is a floating point vector but DstVTy is a vector of 3182 // pointers or vice-versa. Handle this using a two-step bitcast using an 3183 // intermediate Integer type for the bitcast i.e. Ptr <-> Int <-> Float. 3184 assert((DstElemTy->isPointerTy() != SrcElemTy->isPointerTy()) && 3185 "Only one type should be a pointer type"); 3186 assert((DstElemTy->isFloatingPointTy() != SrcElemTy->isFloatingPointTy()) && 3187 "Only one type should be a floating point type"); 3188 Type *IntTy = 3189 IntegerType::getIntNTy(V->getContext(), DL.getTypeSizeInBits(SrcElemTy)); 3190 auto *VecIntTy = FixedVectorType::get(IntTy, VF); 3191 Value *CastVal = Builder.CreateBitOrPointerCast(V, VecIntTy); 3192 return Builder.CreateBitOrPointerCast(CastVal, DstFVTy); 3193 } 3194 3195 void InnerLoopVectorizer::emitMinimumIterationCountCheck(Loop *L, 3196 BasicBlock *Bypass) { 3197 Value *Count = getOrCreateTripCount(L); 3198 // Reuse existing vector loop preheader for TC checks. 3199 // Note that new preheader block is generated for vector loop. 3200 BasicBlock *const TCCheckBlock = LoopVectorPreHeader; 3201 IRBuilder<> Builder(TCCheckBlock->getTerminator()); 3202 3203 // Generate code to check if the loop's trip count is less than VF * UF, or 3204 // equal to it in case a scalar epilogue is required; this implies that the 3205 // vector trip count is zero. This check also covers the case where adding one 3206 // to the backedge-taken count overflowed leading to an incorrect trip count 3207 // of zero. In this case we will also jump to the scalar loop. 3208 auto P = Cost->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE 3209 : ICmpInst::ICMP_ULT; 3210 3211 // If tail is to be folded, vector loop takes care of all iterations. 3212 Value *CheckMinIters = Builder.getFalse(); 3213 if (!Cost->foldTailByMasking()) { 3214 Value *Step = 3215 createStepForVF(Builder, ConstantInt::get(Count->getType(), UF), VF); 3216 CheckMinIters = Builder.CreateICmp(P, Count, Step, "min.iters.check"); 3217 } 3218 // Create new preheader for vector loop. 3219 LoopVectorPreHeader = 3220 SplitBlock(TCCheckBlock, TCCheckBlock->getTerminator(), DT, LI, nullptr, 3221 "vector.ph"); 3222 3223 assert(DT->properlyDominates(DT->getNode(TCCheckBlock), 3224 DT->getNode(Bypass)->getIDom()) && 3225 "TC check is expected to dominate Bypass"); 3226 3227 // Update dominator for Bypass & LoopExit. 3228 DT->changeImmediateDominator(Bypass, TCCheckBlock); 3229 DT->changeImmediateDominator(LoopExitBlock, TCCheckBlock); 3230 3231 ReplaceInstWithInst( 3232 TCCheckBlock->getTerminator(), 3233 BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters)); 3234 LoopBypassBlocks.push_back(TCCheckBlock); 3235 } 3236 3237 BasicBlock *InnerLoopVectorizer::emitSCEVChecks(Loop *L, BasicBlock *Bypass) { 3238 3239 BasicBlock *const SCEVCheckBlock = 3240 RTChecks.emitSCEVChecks(L, Bypass, LoopVectorPreHeader, LoopExitBlock); 3241 if (!SCEVCheckBlock) 3242 return nullptr; 3243 3244 assert(!(SCEVCheckBlock->getParent()->hasOptSize() || 3245 (OptForSizeBasedOnProfile && 3246 Cost->Hints->getForce() != LoopVectorizeHints::FK_Enabled)) && 3247 "Cannot SCEV check stride or overflow when optimizing for size"); 3248 3249 3250 // Update dominator only if this is first RT check. 3251 if (LoopBypassBlocks.empty()) { 3252 DT->changeImmediateDominator(Bypass, SCEVCheckBlock); 3253 DT->changeImmediateDominator(LoopExitBlock, SCEVCheckBlock); 3254 } 3255 3256 LoopBypassBlocks.push_back(SCEVCheckBlock); 3257 AddedSafetyChecks = true; 3258 return SCEVCheckBlock; 3259 } 3260 3261 BasicBlock *InnerLoopVectorizer::emitMemRuntimeChecks(Loop *L, 3262 BasicBlock *Bypass) { 3263 // VPlan-native path does not do any analysis for runtime checks currently. 3264 if (EnableVPlanNativePath) 3265 return nullptr; 3266 3267 BasicBlock *const MemCheckBlock = 3268 RTChecks.emitMemRuntimeChecks(L, Bypass, LoopVectorPreHeader); 3269 3270 // Check if we generated code that checks in runtime if arrays overlap. We put 3271 // the checks into a separate block to make the more common case of few 3272 // elements faster. 3273 if (!MemCheckBlock) 3274 return nullptr; 3275 3276 if (MemCheckBlock->getParent()->hasOptSize() || OptForSizeBasedOnProfile) { 3277 assert(Cost->Hints->getForce() == LoopVectorizeHints::FK_Enabled && 3278 "Cannot emit memory checks when optimizing for size, unless forced " 3279 "to vectorize."); 3280 ORE->emit([&]() { 3281 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationCodeSize", 3282 L->getStartLoc(), L->getHeader()) 3283 << "Code-size may be reduced by not forcing " 3284 "vectorization, or by source-code modifications " 3285 "eliminating the need for runtime checks " 3286 "(e.g., adding 'restrict')."; 3287 }); 3288 } 3289 3290 LoopBypassBlocks.push_back(MemCheckBlock); 3291 3292 AddedSafetyChecks = true; 3293 3294 // We currently don't use LoopVersioning for the actual loop cloning but we 3295 // still use it to add the noalias metadata. 3296 LVer = std::make_unique<LoopVersioning>( 3297 *Legal->getLAI(), 3298 Legal->getLAI()->getRuntimePointerChecking()->getChecks(), OrigLoop, LI, 3299 DT, PSE.getSE()); 3300 LVer->prepareNoAliasMetadata(); 3301 return MemCheckBlock; 3302 } 3303 3304 Value *InnerLoopVectorizer::emitTransformedIndex( 3305 IRBuilder<> &B, Value *Index, ScalarEvolution *SE, const DataLayout &DL, 3306 const InductionDescriptor &ID) const { 3307 3308 SCEVExpander Exp(*SE, DL, "induction"); 3309 auto Step = ID.getStep(); 3310 auto StartValue = ID.getStartValue(); 3311 assert(Index->getType() == Step->getType() && 3312 "Index type does not match StepValue type"); 3313 3314 // Note: the IR at this point is broken. We cannot use SE to create any new 3315 // SCEV and then expand it, hoping that SCEV's simplification will give us 3316 // a more optimal code. Unfortunately, attempt of doing so on invalid IR may 3317 // lead to various SCEV crashes. So all we can do is to use builder and rely 3318 // on InstCombine for future simplifications. Here we handle some trivial 3319 // cases only. 3320 auto CreateAdd = [&B](Value *X, Value *Y) { 3321 assert(X->getType() == Y->getType() && "Types don't match!"); 3322 if (auto *CX = dyn_cast<ConstantInt>(X)) 3323 if (CX->isZero()) 3324 return Y; 3325 if (auto *CY = dyn_cast<ConstantInt>(Y)) 3326 if (CY->isZero()) 3327 return X; 3328 return B.CreateAdd(X, Y); 3329 }; 3330 3331 auto CreateMul = [&B](Value *X, Value *Y) { 3332 assert(X->getType() == Y->getType() && "Types don't match!"); 3333 if (auto *CX = dyn_cast<ConstantInt>(X)) 3334 if (CX->isOne()) 3335 return Y; 3336 if (auto *CY = dyn_cast<ConstantInt>(Y)) 3337 if (CY->isOne()) 3338 return X; 3339 return B.CreateMul(X, Y); 3340 }; 3341 3342 // Get a suitable insert point for SCEV expansion. For blocks in the vector 3343 // loop, choose the end of the vector loop header (=LoopVectorBody), because 3344 // the DomTree is not kept up-to-date for additional blocks generated in the 3345 // vector loop. By using the header as insertion point, we guarantee that the 3346 // expanded instructions dominate all their uses. 3347 auto GetInsertPoint = [this, &B]() { 3348 BasicBlock *InsertBB = B.GetInsertPoint()->getParent(); 3349 if (InsertBB != LoopVectorBody && 3350 LI->getLoopFor(LoopVectorBody) == LI->getLoopFor(InsertBB)) 3351 return LoopVectorBody->getTerminator(); 3352 return &*B.GetInsertPoint(); 3353 }; 3354 3355 switch (ID.getKind()) { 3356 case InductionDescriptor::IK_IntInduction: { 3357 assert(Index->getType() == StartValue->getType() && 3358 "Index type does not match StartValue type"); 3359 if (ID.getConstIntStepValue() && ID.getConstIntStepValue()->isMinusOne()) 3360 return B.CreateSub(StartValue, Index); 3361 auto *Offset = CreateMul( 3362 Index, Exp.expandCodeFor(Step, Index->getType(), GetInsertPoint())); 3363 return CreateAdd(StartValue, Offset); 3364 } 3365 case InductionDescriptor::IK_PtrInduction: { 3366 assert(isa<SCEVConstant>(Step) && 3367 "Expected constant step for pointer induction"); 3368 return B.CreateGEP( 3369 StartValue->getType()->getPointerElementType(), StartValue, 3370 CreateMul(Index, 3371 Exp.expandCodeFor(Step, Index->getType(), GetInsertPoint()))); 3372 } 3373 case InductionDescriptor::IK_FpInduction: { 3374 assert(Step->getType()->isFloatingPointTy() && "Expected FP Step value"); 3375 auto InductionBinOp = ID.getInductionBinOp(); 3376 assert(InductionBinOp && 3377 (InductionBinOp->getOpcode() == Instruction::FAdd || 3378 InductionBinOp->getOpcode() == Instruction::FSub) && 3379 "Original bin op should be defined for FP induction"); 3380 3381 Value *StepValue = cast<SCEVUnknown>(Step)->getValue(); 3382 Value *MulExp = B.CreateFMul(StepValue, Index); 3383 return B.CreateBinOp(InductionBinOp->getOpcode(), StartValue, MulExp, 3384 "induction"); 3385 } 3386 case InductionDescriptor::IK_NoInduction: 3387 return nullptr; 3388 } 3389 llvm_unreachable("invalid enum"); 3390 } 3391 3392 Loop *InnerLoopVectorizer::createVectorLoopSkeleton(StringRef Prefix) { 3393 LoopScalarBody = OrigLoop->getHeader(); 3394 LoopVectorPreHeader = OrigLoop->getLoopPreheader(); 3395 LoopExitBlock = OrigLoop->getUniqueExitBlock(); 3396 assert(LoopExitBlock && "Must have an exit block"); 3397 assert(LoopVectorPreHeader && "Invalid loop structure"); 3398 3399 LoopMiddleBlock = 3400 SplitBlock(LoopVectorPreHeader, LoopVectorPreHeader->getTerminator(), DT, 3401 LI, nullptr, Twine(Prefix) + "middle.block"); 3402 LoopScalarPreHeader = 3403 SplitBlock(LoopMiddleBlock, LoopMiddleBlock->getTerminator(), DT, LI, 3404 nullptr, Twine(Prefix) + "scalar.ph"); 3405 3406 // Set up branch from middle block to the exit and scalar preheader blocks. 3407 // completeLoopSkeleton will update the condition to use an iteration check, 3408 // if required to decide whether to execute the remainder. 3409 BranchInst *BrInst = 3410 BranchInst::Create(LoopExitBlock, LoopScalarPreHeader, Builder.getTrue()); 3411 auto *ScalarLatchTerm = OrigLoop->getLoopLatch()->getTerminator(); 3412 BrInst->setDebugLoc(ScalarLatchTerm->getDebugLoc()); 3413 ReplaceInstWithInst(LoopMiddleBlock->getTerminator(), BrInst); 3414 3415 // We intentionally don't let SplitBlock to update LoopInfo since 3416 // LoopVectorBody should belong to another loop than LoopVectorPreHeader. 3417 // LoopVectorBody is explicitly added to the correct place few lines later. 3418 LoopVectorBody = 3419 SplitBlock(LoopVectorPreHeader, LoopVectorPreHeader->getTerminator(), DT, 3420 nullptr, nullptr, Twine(Prefix) + "vector.body"); 3421 3422 // Update dominator for loop exit. 3423 DT->changeImmediateDominator(LoopExitBlock, LoopMiddleBlock); 3424 3425 // Create and register the new vector loop. 3426 Loop *Lp = LI->AllocateLoop(); 3427 Loop *ParentLoop = OrigLoop->getParentLoop(); 3428 3429 // Insert the new loop into the loop nest and register the new basic blocks 3430 // before calling any utilities such as SCEV that require valid LoopInfo. 3431 if (ParentLoop) { 3432 ParentLoop->addChildLoop(Lp); 3433 } else { 3434 LI->addTopLevelLoop(Lp); 3435 } 3436 Lp->addBasicBlockToLoop(LoopVectorBody, *LI); 3437 return Lp; 3438 } 3439 3440 void InnerLoopVectorizer::createInductionResumeValues( 3441 Loop *L, Value *VectorTripCount, 3442 std::pair<BasicBlock *, Value *> AdditionalBypass) { 3443 assert(VectorTripCount && L && "Expected valid arguments"); 3444 assert(((AdditionalBypass.first && AdditionalBypass.second) || 3445 (!AdditionalBypass.first && !AdditionalBypass.second)) && 3446 "Inconsistent information about additional bypass."); 3447 // We are going to resume the execution of the scalar loop. 3448 // Go over all of the induction variables that we found and fix the 3449 // PHIs that are left in the scalar version of the loop. 3450 // The starting values of PHI nodes depend on the counter of the last 3451 // iteration in the vectorized loop. 3452 // If we come from a bypass edge then we need to start from the original 3453 // start value. 3454 for (auto &InductionEntry : Legal->getInductionVars()) { 3455 PHINode *OrigPhi = InductionEntry.first; 3456 InductionDescriptor II = InductionEntry.second; 3457 3458 // Create phi nodes to merge from the backedge-taken check block. 3459 PHINode *BCResumeVal = 3460 PHINode::Create(OrigPhi->getType(), 3, "bc.resume.val", 3461 LoopScalarPreHeader->getTerminator()); 3462 // Copy original phi DL over to the new one. 3463 BCResumeVal->setDebugLoc(OrigPhi->getDebugLoc()); 3464 Value *&EndValue = IVEndValues[OrigPhi]; 3465 Value *EndValueFromAdditionalBypass = AdditionalBypass.second; 3466 if (OrigPhi == OldInduction) { 3467 // We know what the end value is. 3468 EndValue = VectorTripCount; 3469 } else { 3470 IRBuilder<> B(L->getLoopPreheader()->getTerminator()); 3471 3472 // Fast-math-flags propagate from the original induction instruction. 3473 if (II.getInductionBinOp() && isa<FPMathOperator>(II.getInductionBinOp())) 3474 B.setFastMathFlags(II.getInductionBinOp()->getFastMathFlags()); 3475 3476 Type *StepType = II.getStep()->getType(); 3477 Instruction::CastOps CastOp = 3478 CastInst::getCastOpcode(VectorTripCount, true, StepType, true); 3479 Value *CRD = B.CreateCast(CastOp, VectorTripCount, StepType, "cast.crd"); 3480 const DataLayout &DL = LoopScalarBody->getModule()->getDataLayout(); 3481 EndValue = emitTransformedIndex(B, CRD, PSE.getSE(), DL, II); 3482 EndValue->setName("ind.end"); 3483 3484 // Compute the end value for the additional bypass (if applicable). 3485 if (AdditionalBypass.first) { 3486 B.SetInsertPoint(&(*AdditionalBypass.first->getFirstInsertionPt())); 3487 CastOp = CastInst::getCastOpcode(AdditionalBypass.second, true, 3488 StepType, true); 3489 CRD = 3490 B.CreateCast(CastOp, AdditionalBypass.second, StepType, "cast.crd"); 3491 EndValueFromAdditionalBypass = 3492 emitTransformedIndex(B, CRD, PSE.getSE(), DL, II); 3493 EndValueFromAdditionalBypass->setName("ind.end"); 3494 } 3495 } 3496 // The new PHI merges the original incoming value, in case of a bypass, 3497 // or the value at the end of the vectorized loop. 3498 BCResumeVal->addIncoming(EndValue, LoopMiddleBlock); 3499 3500 // Fix the scalar body counter (PHI node). 3501 // The old induction's phi node in the scalar body needs the truncated 3502 // value. 3503 for (BasicBlock *BB : LoopBypassBlocks) 3504 BCResumeVal->addIncoming(II.getStartValue(), BB); 3505 3506 if (AdditionalBypass.first) 3507 BCResumeVal->setIncomingValueForBlock(AdditionalBypass.first, 3508 EndValueFromAdditionalBypass); 3509 3510 OrigPhi->setIncomingValueForBlock(LoopScalarPreHeader, BCResumeVal); 3511 } 3512 } 3513 3514 BasicBlock *InnerLoopVectorizer::completeLoopSkeleton(Loop *L, 3515 MDNode *OrigLoopID) { 3516 assert(L && "Expected valid loop."); 3517 3518 // The trip counts should be cached by now. 3519 Value *Count = getOrCreateTripCount(L); 3520 Value *VectorTripCount = getOrCreateVectorTripCount(L); 3521 3522 auto *ScalarLatchTerm = OrigLoop->getLoopLatch()->getTerminator(); 3523 3524 // Add a check in the middle block to see if we have completed 3525 // all of the iterations in the first vector loop. 3526 // If (N - N%VF) == N, then we *don't* need to run the remainder. 3527 // If tail is to be folded, we know we don't need to run the remainder. 3528 if (!Cost->foldTailByMasking()) { 3529 Instruction *CmpN = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ, 3530 Count, VectorTripCount, "cmp.n", 3531 LoopMiddleBlock->getTerminator()); 3532 3533 // Here we use the same DebugLoc as the scalar loop latch terminator instead 3534 // of the corresponding compare because they may have ended up with 3535 // different line numbers and we want to avoid awkward line stepping while 3536 // debugging. Eg. if the compare has got a line number inside the loop. 3537 CmpN->setDebugLoc(ScalarLatchTerm->getDebugLoc()); 3538 cast<BranchInst>(LoopMiddleBlock->getTerminator())->setCondition(CmpN); 3539 } 3540 3541 // Get ready to start creating new instructions into the vectorized body. 3542 assert(LoopVectorPreHeader == L->getLoopPreheader() && 3543 "Inconsistent vector loop preheader"); 3544 Builder.SetInsertPoint(&*LoopVectorBody->getFirstInsertionPt()); 3545 3546 Optional<MDNode *> VectorizedLoopID = 3547 makeFollowupLoopID(OrigLoopID, {LLVMLoopVectorizeFollowupAll, 3548 LLVMLoopVectorizeFollowupVectorized}); 3549 if (VectorizedLoopID.hasValue()) { 3550 L->setLoopID(VectorizedLoopID.getValue()); 3551 3552 // Do not setAlreadyVectorized if loop attributes have been defined 3553 // explicitly. 3554 return LoopVectorPreHeader; 3555 } 3556 3557 // Keep all loop hints from the original loop on the vector loop (we'll 3558 // replace the vectorizer-specific hints below). 3559 if (MDNode *LID = OrigLoop->getLoopID()) 3560 L->setLoopID(LID); 3561 3562 LoopVectorizeHints Hints(L, true, *ORE); 3563 Hints.setAlreadyVectorized(); 3564 3565 #ifdef EXPENSIVE_CHECKS 3566 assert(DT->verify(DominatorTree::VerificationLevel::Fast)); 3567 LI->verify(*DT); 3568 #endif 3569 3570 return LoopVectorPreHeader; 3571 } 3572 3573 BasicBlock *InnerLoopVectorizer::createVectorizedLoopSkeleton() { 3574 /* 3575 In this function we generate a new loop. The new loop will contain 3576 the vectorized instructions while the old loop will continue to run the 3577 scalar remainder. 3578 3579 [ ] <-- loop iteration number check. 3580 / | 3581 / v 3582 | [ ] <-- vector loop bypass (may consist of multiple blocks). 3583 | / | 3584 | / v 3585 || [ ] <-- vector pre header. 3586 |/ | 3587 | v 3588 | [ ] \ 3589 | [ ]_| <-- vector loop. 3590 | | 3591 | v 3592 | -[ ] <--- middle-block. 3593 | / | 3594 | / v 3595 -|- >[ ] <--- new preheader. 3596 | | 3597 | v 3598 | [ ] \ 3599 | [ ]_| <-- old scalar loop to handle remainder. 3600 \ | 3601 \ v 3602 >[ ] <-- exit block. 3603 ... 3604 */ 3605 3606 // Get the metadata of the original loop before it gets modified. 3607 MDNode *OrigLoopID = OrigLoop->getLoopID(); 3608 3609 // Create an empty vector loop, and prepare basic blocks for the runtime 3610 // checks. 3611 Loop *Lp = createVectorLoopSkeleton(""); 3612 3613 // Now, compare the new count to zero. If it is zero skip the vector loop and 3614 // jump to the scalar loop. This check also covers the case where the 3615 // backedge-taken count is uint##_max: adding one to it will overflow leading 3616 // to an incorrect trip count of zero. In this (rare) case we will also jump 3617 // to the scalar loop. 3618 emitMinimumIterationCountCheck(Lp, LoopScalarPreHeader); 3619 3620 // Generate the code to check any assumptions that we've made for SCEV 3621 // expressions. 3622 emitSCEVChecks(Lp, LoopScalarPreHeader); 3623 3624 // Generate the code that checks in runtime if arrays overlap. We put the 3625 // checks into a separate block to make the more common case of few elements 3626 // faster. 3627 emitMemRuntimeChecks(Lp, LoopScalarPreHeader); 3628 3629 // Some loops have a single integer induction variable, while other loops 3630 // don't. One example is c++ iterators that often have multiple pointer 3631 // induction variables. In the code below we also support a case where we 3632 // don't have a single induction variable. 3633 // 3634 // We try to obtain an induction variable from the original loop as hard 3635 // as possible. However if we don't find one that: 3636 // - is an integer 3637 // - counts from zero, stepping by one 3638 // - is the size of the widest induction variable type 3639 // then we create a new one. 3640 OldInduction = Legal->getPrimaryInduction(); 3641 Type *IdxTy = Legal->getWidestInductionType(); 3642 Value *StartIdx = ConstantInt::get(IdxTy, 0); 3643 // The loop step is equal to the vectorization factor (num of SIMD elements) 3644 // times the unroll factor (num of SIMD instructions). 3645 Builder.SetInsertPoint(&*Lp->getHeader()->getFirstInsertionPt()); 3646 Value *Step = createStepForVF(Builder, ConstantInt::get(IdxTy, UF), VF); 3647 Value *CountRoundDown = getOrCreateVectorTripCount(Lp); 3648 Induction = 3649 createInductionVariable(Lp, StartIdx, CountRoundDown, Step, 3650 getDebugLocFromInstOrOperands(OldInduction)); 3651 3652 // Emit phis for the new starting index of the scalar loop. 3653 createInductionResumeValues(Lp, CountRoundDown); 3654 3655 return completeLoopSkeleton(Lp, OrigLoopID); 3656 } 3657 3658 // Fix up external users of the induction variable. At this point, we are 3659 // in LCSSA form, with all external PHIs that use the IV having one input value, 3660 // coming from the remainder loop. We need those PHIs to also have a correct 3661 // value for the IV when arriving directly from the middle block. 3662 void InnerLoopVectorizer::fixupIVUsers(PHINode *OrigPhi, 3663 const InductionDescriptor &II, 3664 Value *CountRoundDown, Value *EndValue, 3665 BasicBlock *MiddleBlock) { 3666 // There are two kinds of external IV usages - those that use the value 3667 // computed in the last iteration (the PHI) and those that use the penultimate 3668 // value (the value that feeds into the phi from the loop latch). 3669 // We allow both, but they, obviously, have different values. 3670 3671 assert(OrigLoop->getUniqueExitBlock() && "Expected a single exit block"); 3672 3673 DenseMap<Value *, Value *> MissingVals; 3674 3675 // An external user of the last iteration's value should see the value that 3676 // the remainder loop uses to initialize its own IV. 3677 Value *PostInc = OrigPhi->getIncomingValueForBlock(OrigLoop->getLoopLatch()); 3678 for (User *U : PostInc->users()) { 3679 Instruction *UI = cast<Instruction>(U); 3680 if (!OrigLoop->contains(UI)) { 3681 assert(isa<PHINode>(UI) && "Expected LCSSA form"); 3682 MissingVals[UI] = EndValue; 3683 } 3684 } 3685 3686 // An external user of the penultimate value need to see EndValue - Step. 3687 // The simplest way to get this is to recompute it from the constituent SCEVs, 3688 // that is Start + (Step * (CRD - 1)). 3689 for (User *U : OrigPhi->users()) { 3690 auto *UI = cast<Instruction>(U); 3691 if (!OrigLoop->contains(UI)) { 3692 const DataLayout &DL = 3693 OrigLoop->getHeader()->getModule()->getDataLayout(); 3694 assert(isa<PHINode>(UI) && "Expected LCSSA form"); 3695 3696 IRBuilder<> B(MiddleBlock->getTerminator()); 3697 3698 // Fast-math-flags propagate from the original induction instruction. 3699 if (II.getInductionBinOp() && isa<FPMathOperator>(II.getInductionBinOp())) 3700 B.setFastMathFlags(II.getInductionBinOp()->getFastMathFlags()); 3701 3702 Value *CountMinusOne = B.CreateSub( 3703 CountRoundDown, ConstantInt::get(CountRoundDown->getType(), 1)); 3704 Value *CMO = 3705 !II.getStep()->getType()->isIntegerTy() 3706 ? B.CreateCast(Instruction::SIToFP, CountMinusOne, 3707 II.getStep()->getType()) 3708 : B.CreateSExtOrTrunc(CountMinusOne, II.getStep()->getType()); 3709 CMO->setName("cast.cmo"); 3710 Value *Escape = emitTransformedIndex(B, CMO, PSE.getSE(), DL, II); 3711 Escape->setName("ind.escape"); 3712 MissingVals[UI] = Escape; 3713 } 3714 } 3715 3716 for (auto &I : MissingVals) { 3717 PHINode *PHI = cast<PHINode>(I.first); 3718 // One corner case we have to handle is two IVs "chasing" each-other, 3719 // that is %IV2 = phi [...], [ %IV1, %latch ] 3720 // In this case, if IV1 has an external use, we need to avoid adding both 3721 // "last value of IV1" and "penultimate value of IV2". So, verify that we 3722 // don't already have an incoming value for the middle block. 3723 if (PHI->getBasicBlockIndex(MiddleBlock) == -1) 3724 PHI->addIncoming(I.second, MiddleBlock); 3725 } 3726 } 3727 3728 namespace { 3729 3730 struct CSEDenseMapInfo { 3731 static bool canHandle(const Instruction *I) { 3732 return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) || 3733 isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I); 3734 } 3735 3736 static inline Instruction *getEmptyKey() { 3737 return DenseMapInfo<Instruction *>::getEmptyKey(); 3738 } 3739 3740 static inline Instruction *getTombstoneKey() { 3741 return DenseMapInfo<Instruction *>::getTombstoneKey(); 3742 } 3743 3744 static unsigned getHashValue(const Instruction *I) { 3745 assert(canHandle(I) && "Unknown instruction!"); 3746 return hash_combine(I->getOpcode(), hash_combine_range(I->value_op_begin(), 3747 I->value_op_end())); 3748 } 3749 3750 static bool isEqual(const Instruction *LHS, const Instruction *RHS) { 3751 if (LHS == getEmptyKey() || RHS == getEmptyKey() || 3752 LHS == getTombstoneKey() || RHS == getTombstoneKey()) 3753 return LHS == RHS; 3754 return LHS->isIdenticalTo(RHS); 3755 } 3756 }; 3757 3758 } // end anonymous namespace 3759 3760 ///Perform cse of induction variable instructions. 3761 static void cse(BasicBlock *BB) { 3762 // Perform simple cse. 3763 SmallDenseMap<Instruction *, Instruction *, 4, CSEDenseMapInfo> CSEMap; 3764 for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) { 3765 Instruction *In = &*I++; 3766 3767 if (!CSEDenseMapInfo::canHandle(In)) 3768 continue; 3769 3770 // Check if we can replace this instruction with any of the 3771 // visited instructions. 3772 if (Instruction *V = CSEMap.lookup(In)) { 3773 In->replaceAllUsesWith(V); 3774 In->eraseFromParent(); 3775 continue; 3776 } 3777 3778 CSEMap[In] = In; 3779 } 3780 } 3781 3782 InstructionCost 3783 LoopVectorizationCostModel::getVectorCallCost(CallInst *CI, ElementCount VF, 3784 bool &NeedToScalarize) const { 3785 Function *F = CI->getCalledFunction(); 3786 Type *ScalarRetTy = CI->getType(); 3787 SmallVector<Type *, 4> Tys, ScalarTys; 3788 for (auto &ArgOp : CI->arg_operands()) 3789 ScalarTys.push_back(ArgOp->getType()); 3790 3791 // Estimate cost of scalarized vector call. The source operands are assumed 3792 // to be vectors, so we need to extract individual elements from there, 3793 // execute VF scalar calls, and then gather the result into the vector return 3794 // value. 3795 InstructionCost ScalarCallCost = 3796 TTI.getCallInstrCost(F, ScalarRetTy, ScalarTys, TTI::TCK_RecipThroughput); 3797 if (VF.isScalar()) 3798 return ScalarCallCost; 3799 3800 // Compute corresponding vector type for return value and arguments. 3801 Type *RetTy = ToVectorTy(ScalarRetTy, VF); 3802 for (Type *ScalarTy : ScalarTys) 3803 Tys.push_back(ToVectorTy(ScalarTy, VF)); 3804 3805 // Compute costs of unpacking argument values for the scalar calls and 3806 // packing the return values to a vector. 3807 InstructionCost ScalarizationCost = getScalarizationOverhead(CI, VF); 3808 3809 InstructionCost Cost = 3810 ScalarCallCost * VF.getKnownMinValue() + ScalarizationCost; 3811 3812 // If we can't emit a vector call for this function, then the currently found 3813 // cost is the cost we need to return. 3814 NeedToScalarize = true; 3815 VFShape Shape = VFShape::get(*CI, VF, false /*HasGlobalPred*/); 3816 Function *VecFunc = VFDatabase(*CI).getVectorizedFunction(Shape); 3817 3818 if (!TLI || CI->isNoBuiltin() || !VecFunc) 3819 return Cost; 3820 3821 // If the corresponding vector cost is cheaper, return its cost. 3822 InstructionCost VectorCallCost = 3823 TTI.getCallInstrCost(nullptr, RetTy, Tys, TTI::TCK_RecipThroughput); 3824 if (VectorCallCost < Cost) { 3825 NeedToScalarize = false; 3826 Cost = VectorCallCost; 3827 } 3828 return Cost; 3829 } 3830 3831 static Type *MaybeVectorizeType(Type *Elt, ElementCount VF) { 3832 if (VF.isScalar() || (!Elt->isIntOrPtrTy() && !Elt->isFloatingPointTy())) 3833 return Elt; 3834 return VectorType::get(Elt, VF); 3835 } 3836 3837 InstructionCost 3838 LoopVectorizationCostModel::getVectorIntrinsicCost(CallInst *CI, 3839 ElementCount VF) const { 3840 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 3841 assert(ID && "Expected intrinsic call!"); 3842 Type *RetTy = MaybeVectorizeType(CI->getType(), VF); 3843 FastMathFlags FMF; 3844 if (auto *FPMO = dyn_cast<FPMathOperator>(CI)) 3845 FMF = FPMO->getFastMathFlags(); 3846 3847 SmallVector<const Value *> Arguments(CI->arg_begin(), CI->arg_end()); 3848 FunctionType *FTy = CI->getCalledFunction()->getFunctionType(); 3849 SmallVector<Type *> ParamTys; 3850 std::transform(FTy->param_begin(), FTy->param_end(), 3851 std::back_inserter(ParamTys), 3852 [&](Type *Ty) { return MaybeVectorizeType(Ty, VF); }); 3853 3854 IntrinsicCostAttributes CostAttrs(ID, RetTy, Arguments, ParamTys, FMF, 3855 dyn_cast<IntrinsicInst>(CI)); 3856 return TTI.getIntrinsicInstrCost(CostAttrs, 3857 TargetTransformInfo::TCK_RecipThroughput); 3858 } 3859 3860 static Type *smallestIntegerVectorType(Type *T1, Type *T2) { 3861 auto *I1 = cast<IntegerType>(cast<VectorType>(T1)->getElementType()); 3862 auto *I2 = cast<IntegerType>(cast<VectorType>(T2)->getElementType()); 3863 return I1->getBitWidth() < I2->getBitWidth() ? T1 : T2; 3864 } 3865 3866 static Type *largestIntegerVectorType(Type *T1, Type *T2) { 3867 auto *I1 = cast<IntegerType>(cast<VectorType>(T1)->getElementType()); 3868 auto *I2 = cast<IntegerType>(cast<VectorType>(T2)->getElementType()); 3869 return I1->getBitWidth() > I2->getBitWidth() ? T1 : T2; 3870 } 3871 3872 void InnerLoopVectorizer::truncateToMinimalBitwidths(VPTransformState &State) { 3873 // For every instruction `I` in MinBWs, truncate the operands, create a 3874 // truncated version of `I` and reextend its result. InstCombine runs 3875 // later and will remove any ext/trunc pairs. 3876 SmallPtrSet<Value *, 4> Erased; 3877 for (const auto &KV : Cost->getMinimalBitwidths()) { 3878 // If the value wasn't vectorized, we must maintain the original scalar 3879 // type. The absence of the value from State indicates that it 3880 // wasn't vectorized. 3881 VPValue *Def = State.Plan->getVPValue(KV.first); 3882 if (!State.hasAnyVectorValue(Def)) 3883 continue; 3884 for (unsigned Part = 0; Part < UF; ++Part) { 3885 Value *I = State.get(Def, Part); 3886 if (Erased.count(I) || I->use_empty() || !isa<Instruction>(I)) 3887 continue; 3888 Type *OriginalTy = I->getType(); 3889 Type *ScalarTruncatedTy = 3890 IntegerType::get(OriginalTy->getContext(), KV.second); 3891 auto *TruncatedTy = FixedVectorType::get( 3892 ScalarTruncatedTy, 3893 cast<FixedVectorType>(OriginalTy)->getNumElements()); 3894 if (TruncatedTy == OriginalTy) 3895 continue; 3896 3897 IRBuilder<> B(cast<Instruction>(I)); 3898 auto ShrinkOperand = [&](Value *V) -> Value * { 3899 if (auto *ZI = dyn_cast<ZExtInst>(V)) 3900 if (ZI->getSrcTy() == TruncatedTy) 3901 return ZI->getOperand(0); 3902 return B.CreateZExtOrTrunc(V, TruncatedTy); 3903 }; 3904 3905 // The actual instruction modification depends on the instruction type, 3906 // unfortunately. 3907 Value *NewI = nullptr; 3908 if (auto *BO = dyn_cast<BinaryOperator>(I)) { 3909 NewI = B.CreateBinOp(BO->getOpcode(), ShrinkOperand(BO->getOperand(0)), 3910 ShrinkOperand(BO->getOperand(1))); 3911 3912 // Any wrapping introduced by shrinking this operation shouldn't be 3913 // considered undefined behavior. So, we can't unconditionally copy 3914 // arithmetic wrapping flags to NewI. 3915 cast<BinaryOperator>(NewI)->copyIRFlags(I, /*IncludeWrapFlags=*/false); 3916 } else if (auto *CI = dyn_cast<ICmpInst>(I)) { 3917 NewI = 3918 B.CreateICmp(CI->getPredicate(), ShrinkOperand(CI->getOperand(0)), 3919 ShrinkOperand(CI->getOperand(1))); 3920 } else if (auto *SI = dyn_cast<SelectInst>(I)) { 3921 NewI = B.CreateSelect(SI->getCondition(), 3922 ShrinkOperand(SI->getTrueValue()), 3923 ShrinkOperand(SI->getFalseValue())); 3924 } else if (auto *CI = dyn_cast<CastInst>(I)) { 3925 switch (CI->getOpcode()) { 3926 default: 3927 llvm_unreachable("Unhandled cast!"); 3928 case Instruction::Trunc: 3929 NewI = ShrinkOperand(CI->getOperand(0)); 3930 break; 3931 case Instruction::SExt: 3932 NewI = B.CreateSExtOrTrunc( 3933 CI->getOperand(0), 3934 smallestIntegerVectorType(OriginalTy, TruncatedTy)); 3935 break; 3936 case Instruction::ZExt: 3937 NewI = B.CreateZExtOrTrunc( 3938 CI->getOperand(0), 3939 smallestIntegerVectorType(OriginalTy, TruncatedTy)); 3940 break; 3941 } 3942 } else if (auto *SI = dyn_cast<ShuffleVectorInst>(I)) { 3943 auto Elements0 = cast<FixedVectorType>(SI->getOperand(0)->getType()) 3944 ->getNumElements(); 3945 auto *O0 = B.CreateZExtOrTrunc( 3946 SI->getOperand(0), 3947 FixedVectorType::get(ScalarTruncatedTy, Elements0)); 3948 auto Elements1 = cast<FixedVectorType>(SI->getOperand(1)->getType()) 3949 ->getNumElements(); 3950 auto *O1 = B.CreateZExtOrTrunc( 3951 SI->getOperand(1), 3952 FixedVectorType::get(ScalarTruncatedTy, Elements1)); 3953 3954 NewI = B.CreateShuffleVector(O0, O1, SI->getShuffleMask()); 3955 } else if (isa<LoadInst>(I) || isa<PHINode>(I)) { 3956 // Don't do anything with the operands, just extend the result. 3957 continue; 3958 } else if (auto *IE = dyn_cast<InsertElementInst>(I)) { 3959 auto Elements = cast<FixedVectorType>(IE->getOperand(0)->getType()) 3960 ->getNumElements(); 3961 auto *O0 = B.CreateZExtOrTrunc( 3962 IE->getOperand(0), 3963 FixedVectorType::get(ScalarTruncatedTy, Elements)); 3964 auto *O1 = B.CreateZExtOrTrunc(IE->getOperand(1), ScalarTruncatedTy); 3965 NewI = B.CreateInsertElement(O0, O1, IE->getOperand(2)); 3966 } else if (auto *EE = dyn_cast<ExtractElementInst>(I)) { 3967 auto Elements = cast<FixedVectorType>(EE->getOperand(0)->getType()) 3968 ->getNumElements(); 3969 auto *O0 = B.CreateZExtOrTrunc( 3970 EE->getOperand(0), 3971 FixedVectorType::get(ScalarTruncatedTy, Elements)); 3972 NewI = B.CreateExtractElement(O0, EE->getOperand(2)); 3973 } else { 3974 // If we don't know what to do, be conservative and don't do anything. 3975 continue; 3976 } 3977 3978 // Lastly, extend the result. 3979 NewI->takeName(cast<Instruction>(I)); 3980 Value *Res = B.CreateZExtOrTrunc(NewI, OriginalTy); 3981 I->replaceAllUsesWith(Res); 3982 cast<Instruction>(I)->eraseFromParent(); 3983 Erased.insert(I); 3984 State.reset(Def, Res, Part); 3985 } 3986 } 3987 3988 // We'll have created a bunch of ZExts that are now parentless. Clean up. 3989 for (const auto &KV : Cost->getMinimalBitwidths()) { 3990 // If the value wasn't vectorized, we must maintain the original scalar 3991 // type. The absence of the value from State indicates that it 3992 // wasn't vectorized. 3993 VPValue *Def = State.Plan->getVPValue(KV.first); 3994 if (!State.hasAnyVectorValue(Def)) 3995 continue; 3996 for (unsigned Part = 0; Part < UF; ++Part) { 3997 Value *I = State.get(Def, Part); 3998 ZExtInst *Inst = dyn_cast<ZExtInst>(I); 3999 if (Inst && Inst->use_empty()) { 4000 Value *NewI = Inst->getOperand(0); 4001 Inst->eraseFromParent(); 4002 State.reset(Def, NewI, Part); 4003 } 4004 } 4005 } 4006 } 4007 4008 void InnerLoopVectorizer::fixVectorizedLoop(VPTransformState &State) { 4009 // Insert truncates and extends for any truncated instructions as hints to 4010 // InstCombine. 4011 if (VF.isVector()) 4012 truncateToMinimalBitwidths(State); 4013 4014 // Fix widened non-induction PHIs by setting up the PHI operands. 4015 if (OrigPHIsToFix.size()) { 4016 assert(EnableVPlanNativePath && 4017 "Unexpected non-induction PHIs for fixup in non VPlan-native path"); 4018 fixNonInductionPHIs(State); 4019 } 4020 4021 // At this point every instruction in the original loop is widened to a 4022 // vector form. Now we need to fix the recurrences in the loop. These PHI 4023 // nodes are currently empty because we did not want to introduce cycles. 4024 // This is the second stage of vectorizing recurrences. 4025 fixCrossIterationPHIs(State); 4026 4027 // Forget the original basic block. 4028 PSE.getSE()->forgetLoop(OrigLoop); 4029 4030 // Fix-up external users of the induction variables. 4031 for (auto &Entry : Legal->getInductionVars()) 4032 fixupIVUsers(Entry.first, Entry.second, 4033 getOrCreateVectorTripCount(LI->getLoopFor(LoopVectorBody)), 4034 IVEndValues[Entry.first], LoopMiddleBlock); 4035 4036 fixLCSSAPHIs(State); 4037 for (Instruction *PI : PredicatedInstructions) 4038 sinkScalarOperands(&*PI); 4039 4040 // Remove redundant induction instructions. 4041 cse(LoopVectorBody); 4042 4043 // Set/update profile weights for the vector and remainder loops as original 4044 // loop iterations are now distributed among them. Note that original loop 4045 // represented by LoopScalarBody becomes remainder loop after vectorization. 4046 // 4047 // For cases like foldTailByMasking() and requiresScalarEpiloque() we may 4048 // end up getting slightly roughened result but that should be OK since 4049 // profile is not inherently precise anyway. Note also possible bypass of 4050 // vector code caused by legality checks is ignored, assigning all the weight 4051 // to the vector loop, optimistically. 4052 // 4053 // For scalable vectorization we can't know at compile time how many iterations 4054 // of the loop are handled in one vector iteration, so instead assume a pessimistic 4055 // vscale of '1'. 4056 setProfileInfoAfterUnrolling( 4057 LI->getLoopFor(LoopScalarBody), LI->getLoopFor(LoopVectorBody), 4058 LI->getLoopFor(LoopScalarBody), VF.getKnownMinValue() * UF); 4059 } 4060 4061 void InnerLoopVectorizer::fixCrossIterationPHIs(VPTransformState &State) { 4062 // In order to support recurrences we need to be able to vectorize Phi nodes. 4063 // Phi nodes have cycles, so we need to vectorize them in two stages. This is 4064 // stage #2: We now need to fix the recurrences by adding incoming edges to 4065 // the currently empty PHI nodes. At this point every instruction in the 4066 // original loop is widened to a vector form so we can use them to construct 4067 // the incoming edges. 4068 for (PHINode &Phi : OrigLoop->getHeader()->phis()) { 4069 // Handle first-order recurrences and reductions that need to be fixed. 4070 if (Legal->isFirstOrderRecurrence(&Phi)) 4071 fixFirstOrderRecurrence(&Phi, State); 4072 else if (Legal->isReductionVariable(&Phi)) 4073 fixReduction(&Phi, State); 4074 } 4075 } 4076 4077 void InnerLoopVectorizer::fixFirstOrderRecurrence(PHINode *Phi, 4078 VPTransformState &State) { 4079 // This is the second phase of vectorizing first-order recurrences. An 4080 // overview of the transformation is described below. Suppose we have the 4081 // following loop. 4082 // 4083 // for (int i = 0; i < n; ++i) 4084 // b[i] = a[i] - a[i - 1]; 4085 // 4086 // There is a first-order recurrence on "a". For this loop, the shorthand 4087 // scalar IR looks like: 4088 // 4089 // scalar.ph: 4090 // s_init = a[-1] 4091 // br scalar.body 4092 // 4093 // scalar.body: 4094 // i = phi [0, scalar.ph], [i+1, scalar.body] 4095 // s1 = phi [s_init, scalar.ph], [s2, scalar.body] 4096 // s2 = a[i] 4097 // b[i] = s2 - s1 4098 // br cond, scalar.body, ... 4099 // 4100 // In this example, s1 is a recurrence because it's value depends on the 4101 // previous iteration. In the first phase of vectorization, we created a 4102 // temporary value for s1. We now complete the vectorization and produce the 4103 // shorthand vector IR shown below (for VF = 4, UF = 1). 4104 // 4105 // vector.ph: 4106 // v_init = vector(..., ..., ..., a[-1]) 4107 // br vector.body 4108 // 4109 // vector.body 4110 // i = phi [0, vector.ph], [i+4, vector.body] 4111 // v1 = phi [v_init, vector.ph], [v2, vector.body] 4112 // v2 = a[i, i+1, i+2, i+3]; 4113 // v3 = vector(v1(3), v2(0, 1, 2)) 4114 // b[i, i+1, i+2, i+3] = v2 - v3 4115 // br cond, vector.body, middle.block 4116 // 4117 // middle.block: 4118 // x = v2(3) 4119 // br scalar.ph 4120 // 4121 // scalar.ph: 4122 // s_init = phi [x, middle.block], [a[-1], otherwise] 4123 // br scalar.body 4124 // 4125 // After execution completes the vector loop, we extract the next value of 4126 // the recurrence (x) to use as the initial value in the scalar loop. 4127 4128 // Get the original loop preheader and single loop latch. 4129 auto *Preheader = OrigLoop->getLoopPreheader(); 4130 auto *Latch = OrigLoop->getLoopLatch(); 4131 4132 // Get the initial and previous values of the scalar recurrence. 4133 auto *ScalarInit = Phi->getIncomingValueForBlock(Preheader); 4134 auto *Previous = Phi->getIncomingValueForBlock(Latch); 4135 4136 // Create a vector from the initial value. 4137 auto *VectorInit = ScalarInit; 4138 if (VF.isVector()) { 4139 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 4140 assert(!VF.isScalable() && "VF is assumed to be non scalable."); 4141 VectorInit = Builder.CreateInsertElement( 4142 PoisonValue::get(VectorType::get(VectorInit->getType(), VF)), VectorInit, 4143 Builder.getInt32(VF.getKnownMinValue() - 1), "vector.recur.init"); 4144 } 4145 4146 VPValue *PhiDef = State.Plan->getVPValue(Phi); 4147 VPValue *PreviousDef = State.Plan->getVPValue(Previous); 4148 // We constructed a temporary phi node in the first phase of vectorization. 4149 // This phi node will eventually be deleted. 4150 Builder.SetInsertPoint(cast<Instruction>(State.get(PhiDef, 0))); 4151 4152 // Create a phi node for the new recurrence. The current value will either be 4153 // the initial value inserted into a vector or loop-varying vector value. 4154 auto *VecPhi = Builder.CreatePHI(VectorInit->getType(), 2, "vector.recur"); 4155 VecPhi->addIncoming(VectorInit, LoopVectorPreHeader); 4156 4157 // Get the vectorized previous value of the last part UF - 1. It appears last 4158 // among all unrolled iterations, due to the order of their construction. 4159 Value *PreviousLastPart = State.get(PreviousDef, UF - 1); 4160 4161 // Find and set the insertion point after the previous value if it is an 4162 // instruction. 4163 BasicBlock::iterator InsertPt; 4164 // Note that the previous value may have been constant-folded so it is not 4165 // guaranteed to be an instruction in the vector loop. 4166 // FIXME: Loop invariant values do not form recurrences. We should deal with 4167 // them earlier. 4168 if (LI->getLoopFor(LoopVectorBody)->isLoopInvariant(PreviousLastPart)) 4169 InsertPt = LoopVectorBody->getFirstInsertionPt(); 4170 else { 4171 Instruction *PreviousInst = cast<Instruction>(PreviousLastPart); 4172 if (isa<PHINode>(PreviousLastPart)) 4173 // If the previous value is a phi node, we should insert after all the phi 4174 // nodes in the block containing the PHI to avoid breaking basic block 4175 // verification. Note that the basic block may be different to 4176 // LoopVectorBody, in case we predicate the loop. 4177 InsertPt = PreviousInst->getParent()->getFirstInsertionPt(); 4178 else 4179 InsertPt = ++PreviousInst->getIterator(); 4180 } 4181 Builder.SetInsertPoint(&*InsertPt); 4182 4183 // We will construct a vector for the recurrence by combining the values for 4184 // the current and previous iterations. This is the required shuffle mask. 4185 assert(!VF.isScalable()); 4186 SmallVector<int, 8> ShuffleMask(VF.getKnownMinValue()); 4187 ShuffleMask[0] = VF.getKnownMinValue() - 1; 4188 for (unsigned I = 1; I < VF.getKnownMinValue(); ++I) 4189 ShuffleMask[I] = I + VF.getKnownMinValue() - 1; 4190 4191 // The vector from which to take the initial value for the current iteration 4192 // (actual or unrolled). Initially, this is the vector phi node. 4193 Value *Incoming = VecPhi; 4194 4195 // Shuffle the current and previous vector and update the vector parts. 4196 for (unsigned Part = 0; Part < UF; ++Part) { 4197 Value *PreviousPart = State.get(PreviousDef, Part); 4198 Value *PhiPart = State.get(PhiDef, Part); 4199 auto *Shuffle = 4200 VF.isVector() 4201 ? Builder.CreateShuffleVector(Incoming, PreviousPart, ShuffleMask) 4202 : Incoming; 4203 PhiPart->replaceAllUsesWith(Shuffle); 4204 cast<Instruction>(PhiPart)->eraseFromParent(); 4205 State.reset(PhiDef, Shuffle, Part); 4206 Incoming = PreviousPart; 4207 } 4208 4209 // Fix the latch value of the new recurrence in the vector loop. 4210 VecPhi->addIncoming(Incoming, LI->getLoopFor(LoopVectorBody)->getLoopLatch()); 4211 4212 // Extract the last vector element in the middle block. This will be the 4213 // initial value for the recurrence when jumping to the scalar loop. 4214 auto *ExtractForScalar = Incoming; 4215 if (VF.isVector()) { 4216 Builder.SetInsertPoint(LoopMiddleBlock->getTerminator()); 4217 ExtractForScalar = Builder.CreateExtractElement( 4218 ExtractForScalar, Builder.getInt32(VF.getKnownMinValue() - 1), 4219 "vector.recur.extract"); 4220 } 4221 // Extract the second last element in the middle block if the 4222 // Phi is used outside the loop. We need to extract the phi itself 4223 // and not the last element (the phi update in the current iteration). This 4224 // will be the value when jumping to the exit block from the LoopMiddleBlock, 4225 // when the scalar loop is not run at all. 4226 Value *ExtractForPhiUsedOutsideLoop = nullptr; 4227 if (VF.isVector()) 4228 ExtractForPhiUsedOutsideLoop = Builder.CreateExtractElement( 4229 Incoming, Builder.getInt32(VF.getKnownMinValue() - 2), 4230 "vector.recur.extract.for.phi"); 4231 // When loop is unrolled without vectorizing, initialize 4232 // ExtractForPhiUsedOutsideLoop with the value just prior to unrolled value of 4233 // `Incoming`. This is analogous to the vectorized case above: extracting the 4234 // second last element when VF > 1. 4235 else if (UF > 1) 4236 ExtractForPhiUsedOutsideLoop = State.get(PreviousDef, UF - 2); 4237 4238 // Fix the initial value of the original recurrence in the scalar loop. 4239 Builder.SetInsertPoint(&*LoopScalarPreHeader->begin()); 4240 auto *Start = Builder.CreatePHI(Phi->getType(), 2, "scalar.recur.init"); 4241 for (auto *BB : predecessors(LoopScalarPreHeader)) { 4242 auto *Incoming = BB == LoopMiddleBlock ? ExtractForScalar : ScalarInit; 4243 Start->addIncoming(Incoming, BB); 4244 } 4245 4246 Phi->setIncomingValueForBlock(LoopScalarPreHeader, Start); 4247 Phi->setName("scalar.recur"); 4248 4249 // Finally, fix users of the recurrence outside the loop. The users will need 4250 // either the last value of the scalar recurrence or the last value of the 4251 // vector recurrence we extracted in the middle block. Since the loop is in 4252 // LCSSA form, we just need to find all the phi nodes for the original scalar 4253 // recurrence in the exit block, and then add an edge for the middle block. 4254 // Note that LCSSA does not imply single entry when the original scalar loop 4255 // had multiple exiting edges (as we always run the last iteration in the 4256 // scalar epilogue); in that case, the exiting path through middle will be 4257 // dynamically dead and the value picked for the phi doesn't matter. 4258 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) 4259 if (any_of(LCSSAPhi.incoming_values(), 4260 [Phi](Value *V) { return V == Phi; })) 4261 LCSSAPhi.addIncoming(ExtractForPhiUsedOutsideLoop, LoopMiddleBlock); 4262 } 4263 4264 static bool useOrderedReductions(RecurrenceDescriptor &RdxDesc) { 4265 return EnableStrictReductions && RdxDesc.isOrdered(); 4266 } 4267 4268 void InnerLoopVectorizer::fixReduction(PHINode *Phi, VPTransformState &State) { 4269 // Get it's reduction variable descriptor. 4270 assert(Legal->isReductionVariable(Phi) && 4271 "Unable to find the reduction variable"); 4272 RecurrenceDescriptor RdxDesc = Legal->getReductionVars()[Phi]; 4273 4274 RecurKind RK = RdxDesc.getRecurrenceKind(); 4275 TrackingVH<Value> ReductionStartValue = RdxDesc.getRecurrenceStartValue(); 4276 Instruction *LoopExitInst = RdxDesc.getLoopExitInstr(); 4277 setDebugLocFromInst(Builder, ReductionStartValue); 4278 bool IsInLoopReductionPhi = Cost->isInLoopReduction(Phi); 4279 4280 VPValue *LoopExitInstDef = State.Plan->getVPValue(LoopExitInst); 4281 // This is the vector-clone of the value that leaves the loop. 4282 Type *VecTy = State.get(LoopExitInstDef, 0)->getType(); 4283 4284 // Wrap flags are in general invalid after vectorization, clear them. 4285 clearReductionWrapFlags(RdxDesc, State); 4286 4287 // Fix the vector-loop phi. 4288 4289 // Reductions do not have to start at zero. They can start with 4290 // any loop invariant values. 4291 BasicBlock *OrigLatch = OrigLoop->getLoopLatch(); 4292 Value *OrigLoopVal = Phi->getIncomingValueForBlock(OrigLatch); 4293 BasicBlock *VectorLoopLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch(); 4294 4295 bool IsOrdered = State.VF.isVector() && IsInLoopReductionPhi && 4296 useOrderedReductions(RdxDesc); 4297 4298 for (unsigned Part = 0; Part < UF; ++Part) { 4299 if (IsOrdered && Part > 0) 4300 break; 4301 Value *VecRdxPhi = State.get(State.Plan->getVPValue(Phi), Part); 4302 Value *Val = State.get(State.Plan->getVPValue(OrigLoopVal), Part); 4303 if (IsOrdered) 4304 Val = State.get(State.Plan->getVPValue(OrigLoopVal), UF - 1); 4305 cast<PHINode>(VecRdxPhi)->addIncoming(Val, VectorLoopLatch); 4306 } 4307 4308 // Before each round, move the insertion point right between 4309 // the PHIs and the values we are going to write. 4310 // This allows us to write both PHINodes and the extractelement 4311 // instructions. 4312 Builder.SetInsertPoint(&*LoopMiddleBlock->getFirstInsertionPt()); 4313 4314 setDebugLocFromInst(Builder, LoopExitInst); 4315 4316 Type *PhiTy = Phi->getType(); 4317 // If tail is folded by masking, the vector value to leave the loop should be 4318 // a Select choosing between the vectorized LoopExitInst and vectorized Phi, 4319 // instead of the former. For an inloop reduction the reduction will already 4320 // be predicated, and does not need to be handled here. 4321 if (Cost->foldTailByMasking() && !IsInLoopReductionPhi) { 4322 for (unsigned Part = 0; Part < UF; ++Part) { 4323 Value *VecLoopExitInst = State.get(LoopExitInstDef, Part); 4324 Value *Sel = nullptr; 4325 for (User *U : VecLoopExitInst->users()) { 4326 if (isa<SelectInst>(U)) { 4327 assert(!Sel && "Reduction exit feeding two selects"); 4328 Sel = U; 4329 } else 4330 assert(isa<PHINode>(U) && "Reduction exit must feed Phi's or select"); 4331 } 4332 assert(Sel && "Reduction exit feeds no select"); 4333 State.reset(LoopExitInstDef, Sel, Part); 4334 4335 // If the target can create a predicated operator for the reduction at no 4336 // extra cost in the loop (for example a predicated vadd), it can be 4337 // cheaper for the select to remain in the loop than be sunk out of it, 4338 // and so use the select value for the phi instead of the old 4339 // LoopExitValue. 4340 if (PreferPredicatedReductionSelect || 4341 TTI->preferPredicatedReductionSelect( 4342 RdxDesc.getOpcode(), PhiTy, 4343 TargetTransformInfo::ReductionFlags())) { 4344 auto *VecRdxPhi = 4345 cast<PHINode>(State.get(State.Plan->getVPValue(Phi), Part)); 4346 VecRdxPhi->setIncomingValueForBlock( 4347 LI->getLoopFor(LoopVectorBody)->getLoopLatch(), Sel); 4348 } 4349 } 4350 } 4351 4352 // If the vector reduction can be performed in a smaller type, we truncate 4353 // then extend the loop exit value to enable InstCombine to evaluate the 4354 // entire expression in the smaller type. 4355 if (VF.isVector() && PhiTy != RdxDesc.getRecurrenceType()) { 4356 assert(!IsInLoopReductionPhi && "Unexpected truncated inloop reduction!"); 4357 assert(!VF.isScalable() && "scalable vectors not yet supported."); 4358 Type *RdxVecTy = VectorType::get(RdxDesc.getRecurrenceType(), VF); 4359 Builder.SetInsertPoint( 4360 LI->getLoopFor(LoopVectorBody)->getLoopLatch()->getTerminator()); 4361 VectorParts RdxParts(UF); 4362 for (unsigned Part = 0; Part < UF; ++Part) { 4363 RdxParts[Part] = State.get(LoopExitInstDef, Part); 4364 Value *Trunc = Builder.CreateTrunc(RdxParts[Part], RdxVecTy); 4365 Value *Extnd = RdxDesc.isSigned() ? Builder.CreateSExt(Trunc, VecTy) 4366 : Builder.CreateZExt(Trunc, VecTy); 4367 for (Value::user_iterator UI = RdxParts[Part]->user_begin(); 4368 UI != RdxParts[Part]->user_end();) 4369 if (*UI != Trunc) { 4370 (*UI++)->replaceUsesOfWith(RdxParts[Part], Extnd); 4371 RdxParts[Part] = Extnd; 4372 } else { 4373 ++UI; 4374 } 4375 } 4376 Builder.SetInsertPoint(&*LoopMiddleBlock->getFirstInsertionPt()); 4377 for (unsigned Part = 0; Part < UF; ++Part) { 4378 RdxParts[Part] = Builder.CreateTrunc(RdxParts[Part], RdxVecTy); 4379 State.reset(LoopExitInstDef, RdxParts[Part], Part); 4380 } 4381 } 4382 4383 // Reduce all of the unrolled parts into a single vector. 4384 Value *ReducedPartRdx = State.get(LoopExitInstDef, 0); 4385 unsigned Op = RecurrenceDescriptor::getOpcode(RK); 4386 4387 // The middle block terminator has already been assigned a DebugLoc here (the 4388 // OrigLoop's single latch terminator). We want the whole middle block to 4389 // appear to execute on this line because: (a) it is all compiler generated, 4390 // (b) these instructions are always executed after evaluating the latch 4391 // conditional branch, and (c) other passes may add new predecessors which 4392 // terminate on this line. This is the easiest way to ensure we don't 4393 // accidentally cause an extra step back into the loop while debugging. 4394 setDebugLocFromInst(Builder, LoopMiddleBlock->getTerminator()); 4395 if (IsOrdered) 4396 ReducedPartRdx = State.get(LoopExitInstDef, UF - 1); 4397 else { 4398 // Floating-point operations should have some FMF to enable the reduction. 4399 IRBuilderBase::FastMathFlagGuard FMFG(Builder); 4400 Builder.setFastMathFlags(RdxDesc.getFastMathFlags()); 4401 for (unsigned Part = 1; Part < UF; ++Part) { 4402 Value *RdxPart = State.get(LoopExitInstDef, Part); 4403 if (Op != Instruction::ICmp && Op != Instruction::FCmp) { 4404 ReducedPartRdx = Builder.CreateBinOp( 4405 (Instruction::BinaryOps)Op, RdxPart, ReducedPartRdx, "bin.rdx"); 4406 } else { 4407 ReducedPartRdx = createMinMaxOp(Builder, RK, ReducedPartRdx, RdxPart); 4408 } 4409 } 4410 } 4411 4412 // Create the reduction after the loop. Note that inloop reductions create the 4413 // target reduction in the loop using a Reduction recipe. 4414 if (VF.isVector() && !IsInLoopReductionPhi) { 4415 ReducedPartRdx = 4416 createTargetReduction(Builder, TTI, RdxDesc, ReducedPartRdx); 4417 // If the reduction can be performed in a smaller type, we need to extend 4418 // the reduction to the wider type before we branch to the original loop. 4419 if (PhiTy != RdxDesc.getRecurrenceType()) 4420 ReducedPartRdx = RdxDesc.isSigned() 4421 ? Builder.CreateSExt(ReducedPartRdx, PhiTy) 4422 : Builder.CreateZExt(ReducedPartRdx, PhiTy); 4423 } 4424 4425 // Create a phi node that merges control-flow from the backedge-taken check 4426 // block and the middle block. 4427 PHINode *BCBlockPhi = PHINode::Create(PhiTy, 2, "bc.merge.rdx", 4428 LoopScalarPreHeader->getTerminator()); 4429 for (unsigned I = 0, E = LoopBypassBlocks.size(); I != E; ++I) 4430 BCBlockPhi->addIncoming(ReductionStartValue, LoopBypassBlocks[I]); 4431 BCBlockPhi->addIncoming(ReducedPartRdx, LoopMiddleBlock); 4432 4433 // Now, we need to fix the users of the reduction variable 4434 // inside and outside of the scalar remainder loop. 4435 4436 // We know that the loop is in LCSSA form. We need to update the PHI nodes 4437 // in the exit blocks. See comment on analogous loop in 4438 // fixFirstOrderRecurrence for a more complete explaination of the logic. 4439 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) 4440 if (any_of(LCSSAPhi.incoming_values(), 4441 [LoopExitInst](Value *V) { return V == LoopExitInst; })) 4442 LCSSAPhi.addIncoming(ReducedPartRdx, LoopMiddleBlock); 4443 4444 // Fix the scalar loop reduction variable with the incoming reduction sum 4445 // from the vector body and from the backedge value. 4446 int IncomingEdgeBlockIdx = 4447 Phi->getBasicBlockIndex(OrigLoop->getLoopLatch()); 4448 assert(IncomingEdgeBlockIdx >= 0 && "Invalid block index"); 4449 // Pick the other block. 4450 int SelfEdgeBlockIdx = (IncomingEdgeBlockIdx ? 0 : 1); 4451 Phi->setIncomingValue(SelfEdgeBlockIdx, BCBlockPhi); 4452 Phi->setIncomingValue(IncomingEdgeBlockIdx, LoopExitInst); 4453 } 4454 4455 void InnerLoopVectorizer::clearReductionWrapFlags(RecurrenceDescriptor &RdxDesc, 4456 VPTransformState &State) { 4457 RecurKind RK = RdxDesc.getRecurrenceKind(); 4458 if (RK != RecurKind::Add && RK != RecurKind::Mul) 4459 return; 4460 4461 Instruction *LoopExitInstr = RdxDesc.getLoopExitInstr(); 4462 assert(LoopExitInstr && "null loop exit instruction"); 4463 SmallVector<Instruction *, 8> Worklist; 4464 SmallPtrSet<Instruction *, 8> Visited; 4465 Worklist.push_back(LoopExitInstr); 4466 Visited.insert(LoopExitInstr); 4467 4468 while (!Worklist.empty()) { 4469 Instruction *Cur = Worklist.pop_back_val(); 4470 if (isa<OverflowingBinaryOperator>(Cur)) 4471 for (unsigned Part = 0; Part < UF; ++Part) { 4472 Value *V = State.get(State.Plan->getVPValue(Cur), Part); 4473 cast<Instruction>(V)->dropPoisonGeneratingFlags(); 4474 } 4475 4476 for (User *U : Cur->users()) { 4477 Instruction *UI = cast<Instruction>(U); 4478 if ((Cur != LoopExitInstr || OrigLoop->contains(UI->getParent())) && 4479 Visited.insert(UI).second) 4480 Worklist.push_back(UI); 4481 } 4482 } 4483 } 4484 4485 void InnerLoopVectorizer::fixLCSSAPHIs(VPTransformState &State) { 4486 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) { 4487 if (LCSSAPhi.getBasicBlockIndex(LoopMiddleBlock) != -1) 4488 // Some phis were already hand updated by the reduction and recurrence 4489 // code above, leave them alone. 4490 continue; 4491 4492 auto *IncomingValue = LCSSAPhi.getIncomingValue(0); 4493 // Non-instruction incoming values will have only one value. 4494 4495 VPLane Lane = VPLane::getFirstLane(); 4496 if (isa<Instruction>(IncomingValue) && 4497 !Cost->isUniformAfterVectorization(cast<Instruction>(IncomingValue), 4498 VF)) 4499 Lane = VPLane::getLastLaneForVF(VF); 4500 4501 // Can be a loop invariant incoming value or the last scalar value to be 4502 // extracted from the vectorized loop. 4503 Builder.SetInsertPoint(LoopMiddleBlock->getTerminator()); 4504 Value *lastIncomingValue = 4505 OrigLoop->isLoopInvariant(IncomingValue) 4506 ? IncomingValue 4507 : State.get(State.Plan->getVPValue(IncomingValue), 4508 VPIteration(UF - 1, Lane)); 4509 LCSSAPhi.addIncoming(lastIncomingValue, LoopMiddleBlock); 4510 } 4511 } 4512 4513 void InnerLoopVectorizer::sinkScalarOperands(Instruction *PredInst) { 4514 // The basic block and loop containing the predicated instruction. 4515 auto *PredBB = PredInst->getParent(); 4516 auto *VectorLoop = LI->getLoopFor(PredBB); 4517 4518 // Initialize a worklist with the operands of the predicated instruction. 4519 SetVector<Value *> Worklist(PredInst->op_begin(), PredInst->op_end()); 4520 4521 // Holds instructions that we need to analyze again. An instruction may be 4522 // reanalyzed if we don't yet know if we can sink it or not. 4523 SmallVector<Instruction *, 8> InstsToReanalyze; 4524 4525 // Returns true if a given use occurs in the predicated block. Phi nodes use 4526 // their operands in their corresponding predecessor blocks. 4527 auto isBlockOfUsePredicated = [&](Use &U) -> bool { 4528 auto *I = cast<Instruction>(U.getUser()); 4529 BasicBlock *BB = I->getParent(); 4530 if (auto *Phi = dyn_cast<PHINode>(I)) 4531 BB = Phi->getIncomingBlock( 4532 PHINode::getIncomingValueNumForOperand(U.getOperandNo())); 4533 return BB == PredBB; 4534 }; 4535 4536 // Iteratively sink the scalarized operands of the predicated instruction 4537 // into the block we created for it. When an instruction is sunk, it's 4538 // operands are then added to the worklist. The algorithm ends after one pass 4539 // through the worklist doesn't sink a single instruction. 4540 bool Changed; 4541 do { 4542 // Add the instructions that need to be reanalyzed to the worklist, and 4543 // reset the changed indicator. 4544 Worklist.insert(InstsToReanalyze.begin(), InstsToReanalyze.end()); 4545 InstsToReanalyze.clear(); 4546 Changed = false; 4547 4548 while (!Worklist.empty()) { 4549 auto *I = dyn_cast<Instruction>(Worklist.pop_back_val()); 4550 4551 // We can't sink an instruction if it is a phi node, is already in the 4552 // predicated block, is not in the loop, or may have side effects. 4553 if (!I || isa<PHINode>(I) || I->getParent() == PredBB || 4554 !VectorLoop->contains(I) || I->mayHaveSideEffects()) 4555 continue; 4556 4557 // It's legal to sink the instruction if all its uses occur in the 4558 // predicated block. Otherwise, there's nothing to do yet, and we may 4559 // need to reanalyze the instruction. 4560 if (!llvm::all_of(I->uses(), isBlockOfUsePredicated)) { 4561 InstsToReanalyze.push_back(I); 4562 continue; 4563 } 4564 4565 // Move the instruction to the beginning of the predicated block, and add 4566 // it's operands to the worklist. 4567 I->moveBefore(&*PredBB->getFirstInsertionPt()); 4568 Worklist.insert(I->op_begin(), I->op_end()); 4569 4570 // The sinking may have enabled other instructions to be sunk, so we will 4571 // need to iterate. 4572 Changed = true; 4573 } 4574 } while (Changed); 4575 } 4576 4577 void InnerLoopVectorizer::fixNonInductionPHIs(VPTransformState &State) { 4578 for (PHINode *OrigPhi : OrigPHIsToFix) { 4579 VPWidenPHIRecipe *VPPhi = 4580 cast<VPWidenPHIRecipe>(State.Plan->getVPValue(OrigPhi)); 4581 PHINode *NewPhi = cast<PHINode>(State.get(VPPhi, 0)); 4582 // Make sure the builder has a valid insert point. 4583 Builder.SetInsertPoint(NewPhi); 4584 for (unsigned i = 0; i < VPPhi->getNumOperands(); ++i) { 4585 VPValue *Inc = VPPhi->getIncomingValue(i); 4586 VPBasicBlock *VPBB = VPPhi->getIncomingBlock(i); 4587 NewPhi->addIncoming(State.get(Inc, 0), State.CFG.VPBB2IRBB[VPBB]); 4588 } 4589 } 4590 } 4591 4592 void InnerLoopVectorizer::widenGEP(GetElementPtrInst *GEP, VPValue *VPDef, 4593 VPUser &Operands, unsigned UF, 4594 ElementCount VF, bool IsPtrLoopInvariant, 4595 SmallBitVector &IsIndexLoopInvariant, 4596 VPTransformState &State) { 4597 // Construct a vector GEP by widening the operands of the scalar GEP as 4598 // necessary. We mark the vector GEP 'inbounds' if appropriate. A GEP 4599 // results in a vector of pointers when at least one operand of the GEP 4600 // is vector-typed. Thus, to keep the representation compact, we only use 4601 // vector-typed operands for loop-varying values. 4602 4603 if (VF.isVector() && IsPtrLoopInvariant && IsIndexLoopInvariant.all()) { 4604 // If we are vectorizing, but the GEP has only loop-invariant operands, 4605 // the GEP we build (by only using vector-typed operands for 4606 // loop-varying values) would be a scalar pointer. Thus, to ensure we 4607 // produce a vector of pointers, we need to either arbitrarily pick an 4608 // operand to broadcast, or broadcast a clone of the original GEP. 4609 // Here, we broadcast a clone of the original. 4610 // 4611 // TODO: If at some point we decide to scalarize instructions having 4612 // loop-invariant operands, this special case will no longer be 4613 // required. We would add the scalarization decision to 4614 // collectLoopScalars() and teach getVectorValue() to broadcast 4615 // the lane-zero scalar value. 4616 auto *Clone = Builder.Insert(GEP->clone()); 4617 for (unsigned Part = 0; Part < UF; ++Part) { 4618 Value *EntryPart = Builder.CreateVectorSplat(VF, Clone); 4619 State.set(VPDef, EntryPart, Part); 4620 addMetadata(EntryPart, GEP); 4621 } 4622 } else { 4623 // If the GEP has at least one loop-varying operand, we are sure to 4624 // produce a vector of pointers. But if we are only unrolling, we want 4625 // to produce a scalar GEP for each unroll part. Thus, the GEP we 4626 // produce with the code below will be scalar (if VF == 1) or vector 4627 // (otherwise). Note that for the unroll-only case, we still maintain 4628 // values in the vector mapping with initVector, as we do for other 4629 // instructions. 4630 for (unsigned Part = 0; Part < UF; ++Part) { 4631 // The pointer operand of the new GEP. If it's loop-invariant, we 4632 // won't broadcast it. 4633 auto *Ptr = IsPtrLoopInvariant 4634 ? State.get(Operands.getOperand(0), VPIteration(0, 0)) 4635 : State.get(Operands.getOperand(0), Part); 4636 4637 // Collect all the indices for the new GEP. If any index is 4638 // loop-invariant, we won't broadcast it. 4639 SmallVector<Value *, 4> Indices; 4640 for (unsigned I = 1, E = Operands.getNumOperands(); I < E; I++) { 4641 VPValue *Operand = Operands.getOperand(I); 4642 if (IsIndexLoopInvariant[I - 1]) 4643 Indices.push_back(State.get(Operand, VPIteration(0, 0))); 4644 else 4645 Indices.push_back(State.get(Operand, Part)); 4646 } 4647 4648 // Create the new GEP. Note that this GEP may be a scalar if VF == 1, 4649 // but it should be a vector, otherwise. 4650 auto *NewGEP = 4651 GEP->isInBounds() 4652 ? Builder.CreateInBoundsGEP(GEP->getSourceElementType(), Ptr, 4653 Indices) 4654 : Builder.CreateGEP(GEP->getSourceElementType(), Ptr, Indices); 4655 assert((VF.isScalar() || NewGEP->getType()->isVectorTy()) && 4656 "NewGEP is not a pointer vector"); 4657 State.set(VPDef, NewGEP, Part); 4658 addMetadata(NewGEP, GEP); 4659 } 4660 } 4661 } 4662 4663 void InnerLoopVectorizer::widenPHIInstruction(Instruction *PN, 4664 RecurrenceDescriptor *RdxDesc, 4665 VPWidenPHIRecipe *PhiR, 4666 VPTransformState &State) { 4667 PHINode *P = cast<PHINode>(PN); 4668 if (EnableVPlanNativePath) { 4669 // Currently we enter here in the VPlan-native path for non-induction 4670 // PHIs where all control flow is uniform. We simply widen these PHIs. 4671 // Create a vector phi with no operands - the vector phi operands will be 4672 // set at the end of vector code generation. 4673 Type *VecTy = (State.VF.isScalar()) 4674 ? PN->getType() 4675 : VectorType::get(PN->getType(), State.VF); 4676 Value *VecPhi = Builder.CreatePHI(VecTy, PN->getNumOperands(), "vec.phi"); 4677 State.set(PhiR, VecPhi, 0); 4678 OrigPHIsToFix.push_back(P); 4679 4680 return; 4681 } 4682 4683 assert(PN->getParent() == OrigLoop->getHeader() && 4684 "Non-header phis should have been handled elsewhere"); 4685 4686 VPValue *StartVPV = PhiR->getStartValue(); 4687 Value *StartV = StartVPV ? StartVPV->getLiveInIRValue() : nullptr; 4688 // In order to support recurrences we need to be able to vectorize Phi nodes. 4689 // Phi nodes have cycles, so we need to vectorize them in two stages. This is 4690 // stage #1: We create a new vector PHI node with no incoming edges. We'll use 4691 // this value when we vectorize all of the instructions that use the PHI. 4692 if (RdxDesc || Legal->isFirstOrderRecurrence(P)) { 4693 Value *Iden = nullptr; 4694 bool ScalarPHI = 4695 (State.VF.isScalar()) || Cost->isInLoopReduction(cast<PHINode>(PN)); 4696 Type *VecTy = 4697 ScalarPHI ? PN->getType() : VectorType::get(PN->getType(), State.VF); 4698 4699 if (RdxDesc) { 4700 assert(Legal->isReductionVariable(P) && StartV && 4701 "RdxDesc should only be set for reduction variables; in that case " 4702 "a StartV is also required"); 4703 RecurKind RK = RdxDesc->getRecurrenceKind(); 4704 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(RK)) { 4705 // MinMax reduction have the start value as their identify. 4706 if (ScalarPHI) { 4707 Iden = StartV; 4708 } else { 4709 IRBuilderBase::InsertPointGuard IPBuilder(Builder); 4710 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 4711 StartV = Iden = 4712 Builder.CreateVectorSplat(State.VF, StartV, "minmax.ident"); 4713 } 4714 } else { 4715 Constant *IdenC = RecurrenceDescriptor::getRecurrenceIdentity( 4716 RK, VecTy->getScalarType(), RdxDesc->getFastMathFlags()); 4717 Iden = IdenC; 4718 4719 if (!ScalarPHI) { 4720 Iden = ConstantVector::getSplat(State.VF, IdenC); 4721 IRBuilderBase::InsertPointGuard IPBuilder(Builder); 4722 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator()); 4723 Constant *Zero = Builder.getInt32(0); 4724 StartV = Builder.CreateInsertElement(Iden, StartV, Zero); 4725 } 4726 } 4727 } 4728 4729 bool IsOrdered = State.VF.isVector() && 4730 Cost->isInLoopReduction(cast<PHINode>(PN)) && 4731 useOrderedReductions(*RdxDesc); 4732 4733 for (unsigned Part = 0; Part < State.UF; ++Part) { 4734 // This is phase one of vectorizing PHIs. 4735 if (Part > 0 && IsOrdered) 4736 return; 4737 Value *EntryPart = PHINode::Create( 4738 VecTy, 2, "vec.phi", &*LoopVectorBody->getFirstInsertionPt()); 4739 State.set(PhiR, EntryPart, Part); 4740 if (StartV) { 4741 // Make sure to add the reduction start value only to the 4742 // first unroll part. 4743 Value *StartVal = (Part == 0) ? StartV : Iden; 4744 cast<PHINode>(EntryPart)->addIncoming(StartVal, LoopVectorPreHeader); 4745 } 4746 } 4747 return; 4748 } 4749 4750 assert(!Legal->isReductionVariable(P) && 4751 "reductions should be handled above"); 4752 4753 setDebugLocFromInst(Builder, P); 4754 4755 // This PHINode must be an induction variable. 4756 // Make sure that we know about it. 4757 assert(Legal->getInductionVars().count(P) && "Not an induction variable"); 4758 4759 InductionDescriptor II = Legal->getInductionVars().lookup(P); 4760 const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout(); 4761 4762 // FIXME: The newly created binary instructions should contain nsw/nuw flags, 4763 // which can be found from the original scalar operations. 4764 switch (II.getKind()) { 4765 case InductionDescriptor::IK_NoInduction: 4766 llvm_unreachable("Unknown induction"); 4767 case InductionDescriptor::IK_IntInduction: 4768 case InductionDescriptor::IK_FpInduction: 4769 llvm_unreachable("Integer/fp induction is handled elsewhere."); 4770 case InductionDescriptor::IK_PtrInduction: { 4771 // Handle the pointer induction variable case. 4772 assert(P->getType()->isPointerTy() && "Unexpected type."); 4773 4774 if (Cost->isScalarAfterVectorization(P, State.VF)) { 4775 // This is the normalized GEP that starts counting at zero. 4776 Value *PtrInd = 4777 Builder.CreateSExtOrTrunc(Induction, II.getStep()->getType()); 4778 // Determine the number of scalars we need to generate for each unroll 4779 // iteration. If the instruction is uniform, we only need to generate the 4780 // first lane. Otherwise, we generate all VF values. 4781 bool IsUniform = Cost->isUniformAfterVectorization(P, State.VF); 4782 assert((IsUniform || !VF.isScalable()) && 4783 "Currently unsupported for scalable vectors"); 4784 unsigned Lanes = IsUniform ? 1 : State.VF.getFixedValue(); 4785 4786 for (unsigned Part = 0; Part < UF; ++Part) { 4787 Value *PartStart = createStepForVF( 4788 Builder, ConstantInt::get(PtrInd->getType(), Part), VF); 4789 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { 4790 Value *Idx = Builder.CreateAdd( 4791 PartStart, ConstantInt::get(PtrInd->getType(), Lane)); 4792 Value *GlobalIdx = Builder.CreateAdd(PtrInd, Idx); 4793 Value *SclrGep = 4794 emitTransformedIndex(Builder, GlobalIdx, PSE.getSE(), DL, II); 4795 SclrGep->setName("next.gep"); 4796 State.set(PhiR, SclrGep, VPIteration(Part, Lane)); 4797 } 4798 } 4799 return; 4800 } 4801 assert(isa<SCEVConstant>(II.getStep()) && 4802 "Induction step not a SCEV constant!"); 4803 Type *PhiType = II.getStep()->getType(); 4804 4805 // Build a pointer phi 4806 Value *ScalarStartValue = II.getStartValue(); 4807 Type *ScStValueType = ScalarStartValue->getType(); 4808 PHINode *NewPointerPhi = 4809 PHINode::Create(ScStValueType, 2, "pointer.phi", Induction); 4810 NewPointerPhi->addIncoming(ScalarStartValue, LoopVectorPreHeader); 4811 4812 // A pointer induction, performed by using a gep 4813 BasicBlock *LoopLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch(); 4814 Instruction *InductionLoc = LoopLatch->getTerminator(); 4815 const SCEV *ScalarStep = II.getStep(); 4816 SCEVExpander Exp(*PSE.getSE(), DL, "induction"); 4817 Value *ScalarStepValue = 4818 Exp.expandCodeFor(ScalarStep, PhiType, InductionLoc); 4819 Value *RuntimeVF = getRuntimeVF(Builder, PhiType, VF); 4820 Value *NumUnrolledElems = 4821 Builder.CreateMul(RuntimeVF, ConstantInt::get(PhiType, State.UF)); 4822 Value *InductionGEP = GetElementPtrInst::Create( 4823 ScStValueType->getPointerElementType(), NewPointerPhi, 4824 Builder.CreateMul(ScalarStepValue, NumUnrolledElems), "ptr.ind", 4825 InductionLoc); 4826 NewPointerPhi->addIncoming(InductionGEP, LoopLatch); 4827 4828 // Create UF many actual address geps that use the pointer 4829 // phi as base and a vectorized version of the step value 4830 // (<step*0, ..., step*N>) as offset. 4831 for (unsigned Part = 0; Part < State.UF; ++Part) { 4832 Type *VecPhiType = VectorType::get(PhiType, State.VF); 4833 Value *StartOffsetScalar = 4834 Builder.CreateMul(RuntimeVF, ConstantInt::get(PhiType, Part)); 4835 Value *StartOffset = 4836 Builder.CreateVectorSplat(State.VF, StartOffsetScalar); 4837 // Create a vector of consecutive numbers from zero to VF. 4838 StartOffset = 4839 Builder.CreateAdd(StartOffset, Builder.CreateStepVector(VecPhiType)); 4840 4841 Value *GEP = Builder.CreateGEP( 4842 ScStValueType->getPointerElementType(), NewPointerPhi, 4843 Builder.CreateMul( 4844 StartOffset, Builder.CreateVectorSplat(State.VF, ScalarStepValue), 4845 "vector.gep")); 4846 State.set(PhiR, GEP, Part); 4847 } 4848 } 4849 } 4850 } 4851 4852 /// A helper function for checking whether an integer division-related 4853 /// instruction may divide by zero (in which case it must be predicated if 4854 /// executed conditionally in the scalar code). 4855 /// TODO: It may be worthwhile to generalize and check isKnownNonZero(). 4856 /// Non-zero divisors that are non compile-time constants will not be 4857 /// converted into multiplication, so we will still end up scalarizing 4858 /// the division, but can do so w/o predication. 4859 static bool mayDivideByZero(Instruction &I) { 4860 assert((I.getOpcode() == Instruction::UDiv || 4861 I.getOpcode() == Instruction::SDiv || 4862 I.getOpcode() == Instruction::URem || 4863 I.getOpcode() == Instruction::SRem) && 4864 "Unexpected instruction"); 4865 Value *Divisor = I.getOperand(1); 4866 auto *CInt = dyn_cast<ConstantInt>(Divisor); 4867 return !CInt || CInt->isZero(); 4868 } 4869 4870 void InnerLoopVectorizer::widenInstruction(Instruction &I, VPValue *Def, 4871 VPUser &User, 4872 VPTransformState &State) { 4873 switch (I.getOpcode()) { 4874 case Instruction::Call: 4875 case Instruction::Br: 4876 case Instruction::PHI: 4877 case Instruction::GetElementPtr: 4878 case Instruction::Select: 4879 llvm_unreachable("This instruction is handled by a different recipe."); 4880 case Instruction::UDiv: 4881 case Instruction::SDiv: 4882 case Instruction::SRem: 4883 case Instruction::URem: 4884 case Instruction::Add: 4885 case Instruction::FAdd: 4886 case Instruction::Sub: 4887 case Instruction::FSub: 4888 case Instruction::FNeg: 4889 case Instruction::Mul: 4890 case Instruction::FMul: 4891 case Instruction::FDiv: 4892 case Instruction::FRem: 4893 case Instruction::Shl: 4894 case Instruction::LShr: 4895 case Instruction::AShr: 4896 case Instruction::And: 4897 case Instruction::Or: 4898 case Instruction::Xor: { 4899 // Just widen unops and binops. 4900 setDebugLocFromInst(Builder, &I); 4901 4902 for (unsigned Part = 0; Part < UF; ++Part) { 4903 SmallVector<Value *, 2> Ops; 4904 for (VPValue *VPOp : User.operands()) 4905 Ops.push_back(State.get(VPOp, Part)); 4906 4907 Value *V = Builder.CreateNAryOp(I.getOpcode(), Ops); 4908 4909 if (auto *VecOp = dyn_cast<Instruction>(V)) 4910 VecOp->copyIRFlags(&I); 4911 4912 // Use this vector value for all users of the original instruction. 4913 State.set(Def, V, Part); 4914 addMetadata(V, &I); 4915 } 4916 4917 break; 4918 } 4919 case Instruction::ICmp: 4920 case Instruction::FCmp: { 4921 // Widen compares. Generate vector compares. 4922 bool FCmp = (I.getOpcode() == Instruction::FCmp); 4923 auto *Cmp = cast<CmpInst>(&I); 4924 setDebugLocFromInst(Builder, Cmp); 4925 for (unsigned Part = 0; Part < UF; ++Part) { 4926 Value *A = State.get(User.getOperand(0), Part); 4927 Value *B = State.get(User.getOperand(1), Part); 4928 Value *C = nullptr; 4929 if (FCmp) { 4930 // Propagate fast math flags. 4931 IRBuilder<>::FastMathFlagGuard FMFG(Builder); 4932 Builder.setFastMathFlags(Cmp->getFastMathFlags()); 4933 C = Builder.CreateFCmp(Cmp->getPredicate(), A, B); 4934 } else { 4935 C = Builder.CreateICmp(Cmp->getPredicate(), A, B); 4936 } 4937 State.set(Def, C, Part); 4938 addMetadata(C, &I); 4939 } 4940 4941 break; 4942 } 4943 4944 case Instruction::ZExt: 4945 case Instruction::SExt: 4946 case Instruction::FPToUI: 4947 case Instruction::FPToSI: 4948 case Instruction::FPExt: 4949 case Instruction::PtrToInt: 4950 case Instruction::IntToPtr: 4951 case Instruction::SIToFP: 4952 case Instruction::UIToFP: 4953 case Instruction::Trunc: 4954 case Instruction::FPTrunc: 4955 case Instruction::BitCast: { 4956 auto *CI = cast<CastInst>(&I); 4957 setDebugLocFromInst(Builder, CI); 4958 4959 /// Vectorize casts. 4960 Type *DestTy = 4961 (VF.isScalar()) ? CI->getType() : VectorType::get(CI->getType(), VF); 4962 4963 for (unsigned Part = 0; Part < UF; ++Part) { 4964 Value *A = State.get(User.getOperand(0), Part); 4965 Value *Cast = Builder.CreateCast(CI->getOpcode(), A, DestTy); 4966 State.set(Def, Cast, Part); 4967 addMetadata(Cast, &I); 4968 } 4969 break; 4970 } 4971 default: 4972 // This instruction is not vectorized by simple widening. 4973 LLVM_DEBUG(dbgs() << "LV: Found an unhandled instruction: " << I); 4974 llvm_unreachable("Unhandled instruction!"); 4975 } // end of switch. 4976 } 4977 4978 void InnerLoopVectorizer::widenCallInstruction(CallInst &I, VPValue *Def, 4979 VPUser &ArgOperands, 4980 VPTransformState &State) { 4981 assert(!isa<DbgInfoIntrinsic>(I) && 4982 "DbgInfoIntrinsic should have been dropped during VPlan construction"); 4983 setDebugLocFromInst(Builder, &I); 4984 4985 Module *M = I.getParent()->getParent()->getParent(); 4986 auto *CI = cast<CallInst>(&I); 4987 4988 SmallVector<Type *, 4> Tys; 4989 for (Value *ArgOperand : CI->arg_operands()) 4990 Tys.push_back(ToVectorTy(ArgOperand->getType(), VF.getKnownMinValue())); 4991 4992 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 4993 4994 // The flag shows whether we use Intrinsic or a usual Call for vectorized 4995 // version of the instruction. 4996 // Is it beneficial to perform intrinsic call compared to lib call? 4997 bool NeedToScalarize = false; 4998 InstructionCost CallCost = Cost->getVectorCallCost(CI, VF, NeedToScalarize); 4999 InstructionCost IntrinsicCost = ID ? Cost->getVectorIntrinsicCost(CI, VF) : 0; 5000 bool UseVectorIntrinsic = ID && IntrinsicCost <= CallCost; 5001 assert((UseVectorIntrinsic || !NeedToScalarize) && 5002 "Instruction should be scalarized elsewhere."); 5003 assert((IntrinsicCost.isValid() || CallCost.isValid()) && 5004 "Either the intrinsic cost or vector call cost must be valid"); 5005 5006 for (unsigned Part = 0; Part < UF; ++Part) { 5007 SmallVector<Value *, 4> Args; 5008 for (auto &I : enumerate(ArgOperands.operands())) { 5009 // Some intrinsics have a scalar argument - don't replace it with a 5010 // vector. 5011 Value *Arg; 5012 if (!UseVectorIntrinsic || !hasVectorInstrinsicScalarOpd(ID, I.index())) 5013 Arg = State.get(I.value(), Part); 5014 else 5015 Arg = State.get(I.value(), VPIteration(0, 0)); 5016 Args.push_back(Arg); 5017 } 5018 5019 Function *VectorF; 5020 if (UseVectorIntrinsic) { 5021 // Use vector version of the intrinsic. 5022 Type *TysForDecl[] = {CI->getType()}; 5023 if (VF.isVector()) 5024 TysForDecl[0] = VectorType::get(CI->getType()->getScalarType(), VF); 5025 VectorF = Intrinsic::getDeclaration(M, ID, TysForDecl); 5026 assert(VectorF && "Can't retrieve vector intrinsic."); 5027 } else { 5028 // Use vector version of the function call. 5029 const VFShape Shape = VFShape::get(*CI, VF, false /*HasGlobalPred*/); 5030 #ifndef NDEBUG 5031 assert(VFDatabase(*CI).getVectorizedFunction(Shape) != nullptr && 5032 "Can't create vector function."); 5033 #endif 5034 VectorF = VFDatabase(*CI).getVectorizedFunction(Shape); 5035 } 5036 SmallVector<OperandBundleDef, 1> OpBundles; 5037 CI->getOperandBundlesAsDefs(OpBundles); 5038 CallInst *V = Builder.CreateCall(VectorF, Args, OpBundles); 5039 5040 if (isa<FPMathOperator>(V)) 5041 V->copyFastMathFlags(CI); 5042 5043 State.set(Def, V, Part); 5044 addMetadata(V, &I); 5045 } 5046 } 5047 5048 void InnerLoopVectorizer::widenSelectInstruction(SelectInst &I, VPValue *VPDef, 5049 VPUser &Operands, 5050 bool InvariantCond, 5051 VPTransformState &State) { 5052 setDebugLocFromInst(Builder, &I); 5053 5054 // The condition can be loop invariant but still defined inside the 5055 // loop. This means that we can't just use the original 'cond' value. 5056 // We have to take the 'vectorized' value and pick the first lane. 5057 // Instcombine will make this a no-op. 5058 auto *InvarCond = InvariantCond 5059 ? State.get(Operands.getOperand(0), VPIteration(0, 0)) 5060 : nullptr; 5061 5062 for (unsigned Part = 0; Part < UF; ++Part) { 5063 Value *Cond = 5064 InvarCond ? InvarCond : State.get(Operands.getOperand(0), Part); 5065 Value *Op0 = State.get(Operands.getOperand(1), Part); 5066 Value *Op1 = State.get(Operands.getOperand(2), Part); 5067 Value *Sel = Builder.CreateSelect(Cond, Op0, Op1); 5068 State.set(VPDef, Sel, Part); 5069 addMetadata(Sel, &I); 5070 } 5071 } 5072 5073 void LoopVectorizationCostModel::collectLoopScalars(ElementCount VF) { 5074 // We should not collect Scalars more than once per VF. Right now, this 5075 // function is called from collectUniformsAndScalars(), which already does 5076 // this check. Collecting Scalars for VF=1 does not make any sense. 5077 assert(VF.isVector() && Scalars.find(VF) == Scalars.end() && 5078 "This function should not be visited twice for the same VF"); 5079 5080 SmallSetVector<Instruction *, 8> Worklist; 5081 5082 // These sets are used to seed the analysis with pointers used by memory 5083 // accesses that will remain scalar. 5084 SmallSetVector<Instruction *, 8> ScalarPtrs; 5085 SmallPtrSet<Instruction *, 8> PossibleNonScalarPtrs; 5086 auto *Latch = TheLoop->getLoopLatch(); 5087 5088 // A helper that returns true if the use of Ptr by MemAccess will be scalar. 5089 // The pointer operands of loads and stores will be scalar as long as the 5090 // memory access is not a gather or scatter operation. The value operand of a 5091 // store will remain scalar if the store is scalarized. 5092 auto isScalarUse = [&](Instruction *MemAccess, Value *Ptr) { 5093 InstWidening WideningDecision = getWideningDecision(MemAccess, VF); 5094 assert(WideningDecision != CM_Unknown && 5095 "Widening decision should be ready at this moment"); 5096 if (auto *Store = dyn_cast<StoreInst>(MemAccess)) 5097 if (Ptr == Store->getValueOperand()) 5098 return WideningDecision == CM_Scalarize; 5099 assert(Ptr == getLoadStorePointerOperand(MemAccess) && 5100 "Ptr is neither a value or pointer operand"); 5101 return WideningDecision != CM_GatherScatter; 5102 }; 5103 5104 // A helper that returns true if the given value is a bitcast or 5105 // getelementptr instruction contained in the loop. 5106 auto isLoopVaryingBitCastOrGEP = [&](Value *V) { 5107 return ((isa<BitCastInst>(V) && V->getType()->isPointerTy()) || 5108 isa<GetElementPtrInst>(V)) && 5109 !TheLoop->isLoopInvariant(V); 5110 }; 5111 5112 auto isScalarPtrInduction = [&](Instruction *MemAccess, Value *Ptr) { 5113 if (!isa<PHINode>(Ptr) || 5114 !Legal->getInductionVars().count(cast<PHINode>(Ptr))) 5115 return false; 5116 auto &Induction = Legal->getInductionVars()[cast<PHINode>(Ptr)]; 5117 if (Induction.getKind() != InductionDescriptor::IK_PtrInduction) 5118 return false; 5119 return isScalarUse(MemAccess, Ptr); 5120 }; 5121 5122 // A helper that evaluates a memory access's use of a pointer. If the 5123 // pointer is actually the pointer induction of a loop, it is being 5124 // inserted into Worklist. If the use will be a scalar use, and the 5125 // pointer is only used by memory accesses, we place the pointer in 5126 // ScalarPtrs. Otherwise, the pointer is placed in PossibleNonScalarPtrs. 5127 auto evaluatePtrUse = [&](Instruction *MemAccess, Value *Ptr) { 5128 if (isScalarPtrInduction(MemAccess, Ptr)) { 5129 Worklist.insert(cast<Instruction>(Ptr)); 5130 Instruction *Update = cast<Instruction>( 5131 cast<PHINode>(Ptr)->getIncomingValueForBlock(Latch)); 5132 Worklist.insert(Update); 5133 LLVM_DEBUG(dbgs() << "LV: Found new scalar instruction: " << *Ptr 5134 << "\n"); 5135 LLVM_DEBUG(dbgs() << "LV: Found new scalar instruction: " << *Update 5136 << "\n"); 5137 return; 5138 } 5139 // We only care about bitcast and getelementptr instructions contained in 5140 // the loop. 5141 if (!isLoopVaryingBitCastOrGEP(Ptr)) 5142 return; 5143 5144 // If the pointer has already been identified as scalar (e.g., if it was 5145 // also identified as uniform), there's nothing to do. 5146 auto *I = cast<Instruction>(Ptr); 5147 if (Worklist.count(I)) 5148 return; 5149 5150 // If the use of the pointer will be a scalar use, and all users of the 5151 // pointer are memory accesses, place the pointer in ScalarPtrs. Otherwise, 5152 // place the pointer in PossibleNonScalarPtrs. 5153 if (isScalarUse(MemAccess, Ptr) && llvm::all_of(I->users(), [&](User *U) { 5154 return isa<LoadInst>(U) || isa<StoreInst>(U); 5155 })) 5156 ScalarPtrs.insert(I); 5157 else 5158 PossibleNonScalarPtrs.insert(I); 5159 }; 5160 5161 // We seed the scalars analysis with three classes of instructions: (1) 5162 // instructions marked uniform-after-vectorization and (2) bitcast, 5163 // getelementptr and (pointer) phi instructions used by memory accesses 5164 // requiring a scalar use. 5165 // 5166 // (1) Add to the worklist all instructions that have been identified as 5167 // uniform-after-vectorization. 5168 Worklist.insert(Uniforms[VF].begin(), Uniforms[VF].end()); 5169 5170 // (2) Add to the worklist all bitcast and getelementptr instructions used by 5171 // memory accesses requiring a scalar use. The pointer operands of loads and 5172 // stores will be scalar as long as the memory accesses is not a gather or 5173 // scatter operation. The value operand of a store will remain scalar if the 5174 // store is scalarized. 5175 for (auto *BB : TheLoop->blocks()) 5176 for (auto &I : *BB) { 5177 if (auto *Load = dyn_cast<LoadInst>(&I)) { 5178 evaluatePtrUse(Load, Load->getPointerOperand()); 5179 } else if (auto *Store = dyn_cast<StoreInst>(&I)) { 5180 evaluatePtrUse(Store, Store->getPointerOperand()); 5181 evaluatePtrUse(Store, Store->getValueOperand()); 5182 } 5183 } 5184 for (auto *I : ScalarPtrs) 5185 if (!PossibleNonScalarPtrs.count(I)) { 5186 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *I << "\n"); 5187 Worklist.insert(I); 5188 } 5189 5190 // Insert the forced scalars. 5191 // FIXME: Currently widenPHIInstruction() often creates a dead vector 5192 // induction variable when the PHI user is scalarized. 5193 auto ForcedScalar = ForcedScalars.find(VF); 5194 if (ForcedScalar != ForcedScalars.end()) 5195 for (auto *I : ForcedScalar->second) 5196 Worklist.insert(I); 5197 5198 // Expand the worklist by looking through any bitcasts and getelementptr 5199 // instructions we've already identified as scalar. This is similar to the 5200 // expansion step in collectLoopUniforms(); however, here we're only 5201 // expanding to include additional bitcasts and getelementptr instructions. 5202 unsigned Idx = 0; 5203 while (Idx != Worklist.size()) { 5204 Instruction *Dst = Worklist[Idx++]; 5205 if (!isLoopVaryingBitCastOrGEP(Dst->getOperand(0))) 5206 continue; 5207 auto *Src = cast<Instruction>(Dst->getOperand(0)); 5208 if (llvm::all_of(Src->users(), [&](User *U) -> bool { 5209 auto *J = cast<Instruction>(U); 5210 return !TheLoop->contains(J) || Worklist.count(J) || 5211 ((isa<LoadInst>(J) || isa<StoreInst>(J)) && 5212 isScalarUse(J, Src)); 5213 })) { 5214 Worklist.insert(Src); 5215 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Src << "\n"); 5216 } 5217 } 5218 5219 // An induction variable will remain scalar if all users of the induction 5220 // variable and induction variable update remain scalar. 5221 for (auto &Induction : Legal->getInductionVars()) { 5222 auto *Ind = Induction.first; 5223 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch)); 5224 5225 // If tail-folding is applied, the primary induction variable will be used 5226 // to feed a vector compare. 5227 if (Ind == Legal->getPrimaryInduction() && foldTailByMasking()) 5228 continue; 5229 5230 // Determine if all users of the induction variable are scalar after 5231 // vectorization. 5232 auto ScalarInd = llvm::all_of(Ind->users(), [&](User *U) -> bool { 5233 auto *I = cast<Instruction>(U); 5234 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I); 5235 }); 5236 if (!ScalarInd) 5237 continue; 5238 5239 // Determine if all users of the induction variable update instruction are 5240 // scalar after vectorization. 5241 auto ScalarIndUpdate = 5242 llvm::all_of(IndUpdate->users(), [&](User *U) -> bool { 5243 auto *I = cast<Instruction>(U); 5244 return I == Ind || !TheLoop->contains(I) || Worklist.count(I); 5245 }); 5246 if (!ScalarIndUpdate) 5247 continue; 5248 5249 // The induction variable and its update instruction will remain scalar. 5250 Worklist.insert(Ind); 5251 Worklist.insert(IndUpdate); 5252 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n"); 5253 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate 5254 << "\n"); 5255 } 5256 5257 Scalars[VF].insert(Worklist.begin(), Worklist.end()); 5258 } 5259 5260 bool LoopVectorizationCostModel::isScalarWithPredication( 5261 Instruction *I, ElementCount VF) const { 5262 if (!blockNeedsPredication(I->getParent())) 5263 return false; 5264 switch(I->getOpcode()) { 5265 default: 5266 break; 5267 case Instruction::Load: 5268 case Instruction::Store: { 5269 if (!Legal->isMaskRequired(I)) 5270 return false; 5271 auto *Ptr = getLoadStorePointerOperand(I); 5272 auto *Ty = getMemInstValueType(I); 5273 // We have already decided how to vectorize this instruction, get that 5274 // result. 5275 if (VF.isVector()) { 5276 InstWidening WideningDecision = getWideningDecision(I, VF); 5277 assert(WideningDecision != CM_Unknown && 5278 "Widening decision should be ready at this moment"); 5279 return WideningDecision == CM_Scalarize; 5280 } 5281 const Align Alignment = getLoadStoreAlignment(I); 5282 return isa<LoadInst>(I) ? !(isLegalMaskedLoad(Ty, Ptr, Alignment) || 5283 isLegalMaskedGather(Ty, Alignment)) 5284 : !(isLegalMaskedStore(Ty, Ptr, Alignment) || 5285 isLegalMaskedScatter(Ty, Alignment)); 5286 } 5287 case Instruction::UDiv: 5288 case Instruction::SDiv: 5289 case Instruction::SRem: 5290 case Instruction::URem: 5291 return mayDivideByZero(*I); 5292 } 5293 return false; 5294 } 5295 5296 bool LoopVectorizationCostModel::interleavedAccessCanBeWidened( 5297 Instruction *I, ElementCount VF) { 5298 assert(isAccessInterleaved(I) && "Expecting interleaved access."); 5299 assert(getWideningDecision(I, VF) == CM_Unknown && 5300 "Decision should not be set yet."); 5301 auto *Group = getInterleavedAccessGroup(I); 5302 assert(Group && "Must have a group."); 5303 5304 // If the instruction's allocated size doesn't equal it's type size, it 5305 // requires padding and will be scalarized. 5306 auto &DL = I->getModule()->getDataLayout(); 5307 auto *ScalarTy = getMemInstValueType(I); 5308 if (hasIrregularType(ScalarTy, DL)) 5309 return false; 5310 5311 // Check if masking is required. 5312 // A Group may need masking for one of two reasons: it resides in a block that 5313 // needs predication, or it was decided to use masking to deal with gaps. 5314 bool PredicatedAccessRequiresMasking = 5315 Legal->blockNeedsPredication(I->getParent()) && Legal->isMaskRequired(I); 5316 bool AccessWithGapsRequiresMasking = 5317 Group->requiresScalarEpilogue() && !isScalarEpilogueAllowed(); 5318 if (!PredicatedAccessRequiresMasking && !AccessWithGapsRequiresMasking) 5319 return true; 5320 5321 // If masked interleaving is required, we expect that the user/target had 5322 // enabled it, because otherwise it either wouldn't have been created or 5323 // it should have been invalidated by the CostModel. 5324 assert(useMaskedInterleavedAccesses(TTI) && 5325 "Masked interleave-groups for predicated accesses are not enabled."); 5326 5327 auto *Ty = getMemInstValueType(I); 5328 const Align Alignment = getLoadStoreAlignment(I); 5329 return isa<LoadInst>(I) ? TTI.isLegalMaskedLoad(Ty, Alignment) 5330 : TTI.isLegalMaskedStore(Ty, Alignment); 5331 } 5332 5333 bool LoopVectorizationCostModel::memoryInstructionCanBeWidened( 5334 Instruction *I, ElementCount VF) { 5335 // Get and ensure we have a valid memory instruction. 5336 LoadInst *LI = dyn_cast<LoadInst>(I); 5337 StoreInst *SI = dyn_cast<StoreInst>(I); 5338 assert((LI || SI) && "Invalid memory instruction"); 5339 5340 auto *Ptr = getLoadStorePointerOperand(I); 5341 5342 // In order to be widened, the pointer should be consecutive, first of all. 5343 if (!Legal->isConsecutivePtr(Ptr)) 5344 return false; 5345 5346 // If the instruction is a store located in a predicated block, it will be 5347 // scalarized. 5348 if (isScalarWithPredication(I)) 5349 return false; 5350 5351 // If the instruction's allocated size doesn't equal it's type size, it 5352 // requires padding and will be scalarized. 5353 auto &DL = I->getModule()->getDataLayout(); 5354 auto *ScalarTy = LI ? LI->getType() : SI->getValueOperand()->getType(); 5355 if (hasIrregularType(ScalarTy, DL)) 5356 return false; 5357 5358 return true; 5359 } 5360 5361 void LoopVectorizationCostModel::collectLoopUniforms(ElementCount VF) { 5362 // We should not collect Uniforms more than once per VF. Right now, 5363 // this function is called from collectUniformsAndScalars(), which 5364 // already does this check. Collecting Uniforms for VF=1 does not make any 5365 // sense. 5366 5367 assert(VF.isVector() && Uniforms.find(VF) == Uniforms.end() && 5368 "This function should not be visited twice for the same VF"); 5369 5370 // Visit the list of Uniforms. If we'll not find any uniform value, we'll 5371 // not analyze again. Uniforms.count(VF) will return 1. 5372 Uniforms[VF].clear(); 5373 5374 // We now know that the loop is vectorizable! 5375 // Collect instructions inside the loop that will remain uniform after 5376 // vectorization. 5377 5378 // Global values, params and instructions outside of current loop are out of 5379 // scope. 5380 auto isOutOfScope = [&](Value *V) -> bool { 5381 Instruction *I = dyn_cast<Instruction>(V); 5382 return (!I || !TheLoop->contains(I)); 5383 }; 5384 5385 SetVector<Instruction *> Worklist; 5386 BasicBlock *Latch = TheLoop->getLoopLatch(); 5387 5388 // Instructions that are scalar with predication must not be considered 5389 // uniform after vectorization, because that would create an erroneous 5390 // replicating region where only a single instance out of VF should be formed. 5391 // TODO: optimize such seldom cases if found important, see PR40816. 5392 auto addToWorklistIfAllowed = [&](Instruction *I) -> void { 5393 if (isOutOfScope(I)) { 5394 LLVM_DEBUG(dbgs() << "LV: Found not uniform due to scope: " 5395 << *I << "\n"); 5396 return; 5397 } 5398 if (isScalarWithPredication(I, VF)) { 5399 LLVM_DEBUG(dbgs() << "LV: Found not uniform being ScalarWithPredication: " 5400 << *I << "\n"); 5401 return; 5402 } 5403 LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *I << "\n"); 5404 Worklist.insert(I); 5405 }; 5406 5407 // Start with the conditional branch. If the branch condition is an 5408 // instruction contained in the loop that is only used by the branch, it is 5409 // uniform. 5410 auto *Cmp = dyn_cast<Instruction>(Latch->getTerminator()->getOperand(0)); 5411 if (Cmp && TheLoop->contains(Cmp) && Cmp->hasOneUse()) 5412 addToWorklistIfAllowed(Cmp); 5413 5414 auto isUniformDecision = [&](Instruction *I, ElementCount VF) { 5415 InstWidening WideningDecision = getWideningDecision(I, VF); 5416 assert(WideningDecision != CM_Unknown && 5417 "Widening decision should be ready at this moment"); 5418 5419 // A uniform memory op is itself uniform. We exclude uniform stores 5420 // here as they demand the last lane, not the first one. 5421 if (isa<LoadInst>(I) && Legal->isUniformMemOp(*I)) { 5422 assert(WideningDecision == CM_Scalarize); 5423 return true; 5424 } 5425 5426 return (WideningDecision == CM_Widen || 5427 WideningDecision == CM_Widen_Reverse || 5428 WideningDecision == CM_Interleave); 5429 }; 5430 5431 5432 // Returns true if Ptr is the pointer operand of a memory access instruction 5433 // I, and I is known to not require scalarization. 5434 auto isVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool { 5435 return getLoadStorePointerOperand(I) == Ptr && isUniformDecision(I, VF); 5436 }; 5437 5438 // Holds a list of values which are known to have at least one uniform use. 5439 // Note that there may be other uses which aren't uniform. A "uniform use" 5440 // here is something which only demands lane 0 of the unrolled iterations; 5441 // it does not imply that all lanes produce the same value (e.g. this is not 5442 // the usual meaning of uniform) 5443 SetVector<Value *> HasUniformUse; 5444 5445 // Scan the loop for instructions which are either a) known to have only 5446 // lane 0 demanded or b) are uses which demand only lane 0 of their operand. 5447 for (auto *BB : TheLoop->blocks()) 5448 for (auto &I : *BB) { 5449 // If there's no pointer operand, there's nothing to do. 5450 auto *Ptr = getLoadStorePointerOperand(&I); 5451 if (!Ptr) 5452 continue; 5453 5454 // A uniform memory op is itself uniform. We exclude uniform stores 5455 // here as they demand the last lane, not the first one. 5456 if (isa<LoadInst>(I) && Legal->isUniformMemOp(I)) 5457 addToWorklistIfAllowed(&I); 5458 5459 if (isUniformDecision(&I, VF)) { 5460 assert(isVectorizedMemAccessUse(&I, Ptr) && "consistency check"); 5461 HasUniformUse.insert(Ptr); 5462 } 5463 } 5464 5465 // Add to the worklist any operands which have *only* uniform (e.g. lane 0 5466 // demanding) users. Since loops are assumed to be in LCSSA form, this 5467 // disallows uses outside the loop as well. 5468 for (auto *V : HasUniformUse) { 5469 if (isOutOfScope(V)) 5470 continue; 5471 auto *I = cast<Instruction>(V); 5472 auto UsersAreMemAccesses = 5473 llvm::all_of(I->users(), [&](User *U) -> bool { 5474 return isVectorizedMemAccessUse(cast<Instruction>(U), V); 5475 }); 5476 if (UsersAreMemAccesses) 5477 addToWorklistIfAllowed(I); 5478 } 5479 5480 // Expand Worklist in topological order: whenever a new instruction 5481 // is added , its users should be already inside Worklist. It ensures 5482 // a uniform instruction will only be used by uniform instructions. 5483 unsigned idx = 0; 5484 while (idx != Worklist.size()) { 5485 Instruction *I = Worklist[idx++]; 5486 5487 for (auto OV : I->operand_values()) { 5488 // isOutOfScope operands cannot be uniform instructions. 5489 if (isOutOfScope(OV)) 5490 continue; 5491 // First order recurrence Phi's should typically be considered 5492 // non-uniform. 5493 auto *OP = dyn_cast<PHINode>(OV); 5494 if (OP && Legal->isFirstOrderRecurrence(OP)) 5495 continue; 5496 // If all the users of the operand are uniform, then add the 5497 // operand into the uniform worklist. 5498 auto *OI = cast<Instruction>(OV); 5499 if (llvm::all_of(OI->users(), [&](User *U) -> bool { 5500 auto *J = cast<Instruction>(U); 5501 return Worklist.count(J) || isVectorizedMemAccessUse(J, OI); 5502 })) 5503 addToWorklistIfAllowed(OI); 5504 } 5505 } 5506 5507 // For an instruction to be added into Worklist above, all its users inside 5508 // the loop should also be in Worklist. However, this condition cannot be 5509 // true for phi nodes that form a cyclic dependence. We must process phi 5510 // nodes separately. An induction variable will remain uniform if all users 5511 // of the induction variable and induction variable update remain uniform. 5512 // The code below handles both pointer and non-pointer induction variables. 5513 for (auto &Induction : Legal->getInductionVars()) { 5514 auto *Ind = Induction.first; 5515 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch)); 5516 5517 // Determine if all users of the induction variable are uniform after 5518 // vectorization. 5519 auto UniformInd = llvm::all_of(Ind->users(), [&](User *U) -> bool { 5520 auto *I = cast<Instruction>(U); 5521 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) || 5522 isVectorizedMemAccessUse(I, Ind); 5523 }); 5524 if (!UniformInd) 5525 continue; 5526 5527 // Determine if all users of the induction variable update instruction are 5528 // uniform after vectorization. 5529 auto UniformIndUpdate = 5530 llvm::all_of(IndUpdate->users(), [&](User *U) -> bool { 5531 auto *I = cast<Instruction>(U); 5532 return I == Ind || !TheLoop->contains(I) || Worklist.count(I) || 5533 isVectorizedMemAccessUse(I, IndUpdate); 5534 }); 5535 if (!UniformIndUpdate) 5536 continue; 5537 5538 // The induction variable and its update instruction will remain uniform. 5539 addToWorklistIfAllowed(Ind); 5540 addToWorklistIfAllowed(IndUpdate); 5541 } 5542 5543 Uniforms[VF].insert(Worklist.begin(), Worklist.end()); 5544 } 5545 5546 bool LoopVectorizationCostModel::runtimeChecksRequired() { 5547 LLVM_DEBUG(dbgs() << "LV: Performing code size checks.\n"); 5548 5549 if (Legal->getRuntimePointerChecking()->Need) { 5550 reportVectorizationFailure("Runtime ptr check is required with -Os/-Oz", 5551 "runtime pointer checks needed. Enable vectorization of this " 5552 "loop with '#pragma clang loop vectorize(enable)' when " 5553 "compiling with -Os/-Oz", 5554 "CantVersionLoopWithOptForSize", ORE, TheLoop); 5555 return true; 5556 } 5557 5558 if (!PSE.getUnionPredicate().getPredicates().empty()) { 5559 reportVectorizationFailure("Runtime SCEV check is required with -Os/-Oz", 5560 "runtime SCEV checks needed. Enable vectorization of this " 5561 "loop with '#pragma clang loop vectorize(enable)' when " 5562 "compiling with -Os/-Oz", 5563 "CantVersionLoopWithOptForSize", ORE, TheLoop); 5564 return true; 5565 } 5566 5567 // FIXME: Avoid specializing for stride==1 instead of bailing out. 5568 if (!Legal->getLAI()->getSymbolicStrides().empty()) { 5569 reportVectorizationFailure("Runtime stride check for small trip count", 5570 "runtime stride == 1 checks needed. Enable vectorization of " 5571 "this loop without such check by compiling with -Os/-Oz", 5572 "CantVersionLoopWithOptForSize", ORE, TheLoop); 5573 return true; 5574 } 5575 5576 return false; 5577 } 5578 5579 Optional<ElementCount> 5580 LoopVectorizationCostModel::computeMaxVF(ElementCount UserVF, unsigned UserIC) { 5581 if (Legal->getRuntimePointerChecking()->Need && TTI.hasBranchDivergence()) { 5582 // TODO: It may by useful to do since it's still likely to be dynamically 5583 // uniform if the target can skip. 5584 reportVectorizationFailure( 5585 "Not inserting runtime ptr check for divergent target", 5586 "runtime pointer checks needed. Not enabled for divergent target", 5587 "CantVersionLoopWithDivergentTarget", ORE, TheLoop); 5588 return None; 5589 } 5590 5591 unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop); 5592 LLVM_DEBUG(dbgs() << "LV: Found trip count: " << TC << '\n'); 5593 if (TC == 1) { 5594 reportVectorizationFailure("Single iteration (non) loop", 5595 "loop trip count is one, irrelevant for vectorization", 5596 "SingleIterationLoop", ORE, TheLoop); 5597 return None; 5598 } 5599 5600 switch (ScalarEpilogueStatus) { 5601 case CM_ScalarEpilogueAllowed: 5602 return computeFeasibleMaxVF(TC, UserVF); 5603 case CM_ScalarEpilogueNotAllowedUsePredicate: 5604 LLVM_FALLTHROUGH; 5605 case CM_ScalarEpilogueNotNeededUsePredicate: 5606 LLVM_DEBUG( 5607 dbgs() << "LV: vector predicate hint/switch found.\n" 5608 << "LV: Not allowing scalar epilogue, creating predicated " 5609 << "vector loop.\n"); 5610 break; 5611 case CM_ScalarEpilogueNotAllowedLowTripLoop: 5612 // fallthrough as a special case of OptForSize 5613 case CM_ScalarEpilogueNotAllowedOptSize: 5614 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotAllowedOptSize) 5615 LLVM_DEBUG( 5616 dbgs() << "LV: Not allowing scalar epilogue due to -Os/-Oz.\n"); 5617 else 5618 LLVM_DEBUG(dbgs() << "LV: Not allowing scalar epilogue due to low trip " 5619 << "count.\n"); 5620 5621 // Bail if runtime checks are required, which are not good when optimising 5622 // for size. 5623 if (runtimeChecksRequired()) 5624 return None; 5625 5626 break; 5627 } 5628 5629 // The only loops we can vectorize without a scalar epilogue, are loops with 5630 // a bottom-test and a single exiting block. We'd have to handle the fact 5631 // that not every instruction executes on the last iteration. This will 5632 // require a lane mask which varies through the vector loop body. (TODO) 5633 if (TheLoop->getExitingBlock() != TheLoop->getLoopLatch()) { 5634 // If there was a tail-folding hint/switch, but we can't fold the tail by 5635 // masking, fallback to a vectorization with a scalar epilogue. 5636 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotNeededUsePredicate) { 5637 LLVM_DEBUG(dbgs() << "LV: Cannot fold tail by masking: vectorize with a " 5638 "scalar epilogue instead.\n"); 5639 ScalarEpilogueStatus = CM_ScalarEpilogueAllowed; 5640 return computeFeasibleMaxVF(TC, UserVF); 5641 } 5642 return None; 5643 } 5644 5645 // Now try the tail folding 5646 5647 // Invalidate interleave groups that require an epilogue if we can't mask 5648 // the interleave-group. 5649 if (!useMaskedInterleavedAccesses(TTI)) { 5650 assert(WideningDecisions.empty() && Uniforms.empty() && Scalars.empty() && 5651 "No decisions should have been taken at this point"); 5652 // Note: There is no need to invalidate any cost modeling decisions here, as 5653 // non where taken so far. 5654 InterleaveInfo.invalidateGroupsRequiringScalarEpilogue(); 5655 } 5656 5657 ElementCount MaxVF = computeFeasibleMaxVF(TC, UserVF); 5658 assert(!MaxVF.isScalable() && 5659 "Scalable vectors do not yet support tail folding"); 5660 assert((UserVF.isNonZero() || isPowerOf2_32(MaxVF.getFixedValue())) && 5661 "MaxVF must be a power of 2"); 5662 unsigned MaxVFtimesIC = 5663 UserIC ? MaxVF.getFixedValue() * UserIC : MaxVF.getFixedValue(); 5664 // Avoid tail folding if the trip count is known to be a multiple of any VF we 5665 // chose. 5666 ScalarEvolution *SE = PSE.getSE(); 5667 const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount(); 5668 const SCEV *ExitCount = SE->getAddExpr( 5669 BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType())); 5670 const SCEV *Rem = SE->getURemExpr( 5671 SE->applyLoopGuards(ExitCount, TheLoop), 5672 SE->getConstant(BackedgeTakenCount->getType(), MaxVFtimesIC)); 5673 if (Rem->isZero()) { 5674 // Accept MaxVF if we do not have a tail. 5675 LLVM_DEBUG(dbgs() << "LV: No tail will remain for any chosen VF.\n"); 5676 return MaxVF; 5677 } 5678 5679 // If we don't know the precise trip count, or if the trip count that we 5680 // found modulo the vectorization factor is not zero, try to fold the tail 5681 // by masking. 5682 // FIXME: look for a smaller MaxVF that does divide TC rather than masking. 5683 if (Legal->prepareToFoldTailByMasking()) { 5684 FoldTailByMasking = true; 5685 return MaxVF; 5686 } 5687 5688 // If there was a tail-folding hint/switch, but we can't fold the tail by 5689 // masking, fallback to a vectorization with a scalar epilogue. 5690 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotNeededUsePredicate) { 5691 LLVM_DEBUG(dbgs() << "LV: Cannot fold tail by masking: vectorize with a " 5692 "scalar epilogue instead.\n"); 5693 ScalarEpilogueStatus = CM_ScalarEpilogueAllowed; 5694 return MaxVF; 5695 } 5696 5697 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotAllowedUsePredicate) { 5698 LLVM_DEBUG(dbgs() << "LV: Can't fold tail by masking: don't vectorize\n"); 5699 return None; 5700 } 5701 5702 if (TC == 0) { 5703 reportVectorizationFailure( 5704 "Unable to calculate the loop count due to complex control flow", 5705 "unable to calculate the loop count due to complex control flow", 5706 "UnknownLoopCountComplexCFG", ORE, TheLoop); 5707 return None; 5708 } 5709 5710 reportVectorizationFailure( 5711 "Cannot optimize for size and vectorize at the same time.", 5712 "cannot optimize for size and vectorize at the same time. " 5713 "Enable vectorization of this loop with '#pragma clang loop " 5714 "vectorize(enable)' when compiling with -Os/-Oz", 5715 "NoTailLoopWithOptForSize", ORE, TheLoop); 5716 return None; 5717 } 5718 5719 ElementCount 5720 LoopVectorizationCostModel::computeFeasibleMaxVF(unsigned ConstTripCount, 5721 ElementCount UserVF) { 5722 bool IgnoreScalableUserVF = UserVF.isScalable() && 5723 !TTI.supportsScalableVectors() && 5724 !ForceTargetSupportsScalableVectors; 5725 if (IgnoreScalableUserVF) { 5726 LLVM_DEBUG( 5727 dbgs() << "LV: Ignoring VF=" << UserVF 5728 << " because target does not support scalable vectors.\n"); 5729 ORE->emit([&]() { 5730 return OptimizationRemarkAnalysis(DEBUG_TYPE, "IgnoreScalableUserVF", 5731 TheLoop->getStartLoc(), 5732 TheLoop->getHeader()) 5733 << "Ignoring VF=" << ore::NV("UserVF", UserVF) 5734 << " because target does not support scalable vectors."; 5735 }); 5736 } 5737 5738 // Beyond this point two scenarios are handled. If UserVF isn't specified 5739 // then a suitable VF is chosen. If UserVF is specified and there are 5740 // dependencies, check if it's legal. However, if a UserVF is specified and 5741 // there are no dependencies, then there's nothing to do. 5742 if (UserVF.isNonZero() && !IgnoreScalableUserVF) { 5743 if (!canVectorizeReductions(UserVF)) { 5744 reportVectorizationFailure( 5745 "LV: Scalable vectorization not supported for the reduction " 5746 "operations found in this loop. Using fixed-width " 5747 "vectorization instead.", 5748 "Scalable vectorization not supported for the reduction operations " 5749 "found in this loop. Using fixed-width vectorization instead.", 5750 "ScalableVFUnfeasible", ORE, TheLoop); 5751 return computeFeasibleMaxVF( 5752 ConstTripCount, ElementCount::getFixed(UserVF.getKnownMinValue())); 5753 } 5754 5755 if (Legal->isSafeForAnyVectorWidth()) 5756 return UserVF; 5757 } 5758 5759 MinBWs = computeMinimumValueSizes(TheLoop->getBlocks(), *DB, &TTI); 5760 unsigned SmallestType, WidestType; 5761 std::tie(SmallestType, WidestType) = getSmallestAndWidestTypes(); 5762 unsigned WidestRegister = 5763 TTI.getRegisterBitWidth(TargetTransformInfo::RGK_FixedWidthVector) 5764 .getFixedSize(); 5765 5766 // Get the maximum safe dependence distance in bits computed by LAA. 5767 // It is computed by MaxVF * sizeOf(type) * 8, where type is taken from 5768 // the memory accesses that is most restrictive (involved in the smallest 5769 // dependence distance). 5770 unsigned MaxSafeVectorWidthInBits = Legal->getMaxSafeVectorWidthInBits(); 5771 5772 // If the user vectorization factor is legally unsafe, clamp it to a safe 5773 // value. Otherwise, return as is. 5774 if (UserVF.isNonZero() && !IgnoreScalableUserVF) { 5775 unsigned MaxSafeElements = 5776 PowerOf2Floor(MaxSafeVectorWidthInBits / WidestType); 5777 ElementCount MaxSafeVF = ElementCount::getFixed(MaxSafeElements); 5778 5779 if (UserVF.isScalable()) { 5780 Optional<unsigned> MaxVScale = TTI.getMaxVScale(); 5781 5782 // Scale VF by vscale before checking if it's safe. 5783 MaxSafeVF = ElementCount::getScalable( 5784 MaxVScale ? (MaxSafeElements / MaxVScale.getValue()) : 0); 5785 5786 if (MaxSafeVF.isZero()) { 5787 // The dependence distance is too small to use scalable vectors, 5788 // fallback on fixed. 5789 LLVM_DEBUG( 5790 dbgs() 5791 << "LV: Max legal vector width too small, scalable vectorization " 5792 "unfeasible. Using fixed-width vectorization instead.\n"); 5793 ORE->emit([&]() { 5794 return OptimizationRemarkAnalysis(DEBUG_TYPE, "ScalableVFUnfeasible", 5795 TheLoop->getStartLoc(), 5796 TheLoop->getHeader()) 5797 << "Max legal vector width too small, scalable vectorization " 5798 << "unfeasible. Using fixed-width vectorization instead."; 5799 }); 5800 return computeFeasibleMaxVF( 5801 ConstTripCount, ElementCount::getFixed(UserVF.getKnownMinValue())); 5802 } 5803 } 5804 5805 LLVM_DEBUG(dbgs() << "LV: The max safe VF is: " << MaxSafeVF << ".\n"); 5806 5807 if (ElementCount::isKnownLE(UserVF, MaxSafeVF)) 5808 return UserVF; 5809 5810 LLVM_DEBUG(dbgs() << "LV: User VF=" << UserVF 5811 << " is unsafe, clamping to max safe VF=" << MaxSafeVF 5812 << ".\n"); 5813 ORE->emit([&]() { 5814 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationFactor", 5815 TheLoop->getStartLoc(), 5816 TheLoop->getHeader()) 5817 << "User-specified vectorization factor " 5818 << ore::NV("UserVectorizationFactor", UserVF) 5819 << " is unsafe, clamping to maximum safe vectorization factor " 5820 << ore::NV("VectorizationFactor", MaxSafeVF); 5821 }); 5822 return MaxSafeVF; 5823 } 5824 5825 WidestRegister = std::min(WidestRegister, MaxSafeVectorWidthInBits); 5826 5827 // Ensure MaxVF is a power of 2; the dependence distance bound may not be. 5828 // Note that both WidestRegister and WidestType may not be a powers of 2. 5829 auto MaxVectorSize = 5830 ElementCount::getFixed(PowerOf2Floor(WidestRegister / WidestType)); 5831 5832 LLVM_DEBUG(dbgs() << "LV: The Smallest and Widest types: " << SmallestType 5833 << " / " << WidestType << " bits.\n"); 5834 LLVM_DEBUG(dbgs() << "LV: The Widest register safe to use is: " 5835 << WidestRegister << " bits.\n"); 5836 5837 assert(MaxVectorSize.getFixedValue() <= WidestRegister && 5838 "Did not expect to pack so many elements" 5839 " into one vector!"); 5840 if (MaxVectorSize.getFixedValue() == 0) { 5841 LLVM_DEBUG(dbgs() << "LV: The target has no vector registers.\n"); 5842 return ElementCount::getFixed(1); 5843 } else if (ConstTripCount && ConstTripCount < MaxVectorSize.getFixedValue() && 5844 isPowerOf2_32(ConstTripCount)) { 5845 // We need to clamp the VF to be the ConstTripCount. There is no point in 5846 // choosing a higher viable VF as done in the loop below. 5847 LLVM_DEBUG(dbgs() << "LV: Clamping the MaxVF to the constant trip count: " 5848 << ConstTripCount << "\n"); 5849 return ElementCount::getFixed(ConstTripCount); 5850 } 5851 5852 ElementCount MaxVF = MaxVectorSize; 5853 if (TTI.shouldMaximizeVectorBandwidth() || 5854 (MaximizeBandwidth && isScalarEpilogueAllowed())) { 5855 // Collect all viable vectorization factors larger than the default MaxVF 5856 // (i.e. MaxVectorSize). 5857 SmallVector<ElementCount, 8> VFs; 5858 auto MaxVectorSizeMaxBW = 5859 ElementCount::getFixed(WidestRegister / SmallestType); 5860 for (ElementCount VS = MaxVectorSize * 2; 5861 ElementCount::isKnownLE(VS, MaxVectorSizeMaxBW); VS *= 2) 5862 VFs.push_back(VS); 5863 5864 // For each VF calculate its register usage. 5865 auto RUs = calculateRegisterUsage(VFs); 5866 5867 // Select the largest VF which doesn't require more registers than existing 5868 // ones. 5869 for (int i = RUs.size() - 1; i >= 0; --i) { 5870 bool Selected = true; 5871 for (auto &pair : RUs[i].MaxLocalUsers) { 5872 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(pair.first); 5873 if (pair.second > TargetNumRegisters) 5874 Selected = false; 5875 } 5876 if (Selected) { 5877 MaxVF = VFs[i]; 5878 break; 5879 } 5880 } 5881 if (ElementCount MinVF = 5882 TTI.getMinimumVF(SmallestType, /*IsScalable=*/false)) { 5883 if (ElementCount::isKnownLT(MaxVF, MinVF)) { 5884 LLVM_DEBUG(dbgs() << "LV: Overriding calculated MaxVF(" << MaxVF 5885 << ") with target's minimum: " << MinVF << '\n'); 5886 MaxVF = MinVF; 5887 } 5888 } 5889 } 5890 return MaxVF; 5891 } 5892 5893 bool LoopVectorizationCostModel::isMoreProfitable( 5894 const VectorizationFactor &A, const VectorizationFactor &B) const { 5895 InstructionCost::CostType CostA = *A.Cost.getValue(); 5896 InstructionCost::CostType CostB = *B.Cost.getValue(); 5897 5898 // To avoid the need for FP division: 5899 // (CostA / A.Width) < (CostB / B.Width) 5900 // <=> (CostA * B.Width) < (CostB * A.Width) 5901 return (CostA * B.Width.getKnownMinValue()) < 5902 (CostB * A.Width.getKnownMinValue()); 5903 } 5904 5905 VectorizationFactor 5906 LoopVectorizationCostModel::selectVectorizationFactor(ElementCount MaxVF) { 5907 // FIXME: This can be fixed for scalable vectors later, because at this stage 5908 // the LoopVectorizer will only consider vectorizing a loop with scalable 5909 // vectors when the loop has a hint to enable vectorization for a given VF. 5910 assert(!MaxVF.isScalable() && "scalable vectors not yet supported"); 5911 5912 InstructionCost ExpectedCost = expectedCost(ElementCount::getFixed(1)).first; 5913 LLVM_DEBUG(dbgs() << "LV: Scalar loop costs: " << ExpectedCost << ".\n"); 5914 assert(ExpectedCost.isValid() && "Unexpected invalid cost for scalar loop"); 5915 5916 const VectorizationFactor ScalarCost(ElementCount::getFixed(1), ExpectedCost); 5917 VectorizationFactor ChosenFactor = ScalarCost; 5918 5919 bool ForceVectorization = Hints->getForce() == LoopVectorizeHints::FK_Enabled; 5920 if (ForceVectorization && MaxVF.isVector()) { 5921 // Ignore scalar width, because the user explicitly wants vectorization. 5922 // Initialize cost to max so that VF = 2 is, at least, chosen during cost 5923 // evaluation. 5924 ChosenFactor.Cost = std::numeric_limits<InstructionCost::CostType>::max(); 5925 } 5926 5927 for (auto i = ElementCount::getFixed(2); ElementCount::isKnownLE(i, MaxVF); 5928 i *= 2) { 5929 // Notice that the vector loop needs to be executed less times, so 5930 // we need to divide the cost of the vector loops by the width of 5931 // the vector elements. 5932 VectorizationCostTy C = expectedCost(i); 5933 5934 assert(C.first.isValid() && "Unexpected invalid cost for vector loop"); 5935 VectorizationFactor Candidate(i, C.first); 5936 LLVM_DEBUG( 5937 dbgs() << "LV: Vector loop of width " << i << " costs: " 5938 << (*Candidate.Cost.getValue() / Candidate.Width.getFixedValue()) 5939 << ".\n"); 5940 5941 if (!C.second && !ForceVectorization) { 5942 LLVM_DEBUG( 5943 dbgs() << "LV: Not considering vector loop of width " << i 5944 << " because it will not generate any vector instructions.\n"); 5945 continue; 5946 } 5947 5948 // If profitable add it to ProfitableVF list. 5949 if (isMoreProfitable(Candidate, ScalarCost)) 5950 ProfitableVFs.push_back(Candidate); 5951 5952 if (isMoreProfitable(Candidate, ChosenFactor)) 5953 ChosenFactor = Candidate; 5954 } 5955 5956 if (!EnableCondStoresVectorization && NumPredStores) { 5957 reportVectorizationFailure("There are conditional stores.", 5958 "store that is conditionally executed prevents vectorization", 5959 "ConditionalStore", ORE, TheLoop); 5960 ChosenFactor = ScalarCost; 5961 } 5962 5963 LLVM_DEBUG(if (ForceVectorization && !ChosenFactor.Width.isScalar() && 5964 *ChosenFactor.Cost.getValue() >= *ScalarCost.Cost.getValue()) 5965 dbgs() 5966 << "LV: Vectorization seems to be not beneficial, " 5967 << "but was forced by a user.\n"); 5968 LLVM_DEBUG(dbgs() << "LV: Selecting VF: " << ChosenFactor.Width << ".\n"); 5969 return ChosenFactor; 5970 } 5971 5972 bool LoopVectorizationCostModel::isCandidateForEpilogueVectorization( 5973 const Loop &L, ElementCount VF) const { 5974 // Cross iteration phis such as reductions need special handling and are 5975 // currently unsupported. 5976 if (any_of(L.getHeader()->phis(), [&](PHINode &Phi) { 5977 return Legal->isFirstOrderRecurrence(&Phi) || 5978 Legal->isReductionVariable(&Phi); 5979 })) 5980 return false; 5981 5982 // Phis with uses outside of the loop require special handling and are 5983 // currently unsupported. 5984 for (auto &Entry : Legal->getInductionVars()) { 5985 // Look for uses of the value of the induction at the last iteration. 5986 Value *PostInc = Entry.first->getIncomingValueForBlock(L.getLoopLatch()); 5987 for (User *U : PostInc->users()) 5988 if (!L.contains(cast<Instruction>(U))) 5989 return false; 5990 // Look for uses of penultimate value of the induction. 5991 for (User *U : Entry.first->users()) 5992 if (!L.contains(cast<Instruction>(U))) 5993 return false; 5994 } 5995 5996 // Induction variables that are widened require special handling that is 5997 // currently not supported. 5998 if (any_of(Legal->getInductionVars(), [&](auto &Entry) { 5999 return !(this->isScalarAfterVectorization(Entry.first, VF) || 6000 this->isProfitableToScalarize(Entry.first, VF)); 6001 })) 6002 return false; 6003 6004 return true; 6005 } 6006 6007 bool LoopVectorizationCostModel::isEpilogueVectorizationProfitable( 6008 const ElementCount VF) const { 6009 // FIXME: We need a much better cost-model to take different parameters such 6010 // as register pressure, code size increase and cost of extra branches into 6011 // account. For now we apply a very crude heuristic and only consider loops 6012 // with vectorization factors larger than a certain value. 6013 // We also consider epilogue vectorization unprofitable for targets that don't 6014 // consider interleaving beneficial (eg. MVE). 6015 if (TTI.getMaxInterleaveFactor(VF.getKnownMinValue()) <= 1) 6016 return false; 6017 if (VF.getFixedValue() >= EpilogueVectorizationMinVF) 6018 return true; 6019 return false; 6020 } 6021 6022 VectorizationFactor 6023 LoopVectorizationCostModel::selectEpilogueVectorizationFactor( 6024 const ElementCount MainLoopVF, const LoopVectorizationPlanner &LVP) { 6025 VectorizationFactor Result = VectorizationFactor::Disabled(); 6026 if (!EnableEpilogueVectorization) { 6027 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization is disabled.\n";); 6028 return Result; 6029 } 6030 6031 if (!isScalarEpilogueAllowed()) { 6032 LLVM_DEBUG( 6033 dbgs() << "LEV: Unable to vectorize epilogue because no epilogue is " 6034 "allowed.\n";); 6035 return Result; 6036 } 6037 6038 // FIXME: This can be fixed for scalable vectors later, because at this stage 6039 // the LoopVectorizer will only consider vectorizing a loop with scalable 6040 // vectors when the loop has a hint to enable vectorization for a given VF. 6041 if (MainLoopVF.isScalable()) { 6042 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization for scalable vectors not " 6043 "yet supported.\n"); 6044 return Result; 6045 } 6046 6047 // Not really a cost consideration, but check for unsupported cases here to 6048 // simplify the logic. 6049 if (!isCandidateForEpilogueVectorization(*TheLoop, MainLoopVF)) { 6050 LLVM_DEBUG( 6051 dbgs() << "LEV: Unable to vectorize epilogue because the loop is " 6052 "not a supported candidate.\n";); 6053 return Result; 6054 } 6055 6056 if (EpilogueVectorizationForceVF > 1) { 6057 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization factor is forced.\n";); 6058 if (LVP.hasPlanWithVFs( 6059 {MainLoopVF, ElementCount::getFixed(EpilogueVectorizationForceVF)})) 6060 return {ElementCount::getFixed(EpilogueVectorizationForceVF), 0}; 6061 else { 6062 LLVM_DEBUG( 6063 dbgs() 6064 << "LEV: Epilogue vectorization forced factor is not viable.\n";); 6065 return Result; 6066 } 6067 } 6068 6069 if (TheLoop->getHeader()->getParent()->hasOptSize() || 6070 TheLoop->getHeader()->getParent()->hasMinSize()) { 6071 LLVM_DEBUG( 6072 dbgs() 6073 << "LEV: Epilogue vectorization skipped due to opt for size.\n";); 6074 return Result; 6075 } 6076 6077 if (!isEpilogueVectorizationProfitable(MainLoopVF)) 6078 return Result; 6079 6080 for (auto &NextVF : ProfitableVFs) 6081 if (ElementCount::isKnownLT(NextVF.Width, MainLoopVF) && 6082 (Result.Width.getFixedValue() == 1 || 6083 isMoreProfitable(NextVF, Result)) && 6084 LVP.hasPlanWithVFs({MainLoopVF, NextVF.Width})) 6085 Result = NextVF; 6086 6087 if (Result != VectorizationFactor::Disabled()) 6088 LLVM_DEBUG(dbgs() << "LEV: Vectorizing epilogue loop with VF = " 6089 << Result.Width.getFixedValue() << "\n";); 6090 return Result; 6091 } 6092 6093 std::pair<unsigned, unsigned> 6094 LoopVectorizationCostModel::getSmallestAndWidestTypes() { 6095 unsigned MinWidth = -1U; 6096 unsigned MaxWidth = 8; 6097 const DataLayout &DL = TheFunction->getParent()->getDataLayout(); 6098 6099 // For each block. 6100 for (BasicBlock *BB : TheLoop->blocks()) { 6101 // For each instruction in the loop. 6102 for (Instruction &I : BB->instructionsWithoutDebug()) { 6103 Type *T = I.getType(); 6104 6105 // Skip ignored values. 6106 if (ValuesToIgnore.count(&I)) 6107 continue; 6108 6109 // Only examine Loads, Stores and PHINodes. 6110 if (!isa<LoadInst>(I) && !isa<StoreInst>(I) && !isa<PHINode>(I)) 6111 continue; 6112 6113 // Examine PHI nodes that are reduction variables. Update the type to 6114 // account for the recurrence type. 6115 if (auto *PN = dyn_cast<PHINode>(&I)) { 6116 if (!Legal->isReductionVariable(PN)) 6117 continue; 6118 RecurrenceDescriptor RdxDesc = Legal->getReductionVars()[PN]; 6119 if (PreferInLoopReductions || useOrderedReductions(RdxDesc) || 6120 TTI.preferInLoopReduction(RdxDesc.getOpcode(), 6121 RdxDesc.getRecurrenceType(), 6122 TargetTransformInfo::ReductionFlags())) 6123 continue; 6124 T = RdxDesc.getRecurrenceType(); 6125 } 6126 6127 // Examine the stored values. 6128 if (auto *ST = dyn_cast<StoreInst>(&I)) 6129 T = ST->getValueOperand()->getType(); 6130 6131 // Ignore loaded pointer types and stored pointer types that are not 6132 // vectorizable. 6133 // 6134 // FIXME: The check here attempts to predict whether a load or store will 6135 // be vectorized. We only know this for certain after a VF has 6136 // been selected. Here, we assume that if an access can be 6137 // vectorized, it will be. We should also look at extending this 6138 // optimization to non-pointer types. 6139 // 6140 if (T->isPointerTy() && !isConsecutiveLoadOrStore(&I) && 6141 !isAccessInterleaved(&I) && !isLegalGatherOrScatter(&I)) 6142 continue; 6143 6144 MinWidth = std::min(MinWidth, 6145 (unsigned)DL.getTypeSizeInBits(T->getScalarType())); 6146 MaxWidth = std::max(MaxWidth, 6147 (unsigned)DL.getTypeSizeInBits(T->getScalarType())); 6148 } 6149 } 6150 6151 return {MinWidth, MaxWidth}; 6152 } 6153 6154 unsigned LoopVectorizationCostModel::selectInterleaveCount(ElementCount VF, 6155 unsigned LoopCost) { 6156 // -- The interleave heuristics -- 6157 // We interleave the loop in order to expose ILP and reduce the loop overhead. 6158 // There are many micro-architectural considerations that we can't predict 6159 // at this level. For example, frontend pressure (on decode or fetch) due to 6160 // code size, or the number and capabilities of the execution ports. 6161 // 6162 // We use the following heuristics to select the interleave count: 6163 // 1. If the code has reductions, then we interleave to break the cross 6164 // iteration dependency. 6165 // 2. If the loop is really small, then we interleave to reduce the loop 6166 // overhead. 6167 // 3. We don't interleave if we think that we will spill registers to memory 6168 // due to the increased register pressure. 6169 6170 if (!isScalarEpilogueAllowed()) 6171 return 1; 6172 6173 // We used the distance for the interleave count. 6174 if (Legal->getMaxSafeDepDistBytes() != -1U) 6175 return 1; 6176 6177 auto BestKnownTC = getSmallBestKnownTC(*PSE.getSE(), TheLoop); 6178 const bool HasReductions = !Legal->getReductionVars().empty(); 6179 // Do not interleave loops with a relatively small known or estimated trip 6180 // count. But we will interleave when InterleaveSmallLoopScalarReduction is 6181 // enabled, and the code has scalar reductions(HasReductions && VF = 1), 6182 // because with the above conditions interleaving can expose ILP and break 6183 // cross iteration dependences for reductions. 6184 if (BestKnownTC && (*BestKnownTC < TinyTripCountInterleaveThreshold) && 6185 !(InterleaveSmallLoopScalarReduction && HasReductions && VF.isScalar())) 6186 return 1; 6187 6188 RegisterUsage R = calculateRegisterUsage({VF})[0]; 6189 // We divide by these constants so assume that we have at least one 6190 // instruction that uses at least one register. 6191 for (auto& pair : R.MaxLocalUsers) { 6192 pair.second = std::max(pair.second, 1U); 6193 } 6194 6195 // We calculate the interleave count using the following formula. 6196 // Subtract the number of loop invariants from the number of available 6197 // registers. These registers are used by all of the interleaved instances. 6198 // Next, divide the remaining registers by the number of registers that is 6199 // required by the loop, in order to estimate how many parallel instances 6200 // fit without causing spills. All of this is rounded down if necessary to be 6201 // a power of two. We want power of two interleave count to simplify any 6202 // addressing operations or alignment considerations. 6203 // We also want power of two interleave counts to ensure that the induction 6204 // variable of the vector loop wraps to zero, when tail is folded by masking; 6205 // this currently happens when OptForSize, in which case IC is set to 1 above. 6206 unsigned IC = UINT_MAX; 6207 6208 for (auto& pair : R.MaxLocalUsers) { 6209 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(pair.first); 6210 LLVM_DEBUG(dbgs() << "LV: The target has " << TargetNumRegisters 6211 << " registers of " 6212 << TTI.getRegisterClassName(pair.first) << " register class\n"); 6213 if (VF.isScalar()) { 6214 if (ForceTargetNumScalarRegs.getNumOccurrences() > 0) 6215 TargetNumRegisters = ForceTargetNumScalarRegs; 6216 } else { 6217 if (ForceTargetNumVectorRegs.getNumOccurrences() > 0) 6218 TargetNumRegisters = ForceTargetNumVectorRegs; 6219 } 6220 unsigned MaxLocalUsers = pair.second; 6221 unsigned LoopInvariantRegs = 0; 6222 if (R.LoopInvariantRegs.find(pair.first) != R.LoopInvariantRegs.end()) 6223 LoopInvariantRegs = R.LoopInvariantRegs[pair.first]; 6224 6225 unsigned TmpIC = PowerOf2Floor((TargetNumRegisters - LoopInvariantRegs) / MaxLocalUsers); 6226 // Don't count the induction variable as interleaved. 6227 if (EnableIndVarRegisterHeur) { 6228 TmpIC = 6229 PowerOf2Floor((TargetNumRegisters - LoopInvariantRegs - 1) / 6230 std::max(1U, (MaxLocalUsers - 1))); 6231 } 6232 6233 IC = std::min(IC, TmpIC); 6234 } 6235 6236 // Clamp the interleave ranges to reasonable counts. 6237 unsigned MaxInterleaveCount = 6238 TTI.getMaxInterleaveFactor(VF.getKnownMinValue()); 6239 6240 // Check if the user has overridden the max. 6241 if (VF.isScalar()) { 6242 if (ForceTargetMaxScalarInterleaveFactor.getNumOccurrences() > 0) 6243 MaxInterleaveCount = ForceTargetMaxScalarInterleaveFactor; 6244 } else { 6245 if (ForceTargetMaxVectorInterleaveFactor.getNumOccurrences() > 0) 6246 MaxInterleaveCount = ForceTargetMaxVectorInterleaveFactor; 6247 } 6248 6249 // If trip count is known or estimated compile time constant, limit the 6250 // interleave count to be less than the trip count divided by VF, provided it 6251 // is at least 1. 6252 // 6253 // For scalable vectors we can't know if interleaving is beneficial. It may 6254 // not be beneficial for small loops if none of the lanes in the second vector 6255 // iterations is enabled. However, for larger loops, there is likely to be a 6256 // similar benefit as for fixed-width vectors. For now, we choose to leave 6257 // the InterleaveCount as if vscale is '1', although if some information about 6258 // the vector is known (e.g. min vector size), we can make a better decision. 6259 if (BestKnownTC) { 6260 MaxInterleaveCount = 6261 std::min(*BestKnownTC / VF.getKnownMinValue(), MaxInterleaveCount); 6262 // Make sure MaxInterleaveCount is greater than 0. 6263 MaxInterleaveCount = std::max(1u, MaxInterleaveCount); 6264 } 6265 6266 assert(MaxInterleaveCount > 0 && 6267 "Maximum interleave count must be greater than 0"); 6268 6269 // Clamp the calculated IC to be between the 1 and the max interleave count 6270 // that the target and trip count allows. 6271 if (IC > MaxInterleaveCount) 6272 IC = MaxInterleaveCount; 6273 else 6274 // Make sure IC is greater than 0. 6275 IC = std::max(1u, IC); 6276 6277 assert(IC > 0 && "Interleave count must be greater than 0."); 6278 6279 // If we did not calculate the cost for VF (because the user selected the VF) 6280 // then we calculate the cost of VF here. 6281 if (LoopCost == 0) { 6282 assert(expectedCost(VF).first.isValid() && "Expected a valid cost"); 6283 LoopCost = *expectedCost(VF).first.getValue(); 6284 } 6285 6286 assert(LoopCost && "Non-zero loop cost expected"); 6287 6288 // Interleave if we vectorized this loop and there is a reduction that could 6289 // benefit from interleaving. 6290 if (VF.isVector() && HasReductions) { 6291 LLVM_DEBUG(dbgs() << "LV: Interleaving because of reductions.\n"); 6292 return IC; 6293 } 6294 6295 // Note that if we've already vectorized the loop we will have done the 6296 // runtime check and so interleaving won't require further checks. 6297 bool InterleavingRequiresRuntimePointerCheck = 6298 (VF.isScalar() && Legal->getRuntimePointerChecking()->Need); 6299 6300 // We want to interleave small loops in order to reduce the loop overhead and 6301 // potentially expose ILP opportunities. 6302 LLVM_DEBUG(dbgs() << "LV: Loop cost is " << LoopCost << '\n' 6303 << "LV: IC is " << IC << '\n' 6304 << "LV: VF is " << VF << '\n'); 6305 const bool AggressivelyInterleaveReductions = 6306 TTI.enableAggressiveInterleaving(HasReductions); 6307 if (!InterleavingRequiresRuntimePointerCheck && LoopCost < SmallLoopCost) { 6308 // We assume that the cost overhead is 1 and we use the cost model 6309 // to estimate the cost of the loop and interleave until the cost of the 6310 // loop overhead is about 5% of the cost of the loop. 6311 unsigned SmallIC = 6312 std::min(IC, (unsigned)PowerOf2Floor(SmallLoopCost / LoopCost)); 6313 6314 // Interleave until store/load ports (estimated by max interleave count) are 6315 // saturated. 6316 unsigned NumStores = Legal->getNumStores(); 6317 unsigned NumLoads = Legal->getNumLoads(); 6318 unsigned StoresIC = IC / (NumStores ? NumStores : 1); 6319 unsigned LoadsIC = IC / (NumLoads ? NumLoads : 1); 6320 6321 // If we have a scalar reduction (vector reductions are already dealt with 6322 // by this point), we can increase the critical path length if the loop 6323 // we're interleaving is inside another loop. Limit, by default to 2, so the 6324 // critical path only gets increased by one reduction operation. 6325 if (HasReductions && TheLoop->getLoopDepth() > 1) { 6326 unsigned F = static_cast<unsigned>(MaxNestedScalarReductionIC); 6327 SmallIC = std::min(SmallIC, F); 6328 StoresIC = std::min(StoresIC, F); 6329 LoadsIC = std::min(LoadsIC, F); 6330 } 6331 6332 if (EnableLoadStoreRuntimeInterleave && 6333 std::max(StoresIC, LoadsIC) > SmallIC) { 6334 LLVM_DEBUG( 6335 dbgs() << "LV: Interleaving to saturate store or load ports.\n"); 6336 return std::max(StoresIC, LoadsIC); 6337 } 6338 6339 // If there are scalar reductions and TTI has enabled aggressive 6340 // interleaving for reductions, we will interleave to expose ILP. 6341 if (InterleaveSmallLoopScalarReduction && VF.isScalar() && 6342 AggressivelyInterleaveReductions) { 6343 LLVM_DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n"); 6344 // Interleave no less than SmallIC but not as aggressive as the normal IC 6345 // to satisfy the rare situation when resources are too limited. 6346 return std::max(IC / 2, SmallIC); 6347 } else { 6348 LLVM_DEBUG(dbgs() << "LV: Interleaving to reduce branch cost.\n"); 6349 return SmallIC; 6350 } 6351 } 6352 6353 // Interleave if this is a large loop (small loops are already dealt with by 6354 // this point) that could benefit from interleaving. 6355 if (AggressivelyInterleaveReductions) { 6356 LLVM_DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n"); 6357 return IC; 6358 } 6359 6360 LLVM_DEBUG(dbgs() << "LV: Not Interleaving.\n"); 6361 return 1; 6362 } 6363 6364 SmallVector<LoopVectorizationCostModel::RegisterUsage, 8> 6365 LoopVectorizationCostModel::calculateRegisterUsage(ArrayRef<ElementCount> VFs) { 6366 // This function calculates the register usage by measuring the highest number 6367 // of values that are alive at a single location. Obviously, this is a very 6368 // rough estimation. We scan the loop in a topological order in order and 6369 // assign a number to each instruction. We use RPO to ensure that defs are 6370 // met before their users. We assume that each instruction that has in-loop 6371 // users starts an interval. We record every time that an in-loop value is 6372 // used, so we have a list of the first and last occurrences of each 6373 // instruction. Next, we transpose this data structure into a multi map that 6374 // holds the list of intervals that *end* at a specific location. This multi 6375 // map allows us to perform a linear search. We scan the instructions linearly 6376 // and record each time that a new interval starts, by placing it in a set. 6377 // If we find this value in the multi-map then we remove it from the set. 6378 // The max register usage is the maximum size of the set. 6379 // We also search for instructions that are defined outside the loop, but are 6380 // used inside the loop. We need this number separately from the max-interval 6381 // usage number because when we unroll, loop-invariant values do not take 6382 // more register. 6383 LoopBlocksDFS DFS(TheLoop); 6384 DFS.perform(LI); 6385 6386 RegisterUsage RU; 6387 6388 // Each 'key' in the map opens a new interval. The values 6389 // of the map are the index of the 'last seen' usage of the 6390 // instruction that is the key. 6391 using IntervalMap = DenseMap<Instruction *, unsigned>; 6392 6393 // Maps instruction to its index. 6394 SmallVector<Instruction *, 64> IdxToInstr; 6395 // Marks the end of each interval. 6396 IntervalMap EndPoint; 6397 // Saves the list of instruction indices that are used in the loop. 6398 SmallPtrSet<Instruction *, 8> Ends; 6399 // Saves the list of values that are used in the loop but are 6400 // defined outside the loop, such as arguments and constants. 6401 SmallPtrSet<Value *, 8> LoopInvariants; 6402 6403 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) { 6404 for (Instruction &I : BB->instructionsWithoutDebug()) { 6405 IdxToInstr.push_back(&I); 6406 6407 // Save the end location of each USE. 6408 for (Value *U : I.operands()) { 6409 auto *Instr = dyn_cast<Instruction>(U); 6410 6411 // Ignore non-instruction values such as arguments, constants, etc. 6412 if (!Instr) 6413 continue; 6414 6415 // If this instruction is outside the loop then record it and continue. 6416 if (!TheLoop->contains(Instr)) { 6417 LoopInvariants.insert(Instr); 6418 continue; 6419 } 6420 6421 // Overwrite previous end points. 6422 EndPoint[Instr] = IdxToInstr.size(); 6423 Ends.insert(Instr); 6424 } 6425 } 6426 } 6427 6428 // Saves the list of intervals that end with the index in 'key'. 6429 using InstrList = SmallVector<Instruction *, 2>; 6430 DenseMap<unsigned, InstrList> TransposeEnds; 6431 6432 // Transpose the EndPoints to a list of values that end at each index. 6433 for (auto &Interval : EndPoint) 6434 TransposeEnds[Interval.second].push_back(Interval.first); 6435 6436 SmallPtrSet<Instruction *, 8> OpenIntervals; 6437 SmallVector<RegisterUsage, 8> RUs(VFs.size()); 6438 SmallVector<SmallMapVector<unsigned, unsigned, 4>, 8> MaxUsages(VFs.size()); 6439 6440 LLVM_DEBUG(dbgs() << "LV(REG): Calculating max register usage:\n"); 6441 6442 // A lambda that gets the register usage for the given type and VF. 6443 const auto &TTICapture = TTI; 6444 auto GetRegUsage = [&TTICapture](Type *Ty, ElementCount VF) { 6445 if (Ty->isTokenTy() || !VectorType::isValidElementType(Ty)) 6446 return 0U; 6447 return TTICapture.getRegUsageForType(VectorType::get(Ty, VF)); 6448 }; 6449 6450 for (unsigned int i = 0, s = IdxToInstr.size(); i < s; ++i) { 6451 Instruction *I = IdxToInstr[i]; 6452 6453 // Remove all of the instructions that end at this location. 6454 InstrList &List = TransposeEnds[i]; 6455 for (Instruction *ToRemove : List) 6456 OpenIntervals.erase(ToRemove); 6457 6458 // Ignore instructions that are never used within the loop. 6459 if (!Ends.count(I)) 6460 continue; 6461 6462 // Skip ignored values. 6463 if (ValuesToIgnore.count(I)) 6464 continue; 6465 6466 // For each VF find the maximum usage of registers. 6467 for (unsigned j = 0, e = VFs.size(); j < e; ++j) { 6468 // Count the number of live intervals. 6469 SmallMapVector<unsigned, unsigned, 4> RegUsage; 6470 6471 if (VFs[j].isScalar()) { 6472 for (auto Inst : OpenIntervals) { 6473 unsigned ClassID = TTI.getRegisterClassForType(false, Inst->getType()); 6474 if (RegUsage.find(ClassID) == RegUsage.end()) 6475 RegUsage[ClassID] = 1; 6476 else 6477 RegUsage[ClassID] += 1; 6478 } 6479 } else { 6480 collectUniformsAndScalars(VFs[j]); 6481 for (auto Inst : OpenIntervals) { 6482 // Skip ignored values for VF > 1. 6483 if (VecValuesToIgnore.count(Inst)) 6484 continue; 6485 if (isScalarAfterVectorization(Inst, VFs[j])) { 6486 unsigned ClassID = TTI.getRegisterClassForType(false, Inst->getType()); 6487 if (RegUsage.find(ClassID) == RegUsage.end()) 6488 RegUsage[ClassID] = 1; 6489 else 6490 RegUsage[ClassID] += 1; 6491 } else { 6492 unsigned ClassID = TTI.getRegisterClassForType(true, Inst->getType()); 6493 if (RegUsage.find(ClassID) == RegUsage.end()) 6494 RegUsage[ClassID] = GetRegUsage(Inst->getType(), VFs[j]); 6495 else 6496 RegUsage[ClassID] += GetRegUsage(Inst->getType(), VFs[j]); 6497 } 6498 } 6499 } 6500 6501 for (auto& pair : RegUsage) { 6502 if (MaxUsages[j].find(pair.first) != MaxUsages[j].end()) 6503 MaxUsages[j][pair.first] = std::max(MaxUsages[j][pair.first], pair.second); 6504 else 6505 MaxUsages[j][pair.first] = pair.second; 6506 } 6507 } 6508 6509 LLVM_DEBUG(dbgs() << "LV(REG): At #" << i << " Interval # " 6510 << OpenIntervals.size() << '\n'); 6511 6512 // Add the current instruction to the list of open intervals. 6513 OpenIntervals.insert(I); 6514 } 6515 6516 for (unsigned i = 0, e = VFs.size(); i < e; ++i) { 6517 SmallMapVector<unsigned, unsigned, 4> Invariant; 6518 6519 for (auto Inst : LoopInvariants) { 6520 unsigned Usage = 6521 VFs[i].isScalar() ? 1 : GetRegUsage(Inst->getType(), VFs[i]); 6522 unsigned ClassID = 6523 TTI.getRegisterClassForType(VFs[i].isVector(), Inst->getType()); 6524 if (Invariant.find(ClassID) == Invariant.end()) 6525 Invariant[ClassID] = Usage; 6526 else 6527 Invariant[ClassID] += Usage; 6528 } 6529 6530 LLVM_DEBUG({ 6531 dbgs() << "LV(REG): VF = " << VFs[i] << '\n'; 6532 dbgs() << "LV(REG): Found max usage: " << MaxUsages[i].size() 6533 << " item\n"; 6534 for (const auto &pair : MaxUsages[i]) { 6535 dbgs() << "LV(REG): RegisterClass: " 6536 << TTI.getRegisterClassName(pair.first) << ", " << pair.second 6537 << " registers\n"; 6538 } 6539 dbgs() << "LV(REG): Found invariant usage: " << Invariant.size() 6540 << " item\n"; 6541 for (const auto &pair : Invariant) { 6542 dbgs() << "LV(REG): RegisterClass: " 6543 << TTI.getRegisterClassName(pair.first) << ", " << pair.second 6544 << " registers\n"; 6545 } 6546 }); 6547 6548 RU.LoopInvariantRegs = Invariant; 6549 RU.MaxLocalUsers = MaxUsages[i]; 6550 RUs[i] = RU; 6551 } 6552 6553 return RUs; 6554 } 6555 6556 bool LoopVectorizationCostModel::useEmulatedMaskMemRefHack(Instruction *I){ 6557 // TODO: Cost model for emulated masked load/store is completely 6558 // broken. This hack guides the cost model to use an artificially 6559 // high enough value to practically disable vectorization with such 6560 // operations, except where previously deployed legality hack allowed 6561 // using very low cost values. This is to avoid regressions coming simply 6562 // from moving "masked load/store" check from legality to cost model. 6563 // Masked Load/Gather emulation was previously never allowed. 6564 // Limited number of Masked Store/Scatter emulation was allowed. 6565 assert(isPredicatedInst(I, ElementCount::getFixed(1)) && 6566 "Expecting a scalar emulated instruction"); 6567 return isa<LoadInst>(I) || 6568 (isa<StoreInst>(I) && 6569 NumPredStores > NumberOfStoresToPredicate); 6570 } 6571 6572 void LoopVectorizationCostModel::collectInstsToScalarize(ElementCount VF) { 6573 // If we aren't vectorizing the loop, or if we've already collected the 6574 // instructions to scalarize, there's nothing to do. Collection may already 6575 // have occurred if we have a user-selected VF and are now computing the 6576 // expected cost for interleaving. 6577 if (VF.isScalar() || VF.isZero() || 6578 InstsToScalarize.find(VF) != InstsToScalarize.end()) 6579 return; 6580 6581 // Initialize a mapping for VF in InstsToScalalarize. If we find that it's 6582 // not profitable to scalarize any instructions, the presence of VF in the 6583 // map will indicate that we've analyzed it already. 6584 ScalarCostsTy &ScalarCostsVF = InstsToScalarize[VF]; 6585 6586 // Find all the instructions that are scalar with predication in the loop and 6587 // determine if it would be better to not if-convert the blocks they are in. 6588 // If so, we also record the instructions to scalarize. 6589 for (BasicBlock *BB : TheLoop->blocks()) { 6590 if (!blockNeedsPredication(BB)) 6591 continue; 6592 for (Instruction &I : *BB) 6593 if (isScalarWithPredication(&I)) { 6594 ScalarCostsTy ScalarCosts; 6595 // Do not apply discount logic if hacked cost is needed 6596 // for emulated masked memrefs. 6597 if (!useEmulatedMaskMemRefHack(&I) && 6598 computePredInstDiscount(&I, ScalarCosts, VF) >= 0) 6599 ScalarCostsVF.insert(ScalarCosts.begin(), ScalarCosts.end()); 6600 // Remember that BB will remain after vectorization. 6601 PredicatedBBsAfterVectorization.insert(BB); 6602 } 6603 } 6604 } 6605 6606 int LoopVectorizationCostModel::computePredInstDiscount( 6607 Instruction *PredInst, ScalarCostsTy &ScalarCosts, ElementCount VF) { 6608 assert(!isUniformAfterVectorization(PredInst, VF) && 6609 "Instruction marked uniform-after-vectorization will be predicated"); 6610 6611 // Initialize the discount to zero, meaning that the scalar version and the 6612 // vector version cost the same. 6613 InstructionCost Discount = 0; 6614 6615 // Holds instructions to analyze. The instructions we visit are mapped in 6616 // ScalarCosts. Those instructions are the ones that would be scalarized if 6617 // we find that the scalar version costs less. 6618 SmallVector<Instruction *, 8> Worklist; 6619 6620 // Returns true if the given instruction can be scalarized. 6621 auto canBeScalarized = [&](Instruction *I) -> bool { 6622 // We only attempt to scalarize instructions forming a single-use chain 6623 // from the original predicated block that would otherwise be vectorized. 6624 // Although not strictly necessary, we give up on instructions we know will 6625 // already be scalar to avoid traversing chains that are unlikely to be 6626 // beneficial. 6627 if (!I->hasOneUse() || PredInst->getParent() != I->getParent() || 6628 isScalarAfterVectorization(I, VF)) 6629 return false; 6630 6631 // If the instruction is scalar with predication, it will be analyzed 6632 // separately. We ignore it within the context of PredInst. 6633 if (isScalarWithPredication(I)) 6634 return false; 6635 6636 // If any of the instruction's operands are uniform after vectorization, 6637 // the instruction cannot be scalarized. This prevents, for example, a 6638 // masked load from being scalarized. 6639 // 6640 // We assume we will only emit a value for lane zero of an instruction 6641 // marked uniform after vectorization, rather than VF identical values. 6642 // Thus, if we scalarize an instruction that uses a uniform, we would 6643 // create uses of values corresponding to the lanes we aren't emitting code 6644 // for. This behavior can be changed by allowing getScalarValue to clone 6645 // the lane zero values for uniforms rather than asserting. 6646 for (Use &U : I->operands()) 6647 if (auto *J = dyn_cast<Instruction>(U.get())) 6648 if (isUniformAfterVectorization(J, VF)) 6649 return false; 6650 6651 // Otherwise, we can scalarize the instruction. 6652 return true; 6653 }; 6654 6655 // Compute the expected cost discount from scalarizing the entire expression 6656 // feeding the predicated instruction. We currently only consider expressions 6657 // that are single-use instruction chains. 6658 Worklist.push_back(PredInst); 6659 while (!Worklist.empty()) { 6660 Instruction *I = Worklist.pop_back_val(); 6661 6662 // If we've already analyzed the instruction, there's nothing to do. 6663 if (ScalarCosts.find(I) != ScalarCosts.end()) 6664 continue; 6665 6666 // Compute the cost of the vector instruction. Note that this cost already 6667 // includes the scalarization overhead of the predicated instruction. 6668 InstructionCost VectorCost = getInstructionCost(I, VF).first; 6669 6670 // Compute the cost of the scalarized instruction. This cost is the cost of 6671 // the instruction as if it wasn't if-converted and instead remained in the 6672 // predicated block. We will scale this cost by block probability after 6673 // computing the scalarization overhead. 6674 assert(!VF.isScalable() && "scalable vectors not yet supported."); 6675 InstructionCost ScalarCost = 6676 VF.getKnownMinValue() * 6677 getInstructionCost(I, ElementCount::getFixed(1)).first; 6678 6679 // Compute the scalarization overhead of needed insertelement instructions 6680 // and phi nodes. 6681 if (isScalarWithPredication(I) && !I->getType()->isVoidTy()) { 6682 ScalarCost += TTI.getScalarizationOverhead( 6683 cast<VectorType>(ToVectorTy(I->getType(), VF)), 6684 APInt::getAllOnesValue(VF.getKnownMinValue()), true, false); 6685 assert(!VF.isScalable() && "scalable vectors not yet supported."); 6686 ScalarCost += 6687 VF.getKnownMinValue() * 6688 TTI.getCFInstrCost(Instruction::PHI, TTI::TCK_RecipThroughput); 6689 } 6690 6691 // Compute the scalarization overhead of needed extractelement 6692 // instructions. For each of the instruction's operands, if the operand can 6693 // be scalarized, add it to the worklist; otherwise, account for the 6694 // overhead. 6695 for (Use &U : I->operands()) 6696 if (auto *J = dyn_cast<Instruction>(U.get())) { 6697 assert(VectorType::isValidElementType(J->getType()) && 6698 "Instruction has non-scalar type"); 6699 if (canBeScalarized(J)) 6700 Worklist.push_back(J); 6701 else if (needsExtract(J, VF)) { 6702 assert(!VF.isScalable() && "scalable vectors not yet supported."); 6703 ScalarCost += TTI.getScalarizationOverhead( 6704 cast<VectorType>(ToVectorTy(J->getType(), VF)), 6705 APInt::getAllOnesValue(VF.getKnownMinValue()), false, true); 6706 } 6707 } 6708 6709 // Scale the total scalar cost by block probability. 6710 ScalarCost /= getReciprocalPredBlockProb(); 6711 6712 // Compute the discount. A non-negative discount means the vector version 6713 // of the instruction costs more, and scalarizing would be beneficial. 6714 Discount += VectorCost - ScalarCost; 6715 ScalarCosts[I] = ScalarCost; 6716 } 6717 6718 return *Discount.getValue(); 6719 } 6720 6721 LoopVectorizationCostModel::VectorizationCostTy 6722 LoopVectorizationCostModel::expectedCost(ElementCount VF) { 6723 VectorizationCostTy Cost; 6724 6725 // For each block. 6726 for (BasicBlock *BB : TheLoop->blocks()) { 6727 VectorizationCostTy BlockCost; 6728 6729 // For each instruction in the old loop. 6730 for (Instruction &I : BB->instructionsWithoutDebug()) { 6731 // Skip ignored values. 6732 if (ValuesToIgnore.count(&I) || 6733 (VF.isVector() && VecValuesToIgnore.count(&I))) 6734 continue; 6735 6736 VectorizationCostTy C = getInstructionCost(&I, VF); 6737 6738 // Check if we should override the cost. 6739 if (ForceTargetInstructionCost.getNumOccurrences() > 0) 6740 C.first = InstructionCost(ForceTargetInstructionCost); 6741 6742 BlockCost.first += C.first; 6743 BlockCost.second |= C.second; 6744 LLVM_DEBUG(dbgs() << "LV: Found an estimated cost of " << C.first 6745 << " for VF " << VF << " For instruction: " << I 6746 << '\n'); 6747 } 6748 6749 // If we are vectorizing a predicated block, it will have been 6750 // if-converted. This means that the block's instructions (aside from 6751 // stores and instructions that may divide by zero) will now be 6752 // unconditionally executed. For the scalar case, we may not always execute 6753 // the predicated block, if it is an if-else block. Thus, scale the block's 6754 // cost by the probability of executing it. blockNeedsPredication from 6755 // Legal is used so as to not include all blocks in tail folded loops. 6756 if (VF.isScalar() && Legal->blockNeedsPredication(BB)) 6757 BlockCost.first /= getReciprocalPredBlockProb(); 6758 6759 Cost.first += BlockCost.first; 6760 Cost.second |= BlockCost.second; 6761 } 6762 6763 return Cost; 6764 } 6765 6766 /// Gets Address Access SCEV after verifying that the access pattern 6767 /// is loop invariant except the induction variable dependence. 6768 /// 6769 /// This SCEV can be sent to the Target in order to estimate the address 6770 /// calculation cost. 6771 static const SCEV *getAddressAccessSCEV( 6772 Value *Ptr, 6773 LoopVectorizationLegality *Legal, 6774 PredicatedScalarEvolution &PSE, 6775 const Loop *TheLoop) { 6776 6777 auto *Gep = dyn_cast<GetElementPtrInst>(Ptr); 6778 if (!Gep) 6779 return nullptr; 6780 6781 // We are looking for a gep with all loop invariant indices except for one 6782 // which should be an induction variable. 6783 auto SE = PSE.getSE(); 6784 unsigned NumOperands = Gep->getNumOperands(); 6785 for (unsigned i = 1; i < NumOperands; ++i) { 6786 Value *Opd = Gep->getOperand(i); 6787 if (!SE->isLoopInvariant(SE->getSCEV(Opd), TheLoop) && 6788 !Legal->isInductionVariable(Opd)) 6789 return nullptr; 6790 } 6791 6792 // Now we know we have a GEP ptr, %inv, %ind, %inv. return the Ptr SCEV. 6793 return PSE.getSCEV(Ptr); 6794 } 6795 6796 static bool isStrideMul(Instruction *I, LoopVectorizationLegality *Legal) { 6797 return Legal->hasStride(I->getOperand(0)) || 6798 Legal->hasStride(I->getOperand(1)); 6799 } 6800 6801 InstructionCost 6802 LoopVectorizationCostModel::getMemInstScalarizationCost(Instruction *I, 6803 ElementCount VF) { 6804 assert(VF.isVector() && 6805 "Scalarization cost of instruction implies vectorization."); 6806 if (VF.isScalable()) 6807 return InstructionCost::getInvalid(); 6808 6809 Type *ValTy = getMemInstValueType(I); 6810 auto SE = PSE.getSE(); 6811 6812 unsigned AS = getLoadStoreAddressSpace(I); 6813 Value *Ptr = getLoadStorePointerOperand(I); 6814 Type *PtrTy = ToVectorTy(Ptr->getType(), VF); 6815 6816 // Figure out whether the access is strided and get the stride value 6817 // if it's known in compile time 6818 const SCEV *PtrSCEV = getAddressAccessSCEV(Ptr, Legal, PSE, TheLoop); 6819 6820 // Get the cost of the scalar memory instruction and address computation. 6821 InstructionCost Cost = 6822 VF.getKnownMinValue() * TTI.getAddressComputationCost(PtrTy, SE, PtrSCEV); 6823 6824 // Don't pass *I here, since it is scalar but will actually be part of a 6825 // vectorized loop where the user of it is a vectorized instruction. 6826 const Align Alignment = getLoadStoreAlignment(I); 6827 Cost += VF.getKnownMinValue() * 6828 TTI.getMemoryOpCost(I->getOpcode(), ValTy->getScalarType(), Alignment, 6829 AS, TTI::TCK_RecipThroughput); 6830 6831 // Get the overhead of the extractelement and insertelement instructions 6832 // we might create due to scalarization. 6833 Cost += getScalarizationOverhead(I, VF); 6834 6835 // If we have a predicated load/store, it will need extra i1 extracts and 6836 // conditional branches, but may not be executed for each vector lane. Scale 6837 // the cost by the probability of executing the predicated block. 6838 if (isPredicatedInst(I, ElementCount::getFixed(1))) { 6839 Cost /= getReciprocalPredBlockProb(); 6840 6841 // Add the cost of an i1 extract and a branch 6842 auto *Vec_i1Ty = 6843 VectorType::get(IntegerType::getInt1Ty(ValTy->getContext()), VF); 6844 Cost += TTI.getScalarizationOverhead( 6845 Vec_i1Ty, APInt::getAllOnesValue(VF.getKnownMinValue()), 6846 /*Insert=*/false, /*Extract=*/true); 6847 Cost += TTI.getCFInstrCost(Instruction::Br, TTI::TCK_RecipThroughput); 6848 6849 if (useEmulatedMaskMemRefHack(I)) 6850 // Artificially setting to a high enough value to practically disable 6851 // vectorization with such operations. 6852 Cost = 3000000; 6853 } 6854 6855 return Cost; 6856 } 6857 6858 InstructionCost 6859 LoopVectorizationCostModel::getConsecutiveMemOpCost(Instruction *I, 6860 ElementCount VF) { 6861 Type *ValTy = getMemInstValueType(I); 6862 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 6863 Value *Ptr = getLoadStorePointerOperand(I); 6864 unsigned AS = getLoadStoreAddressSpace(I); 6865 int ConsecutiveStride = Legal->isConsecutivePtr(Ptr); 6866 enum TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 6867 6868 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) && 6869 "Stride should be 1 or -1 for consecutive memory access"); 6870 const Align Alignment = getLoadStoreAlignment(I); 6871 InstructionCost Cost = 0; 6872 if (Legal->isMaskRequired(I)) 6873 Cost += TTI.getMaskedMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS, 6874 CostKind); 6875 else 6876 Cost += TTI.getMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS, 6877 CostKind, I); 6878 6879 bool Reverse = ConsecutiveStride < 0; 6880 if (Reverse) 6881 Cost += 6882 TTI.getShuffleCost(TargetTransformInfo::SK_Reverse, VectorTy, None, 0); 6883 return Cost; 6884 } 6885 6886 InstructionCost 6887 LoopVectorizationCostModel::getUniformMemOpCost(Instruction *I, 6888 ElementCount VF) { 6889 assert(Legal->isUniformMemOp(*I)); 6890 6891 Type *ValTy = getMemInstValueType(I); 6892 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 6893 const Align Alignment = getLoadStoreAlignment(I); 6894 unsigned AS = getLoadStoreAddressSpace(I); 6895 enum TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 6896 if (isa<LoadInst>(I)) { 6897 return TTI.getAddressComputationCost(ValTy) + 6898 TTI.getMemoryOpCost(Instruction::Load, ValTy, Alignment, AS, 6899 CostKind) + 6900 TTI.getShuffleCost(TargetTransformInfo::SK_Broadcast, VectorTy); 6901 } 6902 StoreInst *SI = cast<StoreInst>(I); 6903 6904 bool isLoopInvariantStoreValue = Legal->isUniform(SI->getValueOperand()); 6905 return TTI.getAddressComputationCost(ValTy) + 6906 TTI.getMemoryOpCost(Instruction::Store, ValTy, Alignment, AS, 6907 CostKind) + 6908 (isLoopInvariantStoreValue 6909 ? 0 6910 : TTI.getVectorInstrCost(Instruction::ExtractElement, VectorTy, 6911 VF.getKnownMinValue() - 1)); 6912 } 6913 6914 InstructionCost 6915 LoopVectorizationCostModel::getGatherScatterCost(Instruction *I, 6916 ElementCount VF) { 6917 Type *ValTy = getMemInstValueType(I); 6918 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 6919 const Align Alignment = getLoadStoreAlignment(I); 6920 const Value *Ptr = getLoadStorePointerOperand(I); 6921 6922 return TTI.getAddressComputationCost(VectorTy) + 6923 TTI.getGatherScatterOpCost( 6924 I->getOpcode(), VectorTy, Ptr, Legal->isMaskRequired(I), Alignment, 6925 TargetTransformInfo::TCK_RecipThroughput, I); 6926 } 6927 6928 InstructionCost 6929 LoopVectorizationCostModel::getInterleaveGroupCost(Instruction *I, 6930 ElementCount VF) { 6931 // TODO: Once we have support for interleaving with scalable vectors 6932 // we can calculate the cost properly here. 6933 if (VF.isScalable()) 6934 return InstructionCost::getInvalid(); 6935 6936 Type *ValTy = getMemInstValueType(I); 6937 auto *VectorTy = cast<VectorType>(ToVectorTy(ValTy, VF)); 6938 unsigned AS = getLoadStoreAddressSpace(I); 6939 6940 auto Group = getInterleavedAccessGroup(I); 6941 assert(Group && "Fail to get an interleaved access group."); 6942 6943 unsigned InterleaveFactor = Group->getFactor(); 6944 auto *WideVecTy = VectorType::get(ValTy, VF * InterleaveFactor); 6945 6946 // Holds the indices of existing members in an interleaved load group. 6947 // An interleaved store group doesn't need this as it doesn't allow gaps. 6948 SmallVector<unsigned, 4> Indices; 6949 if (isa<LoadInst>(I)) { 6950 for (unsigned i = 0; i < InterleaveFactor; i++) 6951 if (Group->getMember(i)) 6952 Indices.push_back(i); 6953 } 6954 6955 // Calculate the cost of the whole interleaved group. 6956 bool UseMaskForGaps = 6957 Group->requiresScalarEpilogue() && !isScalarEpilogueAllowed(); 6958 InstructionCost Cost = TTI.getInterleavedMemoryOpCost( 6959 I->getOpcode(), WideVecTy, Group->getFactor(), Indices, Group->getAlign(), 6960 AS, TTI::TCK_RecipThroughput, Legal->isMaskRequired(I), UseMaskForGaps); 6961 6962 if (Group->isReverse()) { 6963 // TODO: Add support for reversed masked interleaved access. 6964 assert(!Legal->isMaskRequired(I) && 6965 "Reverse masked interleaved access not supported."); 6966 Cost += 6967 Group->getNumMembers() * 6968 TTI.getShuffleCost(TargetTransformInfo::SK_Reverse, VectorTy, None, 0); 6969 } 6970 return Cost; 6971 } 6972 6973 InstructionCost LoopVectorizationCostModel::getReductionPatternCost( 6974 Instruction *I, ElementCount VF, Type *Ty, TTI::TargetCostKind CostKind) { 6975 // Early exit for no inloop reductions 6976 if (InLoopReductionChains.empty() || VF.isScalar() || !isa<VectorType>(Ty)) 6977 return InstructionCost::getInvalid(); 6978 auto *VectorTy = cast<VectorType>(Ty); 6979 6980 // We are looking for a pattern of, and finding the minimal acceptable cost: 6981 // reduce(mul(ext(A), ext(B))) or 6982 // reduce(mul(A, B)) or 6983 // reduce(ext(A)) or 6984 // reduce(A). 6985 // The basic idea is that we walk down the tree to do that, finding the root 6986 // reduction instruction in InLoopReductionImmediateChains. From there we find 6987 // the pattern of mul/ext and test the cost of the entire pattern vs the cost 6988 // of the components. If the reduction cost is lower then we return it for the 6989 // reduction instruction and 0 for the other instructions in the pattern. If 6990 // it is not we return an invalid cost specifying the orignal cost method 6991 // should be used. 6992 Instruction *RetI = I; 6993 if ((RetI->getOpcode() == Instruction::SExt || 6994 RetI->getOpcode() == Instruction::ZExt)) { 6995 if (!RetI->hasOneUser()) 6996 return InstructionCost::getInvalid(); 6997 RetI = RetI->user_back(); 6998 } 6999 if (RetI->getOpcode() == Instruction::Mul && 7000 RetI->user_back()->getOpcode() == Instruction::Add) { 7001 if (!RetI->hasOneUser()) 7002 return InstructionCost::getInvalid(); 7003 RetI = RetI->user_back(); 7004 } 7005 7006 // Test if the found instruction is a reduction, and if not return an invalid 7007 // cost specifying the parent to use the original cost modelling. 7008 if (!InLoopReductionImmediateChains.count(RetI)) 7009 return InstructionCost::getInvalid(); 7010 7011 // Find the reduction this chain is a part of and calculate the basic cost of 7012 // the reduction on its own. 7013 Instruction *LastChain = InLoopReductionImmediateChains[RetI]; 7014 Instruction *ReductionPhi = LastChain; 7015 while (!isa<PHINode>(ReductionPhi)) 7016 ReductionPhi = InLoopReductionImmediateChains[ReductionPhi]; 7017 7018 RecurrenceDescriptor RdxDesc = 7019 Legal->getReductionVars()[cast<PHINode>(ReductionPhi)]; 7020 InstructionCost BaseCost = TTI.getArithmeticReductionCost( 7021 RdxDesc.getOpcode(), VectorTy, false, CostKind); 7022 7023 // Get the operand that was not the reduction chain and match it to one of the 7024 // patterns, returning the better cost if it is found. 7025 Instruction *RedOp = RetI->getOperand(1) == LastChain 7026 ? dyn_cast<Instruction>(RetI->getOperand(0)) 7027 : dyn_cast<Instruction>(RetI->getOperand(1)); 7028 7029 VectorTy = VectorType::get(I->getOperand(0)->getType(), VectorTy); 7030 7031 if (RedOp && (isa<SExtInst>(RedOp) || isa<ZExtInst>(RedOp)) && 7032 !TheLoop->isLoopInvariant(RedOp)) { 7033 bool IsUnsigned = isa<ZExtInst>(RedOp); 7034 auto *ExtType = VectorType::get(RedOp->getOperand(0)->getType(), VectorTy); 7035 InstructionCost RedCost = TTI.getExtendedAddReductionCost( 7036 /*IsMLA=*/false, IsUnsigned, RdxDesc.getRecurrenceType(), ExtType, 7037 CostKind); 7038 7039 InstructionCost ExtCost = 7040 TTI.getCastInstrCost(RedOp->getOpcode(), VectorTy, ExtType, 7041 TTI::CastContextHint::None, CostKind, RedOp); 7042 if (RedCost.isValid() && RedCost < BaseCost + ExtCost) 7043 return I == RetI ? *RedCost.getValue() : 0; 7044 } else if (RedOp && RedOp->getOpcode() == Instruction::Mul) { 7045 Instruction *Mul = RedOp; 7046 Instruction *Op0 = dyn_cast<Instruction>(Mul->getOperand(0)); 7047 Instruction *Op1 = dyn_cast<Instruction>(Mul->getOperand(1)); 7048 if (Op0 && Op1 && (isa<SExtInst>(Op0) || isa<ZExtInst>(Op0)) && 7049 Op0->getOpcode() == Op1->getOpcode() && 7050 Op0->getOperand(0)->getType() == Op1->getOperand(0)->getType() && 7051 !TheLoop->isLoopInvariant(Op0) && !TheLoop->isLoopInvariant(Op1)) { 7052 bool IsUnsigned = isa<ZExtInst>(Op0); 7053 auto *ExtType = VectorType::get(Op0->getOperand(0)->getType(), VectorTy); 7054 // reduce(mul(ext, ext)) 7055 InstructionCost ExtCost = 7056 TTI.getCastInstrCost(Op0->getOpcode(), VectorTy, ExtType, 7057 TTI::CastContextHint::None, CostKind, Op0); 7058 InstructionCost MulCost = 7059 TTI.getArithmeticInstrCost(Mul->getOpcode(), VectorTy, CostKind); 7060 7061 InstructionCost RedCost = TTI.getExtendedAddReductionCost( 7062 /*IsMLA=*/true, IsUnsigned, RdxDesc.getRecurrenceType(), ExtType, 7063 CostKind); 7064 7065 if (RedCost.isValid() && RedCost < ExtCost * 2 + MulCost + BaseCost) 7066 return I == RetI ? *RedCost.getValue() : 0; 7067 } else { 7068 InstructionCost MulCost = 7069 TTI.getArithmeticInstrCost(Mul->getOpcode(), VectorTy, CostKind); 7070 7071 InstructionCost RedCost = TTI.getExtendedAddReductionCost( 7072 /*IsMLA=*/true, true, RdxDesc.getRecurrenceType(), VectorTy, 7073 CostKind); 7074 7075 if (RedCost.isValid() && RedCost < MulCost + BaseCost) 7076 return I == RetI ? *RedCost.getValue() : 0; 7077 } 7078 } 7079 7080 return I == RetI ? BaseCost : InstructionCost::getInvalid(); 7081 } 7082 7083 InstructionCost 7084 LoopVectorizationCostModel::getMemoryInstructionCost(Instruction *I, 7085 ElementCount VF) { 7086 // Calculate scalar cost only. Vectorization cost should be ready at this 7087 // moment. 7088 if (VF.isScalar()) { 7089 Type *ValTy = getMemInstValueType(I); 7090 const Align Alignment = getLoadStoreAlignment(I); 7091 unsigned AS = getLoadStoreAddressSpace(I); 7092 7093 return TTI.getAddressComputationCost(ValTy) + 7094 TTI.getMemoryOpCost(I->getOpcode(), ValTy, Alignment, AS, 7095 TTI::TCK_RecipThroughput, I); 7096 } 7097 return getWideningCost(I, VF); 7098 } 7099 7100 LoopVectorizationCostModel::VectorizationCostTy 7101 LoopVectorizationCostModel::getInstructionCost(Instruction *I, 7102 ElementCount VF) { 7103 // If we know that this instruction will remain uniform, check the cost of 7104 // the scalar version. 7105 if (isUniformAfterVectorization(I, VF)) 7106 VF = ElementCount::getFixed(1); 7107 7108 if (VF.isVector() && isProfitableToScalarize(I, VF)) 7109 return VectorizationCostTy(InstsToScalarize[VF][I], false); 7110 7111 // Forced scalars do not have any scalarization overhead. 7112 auto ForcedScalar = ForcedScalars.find(VF); 7113 if (VF.isVector() && ForcedScalar != ForcedScalars.end()) { 7114 auto InstSet = ForcedScalar->second; 7115 if (InstSet.count(I)) 7116 return VectorizationCostTy( 7117 (getInstructionCost(I, ElementCount::getFixed(1)).first * 7118 VF.getKnownMinValue()), 7119 false); 7120 } 7121 7122 Type *VectorTy; 7123 InstructionCost C = getInstructionCost(I, VF, VectorTy); 7124 7125 bool TypeNotScalarized = 7126 VF.isVector() && VectorTy->isVectorTy() && 7127 TTI.getNumberOfParts(VectorTy) < VF.getKnownMinValue(); 7128 return VectorizationCostTy(C, TypeNotScalarized); 7129 } 7130 7131 InstructionCost 7132 LoopVectorizationCostModel::getScalarizationOverhead(Instruction *I, 7133 ElementCount VF) const { 7134 7135 if (VF.isScalable()) 7136 return InstructionCost::getInvalid(); 7137 7138 if (VF.isScalar()) 7139 return 0; 7140 7141 InstructionCost Cost = 0; 7142 Type *RetTy = ToVectorTy(I->getType(), VF); 7143 if (!RetTy->isVoidTy() && 7144 (!isa<LoadInst>(I) || !TTI.supportsEfficientVectorElementLoadStore())) 7145 Cost += TTI.getScalarizationOverhead( 7146 cast<VectorType>(RetTy), APInt::getAllOnesValue(VF.getKnownMinValue()), 7147 true, false); 7148 7149 // Some targets keep addresses scalar. 7150 if (isa<LoadInst>(I) && !TTI.prefersVectorizedAddressing()) 7151 return Cost; 7152 7153 // Some targets support efficient element stores. 7154 if (isa<StoreInst>(I) && TTI.supportsEfficientVectorElementLoadStore()) 7155 return Cost; 7156 7157 // Collect operands to consider. 7158 CallInst *CI = dyn_cast<CallInst>(I); 7159 Instruction::op_range Ops = CI ? CI->arg_operands() : I->operands(); 7160 7161 // Skip operands that do not require extraction/scalarization and do not incur 7162 // any overhead. 7163 SmallVector<Type *> Tys; 7164 for (auto *V : filterExtractingOperands(Ops, VF)) 7165 Tys.push_back(MaybeVectorizeType(V->getType(), VF)); 7166 return Cost + TTI.getOperandsScalarizationOverhead( 7167 filterExtractingOperands(Ops, VF), Tys); 7168 } 7169 7170 void LoopVectorizationCostModel::setCostBasedWideningDecision(ElementCount VF) { 7171 if (VF.isScalar()) 7172 return; 7173 NumPredStores = 0; 7174 for (BasicBlock *BB : TheLoop->blocks()) { 7175 // For each instruction in the old loop. 7176 for (Instruction &I : *BB) { 7177 Value *Ptr = getLoadStorePointerOperand(&I); 7178 if (!Ptr) 7179 continue; 7180 7181 // TODO: We should generate better code and update the cost model for 7182 // predicated uniform stores. Today they are treated as any other 7183 // predicated store (see added test cases in 7184 // invariant-store-vectorization.ll). 7185 if (isa<StoreInst>(&I) && isScalarWithPredication(&I)) 7186 NumPredStores++; 7187 7188 if (Legal->isUniformMemOp(I)) { 7189 // TODO: Avoid replicating loads and stores instead of 7190 // relying on instcombine to remove them. 7191 // Load: Scalar load + broadcast 7192 // Store: Scalar store + isLoopInvariantStoreValue ? 0 : extract 7193 InstructionCost Cost = getUniformMemOpCost(&I, VF); 7194 setWideningDecision(&I, VF, CM_Scalarize, Cost); 7195 continue; 7196 } 7197 7198 // We assume that widening is the best solution when possible. 7199 if (memoryInstructionCanBeWidened(&I, VF)) { 7200 InstructionCost Cost = getConsecutiveMemOpCost(&I, VF); 7201 int ConsecutiveStride = 7202 Legal->isConsecutivePtr(getLoadStorePointerOperand(&I)); 7203 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) && 7204 "Expected consecutive stride."); 7205 InstWidening Decision = 7206 ConsecutiveStride == 1 ? CM_Widen : CM_Widen_Reverse; 7207 setWideningDecision(&I, VF, Decision, Cost); 7208 continue; 7209 } 7210 7211 // Choose between Interleaving, Gather/Scatter or Scalarization. 7212 InstructionCost InterleaveCost = InstructionCost::getInvalid(); 7213 unsigned NumAccesses = 1; 7214 if (isAccessInterleaved(&I)) { 7215 auto Group = getInterleavedAccessGroup(&I); 7216 assert(Group && "Fail to get an interleaved access group."); 7217 7218 // Make one decision for the whole group. 7219 if (getWideningDecision(&I, VF) != CM_Unknown) 7220 continue; 7221 7222 NumAccesses = Group->getNumMembers(); 7223 if (interleavedAccessCanBeWidened(&I, VF)) 7224 InterleaveCost = getInterleaveGroupCost(&I, VF); 7225 } 7226 7227 InstructionCost GatherScatterCost = 7228 isLegalGatherOrScatter(&I) 7229 ? getGatherScatterCost(&I, VF) * NumAccesses 7230 : InstructionCost::getInvalid(); 7231 7232 InstructionCost ScalarizationCost = 7233 getMemInstScalarizationCost(&I, VF) * NumAccesses; 7234 7235 // Choose better solution for the current VF, 7236 // write down this decision and use it during vectorization. 7237 InstructionCost Cost; 7238 InstWidening Decision; 7239 if (InterleaveCost <= GatherScatterCost && 7240 InterleaveCost < ScalarizationCost) { 7241 Decision = CM_Interleave; 7242 Cost = InterleaveCost; 7243 } else if (GatherScatterCost < ScalarizationCost) { 7244 Decision = CM_GatherScatter; 7245 Cost = GatherScatterCost; 7246 } else { 7247 assert(!VF.isScalable() && 7248 "We cannot yet scalarise for scalable vectors"); 7249 Decision = CM_Scalarize; 7250 Cost = ScalarizationCost; 7251 } 7252 // If the instructions belongs to an interleave group, the whole group 7253 // receives the same decision. The whole group receives the cost, but 7254 // the cost will actually be assigned to one instruction. 7255 if (auto Group = getInterleavedAccessGroup(&I)) 7256 setWideningDecision(Group, VF, Decision, Cost); 7257 else 7258 setWideningDecision(&I, VF, Decision, Cost); 7259 } 7260 } 7261 7262 // Make sure that any load of address and any other address computation 7263 // remains scalar unless there is gather/scatter support. This avoids 7264 // inevitable extracts into address registers, and also has the benefit of 7265 // activating LSR more, since that pass can't optimize vectorized 7266 // addresses. 7267 if (TTI.prefersVectorizedAddressing()) 7268 return; 7269 7270 // Start with all scalar pointer uses. 7271 SmallPtrSet<Instruction *, 8> AddrDefs; 7272 for (BasicBlock *BB : TheLoop->blocks()) 7273 for (Instruction &I : *BB) { 7274 Instruction *PtrDef = 7275 dyn_cast_or_null<Instruction>(getLoadStorePointerOperand(&I)); 7276 if (PtrDef && TheLoop->contains(PtrDef) && 7277 getWideningDecision(&I, VF) != CM_GatherScatter) 7278 AddrDefs.insert(PtrDef); 7279 } 7280 7281 // Add all instructions used to generate the addresses. 7282 SmallVector<Instruction *, 4> Worklist; 7283 append_range(Worklist, AddrDefs); 7284 while (!Worklist.empty()) { 7285 Instruction *I = Worklist.pop_back_val(); 7286 for (auto &Op : I->operands()) 7287 if (auto *InstOp = dyn_cast<Instruction>(Op)) 7288 if ((InstOp->getParent() == I->getParent()) && !isa<PHINode>(InstOp) && 7289 AddrDefs.insert(InstOp).second) 7290 Worklist.push_back(InstOp); 7291 } 7292 7293 for (auto *I : AddrDefs) { 7294 if (isa<LoadInst>(I)) { 7295 // Setting the desired widening decision should ideally be handled in 7296 // by cost functions, but since this involves the task of finding out 7297 // if the loaded register is involved in an address computation, it is 7298 // instead changed here when we know this is the case. 7299 InstWidening Decision = getWideningDecision(I, VF); 7300 if (Decision == CM_Widen || Decision == CM_Widen_Reverse) 7301 // Scalarize a widened load of address. 7302 setWideningDecision( 7303 I, VF, CM_Scalarize, 7304 (VF.getKnownMinValue() * 7305 getMemoryInstructionCost(I, ElementCount::getFixed(1)))); 7306 else if (auto Group = getInterleavedAccessGroup(I)) { 7307 // Scalarize an interleave group of address loads. 7308 for (unsigned I = 0; I < Group->getFactor(); ++I) { 7309 if (Instruction *Member = Group->getMember(I)) 7310 setWideningDecision( 7311 Member, VF, CM_Scalarize, 7312 (VF.getKnownMinValue() * 7313 getMemoryInstructionCost(Member, ElementCount::getFixed(1)))); 7314 } 7315 } 7316 } else 7317 // Make sure I gets scalarized and a cost estimate without 7318 // scalarization overhead. 7319 ForcedScalars[VF].insert(I); 7320 } 7321 } 7322 7323 InstructionCost 7324 LoopVectorizationCostModel::getInstructionCost(Instruction *I, ElementCount VF, 7325 Type *&VectorTy) { 7326 Type *RetTy = I->getType(); 7327 if (canTruncateToMinimalBitwidth(I, VF)) 7328 RetTy = IntegerType::get(RetTy->getContext(), MinBWs[I]); 7329 auto SE = PSE.getSE(); 7330 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 7331 7332 auto hasSingleCopyAfterVectorization = [this](Instruction *I, 7333 ElementCount VF) -> bool { 7334 if (VF.isScalar()) 7335 return true; 7336 7337 auto Scalarized = InstsToScalarize.find(VF); 7338 assert(Scalarized != InstsToScalarize.end() && 7339 "VF not yet analyzed for scalarization profitability"); 7340 return !Scalarized->second.count(I) && 7341 llvm::all_of(I->users(), [&](User *U) { 7342 auto *UI = cast<Instruction>(U); 7343 return !Scalarized->second.count(UI); 7344 }); 7345 }; 7346 (void) hasSingleCopyAfterVectorization; 7347 7348 if (isScalarAfterVectorization(I, VF)) { 7349 // With the exception of GEPs and PHIs, after scalarization there should 7350 // only be one copy of the instruction generated in the loop. This is 7351 // because the VF is either 1, or any instructions that need scalarizing 7352 // have already been dealt with by the the time we get here. As a result, 7353 // it means we don't have to multiply the instruction cost by VF. 7354 assert(I->getOpcode() == Instruction::GetElementPtr || 7355 I->getOpcode() == Instruction::PHI || 7356 (I->getOpcode() == Instruction::BitCast && 7357 I->getType()->isPointerTy()) || 7358 hasSingleCopyAfterVectorization(I, VF)); 7359 VectorTy = RetTy; 7360 } else 7361 VectorTy = ToVectorTy(RetTy, VF); 7362 7363 // TODO: We need to estimate the cost of intrinsic calls. 7364 switch (I->getOpcode()) { 7365 case Instruction::GetElementPtr: 7366 // We mark this instruction as zero-cost because the cost of GEPs in 7367 // vectorized code depends on whether the corresponding memory instruction 7368 // is scalarized or not. Therefore, we handle GEPs with the memory 7369 // instruction cost. 7370 return 0; 7371 case Instruction::Br: { 7372 // In cases of scalarized and predicated instructions, there will be VF 7373 // predicated blocks in the vectorized loop. Each branch around these 7374 // blocks requires also an extract of its vector compare i1 element. 7375 bool ScalarPredicatedBB = false; 7376 BranchInst *BI = cast<BranchInst>(I); 7377 if (VF.isVector() && BI->isConditional() && 7378 (PredicatedBBsAfterVectorization.count(BI->getSuccessor(0)) || 7379 PredicatedBBsAfterVectorization.count(BI->getSuccessor(1)))) 7380 ScalarPredicatedBB = true; 7381 7382 if (ScalarPredicatedBB) { 7383 // Return cost for branches around scalarized and predicated blocks. 7384 assert(!VF.isScalable() && "scalable vectors not yet supported."); 7385 auto *Vec_i1Ty = 7386 VectorType::get(IntegerType::getInt1Ty(RetTy->getContext()), VF); 7387 return (TTI.getScalarizationOverhead( 7388 Vec_i1Ty, APInt::getAllOnesValue(VF.getKnownMinValue()), 7389 false, true) + 7390 (TTI.getCFInstrCost(Instruction::Br, CostKind) * 7391 VF.getKnownMinValue())); 7392 } else if (I->getParent() == TheLoop->getLoopLatch() || VF.isScalar()) 7393 // The back-edge branch will remain, as will all scalar branches. 7394 return TTI.getCFInstrCost(Instruction::Br, CostKind); 7395 else 7396 // This branch will be eliminated by if-conversion. 7397 return 0; 7398 // Note: We currently assume zero cost for an unconditional branch inside 7399 // a predicated block since it will become a fall-through, although we 7400 // may decide in the future to call TTI for all branches. 7401 } 7402 case Instruction::PHI: { 7403 auto *Phi = cast<PHINode>(I); 7404 7405 // First-order recurrences are replaced by vector shuffles inside the loop. 7406 // NOTE: Don't use ToVectorTy as SK_ExtractSubvector expects a vector type. 7407 if (VF.isVector() && Legal->isFirstOrderRecurrence(Phi)) 7408 return TTI.getShuffleCost( 7409 TargetTransformInfo::SK_ExtractSubvector, cast<VectorType>(VectorTy), 7410 None, VF.getKnownMinValue() - 1, FixedVectorType::get(RetTy, 1)); 7411 7412 // Phi nodes in non-header blocks (not inductions, reductions, etc.) are 7413 // converted into select instructions. We require N - 1 selects per phi 7414 // node, where N is the number of incoming values. 7415 if (VF.isVector() && Phi->getParent() != TheLoop->getHeader()) 7416 return (Phi->getNumIncomingValues() - 1) * 7417 TTI.getCmpSelInstrCost( 7418 Instruction::Select, ToVectorTy(Phi->getType(), VF), 7419 ToVectorTy(Type::getInt1Ty(Phi->getContext()), VF), 7420 CmpInst::BAD_ICMP_PREDICATE, CostKind); 7421 7422 return TTI.getCFInstrCost(Instruction::PHI, CostKind); 7423 } 7424 case Instruction::UDiv: 7425 case Instruction::SDiv: 7426 case Instruction::URem: 7427 case Instruction::SRem: 7428 // If we have a predicated instruction, it may not be executed for each 7429 // vector lane. Get the scalarization cost and scale this amount by the 7430 // probability of executing the predicated block. If the instruction is not 7431 // predicated, we fall through to the next case. 7432 if (VF.isVector() && isScalarWithPredication(I)) { 7433 InstructionCost Cost = 0; 7434 7435 // These instructions have a non-void type, so account for the phi nodes 7436 // that we will create. This cost is likely to be zero. The phi node 7437 // cost, if any, should be scaled by the block probability because it 7438 // models a copy at the end of each predicated block. 7439 Cost += VF.getKnownMinValue() * 7440 TTI.getCFInstrCost(Instruction::PHI, CostKind); 7441 7442 // The cost of the non-predicated instruction. 7443 Cost += VF.getKnownMinValue() * 7444 TTI.getArithmeticInstrCost(I->getOpcode(), RetTy, CostKind); 7445 7446 // The cost of insertelement and extractelement instructions needed for 7447 // scalarization. 7448 Cost += getScalarizationOverhead(I, VF); 7449 7450 // Scale the cost by the probability of executing the predicated blocks. 7451 // This assumes the predicated block for each vector lane is equally 7452 // likely. 7453 return Cost / getReciprocalPredBlockProb(); 7454 } 7455 LLVM_FALLTHROUGH; 7456 case Instruction::Add: 7457 case Instruction::FAdd: 7458 case Instruction::Sub: 7459 case Instruction::FSub: 7460 case Instruction::Mul: 7461 case Instruction::FMul: 7462 case Instruction::FDiv: 7463 case Instruction::FRem: 7464 case Instruction::Shl: 7465 case Instruction::LShr: 7466 case Instruction::AShr: 7467 case Instruction::And: 7468 case Instruction::Or: 7469 case Instruction::Xor: { 7470 // Since we will replace the stride by 1 the multiplication should go away. 7471 if (I->getOpcode() == Instruction::Mul && isStrideMul(I, Legal)) 7472 return 0; 7473 7474 // Detect reduction patterns 7475 InstructionCost RedCost; 7476 if ((RedCost = getReductionPatternCost(I, VF, VectorTy, CostKind)) 7477 .isValid()) 7478 return RedCost; 7479 7480 // Certain instructions can be cheaper to vectorize if they have a constant 7481 // second vector operand. One example of this are shifts on x86. 7482 Value *Op2 = I->getOperand(1); 7483 TargetTransformInfo::OperandValueProperties Op2VP; 7484 TargetTransformInfo::OperandValueKind Op2VK = 7485 TTI.getOperandInfo(Op2, Op2VP); 7486 if (Op2VK == TargetTransformInfo::OK_AnyValue && Legal->isUniform(Op2)) 7487 Op2VK = TargetTransformInfo::OK_UniformValue; 7488 7489 SmallVector<const Value *, 4> Operands(I->operand_values()); 7490 return TTI.getArithmeticInstrCost( 7491 I->getOpcode(), VectorTy, CostKind, TargetTransformInfo::OK_AnyValue, 7492 Op2VK, TargetTransformInfo::OP_None, Op2VP, Operands, I); 7493 } 7494 case Instruction::FNeg: { 7495 return TTI.getArithmeticInstrCost( 7496 I->getOpcode(), VectorTy, CostKind, TargetTransformInfo::OK_AnyValue, 7497 TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OP_None, 7498 TargetTransformInfo::OP_None, I->getOperand(0), I); 7499 } 7500 case Instruction::Select: { 7501 SelectInst *SI = cast<SelectInst>(I); 7502 const SCEV *CondSCEV = SE->getSCEV(SI->getCondition()); 7503 bool ScalarCond = (SE->isLoopInvariant(CondSCEV, TheLoop)); 7504 7505 const Value *Op0, *Op1; 7506 using namespace llvm::PatternMatch; 7507 if (!ScalarCond && (match(I, m_LogicalAnd(m_Value(Op0), m_Value(Op1))) || 7508 match(I, m_LogicalOr(m_Value(Op0), m_Value(Op1))))) { 7509 // select x, y, false --> x & y 7510 // select x, true, y --> x | y 7511 TTI::OperandValueProperties Op1VP = TTI::OP_None; 7512 TTI::OperandValueProperties Op2VP = TTI::OP_None; 7513 TTI::OperandValueKind Op1VK = TTI::getOperandInfo(Op0, Op1VP); 7514 TTI::OperandValueKind Op2VK = TTI::getOperandInfo(Op1, Op2VP); 7515 assert(Op0->getType()->getScalarSizeInBits() == 1 && 7516 Op1->getType()->getScalarSizeInBits() == 1); 7517 7518 SmallVector<const Value *, 2> Operands{Op0, Op1}; 7519 return TTI.getArithmeticInstrCost( 7520 match(I, m_LogicalOr()) ? Instruction::Or : Instruction::And, VectorTy, 7521 CostKind, Op1VK, Op2VK, Op1VP, Op2VP, Operands, I); 7522 } 7523 7524 Type *CondTy = SI->getCondition()->getType(); 7525 if (!ScalarCond) 7526 CondTy = VectorType::get(CondTy, VF); 7527 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, CondTy, 7528 CmpInst::BAD_ICMP_PREDICATE, CostKind, I); 7529 } 7530 case Instruction::ICmp: 7531 case Instruction::FCmp: { 7532 Type *ValTy = I->getOperand(0)->getType(); 7533 Instruction *Op0AsInstruction = dyn_cast<Instruction>(I->getOperand(0)); 7534 if (canTruncateToMinimalBitwidth(Op0AsInstruction, VF)) 7535 ValTy = IntegerType::get(ValTy->getContext(), MinBWs[Op0AsInstruction]); 7536 VectorTy = ToVectorTy(ValTy, VF); 7537 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, nullptr, 7538 CmpInst::BAD_ICMP_PREDICATE, CostKind, I); 7539 } 7540 case Instruction::Store: 7541 case Instruction::Load: { 7542 ElementCount Width = VF; 7543 if (Width.isVector()) { 7544 InstWidening Decision = getWideningDecision(I, Width); 7545 assert(Decision != CM_Unknown && 7546 "CM decision should be taken at this point"); 7547 if (Decision == CM_Scalarize) 7548 Width = ElementCount::getFixed(1); 7549 } 7550 VectorTy = ToVectorTy(getMemInstValueType(I), Width); 7551 return getMemoryInstructionCost(I, VF); 7552 } 7553 case Instruction::BitCast: 7554 if (I->getType()->isPointerTy()) 7555 return 0; 7556 LLVM_FALLTHROUGH; 7557 case Instruction::ZExt: 7558 case Instruction::SExt: 7559 case Instruction::FPToUI: 7560 case Instruction::FPToSI: 7561 case Instruction::FPExt: 7562 case Instruction::PtrToInt: 7563 case Instruction::IntToPtr: 7564 case Instruction::SIToFP: 7565 case Instruction::UIToFP: 7566 case Instruction::Trunc: 7567 case Instruction::FPTrunc: { 7568 // Computes the CastContextHint from a Load/Store instruction. 7569 auto ComputeCCH = [&](Instruction *I) -> TTI::CastContextHint { 7570 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) && 7571 "Expected a load or a store!"); 7572 7573 if (VF.isScalar() || !TheLoop->contains(I)) 7574 return TTI::CastContextHint::Normal; 7575 7576 switch (getWideningDecision(I, VF)) { 7577 case LoopVectorizationCostModel::CM_GatherScatter: 7578 return TTI::CastContextHint::GatherScatter; 7579 case LoopVectorizationCostModel::CM_Interleave: 7580 return TTI::CastContextHint::Interleave; 7581 case LoopVectorizationCostModel::CM_Scalarize: 7582 case LoopVectorizationCostModel::CM_Widen: 7583 return Legal->isMaskRequired(I) ? TTI::CastContextHint::Masked 7584 : TTI::CastContextHint::Normal; 7585 case LoopVectorizationCostModel::CM_Widen_Reverse: 7586 return TTI::CastContextHint::Reversed; 7587 case LoopVectorizationCostModel::CM_Unknown: 7588 llvm_unreachable("Instr did not go through cost modelling?"); 7589 } 7590 7591 llvm_unreachable("Unhandled case!"); 7592 }; 7593 7594 unsigned Opcode = I->getOpcode(); 7595 TTI::CastContextHint CCH = TTI::CastContextHint::None; 7596 // For Trunc, the context is the only user, which must be a StoreInst. 7597 if (Opcode == Instruction::Trunc || Opcode == Instruction::FPTrunc) { 7598 if (I->hasOneUse()) 7599 if (StoreInst *Store = dyn_cast<StoreInst>(*I->user_begin())) 7600 CCH = ComputeCCH(Store); 7601 } 7602 // For Z/Sext, the context is the operand, which must be a LoadInst. 7603 else if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt || 7604 Opcode == Instruction::FPExt) { 7605 if (LoadInst *Load = dyn_cast<LoadInst>(I->getOperand(0))) 7606 CCH = ComputeCCH(Load); 7607 } 7608 7609 // We optimize the truncation of induction variables having constant 7610 // integer steps. The cost of these truncations is the same as the scalar 7611 // operation. 7612 if (isOptimizableIVTruncate(I, VF)) { 7613 auto *Trunc = cast<TruncInst>(I); 7614 return TTI.getCastInstrCost(Instruction::Trunc, Trunc->getDestTy(), 7615 Trunc->getSrcTy(), CCH, CostKind, Trunc); 7616 } 7617 7618 // Detect reduction patterns 7619 InstructionCost RedCost; 7620 if ((RedCost = getReductionPatternCost(I, VF, VectorTy, CostKind)) 7621 .isValid()) 7622 return RedCost; 7623 7624 Type *SrcScalarTy = I->getOperand(0)->getType(); 7625 Type *SrcVecTy = 7626 VectorTy->isVectorTy() ? ToVectorTy(SrcScalarTy, VF) : SrcScalarTy; 7627 if (canTruncateToMinimalBitwidth(I, VF)) { 7628 // This cast is going to be shrunk. This may remove the cast or it might 7629 // turn it into slightly different cast. For example, if MinBW == 16, 7630 // "zext i8 %1 to i32" becomes "zext i8 %1 to i16". 7631 // 7632 // Calculate the modified src and dest types. 7633 Type *MinVecTy = VectorTy; 7634 if (Opcode == Instruction::Trunc) { 7635 SrcVecTy = smallestIntegerVectorType(SrcVecTy, MinVecTy); 7636 VectorTy = 7637 largestIntegerVectorType(ToVectorTy(I->getType(), VF), MinVecTy); 7638 } else if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) { 7639 SrcVecTy = largestIntegerVectorType(SrcVecTy, MinVecTy); 7640 VectorTy = 7641 smallestIntegerVectorType(ToVectorTy(I->getType(), VF), MinVecTy); 7642 } 7643 } 7644 7645 return TTI.getCastInstrCost(Opcode, VectorTy, SrcVecTy, CCH, CostKind, I); 7646 } 7647 case Instruction::Call: { 7648 bool NeedToScalarize; 7649 CallInst *CI = cast<CallInst>(I); 7650 InstructionCost CallCost = getVectorCallCost(CI, VF, NeedToScalarize); 7651 if (getVectorIntrinsicIDForCall(CI, TLI)) { 7652 InstructionCost IntrinsicCost = getVectorIntrinsicCost(CI, VF); 7653 return std::min(CallCost, IntrinsicCost); 7654 } 7655 return CallCost; 7656 } 7657 case Instruction::ExtractValue: 7658 return TTI.getInstructionCost(I, TTI::TCK_RecipThroughput); 7659 default: 7660 // This opcode is unknown. Assume that it is the same as 'mul'. 7661 return TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy, CostKind); 7662 } // end of switch. 7663 } 7664 7665 char LoopVectorize::ID = 0; 7666 7667 static const char lv_name[] = "Loop Vectorization"; 7668 7669 INITIALIZE_PASS_BEGIN(LoopVectorize, LV_NAME, lv_name, false, false) 7670 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass) 7671 INITIALIZE_PASS_DEPENDENCY(BasicAAWrapperPass) 7672 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) 7673 INITIALIZE_PASS_DEPENDENCY(GlobalsAAWrapperPass) 7674 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker) 7675 INITIALIZE_PASS_DEPENDENCY(BlockFrequencyInfoWrapperPass) 7676 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass) 7677 INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass) 7678 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass) 7679 INITIALIZE_PASS_DEPENDENCY(LoopAccessLegacyAnalysis) 7680 INITIALIZE_PASS_DEPENDENCY(DemandedBitsWrapperPass) 7681 INITIALIZE_PASS_DEPENDENCY(OptimizationRemarkEmitterWrapperPass) 7682 INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass) 7683 INITIALIZE_PASS_DEPENDENCY(InjectTLIMappingsLegacy) 7684 INITIALIZE_PASS_END(LoopVectorize, LV_NAME, lv_name, false, false) 7685 7686 namespace llvm { 7687 7688 Pass *createLoopVectorizePass() { return new LoopVectorize(); } 7689 7690 Pass *createLoopVectorizePass(bool InterleaveOnlyWhenForced, 7691 bool VectorizeOnlyWhenForced) { 7692 return new LoopVectorize(InterleaveOnlyWhenForced, VectorizeOnlyWhenForced); 7693 } 7694 7695 } // end namespace llvm 7696 7697 bool LoopVectorizationCostModel::isConsecutiveLoadOrStore(Instruction *Inst) { 7698 // Check if the pointer operand of a load or store instruction is 7699 // consecutive. 7700 if (auto *Ptr = getLoadStorePointerOperand(Inst)) 7701 return Legal->isConsecutivePtr(Ptr); 7702 return false; 7703 } 7704 7705 void LoopVectorizationCostModel::collectValuesToIgnore() { 7706 // Ignore ephemeral values. 7707 CodeMetrics::collectEphemeralValues(TheLoop, AC, ValuesToIgnore); 7708 7709 // Ignore type-promoting instructions we identified during reduction 7710 // detection. 7711 for (auto &Reduction : Legal->getReductionVars()) { 7712 RecurrenceDescriptor &RedDes = Reduction.second; 7713 const SmallPtrSetImpl<Instruction *> &Casts = RedDes.getCastInsts(); 7714 VecValuesToIgnore.insert(Casts.begin(), Casts.end()); 7715 } 7716 // Ignore type-casting instructions we identified during induction 7717 // detection. 7718 for (auto &Induction : Legal->getInductionVars()) { 7719 InductionDescriptor &IndDes = Induction.second; 7720 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts(); 7721 VecValuesToIgnore.insert(Casts.begin(), Casts.end()); 7722 } 7723 } 7724 7725 void LoopVectorizationCostModel::collectInLoopReductions() { 7726 for (auto &Reduction : Legal->getReductionVars()) { 7727 PHINode *Phi = Reduction.first; 7728 RecurrenceDescriptor &RdxDesc = Reduction.second; 7729 7730 // We don't collect reductions that are type promoted (yet). 7731 if (RdxDesc.getRecurrenceType() != Phi->getType()) 7732 continue; 7733 7734 // If the target would prefer this reduction to happen "in-loop", then we 7735 // want to record it as such. 7736 unsigned Opcode = RdxDesc.getOpcode(); 7737 if (!PreferInLoopReductions && !useOrderedReductions(RdxDesc) && 7738 !TTI.preferInLoopReduction(Opcode, Phi->getType(), 7739 TargetTransformInfo::ReductionFlags())) 7740 continue; 7741 7742 // Check that we can correctly put the reductions into the loop, by 7743 // finding the chain of operations that leads from the phi to the loop 7744 // exit value. 7745 SmallVector<Instruction *, 4> ReductionOperations = 7746 RdxDesc.getReductionOpChain(Phi, TheLoop); 7747 bool InLoop = !ReductionOperations.empty(); 7748 if (InLoop) { 7749 InLoopReductionChains[Phi] = ReductionOperations; 7750 // Add the elements to InLoopReductionImmediateChains for cost modelling. 7751 Instruction *LastChain = Phi; 7752 for (auto *I : ReductionOperations) { 7753 InLoopReductionImmediateChains[I] = LastChain; 7754 LastChain = I; 7755 } 7756 } 7757 LLVM_DEBUG(dbgs() << "LV: Using " << (InLoop ? "inloop" : "out of loop") 7758 << " reduction for phi: " << *Phi << "\n"); 7759 } 7760 } 7761 7762 // TODO: we could return a pair of values that specify the max VF and 7763 // min VF, to be used in `buildVPlans(MinVF, MaxVF)` instead of 7764 // `buildVPlans(VF, VF)`. We cannot do it because VPLAN at the moment 7765 // doesn't have a cost model that can choose which plan to execute if 7766 // more than one is generated. 7767 static unsigned determineVPlanVF(const unsigned WidestVectorRegBits, 7768 LoopVectorizationCostModel &CM) { 7769 unsigned WidestType; 7770 std::tie(std::ignore, WidestType) = CM.getSmallestAndWidestTypes(); 7771 return WidestVectorRegBits / WidestType; 7772 } 7773 7774 VectorizationFactor 7775 LoopVectorizationPlanner::planInVPlanNativePath(ElementCount UserVF) { 7776 assert(!UserVF.isScalable() && "scalable vectors not yet supported"); 7777 ElementCount VF = UserVF; 7778 // Outer loop handling: They may require CFG and instruction level 7779 // transformations before even evaluating whether vectorization is profitable. 7780 // Since we cannot modify the incoming IR, we need to build VPlan upfront in 7781 // the vectorization pipeline. 7782 if (!OrigLoop->isInnermost()) { 7783 // If the user doesn't provide a vectorization factor, determine a 7784 // reasonable one. 7785 if (UserVF.isZero()) { 7786 VF = ElementCount::getFixed(determineVPlanVF( 7787 TTI->getRegisterBitWidth(TargetTransformInfo::RGK_FixedWidthVector) 7788 .getFixedSize(), 7789 CM)); 7790 LLVM_DEBUG(dbgs() << "LV: VPlan computed VF " << VF << ".\n"); 7791 7792 // Make sure we have a VF > 1 for stress testing. 7793 if (VPlanBuildStressTest && (VF.isScalar() || VF.isZero())) { 7794 LLVM_DEBUG(dbgs() << "LV: VPlan stress testing: " 7795 << "overriding computed VF.\n"); 7796 VF = ElementCount::getFixed(4); 7797 } 7798 } 7799 assert(EnableVPlanNativePath && "VPlan-native path is not enabled."); 7800 assert(isPowerOf2_32(VF.getKnownMinValue()) && 7801 "VF needs to be a power of two"); 7802 LLVM_DEBUG(dbgs() << "LV: Using " << (!UserVF.isZero() ? "user " : "") 7803 << "VF " << VF << " to build VPlans.\n"); 7804 buildVPlans(VF, VF); 7805 7806 // For VPlan build stress testing, we bail out after VPlan construction. 7807 if (VPlanBuildStressTest) 7808 return VectorizationFactor::Disabled(); 7809 7810 return {VF, 0 /*Cost*/}; 7811 } 7812 7813 LLVM_DEBUG( 7814 dbgs() << "LV: Not vectorizing. Inner loops aren't supported in the " 7815 "VPlan-native path.\n"); 7816 return VectorizationFactor::Disabled(); 7817 } 7818 7819 Optional<VectorizationFactor> 7820 LoopVectorizationPlanner::plan(ElementCount UserVF, unsigned UserIC) { 7821 assert(OrigLoop->isInnermost() && "Inner loop expected."); 7822 Optional<ElementCount> MaybeMaxVF = CM.computeMaxVF(UserVF, UserIC); 7823 if (!MaybeMaxVF) // Cases that should not to be vectorized nor interleaved. 7824 return None; 7825 7826 // Invalidate interleave groups if all blocks of loop will be predicated. 7827 if (CM.blockNeedsPredication(OrigLoop->getHeader()) && 7828 !useMaskedInterleavedAccesses(*TTI)) { 7829 LLVM_DEBUG( 7830 dbgs() 7831 << "LV: Invalidate all interleaved groups due to fold-tail by masking " 7832 "which requires masked-interleaved support.\n"); 7833 if (CM.InterleaveInfo.invalidateGroups()) 7834 // Invalidating interleave groups also requires invalidating all decisions 7835 // based on them, which includes widening decisions and uniform and scalar 7836 // values. 7837 CM.invalidateCostModelingDecisions(); 7838 } 7839 7840 ElementCount MaxVF = MaybeMaxVF.getValue(); 7841 assert(MaxVF.isNonZero() && "MaxVF is zero."); 7842 7843 bool UserVFIsLegal = ElementCount::isKnownLE(UserVF, MaxVF); 7844 if (!UserVF.isZero() && 7845 (UserVFIsLegal || (UserVF.isScalable() && MaxVF.isScalable()))) { 7846 // FIXME: MaxVF is temporarily used inplace of UserVF for illegal scalable 7847 // VFs here, this should be reverted to only use legal UserVFs once the 7848 // loop below supports scalable VFs. 7849 ElementCount VF = UserVFIsLegal ? UserVF : MaxVF; 7850 LLVM_DEBUG(dbgs() << "LV: Using " << (UserVFIsLegal ? "user" : "max") 7851 << " VF " << VF << ".\n"); 7852 assert(isPowerOf2_32(VF.getKnownMinValue()) && 7853 "VF needs to be a power of two"); 7854 // Collect the instructions (and their associated costs) that will be more 7855 // profitable to scalarize. 7856 CM.selectUserVectorizationFactor(VF); 7857 CM.collectInLoopReductions(); 7858 buildVPlansWithVPRecipes(VF, VF); 7859 LLVM_DEBUG(printPlans(dbgs())); 7860 return {{VF, 0}}; 7861 } 7862 7863 assert(!MaxVF.isScalable() && 7864 "Scalable vectors not yet supported beyond this point"); 7865 7866 for (ElementCount VF = ElementCount::getFixed(1); 7867 ElementCount::isKnownLE(VF, MaxVF); VF *= 2) { 7868 // Collect Uniform and Scalar instructions after vectorization with VF. 7869 CM.collectUniformsAndScalars(VF); 7870 7871 // Collect the instructions (and their associated costs) that will be more 7872 // profitable to scalarize. 7873 if (VF.isVector()) 7874 CM.collectInstsToScalarize(VF); 7875 } 7876 7877 CM.collectInLoopReductions(); 7878 7879 buildVPlansWithVPRecipes(ElementCount::getFixed(1), MaxVF); 7880 LLVM_DEBUG(printPlans(dbgs())); 7881 if (MaxVF.isScalar()) 7882 return VectorizationFactor::Disabled(); 7883 7884 // Select the optimal vectorization factor. 7885 auto SelectedVF = CM.selectVectorizationFactor(MaxVF); 7886 7887 // Check if it is profitable to vectorize with runtime checks. 7888 unsigned NumRuntimePointerChecks = Requirements.getNumRuntimePointerChecks(); 7889 if (SelectedVF.Width.getKnownMinValue() > 1 && NumRuntimePointerChecks) { 7890 bool PragmaThresholdReached = 7891 NumRuntimePointerChecks > PragmaVectorizeMemoryCheckThreshold; 7892 bool ThresholdReached = 7893 NumRuntimePointerChecks > VectorizerParams::RuntimeMemoryCheckThreshold; 7894 if ((ThresholdReached && !Hints.allowReordering()) || 7895 PragmaThresholdReached) { 7896 ORE->emit([&]() { 7897 return OptimizationRemarkAnalysisAliasing( 7898 DEBUG_TYPE, "CantReorderMemOps", OrigLoop->getStartLoc(), 7899 OrigLoop->getHeader()) 7900 << "loop not vectorized: cannot prove it is safe to reorder " 7901 "memory operations"; 7902 }); 7903 LLVM_DEBUG(dbgs() << "LV: Too many memory checks needed.\n"); 7904 Hints.emitRemarkWithHints(); 7905 return VectorizationFactor::Disabled(); 7906 } 7907 } 7908 return SelectedVF; 7909 } 7910 7911 void LoopVectorizationPlanner::setBestPlan(ElementCount VF, unsigned UF) { 7912 LLVM_DEBUG(dbgs() << "Setting best plan to VF=" << VF << ", UF=" << UF 7913 << '\n'); 7914 BestVF = VF; 7915 BestUF = UF; 7916 7917 erase_if(VPlans, [VF](const VPlanPtr &Plan) { 7918 return !Plan->hasVF(VF); 7919 }); 7920 assert(VPlans.size() == 1 && "Best VF has not a single VPlan."); 7921 } 7922 7923 void LoopVectorizationPlanner::executePlan(InnerLoopVectorizer &ILV, 7924 DominatorTree *DT) { 7925 // Perform the actual loop transformation. 7926 7927 // 1. Create a new empty loop. Unlink the old loop and connect the new one. 7928 assert(BestVF.hasValue() && "Vectorization Factor is missing"); 7929 assert(VPlans.size() == 1 && "Not a single VPlan to execute."); 7930 7931 VPTransformState State{ 7932 *BestVF, BestUF, LI, DT, ILV.Builder, &ILV, VPlans.front().get()}; 7933 State.CFG.PrevBB = ILV.createVectorizedLoopSkeleton(); 7934 State.TripCount = ILV.getOrCreateTripCount(nullptr); 7935 State.CanonicalIV = ILV.Induction; 7936 7937 ILV.printDebugTracesAtStart(); 7938 7939 //===------------------------------------------------===// 7940 // 7941 // Notice: any optimization or new instruction that go 7942 // into the code below should also be implemented in 7943 // the cost-model. 7944 // 7945 //===------------------------------------------------===// 7946 7947 // 2. Copy and widen instructions from the old loop into the new loop. 7948 VPlans.front()->execute(&State); 7949 7950 // 3. Fix the vectorized code: take care of header phi's, live-outs, 7951 // predication, updating analyses. 7952 ILV.fixVectorizedLoop(State); 7953 7954 ILV.printDebugTracesAtEnd(); 7955 } 7956 7957 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 7958 void LoopVectorizationPlanner::printPlans(raw_ostream &O) { 7959 for (const auto &Plan : VPlans) 7960 if (PrintVPlansInDotFormat) 7961 Plan->printDOT(O); 7962 else 7963 Plan->print(O); 7964 } 7965 #endif 7966 7967 void LoopVectorizationPlanner::collectTriviallyDeadInstructions( 7968 SmallPtrSetImpl<Instruction *> &DeadInstructions) { 7969 7970 // We create new control-flow for the vectorized loop, so the original exit 7971 // conditions will be dead after vectorization if it's only used by the 7972 // terminator 7973 SmallVector<BasicBlock*> ExitingBlocks; 7974 OrigLoop->getExitingBlocks(ExitingBlocks); 7975 for (auto *BB : ExitingBlocks) { 7976 auto *Cmp = dyn_cast<Instruction>(BB->getTerminator()->getOperand(0)); 7977 if (!Cmp || !Cmp->hasOneUse()) 7978 continue; 7979 7980 // TODO: we should introduce a getUniqueExitingBlocks on Loop 7981 if (!DeadInstructions.insert(Cmp).second) 7982 continue; 7983 7984 // The operands of the icmp is often a dead trunc, used by IndUpdate. 7985 // TODO: can recurse through operands in general 7986 for (Value *Op : Cmp->operands()) { 7987 if (isa<TruncInst>(Op) && Op->hasOneUse()) 7988 DeadInstructions.insert(cast<Instruction>(Op)); 7989 } 7990 } 7991 7992 // We create new "steps" for induction variable updates to which the original 7993 // induction variables map. An original update instruction will be dead if 7994 // all its users except the induction variable are dead. 7995 auto *Latch = OrigLoop->getLoopLatch(); 7996 for (auto &Induction : Legal->getInductionVars()) { 7997 PHINode *Ind = Induction.first; 7998 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch)); 7999 8000 // If the tail is to be folded by masking, the primary induction variable, 8001 // if exists, isn't dead: it will be used for masking. Don't kill it. 8002 if (CM.foldTailByMasking() && IndUpdate == Legal->getPrimaryInduction()) 8003 continue; 8004 8005 if (llvm::all_of(IndUpdate->users(), [&](User *U) -> bool { 8006 return U == Ind || DeadInstructions.count(cast<Instruction>(U)); 8007 })) 8008 DeadInstructions.insert(IndUpdate); 8009 8010 // We record as "Dead" also the type-casting instructions we had identified 8011 // during induction analysis. We don't need any handling for them in the 8012 // vectorized loop because we have proven that, under a proper runtime 8013 // test guarding the vectorized loop, the value of the phi, and the casted 8014 // value of the phi, are the same. The last instruction in this casting chain 8015 // will get its scalar/vector/widened def from the scalar/vector/widened def 8016 // of the respective phi node. Any other casts in the induction def-use chain 8017 // have no other uses outside the phi update chain, and will be ignored. 8018 InductionDescriptor &IndDes = Induction.second; 8019 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts(); 8020 DeadInstructions.insert(Casts.begin(), Casts.end()); 8021 } 8022 } 8023 8024 Value *InnerLoopUnroller::reverseVector(Value *Vec) { return Vec; } 8025 8026 Value *InnerLoopUnroller::getBroadcastInstrs(Value *V) { return V; } 8027 8028 Value *InnerLoopUnroller::getStepVector(Value *Val, int StartIdx, Value *Step, 8029 Instruction::BinaryOps BinOp) { 8030 // When unrolling and the VF is 1, we only need to add a simple scalar. 8031 Type *Ty = Val->getType(); 8032 assert(!Ty->isVectorTy() && "Val must be a scalar"); 8033 8034 if (Ty->isFloatingPointTy()) { 8035 Constant *C = ConstantFP::get(Ty, (double)StartIdx); 8036 8037 // Floating-point operations inherit FMF via the builder's flags. 8038 Value *MulOp = Builder.CreateFMul(C, Step); 8039 return Builder.CreateBinOp(BinOp, Val, MulOp); 8040 } 8041 Constant *C = ConstantInt::get(Ty, StartIdx); 8042 return Builder.CreateAdd(Val, Builder.CreateMul(C, Step), "induction"); 8043 } 8044 8045 static void AddRuntimeUnrollDisableMetaData(Loop *L) { 8046 SmallVector<Metadata *, 4> MDs; 8047 // Reserve first location for self reference to the LoopID metadata node. 8048 MDs.push_back(nullptr); 8049 bool IsUnrollMetadata = false; 8050 MDNode *LoopID = L->getLoopID(); 8051 if (LoopID) { 8052 // First find existing loop unrolling disable metadata. 8053 for (unsigned i = 1, ie = LoopID->getNumOperands(); i < ie; ++i) { 8054 auto *MD = dyn_cast<MDNode>(LoopID->getOperand(i)); 8055 if (MD) { 8056 const auto *S = dyn_cast<MDString>(MD->getOperand(0)); 8057 IsUnrollMetadata = 8058 S && S->getString().startswith("llvm.loop.unroll.disable"); 8059 } 8060 MDs.push_back(LoopID->getOperand(i)); 8061 } 8062 } 8063 8064 if (!IsUnrollMetadata) { 8065 // Add runtime unroll disable metadata. 8066 LLVMContext &Context = L->getHeader()->getContext(); 8067 SmallVector<Metadata *, 1> DisableOperands; 8068 DisableOperands.push_back( 8069 MDString::get(Context, "llvm.loop.unroll.runtime.disable")); 8070 MDNode *DisableNode = MDNode::get(Context, DisableOperands); 8071 MDs.push_back(DisableNode); 8072 MDNode *NewLoopID = MDNode::get(Context, MDs); 8073 // Set operand 0 to refer to the loop id itself. 8074 NewLoopID->replaceOperandWith(0, NewLoopID); 8075 L->setLoopID(NewLoopID); 8076 } 8077 } 8078 8079 //===--------------------------------------------------------------------===// 8080 // EpilogueVectorizerMainLoop 8081 //===--------------------------------------------------------------------===// 8082 8083 /// This function is partially responsible for generating the control flow 8084 /// depicted in https://llvm.org/docs/Vectorizers.html#epilogue-vectorization. 8085 BasicBlock *EpilogueVectorizerMainLoop::createEpilogueVectorizedLoopSkeleton() { 8086 MDNode *OrigLoopID = OrigLoop->getLoopID(); 8087 Loop *Lp = createVectorLoopSkeleton(""); 8088 8089 // Generate the code to check the minimum iteration count of the vector 8090 // epilogue (see below). 8091 EPI.EpilogueIterationCountCheck = 8092 emitMinimumIterationCountCheck(Lp, LoopScalarPreHeader, true); 8093 EPI.EpilogueIterationCountCheck->setName("iter.check"); 8094 8095 // Generate the code to check any assumptions that we've made for SCEV 8096 // expressions. 8097 EPI.SCEVSafetyCheck = emitSCEVChecks(Lp, LoopScalarPreHeader); 8098 8099 // Generate the code that checks at runtime if arrays overlap. We put the 8100 // checks into a separate block to make the more common case of few elements 8101 // faster. 8102 EPI.MemSafetyCheck = emitMemRuntimeChecks(Lp, LoopScalarPreHeader); 8103 8104 // Generate the iteration count check for the main loop, *after* the check 8105 // for the epilogue loop, so that the path-length is shorter for the case 8106 // that goes directly through the vector epilogue. The longer-path length for 8107 // the main loop is compensated for, by the gain from vectorizing the larger 8108 // trip count. Note: the branch will get updated later on when we vectorize 8109 // the epilogue. 8110 EPI.MainLoopIterationCountCheck = 8111 emitMinimumIterationCountCheck(Lp, LoopScalarPreHeader, false); 8112 8113 // Generate the induction variable. 8114 OldInduction = Legal->getPrimaryInduction(); 8115 Type *IdxTy = Legal->getWidestInductionType(); 8116 Value *StartIdx = ConstantInt::get(IdxTy, 0); 8117 Constant *Step = ConstantInt::get(IdxTy, VF.getKnownMinValue() * UF); 8118 Value *CountRoundDown = getOrCreateVectorTripCount(Lp); 8119 EPI.VectorTripCount = CountRoundDown; 8120 Induction = 8121 createInductionVariable(Lp, StartIdx, CountRoundDown, Step, 8122 getDebugLocFromInstOrOperands(OldInduction)); 8123 8124 // Skip induction resume value creation here because they will be created in 8125 // the second pass. If we created them here, they wouldn't be used anyway, 8126 // because the vplan in the second pass still contains the inductions from the 8127 // original loop. 8128 8129 return completeLoopSkeleton(Lp, OrigLoopID); 8130 } 8131 8132 void EpilogueVectorizerMainLoop::printDebugTracesAtStart() { 8133 LLVM_DEBUG({ 8134 dbgs() << "Create Skeleton for epilogue vectorized loop (first pass)\n" 8135 << "Main Loop VF:" << EPI.MainLoopVF.getKnownMinValue() 8136 << ", Main Loop UF:" << EPI.MainLoopUF 8137 << ", Epilogue Loop VF:" << EPI.EpilogueVF.getKnownMinValue() 8138 << ", Epilogue Loop UF:" << EPI.EpilogueUF << "\n"; 8139 }); 8140 } 8141 8142 void EpilogueVectorizerMainLoop::printDebugTracesAtEnd() { 8143 DEBUG_WITH_TYPE(VerboseDebug, { 8144 dbgs() << "intermediate fn:\n" << *Induction->getFunction() << "\n"; 8145 }); 8146 } 8147 8148 BasicBlock *EpilogueVectorizerMainLoop::emitMinimumIterationCountCheck( 8149 Loop *L, BasicBlock *Bypass, bool ForEpilogue) { 8150 assert(L && "Expected valid Loop."); 8151 assert(Bypass && "Expected valid bypass basic block."); 8152 unsigned VFactor = 8153 ForEpilogue ? EPI.EpilogueVF.getKnownMinValue() : VF.getKnownMinValue(); 8154 unsigned UFactor = ForEpilogue ? EPI.EpilogueUF : UF; 8155 Value *Count = getOrCreateTripCount(L); 8156 // Reuse existing vector loop preheader for TC checks. 8157 // Note that new preheader block is generated for vector loop. 8158 BasicBlock *const TCCheckBlock = LoopVectorPreHeader; 8159 IRBuilder<> Builder(TCCheckBlock->getTerminator()); 8160 8161 // Generate code to check if the loop's trip count is less than VF * UF of the 8162 // main vector loop. 8163 auto P = 8164 Cost->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE : ICmpInst::ICMP_ULT; 8165 8166 Value *CheckMinIters = Builder.CreateICmp( 8167 P, Count, ConstantInt::get(Count->getType(), VFactor * UFactor), 8168 "min.iters.check"); 8169 8170 if (!ForEpilogue) 8171 TCCheckBlock->setName("vector.main.loop.iter.check"); 8172 8173 // Create new preheader for vector loop. 8174 LoopVectorPreHeader = SplitBlock(TCCheckBlock, TCCheckBlock->getTerminator(), 8175 DT, LI, nullptr, "vector.ph"); 8176 8177 if (ForEpilogue) { 8178 assert(DT->properlyDominates(DT->getNode(TCCheckBlock), 8179 DT->getNode(Bypass)->getIDom()) && 8180 "TC check is expected to dominate Bypass"); 8181 8182 // Update dominator for Bypass & LoopExit. 8183 DT->changeImmediateDominator(Bypass, TCCheckBlock); 8184 DT->changeImmediateDominator(LoopExitBlock, TCCheckBlock); 8185 8186 LoopBypassBlocks.push_back(TCCheckBlock); 8187 8188 // Save the trip count so we don't have to regenerate it in the 8189 // vec.epilog.iter.check. This is safe to do because the trip count 8190 // generated here dominates the vector epilog iter check. 8191 EPI.TripCount = Count; 8192 } 8193 8194 ReplaceInstWithInst( 8195 TCCheckBlock->getTerminator(), 8196 BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters)); 8197 8198 return TCCheckBlock; 8199 } 8200 8201 //===--------------------------------------------------------------------===// 8202 // EpilogueVectorizerEpilogueLoop 8203 //===--------------------------------------------------------------------===// 8204 8205 /// This function is partially responsible for generating the control flow 8206 /// depicted in https://llvm.org/docs/Vectorizers.html#epilogue-vectorization. 8207 BasicBlock * 8208 EpilogueVectorizerEpilogueLoop::createEpilogueVectorizedLoopSkeleton() { 8209 MDNode *OrigLoopID = OrigLoop->getLoopID(); 8210 Loop *Lp = createVectorLoopSkeleton("vec.epilog."); 8211 8212 // Now, compare the remaining count and if there aren't enough iterations to 8213 // execute the vectorized epilogue skip to the scalar part. 8214 BasicBlock *VecEpilogueIterationCountCheck = LoopVectorPreHeader; 8215 VecEpilogueIterationCountCheck->setName("vec.epilog.iter.check"); 8216 LoopVectorPreHeader = 8217 SplitBlock(LoopVectorPreHeader, LoopVectorPreHeader->getTerminator(), DT, 8218 LI, nullptr, "vec.epilog.ph"); 8219 emitMinimumVectorEpilogueIterCountCheck(Lp, LoopScalarPreHeader, 8220 VecEpilogueIterationCountCheck); 8221 8222 // Adjust the control flow taking the state info from the main loop 8223 // vectorization into account. 8224 assert(EPI.MainLoopIterationCountCheck && EPI.EpilogueIterationCountCheck && 8225 "expected this to be saved from the previous pass."); 8226 EPI.MainLoopIterationCountCheck->getTerminator()->replaceUsesOfWith( 8227 VecEpilogueIterationCountCheck, LoopVectorPreHeader); 8228 8229 DT->changeImmediateDominator(LoopVectorPreHeader, 8230 EPI.MainLoopIterationCountCheck); 8231 8232 EPI.EpilogueIterationCountCheck->getTerminator()->replaceUsesOfWith( 8233 VecEpilogueIterationCountCheck, LoopScalarPreHeader); 8234 8235 if (EPI.SCEVSafetyCheck) 8236 EPI.SCEVSafetyCheck->getTerminator()->replaceUsesOfWith( 8237 VecEpilogueIterationCountCheck, LoopScalarPreHeader); 8238 if (EPI.MemSafetyCheck) 8239 EPI.MemSafetyCheck->getTerminator()->replaceUsesOfWith( 8240 VecEpilogueIterationCountCheck, LoopScalarPreHeader); 8241 8242 DT->changeImmediateDominator( 8243 VecEpilogueIterationCountCheck, 8244 VecEpilogueIterationCountCheck->getSinglePredecessor()); 8245 8246 DT->changeImmediateDominator(LoopScalarPreHeader, 8247 EPI.EpilogueIterationCountCheck); 8248 DT->changeImmediateDominator(LoopExitBlock, EPI.EpilogueIterationCountCheck); 8249 8250 // Keep track of bypass blocks, as they feed start values to the induction 8251 // phis in the scalar loop preheader. 8252 if (EPI.SCEVSafetyCheck) 8253 LoopBypassBlocks.push_back(EPI.SCEVSafetyCheck); 8254 if (EPI.MemSafetyCheck) 8255 LoopBypassBlocks.push_back(EPI.MemSafetyCheck); 8256 LoopBypassBlocks.push_back(EPI.EpilogueIterationCountCheck); 8257 8258 // Generate a resume induction for the vector epilogue and put it in the 8259 // vector epilogue preheader 8260 Type *IdxTy = Legal->getWidestInductionType(); 8261 PHINode *EPResumeVal = PHINode::Create(IdxTy, 2, "vec.epilog.resume.val", 8262 LoopVectorPreHeader->getFirstNonPHI()); 8263 EPResumeVal->addIncoming(EPI.VectorTripCount, VecEpilogueIterationCountCheck); 8264 EPResumeVal->addIncoming(ConstantInt::get(IdxTy, 0), 8265 EPI.MainLoopIterationCountCheck); 8266 8267 // Generate the induction variable. 8268 OldInduction = Legal->getPrimaryInduction(); 8269 Value *CountRoundDown = getOrCreateVectorTripCount(Lp); 8270 Constant *Step = ConstantInt::get(IdxTy, VF.getKnownMinValue() * UF); 8271 Value *StartIdx = EPResumeVal; 8272 Induction = 8273 createInductionVariable(Lp, StartIdx, CountRoundDown, Step, 8274 getDebugLocFromInstOrOperands(OldInduction)); 8275 8276 // Generate induction resume values. These variables save the new starting 8277 // indexes for the scalar loop. They are used to test if there are any tail 8278 // iterations left once the vector loop has completed. 8279 // Note that when the vectorized epilogue is skipped due to iteration count 8280 // check, then the resume value for the induction variable comes from 8281 // the trip count of the main vector loop, hence passing the AdditionalBypass 8282 // argument. 8283 createInductionResumeValues(Lp, CountRoundDown, 8284 {VecEpilogueIterationCountCheck, 8285 EPI.VectorTripCount} /* AdditionalBypass */); 8286 8287 AddRuntimeUnrollDisableMetaData(Lp); 8288 return completeLoopSkeleton(Lp, OrigLoopID); 8289 } 8290 8291 BasicBlock * 8292 EpilogueVectorizerEpilogueLoop::emitMinimumVectorEpilogueIterCountCheck( 8293 Loop *L, BasicBlock *Bypass, BasicBlock *Insert) { 8294 8295 assert(EPI.TripCount && 8296 "Expected trip count to have been safed in the first pass."); 8297 assert( 8298 (!isa<Instruction>(EPI.TripCount) || 8299 DT->dominates(cast<Instruction>(EPI.TripCount)->getParent(), Insert)) && 8300 "saved trip count does not dominate insertion point."); 8301 Value *TC = EPI.TripCount; 8302 IRBuilder<> Builder(Insert->getTerminator()); 8303 Value *Count = Builder.CreateSub(TC, EPI.VectorTripCount, "n.vec.remaining"); 8304 8305 // Generate code to check if the loop's trip count is less than VF * UF of the 8306 // vector epilogue loop. 8307 auto P = 8308 Cost->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE : ICmpInst::ICMP_ULT; 8309 8310 Value *CheckMinIters = Builder.CreateICmp( 8311 P, Count, 8312 ConstantInt::get(Count->getType(), 8313 EPI.EpilogueVF.getKnownMinValue() * EPI.EpilogueUF), 8314 "min.epilog.iters.check"); 8315 8316 ReplaceInstWithInst( 8317 Insert->getTerminator(), 8318 BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters)); 8319 8320 LoopBypassBlocks.push_back(Insert); 8321 return Insert; 8322 } 8323 8324 void EpilogueVectorizerEpilogueLoop::printDebugTracesAtStart() { 8325 LLVM_DEBUG({ 8326 dbgs() << "Create Skeleton for epilogue vectorized loop (second pass)\n" 8327 << "Main Loop VF:" << EPI.MainLoopVF.getKnownMinValue() 8328 << ", Main Loop UF:" << EPI.MainLoopUF 8329 << ", Epilogue Loop VF:" << EPI.EpilogueVF.getKnownMinValue() 8330 << ", Epilogue Loop UF:" << EPI.EpilogueUF << "\n"; 8331 }); 8332 } 8333 8334 void EpilogueVectorizerEpilogueLoop::printDebugTracesAtEnd() { 8335 DEBUG_WITH_TYPE(VerboseDebug, { 8336 dbgs() << "final fn:\n" << *Induction->getFunction() << "\n"; 8337 }); 8338 } 8339 8340 bool LoopVectorizationPlanner::getDecisionAndClampRange( 8341 const std::function<bool(ElementCount)> &Predicate, VFRange &Range) { 8342 assert(!Range.isEmpty() && "Trying to test an empty VF range."); 8343 bool PredicateAtRangeStart = Predicate(Range.Start); 8344 8345 for (ElementCount TmpVF = Range.Start * 2; 8346 ElementCount::isKnownLT(TmpVF, Range.End); TmpVF *= 2) 8347 if (Predicate(TmpVF) != PredicateAtRangeStart) { 8348 Range.End = TmpVF; 8349 break; 8350 } 8351 8352 return PredicateAtRangeStart; 8353 } 8354 8355 /// Build VPlans for the full range of feasible VF's = {\p MinVF, 2 * \p MinVF, 8356 /// 4 * \p MinVF, ..., \p MaxVF} by repeatedly building a VPlan for a sub-range 8357 /// of VF's starting at a given VF and extending it as much as possible. Each 8358 /// vectorization decision can potentially shorten this sub-range during 8359 /// buildVPlan(). 8360 void LoopVectorizationPlanner::buildVPlans(ElementCount MinVF, 8361 ElementCount MaxVF) { 8362 auto MaxVFPlusOne = MaxVF.getWithIncrement(1); 8363 for (ElementCount VF = MinVF; ElementCount::isKnownLT(VF, MaxVFPlusOne);) { 8364 VFRange SubRange = {VF, MaxVFPlusOne}; 8365 VPlans.push_back(buildVPlan(SubRange)); 8366 VF = SubRange.End; 8367 } 8368 } 8369 8370 VPValue *VPRecipeBuilder::createEdgeMask(BasicBlock *Src, BasicBlock *Dst, 8371 VPlanPtr &Plan) { 8372 assert(is_contained(predecessors(Dst), Src) && "Invalid edge"); 8373 8374 // Look for cached value. 8375 std::pair<BasicBlock *, BasicBlock *> Edge(Src, Dst); 8376 EdgeMaskCacheTy::iterator ECEntryIt = EdgeMaskCache.find(Edge); 8377 if (ECEntryIt != EdgeMaskCache.end()) 8378 return ECEntryIt->second; 8379 8380 VPValue *SrcMask = createBlockInMask(Src, Plan); 8381 8382 // The terminator has to be a branch inst! 8383 BranchInst *BI = dyn_cast<BranchInst>(Src->getTerminator()); 8384 assert(BI && "Unexpected terminator found"); 8385 8386 if (!BI->isConditional() || BI->getSuccessor(0) == BI->getSuccessor(1)) 8387 return EdgeMaskCache[Edge] = SrcMask; 8388 8389 // If source is an exiting block, we know the exit edge is dynamically dead 8390 // in the vector loop, and thus we don't need to restrict the mask. Avoid 8391 // adding uses of an otherwise potentially dead instruction. 8392 if (OrigLoop->isLoopExiting(Src)) 8393 return EdgeMaskCache[Edge] = SrcMask; 8394 8395 VPValue *EdgeMask = Plan->getOrAddVPValue(BI->getCondition()); 8396 assert(EdgeMask && "No Edge Mask found for condition"); 8397 8398 if (BI->getSuccessor(0) != Dst) 8399 EdgeMask = Builder.createNot(EdgeMask); 8400 8401 if (SrcMask) { // Otherwise block in-mask is all-one, no need to AND. 8402 // The condition is 'SrcMask && EdgeMask', which is equivalent to 8403 // 'select i1 SrcMask, i1 EdgeMask, i1 false'. 8404 // The select version does not introduce new UB if SrcMask is false and 8405 // EdgeMask is poison. Using 'and' here introduces undefined behavior. 8406 VPValue *False = Plan->getOrAddVPValue( 8407 ConstantInt::getFalse(BI->getCondition()->getType())); 8408 EdgeMask = Builder.createSelect(SrcMask, EdgeMask, False); 8409 } 8410 8411 return EdgeMaskCache[Edge] = EdgeMask; 8412 } 8413 8414 VPValue *VPRecipeBuilder::createBlockInMask(BasicBlock *BB, VPlanPtr &Plan) { 8415 assert(OrigLoop->contains(BB) && "Block is not a part of a loop"); 8416 8417 // Look for cached value. 8418 BlockMaskCacheTy::iterator BCEntryIt = BlockMaskCache.find(BB); 8419 if (BCEntryIt != BlockMaskCache.end()) 8420 return BCEntryIt->second; 8421 8422 // All-one mask is modelled as no-mask following the convention for masked 8423 // load/store/gather/scatter. Initialize BlockMask to no-mask. 8424 VPValue *BlockMask = nullptr; 8425 8426 if (OrigLoop->getHeader() == BB) { 8427 if (!CM.blockNeedsPredication(BB)) 8428 return BlockMaskCache[BB] = BlockMask; // Loop incoming mask is all-one. 8429 8430 // Create the block in mask as the first non-phi instruction in the block. 8431 VPBuilder::InsertPointGuard Guard(Builder); 8432 auto NewInsertionPoint = Builder.getInsertBlock()->getFirstNonPhi(); 8433 Builder.setInsertPoint(Builder.getInsertBlock(), NewInsertionPoint); 8434 8435 // Introduce the early-exit compare IV <= BTC to form header block mask. 8436 // This is used instead of IV < TC because TC may wrap, unlike BTC. 8437 // Start by constructing the desired canonical IV. 8438 VPValue *IV = nullptr; 8439 if (Legal->getPrimaryInduction()) 8440 IV = Plan->getOrAddVPValue(Legal->getPrimaryInduction()); 8441 else { 8442 auto IVRecipe = new VPWidenCanonicalIVRecipe(); 8443 Builder.getInsertBlock()->insert(IVRecipe, NewInsertionPoint); 8444 IV = IVRecipe->getVPSingleValue(); 8445 } 8446 VPValue *BTC = Plan->getOrCreateBackedgeTakenCount(); 8447 bool TailFolded = !CM.isScalarEpilogueAllowed(); 8448 8449 if (TailFolded && CM.TTI.emitGetActiveLaneMask()) { 8450 // While ActiveLaneMask is a binary op that consumes the loop tripcount 8451 // as a second argument, we only pass the IV here and extract the 8452 // tripcount from the transform state where codegen of the VP instructions 8453 // happen. 8454 BlockMask = Builder.createNaryOp(VPInstruction::ActiveLaneMask, {IV}); 8455 } else { 8456 BlockMask = Builder.createNaryOp(VPInstruction::ICmpULE, {IV, BTC}); 8457 } 8458 return BlockMaskCache[BB] = BlockMask; 8459 } 8460 8461 // This is the block mask. We OR all incoming edges. 8462 for (auto *Predecessor : predecessors(BB)) { 8463 VPValue *EdgeMask = createEdgeMask(Predecessor, BB, Plan); 8464 if (!EdgeMask) // Mask of predecessor is all-one so mask of block is too. 8465 return BlockMaskCache[BB] = EdgeMask; 8466 8467 if (!BlockMask) { // BlockMask has its initialized nullptr value. 8468 BlockMask = EdgeMask; 8469 continue; 8470 } 8471 8472 BlockMask = Builder.createOr(BlockMask, EdgeMask); 8473 } 8474 8475 return BlockMaskCache[BB] = BlockMask; 8476 } 8477 8478 VPRecipeBase *VPRecipeBuilder::tryToWidenMemory(Instruction *I, 8479 ArrayRef<VPValue *> Operands, 8480 VFRange &Range, 8481 VPlanPtr &Plan) { 8482 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) && 8483 "Must be called with either a load or store"); 8484 8485 auto willWiden = [&](ElementCount VF) -> bool { 8486 if (VF.isScalar()) 8487 return false; 8488 LoopVectorizationCostModel::InstWidening Decision = 8489 CM.getWideningDecision(I, VF); 8490 assert(Decision != LoopVectorizationCostModel::CM_Unknown && 8491 "CM decision should be taken at this point."); 8492 if (Decision == LoopVectorizationCostModel::CM_Interleave) 8493 return true; 8494 if (CM.isScalarAfterVectorization(I, VF) || 8495 CM.isProfitableToScalarize(I, VF)) 8496 return false; 8497 return Decision != LoopVectorizationCostModel::CM_Scalarize; 8498 }; 8499 8500 if (!LoopVectorizationPlanner::getDecisionAndClampRange(willWiden, Range)) 8501 return nullptr; 8502 8503 VPValue *Mask = nullptr; 8504 if (Legal->isMaskRequired(I)) 8505 Mask = createBlockInMask(I->getParent(), Plan); 8506 8507 if (LoadInst *Load = dyn_cast<LoadInst>(I)) 8508 return new VPWidenMemoryInstructionRecipe(*Load, Operands[0], Mask); 8509 8510 StoreInst *Store = cast<StoreInst>(I); 8511 return new VPWidenMemoryInstructionRecipe(*Store, Operands[1], Operands[0], 8512 Mask); 8513 } 8514 8515 VPWidenIntOrFpInductionRecipe * 8516 VPRecipeBuilder::tryToOptimizeInductionPHI(PHINode *Phi, 8517 ArrayRef<VPValue *> Operands) const { 8518 // Check if this is an integer or fp induction. If so, build the recipe that 8519 // produces its scalar and vector values. 8520 InductionDescriptor II = Legal->getInductionVars().lookup(Phi); 8521 if (II.getKind() == InductionDescriptor::IK_IntInduction || 8522 II.getKind() == InductionDescriptor::IK_FpInduction) { 8523 assert(II.getStartValue() == 8524 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader())); 8525 const SmallVectorImpl<Instruction *> &Casts = II.getCastInsts(); 8526 return new VPWidenIntOrFpInductionRecipe( 8527 Phi, Operands[0], Casts.empty() ? nullptr : Casts.front()); 8528 } 8529 8530 return nullptr; 8531 } 8532 8533 VPWidenIntOrFpInductionRecipe *VPRecipeBuilder::tryToOptimizeInductionTruncate( 8534 TruncInst *I, ArrayRef<VPValue *> Operands, VFRange &Range, 8535 VPlan &Plan) const { 8536 // Optimize the special case where the source is a constant integer 8537 // induction variable. Notice that we can only optimize the 'trunc' case 8538 // because (a) FP conversions lose precision, (b) sext/zext may wrap, and 8539 // (c) other casts depend on pointer size. 8540 8541 // Determine whether \p K is a truncation based on an induction variable that 8542 // can be optimized. 8543 auto isOptimizableIVTruncate = 8544 [&](Instruction *K) -> std::function<bool(ElementCount)> { 8545 return [=](ElementCount VF) -> bool { 8546 return CM.isOptimizableIVTruncate(K, VF); 8547 }; 8548 }; 8549 8550 if (LoopVectorizationPlanner::getDecisionAndClampRange( 8551 isOptimizableIVTruncate(I), Range)) { 8552 8553 InductionDescriptor II = 8554 Legal->getInductionVars().lookup(cast<PHINode>(I->getOperand(0))); 8555 VPValue *Start = Plan.getOrAddVPValue(II.getStartValue()); 8556 return new VPWidenIntOrFpInductionRecipe(cast<PHINode>(I->getOperand(0)), 8557 Start, nullptr, I); 8558 } 8559 return nullptr; 8560 } 8561 8562 VPRecipeOrVPValueTy VPRecipeBuilder::tryToBlend(PHINode *Phi, 8563 ArrayRef<VPValue *> Operands, 8564 VPlanPtr &Plan) { 8565 // If all incoming values are equal, the incoming VPValue can be used directly 8566 // instead of creating a new VPBlendRecipe. 8567 VPValue *FirstIncoming = Operands[0]; 8568 if (all_of(Operands, [FirstIncoming](const VPValue *Inc) { 8569 return FirstIncoming == Inc; 8570 })) { 8571 return Operands[0]; 8572 } 8573 8574 // We know that all PHIs in non-header blocks are converted into selects, so 8575 // we don't have to worry about the insertion order and we can just use the 8576 // builder. At this point we generate the predication tree. There may be 8577 // duplications since this is a simple recursive scan, but future 8578 // optimizations will clean it up. 8579 SmallVector<VPValue *, 2> OperandsWithMask; 8580 unsigned NumIncoming = Phi->getNumIncomingValues(); 8581 8582 for (unsigned In = 0; In < NumIncoming; In++) { 8583 VPValue *EdgeMask = 8584 createEdgeMask(Phi->getIncomingBlock(In), Phi->getParent(), Plan); 8585 assert((EdgeMask || NumIncoming == 1) && 8586 "Multiple predecessors with one having a full mask"); 8587 OperandsWithMask.push_back(Operands[In]); 8588 if (EdgeMask) 8589 OperandsWithMask.push_back(EdgeMask); 8590 } 8591 return toVPRecipeResult(new VPBlendRecipe(Phi, OperandsWithMask)); 8592 } 8593 8594 VPWidenCallRecipe *VPRecipeBuilder::tryToWidenCall(CallInst *CI, 8595 ArrayRef<VPValue *> Operands, 8596 VFRange &Range) const { 8597 8598 bool IsPredicated = LoopVectorizationPlanner::getDecisionAndClampRange( 8599 [this, CI](ElementCount VF) { 8600 return CM.isScalarWithPredication(CI, VF); 8601 }, 8602 Range); 8603 8604 if (IsPredicated) 8605 return nullptr; 8606 8607 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 8608 if (ID && (ID == Intrinsic::assume || ID == Intrinsic::lifetime_end || 8609 ID == Intrinsic::lifetime_start || ID == Intrinsic::sideeffect || 8610 ID == Intrinsic::pseudoprobe || 8611 ID == Intrinsic::experimental_noalias_scope_decl)) 8612 return nullptr; 8613 8614 auto willWiden = [&](ElementCount VF) -> bool { 8615 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI); 8616 // The following case may be scalarized depending on the VF. 8617 // The flag shows whether we use Intrinsic or a usual Call for vectorized 8618 // version of the instruction. 8619 // Is it beneficial to perform intrinsic call compared to lib call? 8620 bool NeedToScalarize = false; 8621 InstructionCost CallCost = CM.getVectorCallCost(CI, VF, NeedToScalarize); 8622 InstructionCost IntrinsicCost = ID ? CM.getVectorIntrinsicCost(CI, VF) : 0; 8623 bool UseVectorIntrinsic = ID && IntrinsicCost <= CallCost; 8624 assert((IntrinsicCost.isValid() || CallCost.isValid()) && 8625 "Either the intrinsic cost or vector call cost must be valid"); 8626 return UseVectorIntrinsic || !NeedToScalarize; 8627 }; 8628 8629 if (!LoopVectorizationPlanner::getDecisionAndClampRange(willWiden, Range)) 8630 return nullptr; 8631 8632 ArrayRef<VPValue *> Ops = Operands.take_front(CI->getNumArgOperands()); 8633 return new VPWidenCallRecipe(*CI, make_range(Ops.begin(), Ops.end())); 8634 } 8635 8636 bool VPRecipeBuilder::shouldWiden(Instruction *I, VFRange &Range) const { 8637 assert(!isa<BranchInst>(I) && !isa<PHINode>(I) && !isa<LoadInst>(I) && 8638 !isa<StoreInst>(I) && "Instruction should have been handled earlier"); 8639 // Instruction should be widened, unless it is scalar after vectorization, 8640 // scalarization is profitable or it is predicated. 8641 auto WillScalarize = [this, I](ElementCount VF) -> bool { 8642 return CM.isScalarAfterVectorization(I, VF) || 8643 CM.isProfitableToScalarize(I, VF) || 8644 CM.isScalarWithPredication(I, VF); 8645 }; 8646 return !LoopVectorizationPlanner::getDecisionAndClampRange(WillScalarize, 8647 Range); 8648 } 8649 8650 VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I, 8651 ArrayRef<VPValue *> Operands) const { 8652 auto IsVectorizableOpcode = [](unsigned Opcode) { 8653 switch (Opcode) { 8654 case Instruction::Add: 8655 case Instruction::And: 8656 case Instruction::AShr: 8657 case Instruction::BitCast: 8658 case Instruction::FAdd: 8659 case Instruction::FCmp: 8660 case Instruction::FDiv: 8661 case Instruction::FMul: 8662 case Instruction::FNeg: 8663 case Instruction::FPExt: 8664 case Instruction::FPToSI: 8665 case Instruction::FPToUI: 8666 case Instruction::FPTrunc: 8667 case Instruction::FRem: 8668 case Instruction::FSub: 8669 case Instruction::ICmp: 8670 case Instruction::IntToPtr: 8671 case Instruction::LShr: 8672 case Instruction::Mul: 8673 case Instruction::Or: 8674 case Instruction::PtrToInt: 8675 case Instruction::SDiv: 8676 case Instruction::Select: 8677 case Instruction::SExt: 8678 case Instruction::Shl: 8679 case Instruction::SIToFP: 8680 case Instruction::SRem: 8681 case Instruction::Sub: 8682 case Instruction::Trunc: 8683 case Instruction::UDiv: 8684 case Instruction::UIToFP: 8685 case Instruction::URem: 8686 case Instruction::Xor: 8687 case Instruction::ZExt: 8688 return true; 8689 } 8690 return false; 8691 }; 8692 8693 if (!IsVectorizableOpcode(I->getOpcode())) 8694 return nullptr; 8695 8696 // Success: widen this instruction. 8697 return new VPWidenRecipe(*I, make_range(Operands.begin(), Operands.end())); 8698 } 8699 8700 VPBasicBlock *VPRecipeBuilder::handleReplication( 8701 Instruction *I, VFRange &Range, VPBasicBlock *VPBB, 8702 VPlanPtr &Plan) { 8703 bool IsUniform = LoopVectorizationPlanner::getDecisionAndClampRange( 8704 [&](ElementCount VF) { return CM.isUniformAfterVectorization(I, VF); }, 8705 Range); 8706 8707 bool IsPredicated = LoopVectorizationPlanner::getDecisionAndClampRange( 8708 [&](ElementCount VF) { return CM.isPredicatedInst(I, VF); }, Range); 8709 8710 auto *Recipe = new VPReplicateRecipe(I, Plan->mapToVPValues(I->operands()), 8711 IsUniform, IsPredicated); 8712 setRecipe(I, Recipe); 8713 Plan->addVPValue(I, Recipe); 8714 8715 // Find if I uses a predicated instruction. If so, it will use its scalar 8716 // value. Avoid hoisting the insert-element which packs the scalar value into 8717 // a vector value, as that happens iff all users use the vector value. 8718 for (VPValue *Op : Recipe->operands()) { 8719 auto *PredR = dyn_cast_or_null<VPPredInstPHIRecipe>(Op->getDef()); 8720 if (!PredR) 8721 continue; 8722 auto *RepR = 8723 cast_or_null<VPReplicateRecipe>(PredR->getOperand(0)->getDef()); 8724 assert(RepR->isPredicated() && 8725 "expected Replicate recipe to be predicated"); 8726 RepR->setAlsoPack(false); 8727 } 8728 8729 // Finalize the recipe for Instr, first if it is not predicated. 8730 if (!IsPredicated) { 8731 LLVM_DEBUG(dbgs() << "LV: Scalarizing:" << *I << "\n"); 8732 VPBB->appendRecipe(Recipe); 8733 return VPBB; 8734 } 8735 LLVM_DEBUG(dbgs() << "LV: Scalarizing and predicating:" << *I << "\n"); 8736 assert(VPBB->getSuccessors().empty() && 8737 "VPBB has successors when handling predicated replication."); 8738 // Record predicated instructions for above packing optimizations. 8739 VPBlockBase *Region = createReplicateRegion(I, Recipe, Plan); 8740 VPBlockUtils::insertBlockAfter(Region, VPBB); 8741 auto *RegSucc = new VPBasicBlock(); 8742 VPBlockUtils::insertBlockAfter(RegSucc, Region); 8743 return RegSucc; 8744 } 8745 8746 VPRegionBlock *VPRecipeBuilder::createReplicateRegion(Instruction *Instr, 8747 VPRecipeBase *PredRecipe, 8748 VPlanPtr &Plan) { 8749 // Instructions marked for predication are replicated and placed under an 8750 // if-then construct to prevent side-effects. 8751 8752 // Generate recipes to compute the block mask for this region. 8753 VPValue *BlockInMask = createBlockInMask(Instr->getParent(), Plan); 8754 8755 // Build the triangular if-then region. 8756 std::string RegionName = (Twine("pred.") + Instr->getOpcodeName()).str(); 8757 assert(Instr->getParent() && "Predicated instruction not in any basic block"); 8758 auto *BOMRecipe = new VPBranchOnMaskRecipe(BlockInMask); 8759 auto *Entry = new VPBasicBlock(Twine(RegionName) + ".entry", BOMRecipe); 8760 auto *PHIRecipe = Instr->getType()->isVoidTy() 8761 ? nullptr 8762 : new VPPredInstPHIRecipe(Plan->getOrAddVPValue(Instr)); 8763 if (PHIRecipe) { 8764 Plan->removeVPValueFor(Instr); 8765 Plan->addVPValue(Instr, PHIRecipe); 8766 } 8767 auto *Exit = new VPBasicBlock(Twine(RegionName) + ".continue", PHIRecipe); 8768 auto *Pred = new VPBasicBlock(Twine(RegionName) + ".if", PredRecipe); 8769 VPRegionBlock *Region = new VPRegionBlock(Entry, Exit, RegionName, true); 8770 8771 // Note: first set Entry as region entry and then connect successors starting 8772 // from it in order, to propagate the "parent" of each VPBasicBlock. 8773 VPBlockUtils::insertTwoBlocksAfter(Pred, Exit, BlockInMask, Entry); 8774 VPBlockUtils::connectBlocks(Pred, Exit); 8775 8776 return Region; 8777 } 8778 8779 VPRecipeOrVPValueTy 8780 VPRecipeBuilder::tryToCreateWidenRecipe(Instruction *Instr, 8781 ArrayRef<VPValue *> Operands, 8782 VFRange &Range, VPlanPtr &Plan) { 8783 // First, check for specific widening recipes that deal with calls, memory 8784 // operations, inductions and Phi nodes. 8785 if (auto *CI = dyn_cast<CallInst>(Instr)) 8786 return toVPRecipeResult(tryToWidenCall(CI, Operands, Range)); 8787 8788 if (isa<LoadInst>(Instr) || isa<StoreInst>(Instr)) 8789 return toVPRecipeResult(tryToWidenMemory(Instr, Operands, Range, Plan)); 8790 8791 VPRecipeBase *Recipe; 8792 if (auto Phi = dyn_cast<PHINode>(Instr)) { 8793 if (Phi->getParent() != OrigLoop->getHeader()) 8794 return tryToBlend(Phi, Operands, Plan); 8795 if ((Recipe = tryToOptimizeInductionPHI(Phi, Operands))) 8796 return toVPRecipeResult(Recipe); 8797 8798 if (Legal->isReductionVariable(Phi)) { 8799 RecurrenceDescriptor &RdxDesc = Legal->getReductionVars()[Phi]; 8800 assert(RdxDesc.getRecurrenceStartValue() == 8801 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader())); 8802 VPValue *StartV = Operands[0]; 8803 return toVPRecipeResult(new VPWidenPHIRecipe(Phi, RdxDesc, *StartV)); 8804 } 8805 8806 return toVPRecipeResult(new VPWidenPHIRecipe(Phi)); 8807 } 8808 8809 if (isa<TruncInst>(Instr) && 8810 (Recipe = tryToOptimizeInductionTruncate(cast<TruncInst>(Instr), Operands, 8811 Range, *Plan))) 8812 return toVPRecipeResult(Recipe); 8813 8814 if (!shouldWiden(Instr, Range)) 8815 return nullptr; 8816 8817 if (auto GEP = dyn_cast<GetElementPtrInst>(Instr)) 8818 return toVPRecipeResult(new VPWidenGEPRecipe( 8819 GEP, make_range(Operands.begin(), Operands.end()), OrigLoop)); 8820 8821 if (auto *SI = dyn_cast<SelectInst>(Instr)) { 8822 bool InvariantCond = 8823 PSE.getSE()->isLoopInvariant(PSE.getSCEV(SI->getOperand(0)), OrigLoop); 8824 return toVPRecipeResult(new VPWidenSelectRecipe( 8825 *SI, make_range(Operands.begin(), Operands.end()), InvariantCond)); 8826 } 8827 8828 return toVPRecipeResult(tryToWiden(Instr, Operands)); 8829 } 8830 8831 void LoopVectorizationPlanner::buildVPlansWithVPRecipes(ElementCount MinVF, 8832 ElementCount MaxVF) { 8833 assert(OrigLoop->isInnermost() && "Inner loop expected."); 8834 8835 // Collect instructions from the original loop that will become trivially dead 8836 // in the vectorized loop. We don't need to vectorize these instructions. For 8837 // example, original induction update instructions can become dead because we 8838 // separately emit induction "steps" when generating code for the new loop. 8839 // Similarly, we create a new latch condition when setting up the structure 8840 // of the new loop, so the old one can become dead. 8841 SmallPtrSet<Instruction *, 4> DeadInstructions; 8842 collectTriviallyDeadInstructions(DeadInstructions); 8843 8844 // Add assume instructions we need to drop to DeadInstructions, to prevent 8845 // them from being added to the VPlan. 8846 // TODO: We only need to drop assumes in blocks that get flattend. If the 8847 // control flow is preserved, we should keep them. 8848 auto &ConditionalAssumes = Legal->getConditionalAssumes(); 8849 DeadInstructions.insert(ConditionalAssumes.begin(), ConditionalAssumes.end()); 8850 8851 DenseMap<Instruction *, Instruction *> &SinkAfter = Legal->getSinkAfter(); 8852 // Dead instructions do not need sinking. Remove them from SinkAfter. 8853 for (Instruction *I : DeadInstructions) 8854 SinkAfter.erase(I); 8855 8856 auto MaxVFPlusOne = MaxVF.getWithIncrement(1); 8857 for (ElementCount VF = MinVF; ElementCount::isKnownLT(VF, MaxVFPlusOne);) { 8858 VFRange SubRange = {VF, MaxVFPlusOne}; 8859 VPlans.push_back( 8860 buildVPlanWithVPRecipes(SubRange, DeadInstructions, SinkAfter)); 8861 VF = SubRange.End; 8862 } 8863 } 8864 8865 VPlanPtr LoopVectorizationPlanner::buildVPlanWithVPRecipes( 8866 VFRange &Range, SmallPtrSetImpl<Instruction *> &DeadInstructions, 8867 const DenseMap<Instruction *, Instruction *> &SinkAfter) { 8868 8869 SmallPtrSet<const InterleaveGroup<Instruction> *, 1> InterleaveGroups; 8870 8871 VPRecipeBuilder RecipeBuilder(OrigLoop, TLI, Legal, CM, PSE, Builder); 8872 8873 // --------------------------------------------------------------------------- 8874 // Pre-construction: record ingredients whose recipes we'll need to further 8875 // process after constructing the initial VPlan. 8876 // --------------------------------------------------------------------------- 8877 8878 // Mark instructions we'll need to sink later and their targets as 8879 // ingredients whose recipe we'll need to record. 8880 for (auto &Entry : SinkAfter) { 8881 RecipeBuilder.recordRecipeOf(Entry.first); 8882 RecipeBuilder.recordRecipeOf(Entry.second); 8883 } 8884 for (auto &Reduction : CM.getInLoopReductionChains()) { 8885 PHINode *Phi = Reduction.first; 8886 RecurKind Kind = Legal->getReductionVars()[Phi].getRecurrenceKind(); 8887 const SmallVector<Instruction *, 4> &ReductionOperations = Reduction.second; 8888 8889 RecipeBuilder.recordRecipeOf(Phi); 8890 for (auto &R : ReductionOperations) { 8891 RecipeBuilder.recordRecipeOf(R); 8892 // For min/max reducitons, where we have a pair of icmp/select, we also 8893 // need to record the ICmp recipe, so it can be removed later. 8894 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) 8895 RecipeBuilder.recordRecipeOf(cast<Instruction>(R->getOperand(0))); 8896 } 8897 } 8898 8899 // For each interleave group which is relevant for this (possibly trimmed) 8900 // Range, add it to the set of groups to be later applied to the VPlan and add 8901 // placeholders for its members' Recipes which we'll be replacing with a 8902 // single VPInterleaveRecipe. 8903 for (InterleaveGroup<Instruction> *IG : IAI.getInterleaveGroups()) { 8904 auto applyIG = [IG, this](ElementCount VF) -> bool { 8905 return (VF.isVector() && // Query is illegal for VF == 1 8906 CM.getWideningDecision(IG->getInsertPos(), VF) == 8907 LoopVectorizationCostModel::CM_Interleave); 8908 }; 8909 if (!getDecisionAndClampRange(applyIG, Range)) 8910 continue; 8911 InterleaveGroups.insert(IG); 8912 for (unsigned i = 0; i < IG->getFactor(); i++) 8913 if (Instruction *Member = IG->getMember(i)) 8914 RecipeBuilder.recordRecipeOf(Member); 8915 }; 8916 8917 // --------------------------------------------------------------------------- 8918 // Build initial VPlan: Scan the body of the loop in a topological order to 8919 // visit each basic block after having visited its predecessor basic blocks. 8920 // --------------------------------------------------------------------------- 8921 8922 // Create a dummy pre-entry VPBasicBlock to start building the VPlan. 8923 auto Plan = std::make_unique<VPlan>(); 8924 VPBasicBlock *VPBB = new VPBasicBlock("Pre-Entry"); 8925 Plan->setEntry(VPBB); 8926 8927 // Scan the body of the loop in a topological order to visit each basic block 8928 // after having visited its predecessor basic blocks. 8929 LoopBlocksDFS DFS(OrigLoop); 8930 DFS.perform(LI); 8931 8932 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) { 8933 // Relevant instructions from basic block BB will be grouped into VPRecipe 8934 // ingredients and fill a new VPBasicBlock. 8935 unsigned VPBBsForBB = 0; 8936 auto *FirstVPBBForBB = new VPBasicBlock(BB->getName()); 8937 VPBlockUtils::insertBlockAfter(FirstVPBBForBB, VPBB); 8938 VPBB = FirstVPBBForBB; 8939 Builder.setInsertPoint(VPBB); 8940 8941 // Introduce each ingredient into VPlan. 8942 // TODO: Model and preserve debug instrinsics in VPlan. 8943 for (Instruction &I : BB->instructionsWithoutDebug()) { 8944 Instruction *Instr = &I; 8945 8946 // First filter out irrelevant instructions, to ensure no recipes are 8947 // built for them. 8948 if (isa<BranchInst>(Instr) || DeadInstructions.count(Instr)) 8949 continue; 8950 8951 SmallVector<VPValue *, 4> Operands; 8952 auto *Phi = dyn_cast<PHINode>(Instr); 8953 if (Phi && Phi->getParent() == OrigLoop->getHeader()) { 8954 Operands.push_back(Plan->getOrAddVPValue( 8955 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader()))); 8956 } else { 8957 auto OpRange = Plan->mapToVPValues(Instr->operands()); 8958 Operands = {OpRange.begin(), OpRange.end()}; 8959 } 8960 if (auto RecipeOrValue = RecipeBuilder.tryToCreateWidenRecipe( 8961 Instr, Operands, Range, Plan)) { 8962 // If Instr can be simplified to an existing VPValue, use it. 8963 if (RecipeOrValue.is<VPValue *>()) { 8964 Plan->addVPValue(Instr, RecipeOrValue.get<VPValue *>()); 8965 continue; 8966 } 8967 // Otherwise, add the new recipe. 8968 VPRecipeBase *Recipe = RecipeOrValue.get<VPRecipeBase *>(); 8969 for (auto *Def : Recipe->definedValues()) { 8970 auto *UV = Def->getUnderlyingValue(); 8971 Plan->addVPValue(UV, Def); 8972 } 8973 8974 RecipeBuilder.setRecipe(Instr, Recipe); 8975 VPBB->appendRecipe(Recipe); 8976 continue; 8977 } 8978 8979 // Otherwise, if all widening options failed, Instruction is to be 8980 // replicated. This may create a successor for VPBB. 8981 VPBasicBlock *NextVPBB = 8982 RecipeBuilder.handleReplication(Instr, Range, VPBB, Plan); 8983 if (NextVPBB != VPBB) { 8984 VPBB = NextVPBB; 8985 VPBB->setName(BB->hasName() ? BB->getName() + "." + Twine(VPBBsForBB++) 8986 : ""); 8987 } 8988 } 8989 } 8990 8991 // Discard empty dummy pre-entry VPBasicBlock. Note that other VPBasicBlocks 8992 // may also be empty, such as the last one VPBB, reflecting original 8993 // basic-blocks with no recipes. 8994 VPBasicBlock *PreEntry = cast<VPBasicBlock>(Plan->getEntry()); 8995 assert(PreEntry->empty() && "Expecting empty pre-entry block."); 8996 VPBlockBase *Entry = Plan->setEntry(PreEntry->getSingleSuccessor()); 8997 VPBlockUtils::disconnectBlocks(PreEntry, Entry); 8998 delete PreEntry; 8999 9000 // --------------------------------------------------------------------------- 9001 // Transform initial VPlan: Apply previously taken decisions, in order, to 9002 // bring the VPlan to its final state. 9003 // --------------------------------------------------------------------------- 9004 9005 // Apply Sink-After legal constraints. 9006 for (auto &Entry : SinkAfter) { 9007 VPRecipeBase *Sink = RecipeBuilder.getRecipe(Entry.first); 9008 VPRecipeBase *Target = RecipeBuilder.getRecipe(Entry.second); 9009 // If the target is in a replication region, make sure to move Sink to the 9010 // block after it, not into the replication region itself. 9011 if (auto *Region = 9012 dyn_cast_or_null<VPRegionBlock>(Target->getParent()->getParent())) { 9013 if (Region->isReplicator()) { 9014 assert(Region->getNumSuccessors() == 1 && "Expected SESE region!"); 9015 VPBasicBlock *NextBlock = 9016 cast<VPBasicBlock>(Region->getSuccessors().front()); 9017 Sink->moveBefore(*NextBlock, NextBlock->getFirstNonPhi()); 9018 continue; 9019 } 9020 } 9021 Sink->moveAfter(Target); 9022 } 9023 9024 // Interleave memory: for each Interleave Group we marked earlier as relevant 9025 // for this VPlan, replace the Recipes widening its memory instructions with a 9026 // single VPInterleaveRecipe at its insertion point. 9027 for (auto IG : InterleaveGroups) { 9028 auto *Recipe = cast<VPWidenMemoryInstructionRecipe>( 9029 RecipeBuilder.getRecipe(IG->getInsertPos())); 9030 SmallVector<VPValue *, 4> StoredValues; 9031 for (unsigned i = 0; i < IG->getFactor(); ++i) 9032 if (auto *SI = dyn_cast_or_null<StoreInst>(IG->getMember(i))) 9033 StoredValues.push_back(Plan->getOrAddVPValue(SI->getOperand(0))); 9034 9035 auto *VPIG = new VPInterleaveRecipe(IG, Recipe->getAddr(), StoredValues, 9036 Recipe->getMask()); 9037 VPIG->insertBefore(Recipe); 9038 unsigned J = 0; 9039 for (unsigned i = 0; i < IG->getFactor(); ++i) 9040 if (Instruction *Member = IG->getMember(i)) { 9041 if (!Member->getType()->isVoidTy()) { 9042 VPValue *OriginalV = Plan->getVPValue(Member); 9043 Plan->removeVPValueFor(Member); 9044 Plan->addVPValue(Member, VPIG->getVPValue(J)); 9045 OriginalV->replaceAllUsesWith(VPIG->getVPValue(J)); 9046 J++; 9047 } 9048 RecipeBuilder.getRecipe(Member)->eraseFromParent(); 9049 } 9050 } 9051 9052 // Adjust the recipes for any inloop reductions. 9053 if (Range.Start.isVector()) 9054 adjustRecipesForInLoopReductions(Plan, RecipeBuilder); 9055 9056 // Finally, if tail is folded by masking, introduce selects between the phi 9057 // and the live-out instruction of each reduction, at the end of the latch. 9058 if (CM.foldTailByMasking() && !Legal->getReductionVars().empty()) { 9059 Builder.setInsertPoint(VPBB); 9060 auto *Cond = RecipeBuilder.createBlockInMask(OrigLoop->getHeader(), Plan); 9061 for (auto &Reduction : Legal->getReductionVars()) { 9062 if (CM.isInLoopReduction(Reduction.first)) 9063 continue; 9064 VPValue *Phi = Plan->getOrAddVPValue(Reduction.first); 9065 VPValue *Red = Plan->getOrAddVPValue(Reduction.second.getLoopExitInstr()); 9066 Builder.createNaryOp(Instruction::Select, {Cond, Red, Phi}); 9067 } 9068 } 9069 9070 std::string PlanName; 9071 raw_string_ostream RSO(PlanName); 9072 ElementCount VF = Range.Start; 9073 Plan->addVF(VF); 9074 RSO << "Initial VPlan for VF={" << VF; 9075 for (VF *= 2; ElementCount::isKnownLT(VF, Range.End); VF *= 2) { 9076 Plan->addVF(VF); 9077 RSO << "," << VF; 9078 } 9079 RSO << "},UF>=1"; 9080 RSO.flush(); 9081 Plan->setName(PlanName); 9082 9083 return Plan; 9084 } 9085 9086 VPlanPtr LoopVectorizationPlanner::buildVPlan(VFRange &Range) { 9087 // Outer loop handling: They may require CFG and instruction level 9088 // transformations before even evaluating whether vectorization is profitable. 9089 // Since we cannot modify the incoming IR, we need to build VPlan upfront in 9090 // the vectorization pipeline. 9091 assert(!OrigLoop->isInnermost()); 9092 assert(EnableVPlanNativePath && "VPlan-native path is not enabled."); 9093 9094 // Create new empty VPlan 9095 auto Plan = std::make_unique<VPlan>(); 9096 9097 // Build hierarchical CFG 9098 VPlanHCFGBuilder HCFGBuilder(OrigLoop, LI, *Plan); 9099 HCFGBuilder.buildHierarchicalCFG(); 9100 9101 for (ElementCount VF = Range.Start; ElementCount::isKnownLT(VF, Range.End); 9102 VF *= 2) 9103 Plan->addVF(VF); 9104 9105 if (EnableVPlanPredication) { 9106 VPlanPredicator VPP(*Plan); 9107 VPP.predicate(); 9108 9109 // Avoid running transformation to recipes until masked code generation in 9110 // VPlan-native path is in place. 9111 return Plan; 9112 } 9113 9114 SmallPtrSet<Instruction *, 1> DeadInstructions; 9115 VPlanTransforms::VPInstructionsToVPRecipes(OrigLoop, Plan, 9116 Legal->getInductionVars(), 9117 DeadInstructions, *PSE.getSE()); 9118 return Plan; 9119 } 9120 9121 // Adjust the recipes for any inloop reductions. The chain of instructions 9122 // leading from the loop exit instr to the phi need to be converted to 9123 // reductions, with one operand being vector and the other being the scalar 9124 // reduction chain. 9125 void LoopVectorizationPlanner::adjustRecipesForInLoopReductions( 9126 VPlanPtr &Plan, VPRecipeBuilder &RecipeBuilder) { 9127 for (auto &Reduction : CM.getInLoopReductionChains()) { 9128 PHINode *Phi = Reduction.first; 9129 RecurrenceDescriptor &RdxDesc = Legal->getReductionVars()[Phi]; 9130 const SmallVector<Instruction *, 4> &ReductionOperations = Reduction.second; 9131 9132 // ReductionOperations are orders top-down from the phi's use to the 9133 // LoopExitValue. We keep a track of the previous item (the Chain) to tell 9134 // which of the two operands will remain scalar and which will be reduced. 9135 // For minmax the chain will be the select instructions. 9136 Instruction *Chain = Phi; 9137 for (Instruction *R : ReductionOperations) { 9138 VPRecipeBase *WidenRecipe = RecipeBuilder.getRecipe(R); 9139 RecurKind Kind = RdxDesc.getRecurrenceKind(); 9140 9141 VPValue *ChainOp = Plan->getVPValue(Chain); 9142 unsigned FirstOpId; 9143 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) { 9144 assert(isa<VPWidenSelectRecipe>(WidenRecipe) && 9145 "Expected to replace a VPWidenSelectSC"); 9146 FirstOpId = 1; 9147 } else { 9148 assert(isa<VPWidenRecipe>(WidenRecipe) && 9149 "Expected to replace a VPWidenSC"); 9150 FirstOpId = 0; 9151 } 9152 unsigned VecOpId = 9153 R->getOperand(FirstOpId) == Chain ? FirstOpId + 1 : FirstOpId; 9154 VPValue *VecOp = Plan->getVPValue(R->getOperand(VecOpId)); 9155 9156 auto *CondOp = CM.foldTailByMasking() 9157 ? RecipeBuilder.createBlockInMask(R->getParent(), Plan) 9158 : nullptr; 9159 VPReductionRecipe *RedRecipe = new VPReductionRecipe( 9160 &RdxDesc, R, ChainOp, VecOp, CondOp, TTI); 9161 WidenRecipe->getVPSingleValue()->replaceAllUsesWith(RedRecipe); 9162 Plan->removeVPValueFor(R); 9163 Plan->addVPValue(R, RedRecipe); 9164 WidenRecipe->getParent()->insert(RedRecipe, WidenRecipe->getIterator()); 9165 WidenRecipe->getVPSingleValue()->replaceAllUsesWith(RedRecipe); 9166 WidenRecipe->eraseFromParent(); 9167 9168 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) { 9169 VPRecipeBase *CompareRecipe = 9170 RecipeBuilder.getRecipe(cast<Instruction>(R->getOperand(0))); 9171 assert(isa<VPWidenRecipe>(CompareRecipe) && 9172 "Expected to replace a VPWidenSC"); 9173 assert(cast<VPWidenRecipe>(CompareRecipe)->getNumUsers() == 0 && 9174 "Expected no remaining users"); 9175 CompareRecipe->eraseFromParent(); 9176 } 9177 Chain = R; 9178 } 9179 } 9180 } 9181 9182 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 9183 void VPInterleaveRecipe::print(raw_ostream &O, const Twine &Indent, 9184 VPSlotTracker &SlotTracker) const { 9185 O << Indent << "INTERLEAVE-GROUP with factor " << IG->getFactor() << " at "; 9186 IG->getInsertPos()->printAsOperand(O, false); 9187 O << ", "; 9188 getAddr()->printAsOperand(O, SlotTracker); 9189 VPValue *Mask = getMask(); 9190 if (Mask) { 9191 O << ", "; 9192 Mask->printAsOperand(O, SlotTracker); 9193 } 9194 for (unsigned i = 0; i < IG->getFactor(); ++i) 9195 if (Instruction *I = IG->getMember(i)) 9196 O << "\n" << Indent << " " << VPlanIngredient(I) << " " << i; 9197 } 9198 #endif 9199 9200 void VPWidenCallRecipe::execute(VPTransformState &State) { 9201 State.ILV->widenCallInstruction(*cast<CallInst>(getUnderlyingInstr()), this, 9202 *this, State); 9203 } 9204 9205 void VPWidenSelectRecipe::execute(VPTransformState &State) { 9206 State.ILV->widenSelectInstruction(*cast<SelectInst>(getUnderlyingInstr()), 9207 this, *this, InvariantCond, State); 9208 } 9209 9210 void VPWidenRecipe::execute(VPTransformState &State) { 9211 State.ILV->widenInstruction(*getUnderlyingInstr(), this, *this, State); 9212 } 9213 9214 void VPWidenGEPRecipe::execute(VPTransformState &State) { 9215 State.ILV->widenGEP(cast<GetElementPtrInst>(getUnderlyingInstr()), this, 9216 *this, State.UF, State.VF, IsPtrLoopInvariant, 9217 IsIndexLoopInvariant, State); 9218 } 9219 9220 void VPWidenIntOrFpInductionRecipe::execute(VPTransformState &State) { 9221 assert(!State.Instance && "Int or FP induction being replicated."); 9222 State.ILV->widenIntOrFpInduction(IV, getStartValue()->getLiveInIRValue(), 9223 getTruncInst(), getVPValue(0), 9224 getCastValue(), State); 9225 } 9226 9227 void VPWidenPHIRecipe::execute(VPTransformState &State) { 9228 State.ILV->widenPHIInstruction(cast<PHINode>(getUnderlyingValue()), RdxDesc, 9229 this, State); 9230 } 9231 9232 void VPBlendRecipe::execute(VPTransformState &State) { 9233 State.ILV->setDebugLocFromInst(State.Builder, Phi); 9234 // We know that all PHIs in non-header blocks are converted into 9235 // selects, so we don't have to worry about the insertion order and we 9236 // can just use the builder. 9237 // At this point we generate the predication tree. There may be 9238 // duplications since this is a simple recursive scan, but future 9239 // optimizations will clean it up. 9240 9241 unsigned NumIncoming = getNumIncomingValues(); 9242 9243 // Generate a sequence of selects of the form: 9244 // SELECT(Mask3, In3, 9245 // SELECT(Mask2, In2, 9246 // SELECT(Mask1, In1, 9247 // In0))) 9248 // Note that Mask0 is never used: lanes for which no path reaches this phi and 9249 // are essentially undef are taken from In0. 9250 InnerLoopVectorizer::VectorParts Entry(State.UF); 9251 for (unsigned In = 0; In < NumIncoming; ++In) { 9252 for (unsigned Part = 0; Part < State.UF; ++Part) { 9253 // We might have single edge PHIs (blocks) - use an identity 9254 // 'select' for the first PHI operand. 9255 Value *In0 = State.get(getIncomingValue(In), Part); 9256 if (In == 0) 9257 Entry[Part] = In0; // Initialize with the first incoming value. 9258 else { 9259 // Select between the current value and the previous incoming edge 9260 // based on the incoming mask. 9261 Value *Cond = State.get(getMask(In), Part); 9262 Entry[Part] = 9263 State.Builder.CreateSelect(Cond, In0, Entry[Part], "predphi"); 9264 } 9265 } 9266 } 9267 for (unsigned Part = 0; Part < State.UF; ++Part) 9268 State.set(this, Entry[Part], Part); 9269 } 9270 9271 void VPInterleaveRecipe::execute(VPTransformState &State) { 9272 assert(!State.Instance && "Interleave group being replicated."); 9273 State.ILV->vectorizeInterleaveGroup(IG, definedValues(), State, getAddr(), 9274 getStoredValues(), getMask()); 9275 } 9276 9277 void VPReductionRecipe::execute(VPTransformState &State) { 9278 assert(!State.Instance && "Reduction being replicated."); 9279 Value *PrevInChain = State.get(getChainOp(), 0); 9280 for (unsigned Part = 0; Part < State.UF; ++Part) { 9281 RecurKind Kind = RdxDesc->getRecurrenceKind(); 9282 bool IsOrdered = useOrderedReductions(*RdxDesc); 9283 Value *NewVecOp = State.get(getVecOp(), Part); 9284 if (VPValue *Cond = getCondOp()) { 9285 Value *NewCond = State.get(Cond, Part); 9286 VectorType *VecTy = cast<VectorType>(NewVecOp->getType()); 9287 Constant *Iden = RecurrenceDescriptor::getRecurrenceIdentity( 9288 Kind, VecTy->getElementType(), RdxDesc->getFastMathFlags()); 9289 Constant *IdenVec = 9290 ConstantVector::getSplat(VecTy->getElementCount(), Iden); 9291 Value *Select = State.Builder.CreateSelect(NewCond, NewVecOp, IdenVec); 9292 NewVecOp = Select; 9293 } 9294 Value *NewRed; 9295 Value *NextInChain; 9296 if (IsOrdered) { 9297 NewRed = createOrderedReduction(State.Builder, *RdxDesc, NewVecOp, 9298 PrevInChain); 9299 PrevInChain = NewRed; 9300 } else { 9301 PrevInChain = State.get(getChainOp(), Part); 9302 NewRed = createTargetReduction(State.Builder, TTI, *RdxDesc, NewVecOp); 9303 } 9304 if (RecurrenceDescriptor::isMinMaxRecurrenceKind(Kind)) { 9305 NextInChain = 9306 createMinMaxOp(State.Builder, RdxDesc->getRecurrenceKind(), 9307 NewRed, PrevInChain); 9308 } else if (IsOrdered) 9309 NextInChain = NewRed; 9310 else { 9311 NextInChain = State.Builder.CreateBinOp( 9312 (Instruction::BinaryOps)getUnderlyingInstr()->getOpcode(), NewRed, 9313 PrevInChain); 9314 } 9315 State.set(this, NextInChain, Part); 9316 } 9317 } 9318 9319 void VPReplicateRecipe::execute(VPTransformState &State) { 9320 if (State.Instance) { // Generate a single instance. 9321 assert(!State.VF.isScalable() && "Can't scalarize a scalable vector"); 9322 State.ILV->scalarizeInstruction(getUnderlyingInstr(), this, *this, 9323 *State.Instance, IsPredicated, State); 9324 // Insert scalar instance packing it into a vector. 9325 if (AlsoPack && State.VF.isVector()) { 9326 // If we're constructing lane 0, initialize to start from poison. 9327 if (State.Instance->Lane.isFirstLane()) { 9328 assert(!State.VF.isScalable() && "VF is assumed to be non scalable."); 9329 Value *Poison = PoisonValue::get( 9330 VectorType::get(getUnderlyingValue()->getType(), State.VF)); 9331 State.set(this, Poison, State.Instance->Part); 9332 } 9333 State.ILV->packScalarIntoVectorValue(this, *State.Instance, State); 9334 } 9335 return; 9336 } 9337 9338 // Generate scalar instances for all VF lanes of all UF parts, unless the 9339 // instruction is uniform inwhich case generate only the first lane for each 9340 // of the UF parts. 9341 unsigned EndLane = IsUniform ? 1 : State.VF.getKnownMinValue(); 9342 assert((!State.VF.isScalable() || IsUniform) && 9343 "Can't scalarize a scalable vector"); 9344 for (unsigned Part = 0; Part < State.UF; ++Part) 9345 for (unsigned Lane = 0; Lane < EndLane; ++Lane) 9346 State.ILV->scalarizeInstruction(getUnderlyingInstr(), this, *this, 9347 VPIteration(Part, Lane), IsPredicated, 9348 State); 9349 } 9350 9351 void VPBranchOnMaskRecipe::execute(VPTransformState &State) { 9352 assert(State.Instance && "Branch on Mask works only on single instance."); 9353 9354 unsigned Part = State.Instance->Part; 9355 unsigned Lane = State.Instance->Lane.getKnownLane(); 9356 9357 Value *ConditionBit = nullptr; 9358 VPValue *BlockInMask = getMask(); 9359 if (BlockInMask) { 9360 ConditionBit = State.get(BlockInMask, Part); 9361 if (ConditionBit->getType()->isVectorTy()) 9362 ConditionBit = State.Builder.CreateExtractElement( 9363 ConditionBit, State.Builder.getInt32(Lane)); 9364 } else // Block in mask is all-one. 9365 ConditionBit = State.Builder.getTrue(); 9366 9367 // Replace the temporary unreachable terminator with a new conditional branch, 9368 // whose two destinations will be set later when they are created. 9369 auto *CurrentTerminator = State.CFG.PrevBB->getTerminator(); 9370 assert(isa<UnreachableInst>(CurrentTerminator) && 9371 "Expected to replace unreachable terminator with conditional branch."); 9372 auto *CondBr = BranchInst::Create(State.CFG.PrevBB, nullptr, ConditionBit); 9373 CondBr->setSuccessor(0, nullptr); 9374 ReplaceInstWithInst(CurrentTerminator, CondBr); 9375 } 9376 9377 void VPPredInstPHIRecipe::execute(VPTransformState &State) { 9378 assert(State.Instance && "Predicated instruction PHI works per instance."); 9379 Instruction *ScalarPredInst = 9380 cast<Instruction>(State.get(getOperand(0), *State.Instance)); 9381 BasicBlock *PredicatedBB = ScalarPredInst->getParent(); 9382 BasicBlock *PredicatingBB = PredicatedBB->getSinglePredecessor(); 9383 assert(PredicatingBB && "Predicated block has no single predecessor."); 9384 assert(isa<VPReplicateRecipe>(getOperand(0)) && 9385 "operand must be VPReplicateRecipe"); 9386 9387 // By current pack/unpack logic we need to generate only a single phi node: if 9388 // a vector value for the predicated instruction exists at this point it means 9389 // the instruction has vector users only, and a phi for the vector value is 9390 // needed. In this case the recipe of the predicated instruction is marked to 9391 // also do that packing, thereby "hoisting" the insert-element sequence. 9392 // Otherwise, a phi node for the scalar value is needed. 9393 unsigned Part = State.Instance->Part; 9394 if (State.hasVectorValue(getOperand(0), Part)) { 9395 Value *VectorValue = State.get(getOperand(0), Part); 9396 InsertElementInst *IEI = cast<InsertElementInst>(VectorValue); 9397 PHINode *VPhi = State.Builder.CreatePHI(IEI->getType(), 2); 9398 VPhi->addIncoming(IEI->getOperand(0), PredicatingBB); // Unmodified vector. 9399 VPhi->addIncoming(IEI, PredicatedBB); // New vector with inserted element. 9400 if (State.hasVectorValue(this, Part)) 9401 State.reset(this, VPhi, Part); 9402 else 9403 State.set(this, VPhi, Part); 9404 // NOTE: Currently we need to update the value of the operand, so the next 9405 // predicated iteration inserts its generated value in the correct vector. 9406 State.reset(getOperand(0), VPhi, Part); 9407 } else { 9408 Type *PredInstType = getOperand(0)->getUnderlyingValue()->getType(); 9409 PHINode *Phi = State.Builder.CreatePHI(PredInstType, 2); 9410 Phi->addIncoming(PoisonValue::get(ScalarPredInst->getType()), 9411 PredicatingBB); 9412 Phi->addIncoming(ScalarPredInst, PredicatedBB); 9413 if (State.hasScalarValue(this, *State.Instance)) 9414 State.reset(this, Phi, *State.Instance); 9415 else 9416 State.set(this, Phi, *State.Instance); 9417 // NOTE: Currently we need to update the value of the operand, so the next 9418 // predicated iteration inserts its generated value in the correct vector. 9419 State.reset(getOperand(0), Phi, *State.Instance); 9420 } 9421 } 9422 9423 void VPWidenMemoryInstructionRecipe::execute(VPTransformState &State) { 9424 VPValue *StoredValue = isStore() ? getStoredValue() : nullptr; 9425 State.ILV->vectorizeMemoryInstruction( 9426 &Ingredient, State, StoredValue ? nullptr : getVPSingleValue(), getAddr(), 9427 StoredValue, getMask()); 9428 } 9429 9430 // Determine how to lower the scalar epilogue, which depends on 1) optimising 9431 // for minimum code-size, 2) predicate compiler options, 3) loop hints forcing 9432 // predication, and 4) a TTI hook that analyses whether the loop is suitable 9433 // for predication. 9434 static ScalarEpilogueLowering getScalarEpilogueLowering( 9435 Function *F, Loop *L, LoopVectorizeHints &Hints, ProfileSummaryInfo *PSI, 9436 BlockFrequencyInfo *BFI, TargetTransformInfo *TTI, TargetLibraryInfo *TLI, 9437 AssumptionCache *AC, LoopInfo *LI, ScalarEvolution *SE, DominatorTree *DT, 9438 LoopVectorizationLegality &LVL) { 9439 // 1) OptSize takes precedence over all other options, i.e. if this is set, 9440 // don't look at hints or options, and don't request a scalar epilogue. 9441 // (For PGSO, as shouldOptimizeForSize isn't currently accessible from 9442 // LoopAccessInfo (due to code dependency and not being able to reliably get 9443 // PSI/BFI from a loop analysis under NPM), we cannot suppress the collection 9444 // of strides in LoopAccessInfo::analyzeLoop() and vectorize without 9445 // versioning when the vectorization is forced, unlike hasOptSize. So revert 9446 // back to the old way and vectorize with versioning when forced. See D81345.) 9447 if (F->hasOptSize() || (llvm::shouldOptimizeForSize(L->getHeader(), PSI, BFI, 9448 PGSOQueryType::IRPass) && 9449 Hints.getForce() != LoopVectorizeHints::FK_Enabled)) 9450 return CM_ScalarEpilogueNotAllowedOptSize; 9451 9452 // 2) If set, obey the directives 9453 if (PreferPredicateOverEpilogue.getNumOccurrences()) { 9454 switch (PreferPredicateOverEpilogue) { 9455 case PreferPredicateTy::ScalarEpilogue: 9456 return CM_ScalarEpilogueAllowed; 9457 case PreferPredicateTy::PredicateElseScalarEpilogue: 9458 return CM_ScalarEpilogueNotNeededUsePredicate; 9459 case PreferPredicateTy::PredicateOrDontVectorize: 9460 return CM_ScalarEpilogueNotAllowedUsePredicate; 9461 }; 9462 } 9463 9464 // 3) If set, obey the hints 9465 switch (Hints.getPredicate()) { 9466 case LoopVectorizeHints::FK_Enabled: 9467 return CM_ScalarEpilogueNotNeededUsePredicate; 9468 case LoopVectorizeHints::FK_Disabled: 9469 return CM_ScalarEpilogueAllowed; 9470 }; 9471 9472 // 4) if the TTI hook indicates this is profitable, request predication. 9473 if (TTI->preferPredicateOverEpilogue(L, LI, *SE, *AC, TLI, DT, 9474 LVL.getLAI())) 9475 return CM_ScalarEpilogueNotNeededUsePredicate; 9476 9477 return CM_ScalarEpilogueAllowed; 9478 } 9479 9480 Value *VPTransformState::get(VPValue *Def, unsigned Part) { 9481 // If Values have been set for this Def return the one relevant for \p Part. 9482 if (hasVectorValue(Def, Part)) 9483 return Data.PerPartOutput[Def][Part]; 9484 9485 if (!hasScalarValue(Def, {Part, 0})) { 9486 Value *IRV = Def->getLiveInIRValue(); 9487 Value *B = ILV->getBroadcastInstrs(IRV); 9488 set(Def, B, Part); 9489 return B; 9490 } 9491 9492 Value *ScalarValue = get(Def, {Part, 0}); 9493 // If we aren't vectorizing, we can just copy the scalar map values over 9494 // to the vector map. 9495 if (VF.isScalar()) { 9496 set(Def, ScalarValue, Part); 9497 return ScalarValue; 9498 } 9499 9500 auto *RepR = dyn_cast<VPReplicateRecipe>(Def); 9501 bool IsUniform = RepR && RepR->isUniform(); 9502 9503 unsigned LastLane = IsUniform ? 0 : VF.getKnownMinValue() - 1; 9504 // Check if there is a scalar value for the selected lane. 9505 if (!hasScalarValue(Def, {Part, LastLane})) { 9506 // At the moment, VPWidenIntOrFpInductionRecipes can also be uniform. 9507 assert(isa<VPWidenIntOrFpInductionRecipe>(Def->getDef()) && 9508 "unexpected recipe found to be invariant"); 9509 IsUniform = true; 9510 LastLane = 0; 9511 } 9512 9513 auto *LastInst = cast<Instruction>(get(Def, {Part, LastLane})); 9514 9515 // Set the insert point after the last scalarized instruction. This 9516 // ensures the insertelement sequence will directly follow the scalar 9517 // definitions. 9518 auto OldIP = Builder.saveIP(); 9519 auto NewIP = std::next(BasicBlock::iterator(LastInst)); 9520 Builder.SetInsertPoint(&*NewIP); 9521 9522 // However, if we are vectorizing, we need to construct the vector values. 9523 // If the value is known to be uniform after vectorization, we can just 9524 // broadcast the scalar value corresponding to lane zero for each unroll 9525 // iteration. Otherwise, we construct the vector values using 9526 // insertelement instructions. Since the resulting vectors are stored in 9527 // State, we will only generate the insertelements once. 9528 Value *VectorValue = nullptr; 9529 if (IsUniform) { 9530 VectorValue = ILV->getBroadcastInstrs(ScalarValue); 9531 set(Def, VectorValue, Part); 9532 } else { 9533 // Initialize packing with insertelements to start from undef. 9534 assert(!VF.isScalable() && "VF is assumed to be non scalable."); 9535 Value *Undef = PoisonValue::get(VectorType::get(LastInst->getType(), VF)); 9536 set(Def, Undef, Part); 9537 for (unsigned Lane = 0; Lane < VF.getKnownMinValue(); ++Lane) 9538 ILV->packScalarIntoVectorValue(Def, {Part, Lane}, *this); 9539 VectorValue = get(Def, Part); 9540 } 9541 Builder.restoreIP(OldIP); 9542 return VectorValue; 9543 } 9544 9545 // Process the loop in the VPlan-native vectorization path. This path builds 9546 // VPlan upfront in the vectorization pipeline, which allows to apply 9547 // VPlan-to-VPlan transformations from the very beginning without modifying the 9548 // input LLVM IR. 9549 static bool processLoopInVPlanNativePath( 9550 Loop *L, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, 9551 LoopVectorizationLegality *LVL, TargetTransformInfo *TTI, 9552 TargetLibraryInfo *TLI, DemandedBits *DB, AssumptionCache *AC, 9553 OptimizationRemarkEmitter *ORE, BlockFrequencyInfo *BFI, 9554 ProfileSummaryInfo *PSI, LoopVectorizeHints &Hints, 9555 LoopVectorizationRequirements &Requirements) { 9556 9557 if (isa<SCEVCouldNotCompute>(PSE.getBackedgeTakenCount())) { 9558 LLVM_DEBUG(dbgs() << "LV: cannot compute the outer-loop trip count\n"); 9559 return false; 9560 } 9561 assert(EnableVPlanNativePath && "VPlan-native path is disabled."); 9562 Function *F = L->getHeader()->getParent(); 9563 InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL->getLAI()); 9564 9565 ScalarEpilogueLowering SEL = getScalarEpilogueLowering( 9566 F, L, Hints, PSI, BFI, TTI, TLI, AC, LI, PSE.getSE(), DT, *LVL); 9567 9568 LoopVectorizationCostModel CM(SEL, L, PSE, LI, LVL, *TTI, TLI, DB, AC, ORE, F, 9569 &Hints, IAI); 9570 // Use the planner for outer loop vectorization. 9571 // TODO: CM is not used at this point inside the planner. Turn CM into an 9572 // optional argument if we don't need it in the future. 9573 LoopVectorizationPlanner LVP(L, LI, TLI, TTI, LVL, CM, IAI, PSE, Hints, 9574 Requirements, ORE); 9575 9576 // Get user vectorization factor. 9577 ElementCount UserVF = Hints.getWidth(); 9578 9579 // Plan how to best vectorize, return the best VF and its cost. 9580 const VectorizationFactor VF = LVP.planInVPlanNativePath(UserVF); 9581 9582 // If we are stress testing VPlan builds, do not attempt to generate vector 9583 // code. Masked vector code generation support will follow soon. 9584 // Also, do not attempt to vectorize if no vector code will be produced. 9585 if (VPlanBuildStressTest || EnableVPlanPredication || 9586 VectorizationFactor::Disabled() == VF) 9587 return false; 9588 9589 LVP.setBestPlan(VF.Width, 1); 9590 9591 { 9592 GeneratedRTChecks Checks(*PSE.getSE(), DT, LI, 9593 F->getParent()->getDataLayout()); 9594 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width, 1, LVL, 9595 &CM, BFI, PSI, Checks); 9596 LLVM_DEBUG(dbgs() << "Vectorizing outer loop in \"" 9597 << L->getHeader()->getParent()->getName() << "\"\n"); 9598 LVP.executePlan(LB, DT); 9599 } 9600 9601 // Mark the loop as already vectorized to avoid vectorizing again. 9602 Hints.setAlreadyVectorized(); 9603 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs())); 9604 return true; 9605 } 9606 9607 // Emit a remark if there are stores to floats that required a floating point 9608 // extension. If the vectorized loop was generated with floating point there 9609 // will be a performance penalty from the conversion overhead and the change in 9610 // the vector width. 9611 static void checkMixedPrecision(Loop *L, OptimizationRemarkEmitter *ORE) { 9612 SmallVector<Instruction *, 4> Worklist; 9613 for (BasicBlock *BB : L->getBlocks()) { 9614 for (Instruction &Inst : *BB) { 9615 if (auto *S = dyn_cast<StoreInst>(&Inst)) { 9616 if (S->getValueOperand()->getType()->isFloatTy()) 9617 Worklist.push_back(S); 9618 } 9619 } 9620 } 9621 9622 // Traverse the floating point stores upwards searching, for floating point 9623 // conversions. 9624 SmallPtrSet<const Instruction *, 4> Visited; 9625 SmallPtrSet<const Instruction *, 4> EmittedRemark; 9626 while (!Worklist.empty()) { 9627 auto *I = Worklist.pop_back_val(); 9628 if (!L->contains(I)) 9629 continue; 9630 if (!Visited.insert(I).second) 9631 continue; 9632 9633 // Emit a remark if the floating point store required a floating 9634 // point conversion. 9635 // TODO: More work could be done to identify the root cause such as a 9636 // constant or a function return type and point the user to it. 9637 if (isa<FPExtInst>(I) && EmittedRemark.insert(I).second) 9638 ORE->emit([&]() { 9639 return OptimizationRemarkAnalysis(LV_NAME, "VectorMixedPrecision", 9640 I->getDebugLoc(), L->getHeader()) 9641 << "floating point conversion changes vector width. " 9642 << "Mixed floating point precision requires an up/down " 9643 << "cast that will negatively impact performance."; 9644 }); 9645 9646 for (Use &Op : I->operands()) 9647 if (auto *OpI = dyn_cast<Instruction>(Op)) 9648 Worklist.push_back(OpI); 9649 } 9650 } 9651 9652 LoopVectorizePass::LoopVectorizePass(LoopVectorizeOptions Opts) 9653 : InterleaveOnlyWhenForced(Opts.InterleaveOnlyWhenForced || 9654 !EnableLoopInterleaving), 9655 VectorizeOnlyWhenForced(Opts.VectorizeOnlyWhenForced || 9656 !EnableLoopVectorization) {} 9657 9658 bool LoopVectorizePass::processLoop(Loop *L) { 9659 assert((EnableVPlanNativePath || L->isInnermost()) && 9660 "VPlan-native path is not enabled. Only process inner loops."); 9661 9662 #ifndef NDEBUG 9663 const std::string DebugLocStr = getDebugLocString(L); 9664 #endif /* NDEBUG */ 9665 9666 LLVM_DEBUG(dbgs() << "\nLV: Checking a loop in \"" 9667 << L->getHeader()->getParent()->getName() << "\" from " 9668 << DebugLocStr << "\n"); 9669 9670 LoopVectorizeHints Hints(L, InterleaveOnlyWhenForced, *ORE); 9671 9672 LLVM_DEBUG( 9673 dbgs() << "LV: Loop hints:" 9674 << " force=" 9675 << (Hints.getForce() == LoopVectorizeHints::FK_Disabled 9676 ? "disabled" 9677 : (Hints.getForce() == LoopVectorizeHints::FK_Enabled 9678 ? "enabled" 9679 : "?")) 9680 << " width=" << Hints.getWidth() 9681 << " interleave=" << Hints.getInterleave() << "\n"); 9682 9683 // Function containing loop 9684 Function *F = L->getHeader()->getParent(); 9685 9686 // Looking at the diagnostic output is the only way to determine if a loop 9687 // was vectorized (other than looking at the IR or machine code), so it 9688 // is important to generate an optimization remark for each loop. Most of 9689 // these messages are generated as OptimizationRemarkAnalysis. Remarks 9690 // generated as OptimizationRemark and OptimizationRemarkMissed are 9691 // less verbose reporting vectorized loops and unvectorized loops that may 9692 // benefit from vectorization, respectively. 9693 9694 if (!Hints.allowVectorization(F, L, VectorizeOnlyWhenForced)) { 9695 LLVM_DEBUG(dbgs() << "LV: Loop hints prevent vectorization.\n"); 9696 return false; 9697 } 9698 9699 PredicatedScalarEvolution PSE(*SE, *L); 9700 9701 // Check if it is legal to vectorize the loop. 9702 LoopVectorizationRequirements Requirements; 9703 LoopVectorizationLegality LVL(L, PSE, DT, TTI, TLI, AA, F, GetLAA, LI, ORE, 9704 &Requirements, &Hints, DB, AC, BFI, PSI); 9705 if (!LVL.canVectorize(EnableVPlanNativePath)) { 9706 LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Cannot prove legality.\n"); 9707 Hints.emitRemarkWithHints(); 9708 return false; 9709 } 9710 9711 // Check the function attributes and profiles to find out if this function 9712 // should be optimized for size. 9713 ScalarEpilogueLowering SEL = getScalarEpilogueLowering( 9714 F, L, Hints, PSI, BFI, TTI, TLI, AC, LI, PSE.getSE(), DT, LVL); 9715 9716 // Entrance to the VPlan-native vectorization path. Outer loops are processed 9717 // here. They may require CFG and instruction level transformations before 9718 // even evaluating whether vectorization is profitable. Since we cannot modify 9719 // the incoming IR, we need to build VPlan upfront in the vectorization 9720 // pipeline. 9721 if (!L->isInnermost()) 9722 return processLoopInVPlanNativePath(L, PSE, LI, DT, &LVL, TTI, TLI, DB, AC, 9723 ORE, BFI, PSI, Hints, Requirements); 9724 9725 assert(L->isInnermost() && "Inner loop expected."); 9726 9727 // Check the loop for a trip count threshold: vectorize loops with a tiny trip 9728 // count by optimizing for size, to minimize overheads. 9729 auto ExpectedTC = getSmallBestKnownTC(*SE, L); 9730 if (ExpectedTC && *ExpectedTC < TinyTripCountVectorThreshold) { 9731 LLVM_DEBUG(dbgs() << "LV: Found a loop with a very small trip count. " 9732 << "This loop is worth vectorizing only if no scalar " 9733 << "iteration overheads are incurred."); 9734 if (Hints.getForce() == LoopVectorizeHints::FK_Enabled) 9735 LLVM_DEBUG(dbgs() << " But vectorizing was explicitly forced.\n"); 9736 else { 9737 LLVM_DEBUG(dbgs() << "\n"); 9738 SEL = CM_ScalarEpilogueNotAllowedLowTripLoop; 9739 } 9740 } 9741 9742 // Check the function attributes to see if implicit floats are allowed. 9743 // FIXME: This check doesn't seem possibly correct -- what if the loop is 9744 // an integer loop and the vector instructions selected are purely integer 9745 // vector instructions? 9746 if (F->hasFnAttribute(Attribute::NoImplicitFloat)) { 9747 reportVectorizationFailure( 9748 "Can't vectorize when the NoImplicitFloat attribute is used", 9749 "loop not vectorized due to NoImplicitFloat attribute", 9750 "NoImplicitFloat", ORE, L); 9751 Hints.emitRemarkWithHints(); 9752 return false; 9753 } 9754 9755 // Check if the target supports potentially unsafe FP vectorization. 9756 // FIXME: Add a check for the type of safety issue (denormal, signaling) 9757 // for the target we're vectorizing for, to make sure none of the 9758 // additional fp-math flags can help. 9759 if (Hints.isPotentiallyUnsafe() && 9760 TTI->isFPVectorizationPotentiallyUnsafe()) { 9761 reportVectorizationFailure( 9762 "Potentially unsafe FP op prevents vectorization", 9763 "loop not vectorized due to unsafe FP support.", 9764 "UnsafeFP", ORE, L); 9765 Hints.emitRemarkWithHints(); 9766 return false; 9767 } 9768 9769 if (!Requirements.canVectorizeFPMath(Hints)) { 9770 ORE->emit([&]() { 9771 auto *ExactFPMathInst = Requirements.getExactFPInst(); 9772 return OptimizationRemarkAnalysisFPCommute(DEBUG_TYPE, "CantReorderFPOps", 9773 ExactFPMathInst->getDebugLoc(), 9774 ExactFPMathInst->getParent()) 9775 << "loop not vectorized: cannot prove it is safe to reorder " 9776 "floating-point operations"; 9777 }); 9778 LLVM_DEBUG(dbgs() << "LV: loop not vectorized: cannot prove it is safe to " 9779 "reorder floating-point operations\n"); 9780 Hints.emitRemarkWithHints(); 9781 return false; 9782 } 9783 9784 bool UseInterleaved = TTI->enableInterleavedAccessVectorization(); 9785 InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL.getLAI()); 9786 9787 // If an override option has been passed in for interleaved accesses, use it. 9788 if (EnableInterleavedMemAccesses.getNumOccurrences() > 0) 9789 UseInterleaved = EnableInterleavedMemAccesses; 9790 9791 // Analyze interleaved memory accesses. 9792 if (UseInterleaved) { 9793 IAI.analyzeInterleaving(useMaskedInterleavedAccesses(*TTI)); 9794 } 9795 9796 // Use the cost model. 9797 LoopVectorizationCostModel CM(SEL, L, PSE, LI, &LVL, *TTI, TLI, DB, AC, ORE, 9798 F, &Hints, IAI); 9799 CM.collectValuesToIgnore(); 9800 9801 // Use the planner for vectorization. 9802 LoopVectorizationPlanner LVP(L, LI, TLI, TTI, &LVL, CM, IAI, PSE, Hints, 9803 Requirements, ORE); 9804 9805 // Get user vectorization factor and interleave count. 9806 ElementCount UserVF = Hints.getWidth(); 9807 unsigned UserIC = Hints.getInterleave(); 9808 9809 // Plan how to best vectorize, return the best VF and its cost. 9810 Optional<VectorizationFactor> MaybeVF = LVP.plan(UserVF, UserIC); 9811 9812 VectorizationFactor VF = VectorizationFactor::Disabled(); 9813 unsigned IC = 1; 9814 9815 if (MaybeVF) { 9816 VF = *MaybeVF; 9817 // Select the interleave count. 9818 IC = CM.selectInterleaveCount(VF.Width, *VF.Cost.getValue()); 9819 } 9820 9821 // Identify the diagnostic messages that should be produced. 9822 std::pair<StringRef, std::string> VecDiagMsg, IntDiagMsg; 9823 bool VectorizeLoop = true, InterleaveLoop = true; 9824 if (VF.Width.isScalar()) { 9825 LLVM_DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n"); 9826 VecDiagMsg = std::make_pair( 9827 "VectorizationNotBeneficial", 9828 "the cost-model indicates that vectorization is not beneficial"); 9829 VectorizeLoop = false; 9830 } 9831 9832 if (!MaybeVF && UserIC > 1) { 9833 // Tell the user interleaving was avoided up-front, despite being explicitly 9834 // requested. 9835 LLVM_DEBUG(dbgs() << "LV: Ignoring UserIC, because vectorization and " 9836 "interleaving should be avoided up front\n"); 9837 IntDiagMsg = std::make_pair( 9838 "InterleavingAvoided", 9839 "Ignoring UserIC, because interleaving was avoided up front"); 9840 InterleaveLoop = false; 9841 } else if (IC == 1 && UserIC <= 1) { 9842 // Tell the user interleaving is not beneficial. 9843 LLVM_DEBUG(dbgs() << "LV: Interleaving is not beneficial.\n"); 9844 IntDiagMsg = std::make_pair( 9845 "InterleavingNotBeneficial", 9846 "the cost-model indicates that interleaving is not beneficial"); 9847 InterleaveLoop = false; 9848 if (UserIC == 1) { 9849 IntDiagMsg.first = "InterleavingNotBeneficialAndDisabled"; 9850 IntDiagMsg.second += 9851 " and is explicitly disabled or interleave count is set to 1"; 9852 } 9853 } else if (IC > 1 && UserIC == 1) { 9854 // Tell the user interleaving is beneficial, but it explicitly disabled. 9855 LLVM_DEBUG( 9856 dbgs() << "LV: Interleaving is beneficial but is explicitly disabled."); 9857 IntDiagMsg = std::make_pair( 9858 "InterleavingBeneficialButDisabled", 9859 "the cost-model indicates that interleaving is beneficial " 9860 "but is explicitly disabled or interleave count is set to 1"); 9861 InterleaveLoop = false; 9862 } 9863 9864 // Override IC if user provided an interleave count. 9865 IC = UserIC > 0 ? UserIC : IC; 9866 9867 // Emit diagnostic messages, if any. 9868 const char *VAPassName = Hints.vectorizeAnalysisPassName(); 9869 if (!VectorizeLoop && !InterleaveLoop) { 9870 // Do not vectorize or interleaving the loop. 9871 ORE->emit([&]() { 9872 return OptimizationRemarkMissed(VAPassName, VecDiagMsg.first, 9873 L->getStartLoc(), L->getHeader()) 9874 << VecDiagMsg.second; 9875 }); 9876 ORE->emit([&]() { 9877 return OptimizationRemarkMissed(LV_NAME, IntDiagMsg.first, 9878 L->getStartLoc(), L->getHeader()) 9879 << IntDiagMsg.second; 9880 }); 9881 return false; 9882 } else if (!VectorizeLoop && InterleaveLoop) { 9883 LLVM_DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n'); 9884 ORE->emit([&]() { 9885 return OptimizationRemarkAnalysis(VAPassName, VecDiagMsg.first, 9886 L->getStartLoc(), L->getHeader()) 9887 << VecDiagMsg.second; 9888 }); 9889 } else if (VectorizeLoop && !InterleaveLoop) { 9890 LLVM_DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width 9891 << ") in " << DebugLocStr << '\n'); 9892 ORE->emit([&]() { 9893 return OptimizationRemarkAnalysis(LV_NAME, IntDiagMsg.first, 9894 L->getStartLoc(), L->getHeader()) 9895 << IntDiagMsg.second; 9896 }); 9897 } else if (VectorizeLoop && InterleaveLoop) { 9898 LLVM_DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width 9899 << ") in " << DebugLocStr << '\n'); 9900 LLVM_DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n'); 9901 } 9902 9903 bool DisableRuntimeUnroll = false; 9904 MDNode *OrigLoopID = L->getLoopID(); 9905 { 9906 // Optimistically generate runtime checks. Drop them if they turn out to not 9907 // be profitable. Limit the scope of Checks, so the cleanup happens 9908 // immediately after vector codegeneration is done. 9909 GeneratedRTChecks Checks(*PSE.getSE(), DT, LI, 9910 F->getParent()->getDataLayout()); 9911 if (!VF.Width.isScalar() || IC > 1) 9912 Checks.Create(L, *LVL.getLAI(), PSE.getUnionPredicate()); 9913 LVP.setBestPlan(VF.Width, IC); 9914 9915 using namespace ore; 9916 if (!VectorizeLoop) { 9917 assert(IC > 1 && "interleave count should not be 1 or 0"); 9918 // If we decided that it is not legal to vectorize the loop, then 9919 // interleave it. 9920 InnerLoopUnroller Unroller(L, PSE, LI, DT, TLI, TTI, AC, ORE, IC, &LVL, 9921 &CM, BFI, PSI, Checks); 9922 LVP.executePlan(Unroller, DT); 9923 9924 ORE->emit([&]() { 9925 return OptimizationRemark(LV_NAME, "Interleaved", L->getStartLoc(), 9926 L->getHeader()) 9927 << "interleaved loop (interleaved count: " 9928 << NV("InterleaveCount", IC) << ")"; 9929 }); 9930 } else { 9931 // If we decided that it is *legal* to vectorize the loop, then do it. 9932 9933 // Consider vectorizing the epilogue too if it's profitable. 9934 VectorizationFactor EpilogueVF = 9935 CM.selectEpilogueVectorizationFactor(VF.Width, LVP); 9936 if (EpilogueVF.Width.isVector()) { 9937 9938 // The first pass vectorizes the main loop and creates a scalar epilogue 9939 // to be vectorized by executing the plan (potentially with a different 9940 // factor) again shortly afterwards. 9941 EpilogueLoopVectorizationInfo EPI(VF.Width.getKnownMinValue(), IC, 9942 EpilogueVF.Width.getKnownMinValue(), 9943 1); 9944 EpilogueVectorizerMainLoop MainILV(L, PSE, LI, DT, TLI, TTI, AC, ORE, 9945 EPI, &LVL, &CM, BFI, PSI, Checks); 9946 9947 LVP.setBestPlan(EPI.MainLoopVF, EPI.MainLoopUF); 9948 LVP.executePlan(MainILV, DT); 9949 ++LoopsVectorized; 9950 9951 simplifyLoop(L, DT, LI, SE, AC, nullptr, false /* PreserveLCSSA */); 9952 formLCSSARecursively(*L, *DT, LI, SE); 9953 9954 // Second pass vectorizes the epilogue and adjusts the control flow 9955 // edges from the first pass. 9956 LVP.setBestPlan(EPI.EpilogueVF, EPI.EpilogueUF); 9957 EPI.MainLoopVF = EPI.EpilogueVF; 9958 EPI.MainLoopUF = EPI.EpilogueUF; 9959 EpilogueVectorizerEpilogueLoop EpilogILV(L, PSE, LI, DT, TLI, TTI, AC, 9960 ORE, EPI, &LVL, &CM, BFI, PSI, 9961 Checks); 9962 LVP.executePlan(EpilogILV, DT); 9963 ++LoopsEpilogueVectorized; 9964 9965 if (!MainILV.areSafetyChecksAdded()) 9966 DisableRuntimeUnroll = true; 9967 } else { 9968 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width, IC, 9969 &LVL, &CM, BFI, PSI, Checks); 9970 LVP.executePlan(LB, DT); 9971 ++LoopsVectorized; 9972 9973 // Add metadata to disable runtime unrolling a scalar loop when there 9974 // are no runtime checks about strides and memory. A scalar loop that is 9975 // rarely used is not worth unrolling. 9976 if (!LB.areSafetyChecksAdded()) 9977 DisableRuntimeUnroll = true; 9978 } 9979 // Report the vectorization decision. 9980 ORE->emit([&]() { 9981 return OptimizationRemark(LV_NAME, "Vectorized", L->getStartLoc(), 9982 L->getHeader()) 9983 << "vectorized loop (vectorization width: " 9984 << NV("VectorizationFactor", VF.Width) 9985 << ", interleaved count: " << NV("InterleaveCount", IC) << ")"; 9986 }); 9987 } 9988 9989 if (ORE->allowExtraAnalysis(LV_NAME)) 9990 checkMixedPrecision(L, ORE); 9991 } 9992 9993 Optional<MDNode *> RemainderLoopID = 9994 makeFollowupLoopID(OrigLoopID, {LLVMLoopVectorizeFollowupAll, 9995 LLVMLoopVectorizeFollowupEpilogue}); 9996 if (RemainderLoopID.hasValue()) { 9997 L->setLoopID(RemainderLoopID.getValue()); 9998 } else { 9999 if (DisableRuntimeUnroll) 10000 AddRuntimeUnrollDisableMetaData(L); 10001 10002 // Mark the loop as already vectorized to avoid vectorizing again. 10003 Hints.setAlreadyVectorized(); 10004 } 10005 10006 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs())); 10007 return true; 10008 } 10009 10010 LoopVectorizeResult LoopVectorizePass::runImpl( 10011 Function &F, ScalarEvolution &SE_, LoopInfo &LI_, TargetTransformInfo &TTI_, 10012 DominatorTree &DT_, BlockFrequencyInfo &BFI_, TargetLibraryInfo *TLI_, 10013 DemandedBits &DB_, AAResults &AA_, AssumptionCache &AC_, 10014 std::function<const LoopAccessInfo &(Loop &)> &GetLAA_, 10015 OptimizationRemarkEmitter &ORE_, ProfileSummaryInfo *PSI_) { 10016 SE = &SE_; 10017 LI = &LI_; 10018 TTI = &TTI_; 10019 DT = &DT_; 10020 BFI = &BFI_; 10021 TLI = TLI_; 10022 AA = &AA_; 10023 AC = &AC_; 10024 GetLAA = &GetLAA_; 10025 DB = &DB_; 10026 ORE = &ORE_; 10027 PSI = PSI_; 10028 10029 // Don't attempt if 10030 // 1. the target claims to have no vector registers, and 10031 // 2. interleaving won't help ILP. 10032 // 10033 // The second condition is necessary because, even if the target has no 10034 // vector registers, loop vectorization may still enable scalar 10035 // interleaving. 10036 if (!TTI->getNumberOfRegisters(TTI->getRegisterClassForType(true)) && 10037 TTI->getMaxInterleaveFactor(1) < 2) 10038 return LoopVectorizeResult(false, false); 10039 10040 bool Changed = false, CFGChanged = false; 10041 10042 // The vectorizer requires loops to be in simplified form. 10043 // Since simplification may add new inner loops, it has to run before the 10044 // legality and profitability checks. This means running the loop vectorizer 10045 // will simplify all loops, regardless of whether anything end up being 10046 // vectorized. 10047 for (auto &L : *LI) 10048 Changed |= CFGChanged |= 10049 simplifyLoop(L, DT, LI, SE, AC, nullptr, false /* PreserveLCSSA */); 10050 10051 // Build up a worklist of inner-loops to vectorize. This is necessary as 10052 // the act of vectorizing or partially unrolling a loop creates new loops 10053 // and can invalidate iterators across the loops. 10054 SmallVector<Loop *, 8> Worklist; 10055 10056 for (Loop *L : *LI) 10057 collectSupportedLoops(*L, LI, ORE, Worklist); 10058 10059 LoopsAnalyzed += Worklist.size(); 10060 10061 // Now walk the identified inner loops. 10062 while (!Worklist.empty()) { 10063 Loop *L = Worklist.pop_back_val(); 10064 10065 // For the inner loops we actually process, form LCSSA to simplify the 10066 // transform. 10067 Changed |= formLCSSARecursively(*L, *DT, LI, SE); 10068 10069 Changed |= CFGChanged |= processLoop(L); 10070 } 10071 10072 // Process each loop nest in the function. 10073 return LoopVectorizeResult(Changed, CFGChanged); 10074 } 10075 10076 PreservedAnalyses LoopVectorizePass::run(Function &F, 10077 FunctionAnalysisManager &AM) { 10078 auto &SE = AM.getResult<ScalarEvolutionAnalysis>(F); 10079 auto &LI = AM.getResult<LoopAnalysis>(F); 10080 auto &TTI = AM.getResult<TargetIRAnalysis>(F); 10081 auto &DT = AM.getResult<DominatorTreeAnalysis>(F); 10082 auto &BFI = AM.getResult<BlockFrequencyAnalysis>(F); 10083 auto &TLI = AM.getResult<TargetLibraryAnalysis>(F); 10084 auto &AA = AM.getResult<AAManager>(F); 10085 auto &AC = AM.getResult<AssumptionAnalysis>(F); 10086 auto &DB = AM.getResult<DemandedBitsAnalysis>(F); 10087 auto &ORE = AM.getResult<OptimizationRemarkEmitterAnalysis>(F); 10088 MemorySSA *MSSA = EnableMSSALoopDependency 10089 ? &AM.getResult<MemorySSAAnalysis>(F).getMSSA() 10090 : nullptr; 10091 10092 auto &LAM = AM.getResult<LoopAnalysisManagerFunctionProxy>(F).getManager(); 10093 std::function<const LoopAccessInfo &(Loop &)> GetLAA = 10094 [&](Loop &L) -> const LoopAccessInfo & { 10095 LoopStandardAnalysisResults AR = {AA, AC, DT, LI, SE, 10096 TLI, TTI, nullptr, MSSA}; 10097 return LAM.getResult<LoopAccessAnalysis>(L, AR); 10098 }; 10099 auto &MAMProxy = AM.getResult<ModuleAnalysisManagerFunctionProxy>(F); 10100 ProfileSummaryInfo *PSI = 10101 MAMProxy.getCachedResult<ProfileSummaryAnalysis>(*F.getParent()); 10102 LoopVectorizeResult Result = 10103 runImpl(F, SE, LI, TTI, DT, BFI, &TLI, DB, AA, AC, GetLAA, ORE, PSI); 10104 if (!Result.MadeAnyChange) 10105 return PreservedAnalyses::all(); 10106 PreservedAnalyses PA; 10107 10108 // We currently do not preserve loopinfo/dominator analyses with outer loop 10109 // vectorization. Until this is addressed, mark these analyses as preserved 10110 // only for non-VPlan-native path. 10111 // TODO: Preserve Loop and Dominator analyses for VPlan-native path. 10112 if (!EnableVPlanNativePath) { 10113 PA.preserve<LoopAnalysis>(); 10114 PA.preserve<DominatorTreeAnalysis>(); 10115 } 10116 PA.preserve<BasicAA>(); 10117 PA.preserve<GlobalsAA>(); 10118 if (!Result.MadeCFGChange) 10119 PA.preserveSet<CFGAnalyses>(); 10120 return PA; 10121 } 10122