1 //===- AggressiveInstCombine.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the aggressive expression pattern combiner classes.
10 // Currently, it handles expression patterns for:
11 //  * Truncate instruction
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/Transforms/AggressiveInstCombine/AggressiveInstCombine.h"
16 #include "AggressiveInstCombineInternal.h"
17 #include "llvm-c/Initialization.h"
18 #include "llvm-c/Transforms/AggressiveInstCombine.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Analysis/AliasAnalysis.h"
21 #include "llvm/Analysis/AssumptionCache.h"
22 #include "llvm/Analysis/BasicAliasAnalysis.h"
23 #include "llvm/Analysis/GlobalsModRef.h"
24 #include "llvm/Analysis/TargetLibraryInfo.h"
25 #include "llvm/Analysis/ValueTracking.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/IR/Dominators.h"
28 #include "llvm/IR/Function.h"
29 #include "llvm/IR/IRBuilder.h"
30 #include "llvm/IR/LegacyPassManager.h"
31 #include "llvm/IR/PatternMatch.h"
32 #include "llvm/InitializePasses.h"
33 #include "llvm/Pass.h"
34 #include "llvm/Transforms/Utils/Local.h"
35 
36 using namespace llvm;
37 using namespace PatternMatch;
38 
39 #define DEBUG_TYPE "aggressive-instcombine"
40 
41 STATISTIC(NumAnyOrAllBitsSet, "Number of any/all-bits-set patterns folded");
42 STATISTIC(NumGuardedRotates,
43           "Number of guarded rotates transformed into funnel shifts");
44 STATISTIC(NumGuardedFunnelShifts,
45           "Number of guarded funnel shifts transformed into funnel shifts");
46 STATISTIC(NumPopCountRecognized, "Number of popcount idioms recognized");
47 
48 namespace {
49 /// Contains expression pattern combiner logic.
50 /// This class provides both the logic to combine expression patterns and
51 /// combine them. It differs from InstCombiner class in that each pattern
52 /// combiner runs only once as opposed to InstCombine's multi-iteration,
53 /// which allows pattern combiner to have higher complexity than the O(1)
54 /// required by the instruction combiner.
55 class AggressiveInstCombinerLegacyPass : public FunctionPass {
56 public:
57   static char ID; // Pass identification, replacement for typeid
58 
59   AggressiveInstCombinerLegacyPass() : FunctionPass(ID) {
60     initializeAggressiveInstCombinerLegacyPassPass(
61         *PassRegistry::getPassRegistry());
62   }
63 
64   void getAnalysisUsage(AnalysisUsage &AU) const override;
65 
66   /// Run all expression pattern optimizations on the given /p F function.
67   ///
68   /// \param F function to optimize.
69   /// \returns true if the IR is changed.
70   bool runOnFunction(Function &F) override;
71 };
72 } // namespace
73 
74 /// Match a pattern for a bitwise funnel/rotate operation that partially guards
75 /// against undefined behavior by branching around the funnel-shift/rotation
76 /// when the shift amount is 0.
77 static bool foldGuardedFunnelShift(Instruction &I, const DominatorTree &DT) {
78   if (I.getOpcode() != Instruction::PHI || I.getNumOperands() != 2)
79     return false;
80 
81   // As with the one-use checks below, this is not strictly necessary, but we
82   // are being cautious to avoid potential perf regressions on targets that
83   // do not actually have a funnel/rotate instruction (where the funnel shift
84   // would be expanded back into math/shift/logic ops).
85   if (!isPowerOf2_32(I.getType()->getScalarSizeInBits()))
86     return false;
87 
88   // Match V to funnel shift left/right and capture the source operands and
89   // shift amount.
90   auto matchFunnelShift = [](Value *V, Value *&ShVal0, Value *&ShVal1,
91                              Value *&ShAmt) {
92     Value *SubAmt;
93     unsigned Width = V->getType()->getScalarSizeInBits();
94 
95     // fshl(ShVal0, ShVal1, ShAmt)
96     //  == (ShVal0 << ShAmt) | (ShVal1 >> (Width -ShAmt))
97     if (match(V, m_OneUse(m_c_Or(
98                      m_Shl(m_Value(ShVal0), m_Value(ShAmt)),
99                      m_LShr(m_Value(ShVal1),
100                             m_Sub(m_SpecificInt(Width), m_Value(SubAmt))))))) {
101       if (ShAmt == SubAmt) // TODO: Use m_Specific
102         return Intrinsic::fshl;
103     }
104 
105     // fshr(ShVal0, ShVal1, ShAmt)
106     //  == (ShVal0 >> ShAmt) | (ShVal1 << (Width - ShAmt))
107     if (match(V,
108               m_OneUse(m_c_Or(m_Shl(m_Value(ShVal0), m_Sub(m_SpecificInt(Width),
109                                                            m_Value(SubAmt))),
110                               m_LShr(m_Value(ShVal1), m_Value(ShAmt)))))) {
111       if (ShAmt == SubAmt) // TODO: Use m_Specific
112         return Intrinsic::fshr;
113     }
114 
115     return Intrinsic::not_intrinsic;
116   };
117 
118   // One phi operand must be a funnel/rotate operation, and the other phi
119   // operand must be the source value of that funnel/rotate operation:
120   // phi [ rotate(RotSrc, ShAmt), FunnelBB ], [ RotSrc, GuardBB ]
121   // phi [ fshl(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal0, GuardBB ]
122   // phi [ fshr(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal1, GuardBB ]
123   PHINode &Phi = cast<PHINode>(I);
124   unsigned FunnelOp = 0, GuardOp = 1;
125   Value *P0 = Phi.getOperand(0), *P1 = Phi.getOperand(1);
126   Value *ShVal0, *ShVal1, *ShAmt;
127   Intrinsic::ID IID = matchFunnelShift(P0, ShVal0, ShVal1, ShAmt);
128   if (IID == Intrinsic::not_intrinsic ||
129       (IID == Intrinsic::fshl && ShVal0 != P1) ||
130       (IID == Intrinsic::fshr && ShVal1 != P1)) {
131     IID = matchFunnelShift(P1, ShVal0, ShVal1, ShAmt);
132     if (IID == Intrinsic::not_intrinsic ||
133         (IID == Intrinsic::fshl && ShVal0 != P0) ||
134         (IID == Intrinsic::fshr && ShVal1 != P0))
135       return false;
136     assert((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
137            "Pattern must match funnel shift left or right");
138     std::swap(FunnelOp, GuardOp);
139   }
140 
141   // The incoming block with our source operand must be the "guard" block.
142   // That must contain a cmp+branch to avoid the funnel/rotate when the shift
143   // amount is equal to 0. The other incoming block is the block with the
144   // funnel/rotate.
145   BasicBlock *GuardBB = Phi.getIncomingBlock(GuardOp);
146   BasicBlock *FunnelBB = Phi.getIncomingBlock(FunnelOp);
147   Instruction *TermI = GuardBB->getTerminator();
148 
149   // Ensure that the shift values dominate each block.
150   if (!DT.dominates(ShVal0, TermI) || !DT.dominates(ShVal1, TermI))
151     return false;
152 
153   ICmpInst::Predicate Pred;
154   BasicBlock *PhiBB = Phi.getParent();
155   if (!match(TermI, m_Br(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()),
156                          m_SpecificBB(PhiBB), m_SpecificBB(FunnelBB))))
157     return false;
158 
159   if (Pred != CmpInst::ICMP_EQ)
160     return false;
161 
162   IRBuilder<> Builder(PhiBB, PhiBB->getFirstInsertionPt());
163 
164   if (ShVal0 == ShVal1)
165     ++NumGuardedRotates;
166   else
167     ++NumGuardedFunnelShifts;
168 
169   // If this is not a rotate then the select was blocking poison from the
170   // 'shift-by-zero' non-TVal, but a funnel shift won't - so freeze it.
171   bool IsFshl = IID == Intrinsic::fshl;
172   if (ShVal0 != ShVal1) {
173     if (IsFshl && !llvm::isGuaranteedNotToBePoison(ShVal1))
174       ShVal1 = Builder.CreateFreeze(ShVal1);
175     else if (!IsFshl && !llvm::isGuaranteedNotToBePoison(ShVal0))
176       ShVal0 = Builder.CreateFreeze(ShVal0);
177   }
178 
179   // We matched a variation of this IR pattern:
180   // GuardBB:
181   //   %cmp = icmp eq i32 %ShAmt, 0
182   //   br i1 %cmp, label %PhiBB, label %FunnelBB
183   // FunnelBB:
184   //   %sub = sub i32 32, %ShAmt
185   //   %shr = lshr i32 %ShVal1, %sub
186   //   %shl = shl i32 %ShVal0, %ShAmt
187   //   %fsh = or i32 %shr, %shl
188   //   br label %PhiBB
189   // PhiBB:
190   //   %cond = phi i32 [ %fsh, %FunnelBB ], [ %ShVal0, %GuardBB ]
191   // -->
192   // llvm.fshl.i32(i32 %ShVal0, i32 %ShVal1, i32 %ShAmt)
193   Function *F = Intrinsic::getDeclaration(Phi.getModule(), IID, Phi.getType());
194   Phi.replaceAllUsesWith(Builder.CreateCall(F, {ShVal0, ShVal1, ShAmt}));
195   return true;
196 }
197 
198 /// This is used by foldAnyOrAllBitsSet() to capture a source value (Root) and
199 /// the bit indexes (Mask) needed by a masked compare. If we're matching a chain
200 /// of 'and' ops, then we also need to capture the fact that we saw an
201 /// "and X, 1", so that's an extra return value for that case.
202 struct MaskOps {
203   Value *Root = nullptr;
204   APInt Mask;
205   bool MatchAndChain;
206   bool FoundAnd1 = false;
207 
208   MaskOps(unsigned BitWidth, bool MatchAnds)
209       : Mask(APInt::getZero(BitWidth)), MatchAndChain(MatchAnds) {}
210 };
211 
212 /// This is a recursive helper for foldAnyOrAllBitsSet() that walks through a
213 /// chain of 'and' or 'or' instructions looking for shift ops of a common source
214 /// value. Examples:
215 ///   or (or (or X, (X >> 3)), (X >> 5)), (X >> 8)
216 /// returns { X, 0x129 }
217 ///   and (and (X >> 1), 1), (X >> 4)
218 /// returns { X, 0x12 }
219 static bool matchAndOrChain(Value *V, MaskOps &MOps) {
220   Value *Op0, *Op1;
221   if (MOps.MatchAndChain) {
222     // Recurse through a chain of 'and' operands. This requires an extra check
223     // vs. the 'or' matcher: we must find an "and X, 1" instruction somewhere
224     // in the chain to know that all of the high bits are cleared.
225     if (match(V, m_And(m_Value(Op0), m_One()))) {
226       MOps.FoundAnd1 = true;
227       return matchAndOrChain(Op0, MOps);
228     }
229     if (match(V, m_And(m_Value(Op0), m_Value(Op1))))
230       return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps);
231   } else {
232     // Recurse through a chain of 'or' operands.
233     if (match(V, m_Or(m_Value(Op0), m_Value(Op1))))
234       return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps);
235   }
236 
237   // We need a shift-right or a bare value representing a compare of bit 0 of
238   // the original source operand.
239   Value *Candidate;
240   const APInt *BitIndex = nullptr;
241   if (!match(V, m_LShr(m_Value(Candidate), m_APInt(BitIndex))))
242     Candidate = V;
243 
244   // Initialize result source operand.
245   if (!MOps.Root)
246     MOps.Root = Candidate;
247 
248   // The shift constant is out-of-range? This code hasn't been simplified.
249   if (BitIndex && BitIndex->uge(MOps.Mask.getBitWidth()))
250     return false;
251 
252   // Fill in the mask bit derived from the shift constant.
253   MOps.Mask.setBit(BitIndex ? BitIndex->getZExtValue() : 0);
254   return MOps.Root == Candidate;
255 }
256 
257 /// Match patterns that correspond to "any-bits-set" and "all-bits-set".
258 /// These will include a chain of 'or' or 'and'-shifted bits from a
259 /// common source value:
260 /// and (or  (lshr X, C), ...), 1 --> (X & CMask) != 0
261 /// and (and (lshr X, C), ...), 1 --> (X & CMask) == CMask
262 /// Note: "any-bits-clear" and "all-bits-clear" are variations of these patterns
263 /// that differ only with a final 'not' of the result. We expect that final
264 /// 'not' to be folded with the compare that we create here (invert predicate).
265 static bool foldAnyOrAllBitsSet(Instruction &I) {
266   // The 'any-bits-set' ('or' chain) pattern is simpler to match because the
267   // final "and X, 1" instruction must be the final op in the sequence.
268   bool MatchAllBitsSet;
269   if (match(&I, m_c_And(m_OneUse(m_And(m_Value(), m_Value())), m_Value())))
270     MatchAllBitsSet = true;
271   else if (match(&I, m_And(m_OneUse(m_Or(m_Value(), m_Value())), m_One())))
272     MatchAllBitsSet = false;
273   else
274     return false;
275 
276   MaskOps MOps(I.getType()->getScalarSizeInBits(), MatchAllBitsSet);
277   if (MatchAllBitsSet) {
278     if (!matchAndOrChain(cast<BinaryOperator>(&I), MOps) || !MOps.FoundAnd1)
279       return false;
280   } else {
281     if (!matchAndOrChain(cast<BinaryOperator>(&I)->getOperand(0), MOps))
282       return false;
283   }
284 
285   // The pattern was found. Create a masked compare that replaces all of the
286   // shift and logic ops.
287   IRBuilder<> Builder(&I);
288   Constant *Mask = ConstantInt::get(I.getType(), MOps.Mask);
289   Value *And = Builder.CreateAnd(MOps.Root, Mask);
290   Value *Cmp = MatchAllBitsSet ? Builder.CreateICmpEQ(And, Mask)
291                                : Builder.CreateIsNotNull(And);
292   Value *Zext = Builder.CreateZExt(Cmp, I.getType());
293   I.replaceAllUsesWith(Zext);
294   ++NumAnyOrAllBitsSet;
295   return true;
296 }
297 
298 // Try to recognize below function as popcount intrinsic.
299 // This is the "best" algorithm from
300 // http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
301 // Also used in TargetLowering::expandCTPOP().
302 //
303 // int popcount(unsigned int i) {
304 //   i = i - ((i >> 1) & 0x55555555);
305 //   i = (i & 0x33333333) + ((i >> 2) & 0x33333333);
306 //   i = ((i + (i >> 4)) & 0x0F0F0F0F);
307 //   return (i * 0x01010101) >> 24;
308 // }
309 static bool tryToRecognizePopCount(Instruction &I) {
310   if (I.getOpcode() != Instruction::LShr)
311     return false;
312 
313   Type *Ty = I.getType();
314   if (!Ty->isIntOrIntVectorTy())
315     return false;
316 
317   unsigned Len = Ty->getScalarSizeInBits();
318   // FIXME: fix Len == 8 and other irregular type lengths.
319   if (!(Len <= 128 && Len > 8 && Len % 8 == 0))
320     return false;
321 
322   APInt Mask55 = APInt::getSplat(Len, APInt(8, 0x55));
323   APInt Mask33 = APInt::getSplat(Len, APInt(8, 0x33));
324   APInt Mask0F = APInt::getSplat(Len, APInt(8, 0x0F));
325   APInt Mask01 = APInt::getSplat(Len, APInt(8, 0x01));
326   APInt MaskShift = APInt(Len, Len - 8);
327 
328   Value *Op0 = I.getOperand(0);
329   Value *Op1 = I.getOperand(1);
330   Value *MulOp0;
331   // Matching "(i * 0x01010101...) >> 24".
332   if ((match(Op0, m_Mul(m_Value(MulOp0), m_SpecificInt(Mask01)))) &&
333        match(Op1, m_SpecificInt(MaskShift))) {
334     Value *ShiftOp0;
335     // Matching "((i + (i >> 4)) & 0x0F0F0F0F...)".
336     if (match(MulOp0, m_And(m_c_Add(m_LShr(m_Value(ShiftOp0), m_SpecificInt(4)),
337                                     m_Deferred(ShiftOp0)),
338                             m_SpecificInt(Mask0F)))) {
339       Value *AndOp0;
340       // Matching "(i & 0x33333333...) + ((i >> 2) & 0x33333333...)".
341       if (match(ShiftOp0,
342                 m_c_Add(m_And(m_Value(AndOp0), m_SpecificInt(Mask33)),
343                         m_And(m_LShr(m_Deferred(AndOp0), m_SpecificInt(2)),
344                               m_SpecificInt(Mask33))))) {
345         Value *Root, *SubOp1;
346         // Matching "i - ((i >> 1) & 0x55555555...)".
347         if (match(AndOp0, m_Sub(m_Value(Root), m_Value(SubOp1))) &&
348             match(SubOp1, m_And(m_LShr(m_Specific(Root), m_SpecificInt(1)),
349                                 m_SpecificInt(Mask55)))) {
350           LLVM_DEBUG(dbgs() << "Recognized popcount intrinsic\n");
351           IRBuilder<> Builder(&I);
352           Function *Func = Intrinsic::getDeclaration(
353               I.getModule(), Intrinsic::ctpop, I.getType());
354           I.replaceAllUsesWith(Builder.CreateCall(Func, {Root}));
355           ++NumPopCountRecognized;
356           return true;
357         }
358       }
359     }
360   }
361 
362   return false;
363 }
364 
365 /// This is the entry point for folds that could be implemented in regular
366 /// InstCombine, but they are separated because they are not expected to
367 /// occur frequently and/or have more than a constant-length pattern match.
368 static bool foldUnusualPatterns(Function &F, DominatorTree &DT) {
369   bool MadeChange = false;
370   for (BasicBlock &BB : F) {
371     // Ignore unreachable basic blocks.
372     if (!DT.isReachableFromEntry(&BB))
373       continue;
374     // Do not delete instructions under here and invalidate the iterator.
375     // Walk the block backwards for efficiency. We're matching a chain of
376     // use->defs, so we're more likely to succeed by starting from the bottom.
377     // Also, we want to avoid matching partial patterns.
378     // TODO: It would be more efficient if we removed dead instructions
379     // iteratively in this loop rather than waiting until the end.
380     for (Instruction &I : llvm::reverse(BB)) {
381       MadeChange |= foldAnyOrAllBitsSet(I);
382       MadeChange |= foldGuardedFunnelShift(I, DT);
383       MadeChange |= tryToRecognizePopCount(I);
384     }
385   }
386 
387   // We're done with transforms, so remove dead instructions.
388   if (MadeChange)
389     for (BasicBlock &BB : F)
390       SimplifyInstructionsInBlock(&BB);
391 
392   return MadeChange;
393 }
394 
395 /// This is the entry point for all transforms. Pass manager differences are
396 /// handled in the callers of this function.
397 static bool runImpl(Function &F, AssumptionCache &AC, TargetLibraryInfo &TLI,
398                     DominatorTree &DT) {
399   bool MadeChange = false;
400   const DataLayout &DL = F.getParent()->getDataLayout();
401   TruncInstCombine TIC(AC, TLI, DL, DT);
402   MadeChange |= TIC.run(F);
403   MadeChange |= foldUnusualPatterns(F, DT);
404   return MadeChange;
405 }
406 
407 void AggressiveInstCombinerLegacyPass::getAnalysisUsage(
408     AnalysisUsage &AU) const {
409   AU.setPreservesCFG();
410   AU.addRequired<AssumptionCacheTracker>();
411   AU.addRequired<DominatorTreeWrapperPass>();
412   AU.addRequired<TargetLibraryInfoWrapperPass>();
413   AU.addPreserved<AAResultsWrapperPass>();
414   AU.addPreserved<BasicAAWrapperPass>();
415   AU.addPreserved<DominatorTreeWrapperPass>();
416   AU.addPreserved<GlobalsAAWrapperPass>();
417 }
418 
419 bool AggressiveInstCombinerLegacyPass::runOnFunction(Function &F) {
420   auto &AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
421   auto &TLI = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
422   auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
423   return runImpl(F, AC, TLI, DT);
424 }
425 
426 PreservedAnalyses AggressiveInstCombinePass::run(Function &F,
427                                                  FunctionAnalysisManager &AM) {
428   auto &AC = AM.getResult<AssumptionAnalysis>(F);
429   auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
430   auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
431   if (!runImpl(F, AC, TLI, DT)) {
432     // No changes, all analyses are preserved.
433     return PreservedAnalyses::all();
434   }
435   // Mark all the analyses that instcombine updates as preserved.
436   PreservedAnalyses PA;
437   PA.preserveSet<CFGAnalyses>();
438   return PA;
439 }
440 
441 char AggressiveInstCombinerLegacyPass::ID = 0;
442 INITIALIZE_PASS_BEGIN(AggressiveInstCombinerLegacyPass,
443                       "aggressive-instcombine",
444                       "Combine pattern based expressions", false, false)
445 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
446 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
447 INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
448 INITIALIZE_PASS_END(AggressiveInstCombinerLegacyPass, "aggressive-instcombine",
449                     "Combine pattern based expressions", false, false)
450 
451 // Initialization Routines
452 void llvm::initializeAggressiveInstCombine(PassRegistry &Registry) {
453   initializeAggressiveInstCombinerLegacyPassPass(Registry);
454 }
455 
456 void LLVMInitializeAggressiveInstCombiner(LLVMPassRegistryRef R) {
457   initializeAggressiveInstCombinerLegacyPassPass(*unwrap(R));
458 }
459 
460 FunctionPass *llvm::createAggressiveInstCombinerPass() {
461   return new AggressiveInstCombinerLegacyPass();
462 }
463 
464 void LLVMAddAggressiveInstCombinerPass(LLVMPassManagerRef PM) {
465   unwrap(PM)->add(createAggressiveInstCombinerPass());
466 }
467