1 //===- AggressiveInstCombine.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the aggressive expression pattern combiner classes.
10 // Currently, it handles expression patterns for:
11 //  * Truncate instruction
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/Transforms/AggressiveInstCombine/AggressiveInstCombine.h"
16 #include "AggressiveInstCombineInternal.h"
17 #include "llvm-c/Initialization.h"
18 #include "llvm-c/Transforms/AggressiveInstCombine.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Analysis/AliasAnalysis.h"
21 #include "llvm/Analysis/AssumptionCache.h"
22 #include "llvm/Analysis/BasicAliasAnalysis.h"
23 #include "llvm/Analysis/GlobalsModRef.h"
24 #include "llvm/Analysis/TargetLibraryInfo.h"
25 #include "llvm/Analysis/ValueTracking.h"
26 #include "llvm/IR/Dominators.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/IRBuilder.h"
29 #include "llvm/IR/LegacyPassManager.h"
30 #include "llvm/IR/PatternMatch.h"
31 #include "llvm/InitializePasses.h"
32 #include "llvm/Pass.h"
33 #include "llvm/Transforms/Utils/Local.h"
34 
35 using namespace llvm;
36 using namespace PatternMatch;
37 
38 namespace llvm {
39 class DataLayout;
40 }
41 
42 #define DEBUG_TYPE "aggressive-instcombine"
43 
44 STATISTIC(NumAnyOrAllBitsSet, "Number of any/all-bits-set patterns folded");
45 STATISTIC(NumGuardedRotates,
46           "Number of guarded rotates transformed into funnel shifts");
47 STATISTIC(NumGuardedFunnelShifts,
48           "Number of guarded funnel shifts transformed into funnel shifts");
49 STATISTIC(NumPopCountRecognized, "Number of popcount idioms recognized");
50 
51 namespace {
52 /// Contains expression pattern combiner logic.
53 /// This class provides both the logic to combine expression patterns and
54 /// combine them. It differs from InstCombiner class in that each pattern
55 /// combiner runs only once as opposed to InstCombine's multi-iteration,
56 /// which allows pattern combiner to have higher complexity than the O(1)
57 /// required by the instruction combiner.
58 class AggressiveInstCombinerLegacyPass : public FunctionPass {
59 public:
60   static char ID; // Pass identification, replacement for typeid
61 
62   AggressiveInstCombinerLegacyPass() : FunctionPass(ID) {
63     initializeAggressiveInstCombinerLegacyPassPass(
64         *PassRegistry::getPassRegistry());
65   }
66 
67   void getAnalysisUsage(AnalysisUsage &AU) const override;
68 
69   /// Run all expression pattern optimizations on the given /p F function.
70   ///
71   /// \param F function to optimize.
72   /// \returns true if the IR is changed.
73   bool runOnFunction(Function &F) override;
74 };
75 } // namespace
76 
77 /// Match a pattern for a bitwise funnel/rotate operation that partially guards
78 /// against undefined behavior by branching around the funnel-shift/rotation
79 /// when the shift amount is 0.
80 static bool foldGuardedFunnelShift(Instruction &I, const DominatorTree &DT) {
81   if (I.getOpcode() != Instruction::PHI || I.getNumOperands() != 2)
82     return false;
83 
84   // As with the one-use checks below, this is not strictly necessary, but we
85   // are being cautious to avoid potential perf regressions on targets that
86   // do not actually have a funnel/rotate instruction (where the funnel shift
87   // would be expanded back into math/shift/logic ops).
88   if (!isPowerOf2_32(I.getType()->getScalarSizeInBits()))
89     return false;
90 
91   // Match V to funnel shift left/right and capture the source operands and
92   // shift amount.
93   auto matchFunnelShift = [](Value *V, Value *&ShVal0, Value *&ShVal1,
94                              Value *&ShAmt) {
95     Value *SubAmt;
96     unsigned Width = V->getType()->getScalarSizeInBits();
97 
98     // fshl(ShVal0, ShVal1, ShAmt)
99     //  == (ShVal0 << ShAmt) | (ShVal1 >> (Width -ShAmt))
100     if (match(V, m_OneUse(m_c_Or(
101                      m_Shl(m_Value(ShVal0), m_Value(ShAmt)),
102                      m_LShr(m_Value(ShVal1),
103                             m_Sub(m_SpecificInt(Width), m_Value(SubAmt))))))) {
104       if (ShAmt == SubAmt) // TODO: Use m_Specific
105         return Intrinsic::fshl;
106     }
107 
108     // fshr(ShVal0, ShVal1, ShAmt)
109     //  == (ShVal0 >> ShAmt) | (ShVal1 << (Width - ShAmt))
110     if (match(V,
111               m_OneUse(m_c_Or(m_Shl(m_Value(ShVal0), m_Sub(m_SpecificInt(Width),
112                                                            m_Value(SubAmt))),
113                               m_LShr(m_Value(ShVal1), m_Value(ShAmt)))))) {
114       if (ShAmt == SubAmt) // TODO: Use m_Specific
115         return Intrinsic::fshr;
116     }
117 
118     return Intrinsic::not_intrinsic;
119   };
120 
121   // One phi operand must be a funnel/rotate operation, and the other phi
122   // operand must be the source value of that funnel/rotate operation:
123   // phi [ rotate(RotSrc, ShAmt), FunnelBB ], [ RotSrc, GuardBB ]
124   // phi [ fshl(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal0, GuardBB ]
125   // phi [ fshr(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal1, GuardBB ]
126   PHINode &Phi = cast<PHINode>(I);
127   unsigned FunnelOp = 0, GuardOp = 1;
128   Value *P0 = Phi.getOperand(0), *P1 = Phi.getOperand(1);
129   Value *ShVal0, *ShVal1, *ShAmt;
130   Intrinsic::ID IID = matchFunnelShift(P0, ShVal0, ShVal1, ShAmt);
131   if (IID == Intrinsic::not_intrinsic ||
132       (IID == Intrinsic::fshl && ShVal0 != P1) ||
133       (IID == Intrinsic::fshr && ShVal1 != P1)) {
134     IID = matchFunnelShift(P1, ShVal0, ShVal1, ShAmt);
135     if (IID == Intrinsic::not_intrinsic ||
136         (IID == Intrinsic::fshl && ShVal0 != P0) ||
137         (IID == Intrinsic::fshr && ShVal1 != P0))
138       return false;
139     assert((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
140            "Pattern must match funnel shift left or right");
141     std::swap(FunnelOp, GuardOp);
142   }
143 
144   // The incoming block with our source operand must be the "guard" block.
145   // That must contain a cmp+branch to avoid the funnel/rotate when the shift
146   // amount is equal to 0. The other incoming block is the block with the
147   // funnel/rotate.
148   BasicBlock *GuardBB = Phi.getIncomingBlock(GuardOp);
149   BasicBlock *FunnelBB = Phi.getIncomingBlock(FunnelOp);
150   Instruction *TermI = GuardBB->getTerminator();
151 
152   // Ensure that the shift values dominate each block.
153   if (!DT.dominates(ShVal0, TermI) || !DT.dominates(ShVal1, TermI))
154     return false;
155 
156   ICmpInst::Predicate Pred;
157   BasicBlock *PhiBB = Phi.getParent();
158   if (!match(TermI, m_Br(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()),
159                          m_SpecificBB(PhiBB), m_SpecificBB(FunnelBB))))
160     return false;
161 
162   if (Pred != CmpInst::ICMP_EQ)
163     return false;
164 
165   IRBuilder<> Builder(PhiBB, PhiBB->getFirstInsertionPt());
166 
167   if (ShVal0 == ShVal1)
168     ++NumGuardedRotates;
169   else
170     ++NumGuardedFunnelShifts;
171 
172   // If this is not a rotate then the select was blocking poison from the
173   // 'shift-by-zero' non-TVal, but a funnel shift won't - so freeze it.
174   bool IsFshl = IID == Intrinsic::fshl;
175   if (ShVal0 != ShVal1) {
176     if (IsFshl && !llvm::isGuaranteedNotToBePoison(ShVal1))
177       ShVal1 = Builder.CreateFreeze(ShVal1);
178     else if (!IsFshl && !llvm::isGuaranteedNotToBePoison(ShVal0))
179       ShVal0 = Builder.CreateFreeze(ShVal0);
180   }
181 
182   // We matched a variation of this IR pattern:
183   // GuardBB:
184   //   %cmp = icmp eq i32 %ShAmt, 0
185   //   br i1 %cmp, label %PhiBB, label %FunnelBB
186   // FunnelBB:
187   //   %sub = sub i32 32, %ShAmt
188   //   %shr = lshr i32 %ShVal1, %sub
189   //   %shl = shl i32 %ShVal0, %ShAmt
190   //   %fsh = or i32 %shr, %shl
191   //   br label %PhiBB
192   // PhiBB:
193   //   %cond = phi i32 [ %fsh, %FunnelBB ], [ %ShVal0, %GuardBB ]
194   // -->
195   // llvm.fshl.i32(i32 %ShVal0, i32 %ShVal1, i32 %ShAmt)
196   Function *F = Intrinsic::getDeclaration(Phi.getModule(), IID, Phi.getType());
197   Phi.replaceAllUsesWith(Builder.CreateCall(F, {ShVal0, ShVal1, ShAmt}));
198   return true;
199 }
200 
201 /// This is used by foldAnyOrAllBitsSet() to capture a source value (Root) and
202 /// the bit indexes (Mask) needed by a masked compare. If we're matching a chain
203 /// of 'and' ops, then we also need to capture the fact that we saw an
204 /// "and X, 1", so that's an extra return value for that case.
205 struct MaskOps {
206   Value *Root = nullptr;
207   APInt Mask;
208   bool MatchAndChain;
209   bool FoundAnd1 = false;
210 
211   MaskOps(unsigned BitWidth, bool MatchAnds)
212       : Mask(APInt::getZero(BitWidth)), MatchAndChain(MatchAnds) {}
213 };
214 
215 /// This is a recursive helper for foldAnyOrAllBitsSet() that walks through a
216 /// chain of 'and' or 'or' instructions looking for shift ops of a common source
217 /// value. Examples:
218 ///   or (or (or X, (X >> 3)), (X >> 5)), (X >> 8)
219 /// returns { X, 0x129 }
220 ///   and (and (X >> 1), 1), (X >> 4)
221 /// returns { X, 0x12 }
222 static bool matchAndOrChain(Value *V, MaskOps &MOps) {
223   Value *Op0, *Op1;
224   if (MOps.MatchAndChain) {
225     // Recurse through a chain of 'and' operands. This requires an extra check
226     // vs. the 'or' matcher: we must find an "and X, 1" instruction somewhere
227     // in the chain to know that all of the high bits are cleared.
228     if (match(V, m_And(m_Value(Op0), m_One()))) {
229       MOps.FoundAnd1 = true;
230       return matchAndOrChain(Op0, MOps);
231     }
232     if (match(V, m_And(m_Value(Op0), m_Value(Op1))))
233       return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps);
234   } else {
235     // Recurse through a chain of 'or' operands.
236     if (match(V, m_Or(m_Value(Op0), m_Value(Op1))))
237       return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps);
238   }
239 
240   // We need a shift-right or a bare value representing a compare of bit 0 of
241   // the original source operand.
242   Value *Candidate;
243   const APInt *BitIndex = nullptr;
244   if (!match(V, m_LShr(m_Value(Candidate), m_APInt(BitIndex))))
245     Candidate = V;
246 
247   // Initialize result source operand.
248   if (!MOps.Root)
249     MOps.Root = Candidate;
250 
251   // The shift constant is out-of-range? This code hasn't been simplified.
252   if (BitIndex && BitIndex->uge(MOps.Mask.getBitWidth()))
253     return false;
254 
255   // Fill in the mask bit derived from the shift constant.
256   MOps.Mask.setBit(BitIndex ? BitIndex->getZExtValue() : 0);
257   return MOps.Root == Candidate;
258 }
259 
260 /// Match patterns that correspond to "any-bits-set" and "all-bits-set".
261 /// These will include a chain of 'or' or 'and'-shifted bits from a
262 /// common source value:
263 /// and (or  (lshr X, C), ...), 1 --> (X & CMask) != 0
264 /// and (and (lshr X, C), ...), 1 --> (X & CMask) == CMask
265 /// Note: "any-bits-clear" and "all-bits-clear" are variations of these patterns
266 /// that differ only with a final 'not' of the result. We expect that final
267 /// 'not' to be folded with the compare that we create here (invert predicate).
268 static bool foldAnyOrAllBitsSet(Instruction &I) {
269   // The 'any-bits-set' ('or' chain) pattern is simpler to match because the
270   // final "and X, 1" instruction must be the final op in the sequence.
271   bool MatchAllBitsSet;
272   if (match(&I, m_c_And(m_OneUse(m_And(m_Value(), m_Value())), m_Value())))
273     MatchAllBitsSet = true;
274   else if (match(&I, m_And(m_OneUse(m_Or(m_Value(), m_Value())), m_One())))
275     MatchAllBitsSet = false;
276   else
277     return false;
278 
279   MaskOps MOps(I.getType()->getScalarSizeInBits(), MatchAllBitsSet);
280   if (MatchAllBitsSet) {
281     if (!matchAndOrChain(cast<BinaryOperator>(&I), MOps) || !MOps.FoundAnd1)
282       return false;
283   } else {
284     if (!matchAndOrChain(cast<BinaryOperator>(&I)->getOperand(0), MOps))
285       return false;
286   }
287 
288   // The pattern was found. Create a masked compare that replaces all of the
289   // shift and logic ops.
290   IRBuilder<> Builder(&I);
291   Constant *Mask = ConstantInt::get(I.getType(), MOps.Mask);
292   Value *And = Builder.CreateAnd(MOps.Root, Mask);
293   Value *Cmp = MatchAllBitsSet ? Builder.CreateICmpEQ(And, Mask)
294                                : Builder.CreateIsNotNull(And);
295   Value *Zext = Builder.CreateZExt(Cmp, I.getType());
296   I.replaceAllUsesWith(Zext);
297   ++NumAnyOrAllBitsSet;
298   return true;
299 }
300 
301 // Try to recognize below function as popcount intrinsic.
302 // This is the "best" algorithm from
303 // http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
304 // Also used in TargetLowering::expandCTPOP().
305 //
306 // int popcount(unsigned int i) {
307 //   i = i - ((i >> 1) & 0x55555555);
308 //   i = (i & 0x33333333) + ((i >> 2) & 0x33333333);
309 //   i = ((i + (i >> 4)) & 0x0F0F0F0F);
310 //   return (i * 0x01010101) >> 24;
311 // }
312 static bool tryToRecognizePopCount(Instruction &I) {
313   if (I.getOpcode() != Instruction::LShr)
314     return false;
315 
316   Type *Ty = I.getType();
317   if (!Ty->isIntOrIntVectorTy())
318     return false;
319 
320   unsigned Len = Ty->getScalarSizeInBits();
321   // FIXME: fix Len == 8 and other irregular type lengths.
322   if (!(Len <= 128 && Len > 8 && Len % 8 == 0))
323     return false;
324 
325   APInt Mask55 = APInt::getSplat(Len, APInt(8, 0x55));
326   APInt Mask33 = APInt::getSplat(Len, APInt(8, 0x33));
327   APInt Mask0F = APInt::getSplat(Len, APInt(8, 0x0F));
328   APInt Mask01 = APInt::getSplat(Len, APInt(8, 0x01));
329   APInt MaskShift = APInt(Len, Len - 8);
330 
331   Value *Op0 = I.getOperand(0);
332   Value *Op1 = I.getOperand(1);
333   Value *MulOp0;
334   // Matching "(i * 0x01010101...) >> 24".
335   if ((match(Op0, m_Mul(m_Value(MulOp0), m_SpecificInt(Mask01)))) &&
336        match(Op1, m_SpecificInt(MaskShift))) {
337     Value *ShiftOp0;
338     // Matching "((i + (i >> 4)) & 0x0F0F0F0F...)".
339     if (match(MulOp0, m_And(m_c_Add(m_LShr(m_Value(ShiftOp0), m_SpecificInt(4)),
340                                     m_Deferred(ShiftOp0)),
341                             m_SpecificInt(Mask0F)))) {
342       Value *AndOp0;
343       // Matching "(i & 0x33333333...) + ((i >> 2) & 0x33333333...)".
344       if (match(ShiftOp0,
345                 m_c_Add(m_And(m_Value(AndOp0), m_SpecificInt(Mask33)),
346                         m_And(m_LShr(m_Deferred(AndOp0), m_SpecificInt(2)),
347                               m_SpecificInt(Mask33))))) {
348         Value *Root, *SubOp1;
349         // Matching "i - ((i >> 1) & 0x55555555...)".
350         if (match(AndOp0, m_Sub(m_Value(Root), m_Value(SubOp1))) &&
351             match(SubOp1, m_And(m_LShr(m_Specific(Root), m_SpecificInt(1)),
352                                 m_SpecificInt(Mask55)))) {
353           LLVM_DEBUG(dbgs() << "Recognized popcount intrinsic\n");
354           IRBuilder<> Builder(&I);
355           Function *Func = Intrinsic::getDeclaration(
356               I.getModule(), Intrinsic::ctpop, I.getType());
357           I.replaceAllUsesWith(Builder.CreateCall(Func, {Root}));
358           ++NumPopCountRecognized;
359           return true;
360         }
361       }
362     }
363   }
364 
365   return false;
366 }
367 
368 /// This is the entry point for folds that could be implemented in regular
369 /// InstCombine, but they are separated because they are not expected to
370 /// occur frequently and/or have more than a constant-length pattern match.
371 static bool foldUnusualPatterns(Function &F, DominatorTree &DT) {
372   bool MadeChange = false;
373   for (BasicBlock &BB : F) {
374     // Ignore unreachable basic blocks.
375     if (!DT.isReachableFromEntry(&BB))
376       continue;
377     // Do not delete instructions under here and invalidate the iterator.
378     // Walk the block backwards for efficiency. We're matching a chain of
379     // use->defs, so we're more likely to succeed by starting from the bottom.
380     // Also, we want to avoid matching partial patterns.
381     // TODO: It would be more efficient if we removed dead instructions
382     // iteratively in this loop rather than waiting until the end.
383     for (Instruction &I : llvm::reverse(BB)) {
384       MadeChange |= foldAnyOrAllBitsSet(I);
385       MadeChange |= foldGuardedFunnelShift(I, DT);
386       MadeChange |= tryToRecognizePopCount(I);
387     }
388   }
389 
390   // We're done with transforms, so remove dead instructions.
391   if (MadeChange)
392     for (BasicBlock &BB : F)
393       SimplifyInstructionsInBlock(&BB);
394 
395   return MadeChange;
396 }
397 
398 /// This is the entry point for all transforms. Pass manager differences are
399 /// handled in the callers of this function.
400 static bool runImpl(Function &F, AssumptionCache &AC, TargetLibraryInfo &TLI,
401                     DominatorTree &DT) {
402   bool MadeChange = false;
403   const DataLayout &DL = F.getParent()->getDataLayout();
404   TruncInstCombine TIC(AC, TLI, DL, DT);
405   MadeChange |= TIC.run(F);
406   MadeChange |= foldUnusualPatterns(F, DT);
407   return MadeChange;
408 }
409 
410 void AggressiveInstCombinerLegacyPass::getAnalysisUsage(
411     AnalysisUsage &AU) const {
412   AU.setPreservesCFG();
413   AU.addRequired<AssumptionCacheTracker>();
414   AU.addRequired<DominatorTreeWrapperPass>();
415   AU.addRequired<TargetLibraryInfoWrapperPass>();
416   AU.addPreserved<AAResultsWrapperPass>();
417   AU.addPreserved<BasicAAWrapperPass>();
418   AU.addPreserved<DominatorTreeWrapperPass>();
419   AU.addPreserved<GlobalsAAWrapperPass>();
420 }
421 
422 bool AggressiveInstCombinerLegacyPass::runOnFunction(Function &F) {
423   auto &AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
424   auto &TLI = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
425   auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
426   return runImpl(F, AC, TLI, DT);
427 }
428 
429 PreservedAnalyses AggressiveInstCombinePass::run(Function &F,
430                                                  FunctionAnalysisManager &AM) {
431   auto &AC = AM.getResult<AssumptionAnalysis>(F);
432   auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
433   auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
434   if (!runImpl(F, AC, TLI, DT)) {
435     // No changes, all analyses are preserved.
436     return PreservedAnalyses::all();
437   }
438   // Mark all the analyses that instcombine updates as preserved.
439   PreservedAnalyses PA;
440   PA.preserveSet<CFGAnalyses>();
441   return PA;
442 }
443 
444 char AggressiveInstCombinerLegacyPass::ID = 0;
445 INITIALIZE_PASS_BEGIN(AggressiveInstCombinerLegacyPass,
446                       "aggressive-instcombine",
447                       "Combine pattern based expressions", false, false)
448 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
449 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
450 INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
451 INITIALIZE_PASS_END(AggressiveInstCombinerLegacyPass, "aggressive-instcombine",
452                     "Combine pattern based expressions", false, false)
453 
454 // Initialization Routines
455 void llvm::initializeAggressiveInstCombine(PassRegistry &Registry) {
456   initializeAggressiveInstCombinerLegacyPassPass(Registry);
457 }
458 
459 void LLVMInitializeAggressiveInstCombiner(LLVMPassRegistryRef R) {
460   initializeAggressiveInstCombinerLegacyPassPass(*unwrap(R));
461 }
462 
463 FunctionPass *llvm::createAggressiveInstCombinerPass() {
464   return new AggressiveInstCombinerLegacyPass();
465 }
466 
467 void LLVMAddAggressiveInstCombinerPass(LLVMPassManagerRef PM) {
468   unwrap(PM)->add(createAggressiveInstCombinerPass());
469 }
470