1 //===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "XCoreTargetMachine.h"
14 #include "XCoreTargetObjectFile.h"
15 #include "XCore.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/IR/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Support/TargetRegistry.h"
20 using namespace llvm;
21 
22 /// XCoreTargetMachine ctor - Create an ILP32 architecture model
23 ///
24 XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
25                                        StringRef CPU, StringRef FS,
26                                        const TargetOptions &Options,
27                                        Reloc::Model RM, CodeModel::Model CM,
28                                        CodeGenOpt::Level OL)
29     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
30       TLOF(make_unique<XCoreTargetObjectFile>()),
31       DL("e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32"),
32       Subtarget(TT, CPU, FS, *this) {
33   initAsmInfo();
34 }
35 
36 XCoreTargetMachine::~XCoreTargetMachine() {}
37 
38 namespace {
39 /// XCore Code Generator Pass Configuration Options.
40 class XCorePassConfig : public TargetPassConfig {
41 public:
42   XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM)
43     : TargetPassConfig(TM, PM) {}
44 
45   XCoreTargetMachine &getXCoreTargetMachine() const {
46     return getTM<XCoreTargetMachine>();
47   }
48 
49   void addIRPasses() override;
50   bool addPreISel() override;
51   bool addInstSelector() override;
52   void addPreEmitPass() override;
53 };
54 } // namespace
55 
56 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
57   return new XCorePassConfig(this, PM);
58 }
59 
60 void XCorePassConfig::addIRPasses() {
61   addPass(createAtomicExpandPass(&getXCoreTargetMachine()));
62 
63   TargetPassConfig::addIRPasses();
64 }
65 
66 bool XCorePassConfig::addPreISel() {
67   addPass(createXCoreLowerThreadLocalPass());
68   return false;
69 }
70 
71 bool XCorePassConfig::addInstSelector() {
72   addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
73   return false;
74 }
75 
76 void XCorePassConfig::addPreEmitPass() {
77   addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
78 }
79 
80 // Force static initialization.
81 extern "C" void LLVMInitializeXCoreTarget() {
82   RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
83 }
84 
85 void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
86   // Add first the target-independent BasicTTI pass, then our XCore pass. This
87   // allows the XCore pass to delegate to the target independent layer when
88   // appropriate.
89   PM.add(createBasicTargetTransformInfoPass(this));
90   PM.add(createXCoreTargetTransformInfoPass(this));
91 }
92