1 //===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "XCoreTargetMachine.h"
14 #include "XCoreTargetObjectFile.h"
15 #include "XCore.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/IR/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Support/TargetRegistry.h"
20 using namespace llvm;
21 
22 /// XCoreTargetMachine ctor - Create an ILP32 architecture model
23 ///
24 XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
25                                        StringRef CPU, StringRef FS,
26                                        const TargetOptions &Options,
27                                        Reloc::Model RM, CodeModel::Model CM,
28                                        CodeGenOpt::Level OL)
29     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
30       TLOF(make_unique<XCoreTargetObjectFile>()),
31       Subtarget(TT, CPU, FS, *this) {
32   initAsmInfo();
33 }
34 
35 XCoreTargetMachine::~XCoreTargetMachine() {}
36 
37 namespace {
38 /// XCore Code Generator Pass Configuration Options.
39 class XCorePassConfig : public TargetPassConfig {
40 public:
41   XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM)
42     : TargetPassConfig(TM, PM) {}
43 
44   XCoreTargetMachine &getXCoreTargetMachine() const {
45     return getTM<XCoreTargetMachine>();
46   }
47 
48   void addIRPasses() override;
49   bool addPreISel() override;
50   bool addInstSelector() override;
51   void addPreEmitPass() override;
52 };
53 } // namespace
54 
55 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
56   return new XCorePassConfig(this, PM);
57 }
58 
59 void XCorePassConfig::addIRPasses() {
60   addPass(createAtomicExpandPass(&getXCoreTargetMachine()));
61 
62   TargetPassConfig::addIRPasses();
63 }
64 
65 bool XCorePassConfig::addPreISel() {
66   addPass(createXCoreLowerThreadLocalPass());
67   return false;
68 }
69 
70 bool XCorePassConfig::addInstSelector() {
71   addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
72   return false;
73 }
74 
75 void XCorePassConfig::addPreEmitPass() {
76   addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
77 }
78 
79 // Force static initialization.
80 extern "C" void LLVMInitializeXCoreTarget() {
81   RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
82 }
83 
84 void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
85   // Add first the target-independent BasicTTI pass, then our XCore pass. This
86   // allows the XCore pass to delegate to the target independent layer when
87   // appropriate.
88   PM.add(createBasicTargetTransformInfoPass(this));
89   PM.add(createXCoreTargetTransformInfoPass(this));
90 }
91