1 //===-- XCoreFrameLowering.cpp - Frame info for XCore Target --------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains XCore frame information that doesn't fit anywhere else
11 // cleanly...
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "XCoreFrameLowering.h"
16 #include "XCore.h"
17 #include "XCoreInstrInfo.h"
18 #include "XCoreMachineFunctionInfo.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/RegisterScavenging.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/Support/ErrorHandling.h"
28 #include "llvm/Target/TargetOptions.h"
29 
30 using namespace llvm;
31 
32 // helper functions. FIXME: Eliminate.
33 static inline bool isImmUs(unsigned val) {
34   return val <= 11;
35 }
36 
37 static inline bool isImmU6(unsigned val) {
38   return val < (1 << 6);
39 }
40 
41 static inline bool isImmU16(unsigned val) {
42   return val < (1 << 16);
43 }
44 
45 static void loadFromStack(MachineBasicBlock &MBB,
46                           MachineBasicBlock::iterator I,
47                           unsigned DstReg, int Offset, DebugLoc dl,
48                           const TargetInstrInfo &TII) {
49   assert(Offset%4 == 0 && "Misaligned stack offset");
50   Offset/=4;
51   bool isU6 = isImmU6(Offset);
52   if (!isU6 && !isImmU16(Offset))
53     report_fatal_error("loadFromStack offset too big " + Twine(Offset));
54   int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
55   BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
56     .addImm(Offset);
57 }
58 
59 
60 static void storeToStack(MachineBasicBlock &MBB,
61                          MachineBasicBlock::iterator I,
62                          unsigned SrcReg, int Offset, DebugLoc dl,
63                          const TargetInstrInfo &TII) {
64   assert(Offset%4 == 0 && "Misaligned stack offset");
65   Offset/=4;
66   bool isU6 = isImmU6(Offset);
67   if (!isU6 && !isImmU16(Offset))
68     report_fatal_error("storeToStack offset too big " + Twine(Offset));
69   int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
70   BuildMI(MBB, I, dl, TII.get(Opcode))
71     .addReg(SrcReg)
72     .addImm(Offset);
73 }
74 
75 
76 //===----------------------------------------------------------------------===//
77 // XCoreFrameLowering:
78 //===----------------------------------------------------------------------===//
79 
80 XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
81   : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
82   // Do nothing
83 }
84 
85 bool XCoreFrameLowering::hasFP(const MachineFunction &MF) const {
86   return MF.getTarget().Options.DisableFramePointerElim(MF) ||
87     MF.getFrameInfo()->hasVarSizedObjects();
88 }
89 
90 void XCoreFrameLowering::emitPrologue(MachineFunction &MF) const {
91   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
92   MachineBasicBlock::iterator MBBI = MBB.begin();
93   MachineFrameInfo *MFI = MF.getFrameInfo();
94   MachineModuleInfo *MMI = &MF.getMMI();
95   const XCoreInstrInfo &TII =
96     *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
97   XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
98   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
99 
100   bool FP = hasFP(MF);
101   const AttributeSet &PAL = MF.getFunction()->getAttributes();
102 
103   if (PAL.hasAttrSomewhere(Attribute::Nest))
104     loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
105 
106   // Work out frame sizes.
107   int FrameSize = MFI->getStackSize();
108   assert(FrameSize%4 == 0 && "Misaligned frame size");
109   FrameSize/=4;
110 
111   bool isU6 = isImmU6(FrameSize);
112 
113   if (!isU6 && !isImmU16(FrameSize)) {
114     // FIXME could emit multiple instructions.
115     report_fatal_error("emitPrologue Frame size too big: " + Twine(FrameSize));
116   }
117   bool emitFrameMoves = XCoreRegisterInfo::needsFrameMoves(MF);
118 
119   bool saveLR = XFI->getUsesLR();
120   // Do we need to allocate space on the stack?
121   if (FrameSize) {
122     int Opcode;
123     if (saveLR && (MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0)) {
124       Opcode = (isU6) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6;
125       MBB.addLiveIn(XCore::LR);
126       saveLR = false;
127     } else {
128       Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
129     }
130     BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
131 
132     if (emitFrameMoves) {
133 
134       // Show update of SP.
135       MCSymbol *FrameLabel = MMI->getContext().CreateTempSymbol();
136       BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
137     }
138   }
139   if (saveLR) {
140     int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
141     storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII);
142     MBB.addLiveIn(XCore::LR);
143 
144     if (emitFrameMoves) {
145       MCSymbol *SaveLRLabel = MMI->getContext().CreateTempSymbol();
146       BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel);
147     }
148   }
149 
150   if (FP) {
151     // Save R10 to the stack.
152     int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
153     storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII);
154     // R10 is live-in. It is killed at the spill.
155     MBB.addLiveIn(XCore::R10);
156     if (emitFrameMoves) {
157       MCSymbol *SaveR10Label = MMI->getContext().CreateTempSymbol();
158       BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label);
159     }
160     // Set the FP from the SP.
161     unsigned FramePtr = XCore::R10;
162     BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr)
163       .addImm(0);
164     if (emitFrameMoves) {
165       // Show FP is now valid.
166       MCSymbol *FrameLabel = MMI->getContext().CreateTempSymbol();
167       BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
168     }
169   }
170 }
171 
172 void XCoreFrameLowering::emitEpilogue(MachineFunction &MF,
173                                      MachineBasicBlock &MBB) const {
174   MachineFrameInfo *MFI            = MF.getFrameInfo();
175   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
176   const XCoreInstrInfo &TII =
177     *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
178   XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
179   DebugLoc dl = MBBI->getDebugLoc();
180 
181   bool FP = hasFP(MF);
182   if (FP) {
183     // Restore the stack pointer.
184     unsigned FramePtr = XCore::R10;
185     BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r))
186       .addReg(FramePtr);
187   }
188 
189   // Work out frame sizes.
190   int FrameSize = MFI->getStackSize();
191 
192   assert(FrameSize%4 == 0 && "Misaligned frame size");
193 
194   FrameSize/=4;
195 
196   bool isU6 = isImmU6(FrameSize);
197 
198   if (!isU6 && !isImmU16(FrameSize)) {
199     // FIXME could emit multiple instructions.
200     report_fatal_error("emitEpilogue Frame size too big: " + Twine(FrameSize));
201   }
202 
203   if (FP) {
204     // Restore R10
205     int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
206     FPSpillOffset += FrameSize*4;
207     loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset, dl, TII);
208   }
209 
210   bool restoreLR = XFI->getUsesLR();
211   if (restoreLR &&
212       (FrameSize == 0 || MFI->getObjectOffset(XFI->getLRSpillSlot()) != 0)) {
213     int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
214     LRSpillOffset += FrameSize*4;
215     loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset, dl, TII);
216     restoreLR = false;
217   }
218 
219   if (FrameSize) {
220     if (restoreLR) {
221       // Fold prologue into return instruction
222       assert(MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0);
223       assert(MBBI->getOpcode() == XCore::RETSP_u6
224         || MBBI->getOpcode() == XCore::RETSP_lu6);
225       int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
226       BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
227       MBB.erase(MBBI);
228     } else {
229       int Opcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
230       BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(FrameSize);
231     }
232   }
233 }
234 
235 bool XCoreFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
236                                                MachineBasicBlock::iterator MI,
237                                         const std::vector<CalleeSavedInfo> &CSI,
238                                           const TargetRegisterInfo *TRI) const {
239   if (CSI.empty())
240     return true;
241 
242   MachineFunction *MF = MBB.getParent();
243   const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
244 
245   XCoreFunctionInfo *XFI = MF->getInfo<XCoreFunctionInfo>();
246   bool emitFrameMoves = XCoreRegisterInfo::needsFrameMoves(*MF);
247 
248   DebugLoc DL;
249   if (MI != MBB.end()) DL = MI->getDebugLoc();
250 
251   for (std::vector<CalleeSavedInfo>::const_iterator it = CSI.begin();
252                                                     it != CSI.end(); ++it) {
253     // Add the callee-saved register as live-in. It's killed at the spill.
254     MBB.addLiveIn(it->getReg());
255 
256     unsigned Reg = it->getReg();
257     const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
258     TII.storeRegToStackSlot(MBB, MI, Reg, true,
259                             it->getFrameIdx(), RC, TRI);
260     if (emitFrameMoves) {
261       MCSymbol *SaveLabel = MF->getContext().CreateTempSymbol();
262       BuildMI(MBB, MI, DL, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLabel);
263       XFI->getSpillLabels().push_back(std::make_pair(SaveLabel, *it));
264     }
265   }
266   return true;
267 }
268 
269 bool XCoreFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
270                                                  MachineBasicBlock::iterator MI,
271                                         const std::vector<CalleeSavedInfo> &CSI,
272                                             const TargetRegisterInfo *TRI) const{
273   MachineFunction *MF = MBB.getParent();
274   const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
275 
276   bool AtStart = MI == MBB.begin();
277   MachineBasicBlock::iterator BeforeI = MI;
278   if (!AtStart)
279     --BeforeI;
280   for (std::vector<CalleeSavedInfo>::const_iterator it = CSI.begin();
281                                                     it != CSI.end(); ++it) {
282     unsigned Reg = it->getReg();
283     const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
284     TII.loadRegFromStackSlot(MBB, MI, it->getReg(), it->getFrameIdx(),
285                              RC, TRI);
286     assert(MI != MBB.begin() &&
287            "loadRegFromStackSlot didn't insert any code!");
288     // Insert in reverse order.  loadRegFromStackSlot can insert multiple
289     // instructions.
290     if (AtStart)
291       MI = MBB.begin();
292     else {
293       MI = BeforeI;
294       ++MI;
295     }
296   }
297   return true;
298 }
299 
300 // This function eliminates ADJCALLSTACKDOWN,
301 // ADJCALLSTACKUP pseudo instructions
302 void XCoreFrameLowering::
303 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
304                               MachineBasicBlock::iterator I) const {
305   const XCoreInstrInfo &TII =
306     *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
307   if (!hasReservedCallFrame(MF)) {
308     // Turn the adjcallstackdown instruction into 'extsp <amt>' and the
309     // adjcallstackup instruction into 'ldaw sp, sp[<amt>]'
310     MachineInstr *Old = I;
311     uint64_t Amount = Old->getOperand(0).getImm();
312     if (Amount != 0) {
313       // We need to keep the stack aligned properly.  To do this, we round the
314       // amount of space needed for the outgoing arguments up to the next
315       // alignment boundary.
316       unsigned Align = getStackAlignment();
317       Amount = (Amount+Align-1)/Align*Align;
318 
319       assert(Amount%4 == 0);
320       Amount /= 4;
321 
322       bool isU6 = isImmU6(Amount);
323       if (!isU6 && !isImmU16(Amount)) {
324         // FIX could emit multiple instructions in this case.
325 #ifndef NDEBUG
326         errs() << "eliminateCallFramePseudoInstr size too big: "
327                << Amount << "\n";
328 #endif
329         llvm_unreachable(0);
330       }
331 
332       MachineInstr *New;
333       if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
334         int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
335         New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode))
336           .addImm(Amount);
337       } else {
338         assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
339         int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
340         New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP)
341           .addImm(Amount);
342       }
343 
344       // Replace the pseudo instruction with a new instruction...
345       MBB.insert(I, New);
346     }
347   }
348 
349   MBB.erase(I);
350 }
351 
352 void
353 XCoreFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
354                                                      RegScavenger *RS) const {
355   MachineFrameInfo *MFI = MF.getFrameInfo();
356   const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
357   bool LRUsed = MF.getRegInfo().isPhysRegUsed(XCore::LR);
358   const TargetRegisterClass *RC = &XCore::GRRegsRegClass;
359   XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
360   if (LRUsed) {
361     MF.getRegInfo().setPhysRegUnused(XCore::LR);
362 
363     bool isVarArg = MF.getFunction()->isVarArg();
364     int FrameIdx;
365     if (! isVarArg) {
366       // A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
367       FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true);
368     } else {
369       FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(),
370                                         false);
371     }
372     XFI->setUsesLR(FrameIdx);
373     XFI->setLRSpillSlot(FrameIdx);
374   }
375   if (RegInfo->requiresRegisterScavenging(MF)) {
376     // Reserve a slot close to SP or frame pointer.
377     RS->addScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
378                                                        RC->getAlignment(),
379                                                        false));
380   }
381   if (hasFP(MF)) {
382     // A callee save register is used to hold the FP.
383     // This needs saving / restoring in the epilogue / prologue.
384     XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),
385                                                RC->getAlignment(),
386                                                false));
387   }
388 }
389