1 //===-- X86TargetTransformInfo.h - X86 specific TTI -------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file a TargetTransformInfo::Concept conforming object specific to the 11 /// X86 target machine. It uses the target's detailed information to 12 /// provide more precise answers to certain TTI queries, while letting the 13 /// target independent and default TTI implementations handle the rest. 14 /// 15 //===----------------------------------------------------------------------===// 16 17 #ifndef LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H 18 #define LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H 19 20 #include "X86.h" 21 #include "X86TargetMachine.h" 22 #include "llvm/Analysis/TargetTransformInfo.h" 23 #include "llvm/CodeGen/BasicTTIImpl.h" 24 #include "llvm/CodeGen/TargetLowering.h" 25 26 namespace llvm { 27 28 class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> { 29 typedef BasicTTIImplBase<X86TTIImpl> BaseT; 30 typedef TargetTransformInfo TTI; 31 friend BaseT; 32 33 const X86Subtarget *ST; 34 const X86TargetLowering *TLI; 35 36 const X86Subtarget *getST() const { return ST; } 37 const X86TargetLowering *getTLI() const { return TLI; } 38 39 public: 40 explicit X86TTIImpl(const X86TargetMachine *TM, const Function &F) 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 42 TLI(ST->getTargetLowering()) {} 43 44 /// \name Scalar TTI Implementations 45 /// @{ 46 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth); 47 48 /// @} 49 50 /// \name Cache TTI Implementation 51 /// @{ 52 llvm::Optional<unsigned> getCacheSize( 53 TargetTransformInfo::CacheLevel Level) const; 54 llvm::Optional<unsigned> getCacheAssociativity( 55 TargetTransformInfo::CacheLevel Level) const; 56 /// @} 57 58 /// \name Vector TTI Implementations 59 /// @{ 60 61 unsigned getNumberOfRegisters(bool Vector); 62 unsigned getRegisterBitWidth(bool Vector) const; 63 unsigned getLoadStoreVecRegBitWidth(unsigned AS) const; 64 unsigned getMaxInterleaveFactor(unsigned VF); 65 int getArithmeticInstrCost( 66 unsigned Opcode, Type *Ty, 67 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, 68 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, 69 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, 70 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, 71 ArrayRef<const Value *> Args = ArrayRef<const Value *>()); 72 int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp); 73 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, 74 const Instruction *I = nullptr); 75 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, 76 const Instruction *I = nullptr); 77 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); 78 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, 79 unsigned AddressSpace, const Instruction *I = nullptr); 80 int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, 81 unsigned AddressSpace); 82 int getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr, 83 bool VariableMask, unsigned Alignment); 84 int getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, 85 const SCEV *Ptr); 86 87 unsigned getAtomicMemIntrinsicMaxElementSize() const; 88 89 int getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy, 90 ArrayRef<Type *> Tys, FastMathFlags FMF, 91 unsigned ScalarizationCostPassed = UINT_MAX); 92 int getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy, 93 ArrayRef<Value *> Args, FastMathFlags FMF, 94 unsigned VF = 1); 95 96 int getArithmeticReductionCost(unsigned Opcode, Type *Ty, 97 bool IsPairwiseForm); 98 99 int getMinMaxReductionCost(Type *Ty, Type *CondTy, bool IsPairwiseForm, 100 bool IsUnsigned); 101 102 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, 103 unsigned Factor, ArrayRef<unsigned> Indices, 104 unsigned Alignment, unsigned AddressSpace, 105 bool IsMasked = false); 106 int getInterleavedMemoryOpCostAVX512(unsigned Opcode, Type *VecTy, 107 unsigned Factor, ArrayRef<unsigned> Indices, 108 unsigned Alignment, unsigned AddressSpace, 109 bool IsMasked = false); 110 int getInterleavedMemoryOpCostAVX2(unsigned Opcode, Type *VecTy, 111 unsigned Factor, ArrayRef<unsigned> Indices, 112 unsigned Alignment, unsigned AddressSpace, 113 bool IsMasked = false); 114 115 int getIntImmCost(int64_t); 116 117 int getIntImmCost(const APInt &Imm, Type *Ty); 118 119 unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands); 120 121 int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty); 122 int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, 123 Type *Ty); 124 bool isLSRCostLess(TargetTransformInfo::LSRCost &C1, 125 TargetTransformInfo::LSRCost &C2); 126 bool canMacroFuseCmp(); 127 bool isLegalMaskedLoad(Type *DataType); 128 bool isLegalMaskedStore(Type *DataType); 129 bool isLegalMaskedGather(Type *DataType); 130 bool isLegalMaskedScatter(Type *DataType); 131 bool hasDivRemOp(Type *DataType, bool IsSigned); 132 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty); 133 bool areInlineCompatible(const Function *Caller, 134 const Function *Callee) const; 135 const TTI::MemCmpExpansionOptions *enableMemCmpExpansion( 136 bool IsZeroCmp) const; 137 bool enableInterleavedAccessVectorization(); 138 private: 139 int getGSScalarCost(unsigned Opcode, Type *DataTy, bool VariableMask, 140 unsigned Alignment, unsigned AddressSpace); 141 int getGSVectorCost(unsigned Opcode, Type *DataTy, Value *Ptr, 142 unsigned Alignment, unsigned AddressSpace); 143 144 /// @} 145 }; 146 147 } // end namespace llvm 148 149 #endif 150