1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2 // 3 // This file defines the X86 specific subclass of TargetMachine. 4 // 5 //===----------------------------------------------------------------------===// 6 7 #include "X86TargetMachine.h" 8 #include "X86.h" 9 #include "llvm/PassManager.h" 10 #include "llvm/Target/TargetMachineImpls.h" 11 #include "llvm/CodeGen/MachineFunction.h" 12 #include "llvm/CodeGen/Passes.h" 13 #include "llvm/Transforms/Scalar.h" 14 #include "Support/CommandLine.h" 15 #include "Support/Statistic.h" 16 #include <iostream> 17 18 namespace { 19 cl::opt<bool> NoLocalRA("disable-local-ra", 20 cl::desc("Use Simple RA instead of Local RegAlloc")); 21 cl::opt<bool> PrintCode("print-machineinstrs", 22 cl::desc("Print generated machine code")); 23 } 24 25 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine 26 // that implements the X86 backend. 27 // 28 TargetMachine *allocateX86TargetMachine(unsigned Configuration) { 29 return new X86TargetMachine(Configuration); 30 } 31 32 33 /// X86TargetMachine ctor - Create an ILP32 architecture model 34 /// 35 X86TargetMachine::X86TargetMachine(unsigned Config) 36 : TargetMachine("X86", 37 (Config & TM::EndianMask) == TM::LittleEndian, 38 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4, 39 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4, 40 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4), 41 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) { 42 } 43 44 // llc backend for x86 45 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, 46 std::ostream &Out) { 47 PM.add(createLowerSwitchPass()); 48 PM.add(createSimpleX86InstructionSelector(*this)); 49 PM.add(createLocalRegisterAllocator()); 50 PM.add(createX86FloatingPointStackifierPass()); 51 PM.add(createPrologEpilogCodeInserter()); 52 PM.add(createX86PeepholeOptimizerPass()); 53 PM.add(createX86CodePrinterPass(Out)); 54 return false; // success! 55 } 56 57 /// addPassesToJITCompile - Add passes to the specified pass manager to 58 /// implement a fast dynamic compiler for this target. Return true if this is 59 /// not supported for this target. 60 /// 61 bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) { 62 // FIXME: Implement the switch instruction in the instruction selector! 63 PM.add(createLowerSwitchPass()); 64 65 PM.add(createSimpleX86InstructionSelector(*this)); 66 67 // TODO: optional optimizations go here 68 69 // FIXME: Add SSA based peephole optimizer here. 70 71 // Print the instruction selected machine code... 72 if (PrintCode) 73 PM.add(createMachineFunctionPrinterPass()); 74 75 // Perform register allocation to convert to a concrete x86 representation 76 if (NoLocalRA) 77 PM.add(createSimpleRegisterAllocator()); 78 else 79 PM.add(createLocalRegisterAllocator()); 80 81 if (PrintCode) 82 PM.add(createMachineFunctionPrinterPass()); 83 84 PM.add(createX86FloatingPointStackifierPass()); 85 86 if (PrintCode) 87 PM.add(createMachineFunctionPrinterPass()); 88 89 // Insert prolog/epilog code. Eliminate abstract frame index references... 90 PM.add(createPrologEpilogCodeInserter()); 91 92 PM.add(createX86PeepholeOptimizerPass()); 93 94 if (PrintCode) // Print the register-allocated code 95 PM.add(createX86CodePrinterPass(std::cerr)); 96 97 return false; // success! 98 } 99 100