1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2 // 3 // This file defines the X86 specific subclass of TargetMachine. 4 // 5 //===----------------------------------------------------------------------===// 6 7 #include "X86TargetMachine.h" 8 #include "X86.h" 9 #include "llvm/PassManager.h" 10 #include "llvm/Target/TargetMachineImpls.h" 11 #include "llvm/CodeGen/MachineFunction.h" 12 #include "llvm/CodeGen/Passes.h" 13 #include "llvm/Transforms/Scalar.h" 14 #include "Support/CommandLine.h" 15 #include "Support/Statistic.h" 16 #include <iostream> 17 18 namespace { 19 cl::opt<bool> NoLocalRA("disable-local-ra", 20 cl::desc("Use Simple RA instead of Local RegAlloc")); 21 cl::opt<bool> PrintCode("print-machineinstrs", 22 cl::desc("Print generated machine code")); 23 cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true), 24 cl::desc("Use the 'simple' X86 instruction selector")); 25 } 26 27 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine 28 // that implements the X86 backend. 29 // 30 TargetMachine *allocateX86TargetMachine(unsigned Configuration) { 31 return new X86TargetMachine(Configuration); 32 } 33 34 35 /// X86TargetMachine ctor - Create an ILP32 architecture model 36 /// 37 X86TargetMachine::X86TargetMachine(unsigned Config) 38 : TargetMachine("X86", 39 (Config & TM::EndianMask) == TM::LittleEndian, 40 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4, 41 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4, 42 (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4, 43 4, (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4), 44 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) { 45 } 46 47 48 // addPassesToEmitAssembly - We currently use all of the same passes as the JIT 49 // does to emit statically compiled machine code. 50 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, 51 std::ostream &Out) { 52 // FIXME: Implement the switch instruction in the instruction selector! 53 PM.add(createLowerSwitchPass()); 54 55 if (NoPatternISel) 56 PM.add(createX86SimpleInstructionSelector(*this)); 57 else 58 PM.add(createX86PatternInstructionSelector(*this)); 59 60 // TODO: optional optimizations go here 61 62 // FIXME: Add SSA based peephole optimizer here. 63 64 // Print the instruction selected machine code... 65 if (PrintCode) 66 PM.add(createMachineFunctionPrinterPass()); 67 68 // Perform register allocation to convert to a concrete x86 representation 69 if (NoLocalRA) 70 PM.add(createSimpleRegisterAllocator()); 71 else 72 PM.add(createLocalRegisterAllocator()); 73 74 if (PrintCode) 75 PM.add(createMachineFunctionPrinterPass()); 76 77 PM.add(createX86FloatingPointStackifierPass()); 78 79 if (PrintCode) 80 PM.add(createMachineFunctionPrinterPass()); 81 82 // Insert prolog/epilog code. Eliminate abstract frame index references... 83 PM.add(createPrologEpilogCodeInserter()); 84 85 PM.add(createX86PeepholeOptimizerPass()); 86 87 if (PrintCode) // Print the register-allocated code 88 PM.add(createX86CodePrinterPass(std::cerr, *this)); 89 90 PM.add(createX86CodePrinterPass(Out, *this)); 91 return false; // success! 92 } 93 94 /// addPassesToJITCompile - Add passes to the specified pass manager to 95 /// implement a fast dynamic compiler for this target. Return true if this is 96 /// not supported for this target. 97 /// 98 bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) { 99 // FIXME: Implement the switch instruction in the instruction selector! 100 PM.add(createLowerSwitchPass()); 101 102 if (NoPatternISel) 103 PM.add(createX86SimpleInstructionSelector(*this)); 104 else 105 PM.add(createX86PatternInstructionSelector(*this)); 106 107 // TODO: optional optimizations go here 108 109 // FIXME: Add SSA based peephole optimizer here. 110 111 // Print the instruction selected machine code... 112 if (PrintCode) 113 PM.add(createMachineFunctionPrinterPass()); 114 115 // Perform register allocation to convert to a concrete x86 representation 116 if (NoLocalRA) 117 PM.add(createSimpleRegisterAllocator()); 118 else 119 PM.add(createLocalRegisterAllocator()); 120 121 if (PrintCode) 122 PM.add(createMachineFunctionPrinterPass()); 123 124 PM.add(createX86FloatingPointStackifierPass()); 125 126 if (PrintCode) 127 PM.add(createMachineFunctionPrinterPass()); 128 129 // Insert prolog/epilog code. Eliminate abstract frame index references... 130 PM.add(createPrologEpilogCodeInserter()); 131 132 PM.add(createX86PeepholeOptimizerPass()); 133 134 if (PrintCode) // Print the register-allocated code 135 PM.add(createX86CodePrinterPass(std::cerr, *this)); 136 return false; // success! 137 } 138 139