1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the X86 specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86TargetMachine.h"
15 #include "X86.h"
16 #include "X86TargetObjectFile.h"
17 #include "X86TargetTransformInfo.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/IR/Function.h"
20 #include "llvm/PassManager.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Target/TargetOptions.h"
25 using namespace llvm;
26 
27 extern "C" void LLVMInitializeX86Target() {
28   // Register the target.
29   RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target);
30   RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target);
31 }
32 
33 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
34   if (TT.isOSBinFormatMachO()) {
35     if (TT.getArch() == Triple::x86_64)
36       return make_unique<X86_64MachoTargetObjectFile>();
37     return make_unique<TargetLoweringObjectFileMachO>();
38   }
39 
40   if (TT.isOSLinux())
41     return make_unique<X86LinuxTargetObjectFile>();
42   if (TT.isOSBinFormatELF())
43     return make_unique<TargetLoweringObjectFileELF>();
44   if (TT.isKnownWindowsMSVCEnvironment())
45     return make_unique<X86WindowsTargetObjectFile>();
46   if (TT.isOSBinFormatCOFF())
47     return make_unique<TargetLoweringObjectFileCOFF>();
48   llvm_unreachable("unknown subtarget type");
49 }
50 
51 static std::string computeDataLayout(const Triple &TT) {
52   // X86 is little endian
53   std::string Ret = "e";
54 
55   Ret += DataLayout::getManglingComponent(TT);
56   // X86 and x32 have 32 bit pointers.
57   if ((TT.isArch64Bit() &&
58        (TT.getEnvironment() == Triple::GNUX32 || TT.isOSNaCl())) ||
59       !TT.isArch64Bit())
60     Ret += "-p:32:32";
61 
62   // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
63   if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl())
64     Ret += "-i64:64";
65   else
66     Ret += "-f64:32:64";
67 
68   // Some ABIs align long double to 128 bits, others to 32.
69   if (TT.isOSNaCl())
70     ; // No f80
71   else if (TT.isArch64Bit() || TT.isOSDarwin())
72     Ret += "-f80:128";
73   else
74     Ret += "-f80:32";
75 
76   // The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
77   if (TT.isArch64Bit())
78     Ret += "-n8:16:32:64";
79   else
80     Ret += "-n8:16:32";
81 
82   // The stack is aligned to 32 bits on some ABIs and 128 bits on others.
83   if (!TT.isArch64Bit() && TT.isOSWindows())
84     Ret += "-S32";
85   else
86     Ret += "-S128";
87 
88   return Ret;
89 }
90 
91 /// X86TargetMachine ctor - Create an X86 target.
92 ///
93 X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
94                                    StringRef FS, const TargetOptions &Options,
95                                    Reloc::Model RM, CodeModel::Model CM,
96                                    CodeGenOpt::Level OL)
97     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
98       TLOF(createTLOF(Triple(getTargetTriple()))),
99       DL(computeDataLayout(Triple(TT))),
100       Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
101   // default to hard float ABI
102   if (Options.FloatABIType == FloatABI::Default)
103     this->Options.FloatABIType = FloatABI::Hard;
104 
105   // Windows stack unwinder gets confused when execution flow "falls through"
106   // after a call to 'noreturn' function.
107   // To prevent that, we emit a trap for 'unreachable' IR instructions.
108   // (which on X86, happens to be the 'ud2' instruction)
109   if (Subtarget.isTargetWin64())
110     this->Options.TrapUnreachable = true;
111 
112   initAsmInfo();
113 }
114 
115 X86TargetMachine::~X86TargetMachine() {}
116 
117 const X86Subtarget *
118 X86TargetMachine::getSubtargetImpl(const Function &F) const {
119   AttributeSet FnAttrs = F.getAttributes();
120   Attribute CPUAttr =
121       FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
122   Attribute FSAttr =
123       FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
124 
125   std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
126                         ? CPUAttr.getValueAsString().str()
127                         : TargetCPU;
128   std::string FS = !FSAttr.hasAttribute(Attribute::None)
129                        ? FSAttr.getValueAsString().str()
130                        : TargetFS;
131 
132   // FIXME: This is related to the code below to reset the target options,
133   // we need to know whether or not the soft float flag is set on the
134   // function before we can generate a subtarget. We also need to use
135   // it as a key for the subtarget since that can be the only difference
136   // between two functions.
137   Attribute SFAttr =
138       FnAttrs.getAttribute(AttributeSet::FunctionIndex, "use-soft-float");
139   bool SoftFloat = !SFAttr.hasAttribute(Attribute::None)
140                        ? SFAttr.getValueAsString() == "true"
141                        : Options.UseSoftFloat;
142 
143   auto &I = SubtargetMap[CPU + FS + (SoftFloat ? "use-soft-float=true"
144                                                : "use-soft-float=false")];
145   if (!I) {
146     // This needs to be done before we create a new subtarget since any
147     // creation will depend on the TM and the code generation flags on the
148     // function that reside in TargetOptions.
149     resetTargetOptions(F);
150     I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
151                                         Options.StackAlignmentOverride);
152   }
153   return I.get();
154 }
155 
156 //===----------------------------------------------------------------------===//
157 // Command line options for x86
158 //===----------------------------------------------------------------------===//
159 static cl::opt<bool>
160 UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
161   cl::desc("Minimize AVX to SSE transition penalty"),
162   cl::init(true));
163 
164 //===----------------------------------------------------------------------===//
165 // X86 TTI query.
166 //===----------------------------------------------------------------------===//
167 
168 TargetIRAnalysis X86TargetMachine::getTargetIRAnalysis() {
169   return TargetIRAnalysis(
170       [this](Function &F) { return TargetTransformInfo(X86TTIImpl(this, F)); });
171 }
172 
173 
174 //===----------------------------------------------------------------------===//
175 // Pass Pipeline Configuration
176 //===----------------------------------------------------------------------===//
177 
178 namespace {
179 /// X86 Code Generator Pass Configuration Options.
180 class X86PassConfig : public TargetPassConfig {
181 public:
182   X86PassConfig(X86TargetMachine *TM, PassManagerBase &PM)
183     : TargetPassConfig(TM, PM) {}
184 
185   X86TargetMachine &getX86TargetMachine() const {
186     return getTM<X86TargetMachine>();
187   }
188 
189   void addIRPasses() override;
190   bool addInstSelector() override;
191   bool addILPOpts() override;
192   void addPreRegAlloc() override;
193   void addPostRegAlloc() override;
194   void addPreEmitPass() override;
195 };
196 } // namespace
197 
198 TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) {
199   return new X86PassConfig(this, PM);
200 }
201 
202 void X86PassConfig::addIRPasses() {
203   addPass(createAtomicExpandPass(&getX86TargetMachine()));
204 
205   TargetPassConfig::addIRPasses();
206 }
207 
208 bool X86PassConfig::addInstSelector() {
209   // Install an instruction selector.
210   addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
211 
212   // For ELF, cleanup any local-dynamic TLS accesses.
213   if (Triple(TM->getTargetTriple()).isOSBinFormatELF() &&
214       getOptLevel() != CodeGenOpt::None)
215     addPass(createCleanupLocalDynamicTLSPass());
216 
217   addPass(createX86GlobalBaseRegPass());
218 
219   return false;
220 }
221 
222 bool X86PassConfig::addILPOpts() {
223   addPass(&EarlyIfConverterID);
224   return true;
225 }
226 
227 void X86PassConfig::addPreRegAlloc() {
228   addPass(createX86CallFrameOptimization());
229 }
230 
231 void X86PassConfig::addPostRegAlloc() {
232   addPass(createX86FloatingPointStackifierPass());
233 }
234 
235 void X86PassConfig::addPreEmitPass() {
236   if (getOptLevel() != CodeGenOpt::None)
237     addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));
238 
239   if (UseVZeroUpper)
240     addPass(createX86IssueVZeroUpperPass());
241 
242   if (getOptLevel() != CodeGenOpt::None) {
243     addPass(createX86PadShortFunctions());
244     addPass(createX86FixupLEAs());
245   }
246 }
247