1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the X86 specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
16 #include "X86.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetRegistry.h"
23 using namespace llvm;
24 
25 static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
26   Triple TheTriple(TT);
27   switch (TheTriple.getOS()) {
28   case Triple::Darwin:
29     return new X86MCAsmInfoDarwin(TheTriple);
30   case Triple::MinGW32:
31   case Triple::MinGW64:
32   case Triple::Cygwin:
33     return new X86MCAsmInfoCOFF(TheTriple);
34   case Triple::Win32:
35     return new X86WinMCAsmInfo(TheTriple);
36   default:
37     return new X86ELFMCAsmInfo(TheTriple);
38   }
39 }
40 
41 extern "C" void LLVMInitializeX86Target() {
42   // Register the target.
43   RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
44   RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
45 
46   // Register the target asm info.
47   RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
48   RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
49 
50   // Register the code emitter.
51   TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
52                                       createX86_32MCCodeEmitter);
53   TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
54                                       createX86_64MCCodeEmitter);
55 }
56 
57 
58 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
59                                          const std::string &FS)
60   : X86TargetMachine(T, TT, FS, false) {
61 }
62 
63 
64 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
65                                          const std::string &FS)
66   : X86TargetMachine(T, TT, FS, true) {
67 }
68 
69 /// X86TargetMachine ctor - Create an X86 target.
70 ///
71 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
72                                    const std::string &FS, bool is64Bit)
73   : LLVMTargetMachine(T, TT),
74     Subtarget(TT, FS, is64Bit),
75     DataLayout(Subtarget.getDataLayout()),
76     FrameInfo(TargetFrameInfo::StackGrowsDown,
77               Subtarget.getStackAlignment(),
78               (Subtarget.isTargetWin64() ? -40 :
79                (Subtarget.is64Bit() ? -8 : -4))),
80     InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
81   DefRelocModel = getRelocationModel();
82 
83   // If no relocation model was picked, default as appropriate for the target.
84   if (getRelocationModel() == Reloc::Default) {
85     if (!Subtarget.isTargetDarwin())
86       setRelocationModel(Reloc::Static);
87     else if (Subtarget.is64Bit())
88       setRelocationModel(Reloc::PIC_);
89     else
90       setRelocationModel(Reloc::DynamicNoPIC);
91   }
92 
93   assert(getRelocationModel() != Reloc::Default &&
94          "Relocation mode not picked");
95 
96   // ELF and X86-64 don't have a distinct DynamicNoPIC model.  DynamicNoPIC
97   // is defined as a model for code which may be used in static or dynamic
98   // executables but not necessarily a shared library. On X86-32 we just
99   // compile in -static mode, in x86-64 we use PIC.
100   if (getRelocationModel() == Reloc::DynamicNoPIC) {
101     if (is64Bit)
102       setRelocationModel(Reloc::PIC_);
103     else if (!Subtarget.isTargetDarwin())
104       setRelocationModel(Reloc::Static);
105   }
106 
107   // If we are on Darwin, disallow static relocation model in X86-64 mode, since
108   // the Mach-O file format doesn't support it.
109   if (getRelocationModel() == Reloc::Static &&
110       Subtarget.isTargetDarwin() &&
111       is64Bit)
112     setRelocationModel(Reloc::PIC_);
113 
114   // Determine the PICStyle based on the target selected.
115   if (getRelocationModel() == Reloc::Static) {
116     // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
117     Subtarget.setPICStyle(PICStyles::None);
118   } else if (Subtarget.isTargetCygMing()) {
119     Subtarget.setPICStyle(PICStyles::None);
120   } else if (Subtarget.isTargetDarwin()) {
121     if (Subtarget.is64Bit())
122       Subtarget.setPICStyle(PICStyles::RIPRel);
123     else if (getRelocationModel() == Reloc::PIC_)
124       Subtarget.setPICStyle(PICStyles::StubPIC);
125     else {
126       assert(getRelocationModel() == Reloc::DynamicNoPIC);
127       Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
128     }
129   } else if (Subtarget.isTargetELF()) {
130     if (Subtarget.is64Bit())
131       Subtarget.setPICStyle(PICStyles::RIPRel);
132     else
133       Subtarget.setPICStyle(PICStyles::GOT);
134   }
135 
136   // Finally, if we have "none" as our PIC style, force to static mode.
137   if (Subtarget.getPICStyle() == PICStyles::None)
138     setRelocationModel(Reloc::Static);
139 }
140 
141 //===----------------------------------------------------------------------===//
142 // Pass Pipeline Configuration
143 //===----------------------------------------------------------------------===//
144 
145 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
146                                        CodeGenOpt::Level OptLevel) {
147   // Install an instruction selector.
148   PM.add(createX86ISelDag(*this, OptLevel));
149 
150   // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
151   PM.add(createX87FPRegKillInserterPass());
152 
153   return false;
154 }
155 
156 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
157                                       CodeGenOpt::Level OptLevel) {
158   return false;  // -print-machineinstr shouldn't print after this.
159 }
160 
161 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
162                                        CodeGenOpt::Level OptLevel) {
163   PM.add(createX86FloatingPointStackifierPass());
164   return true;  // -print-machineinstr should print after this.
165 }
166 
167 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
168                                       CodeGenOpt::Level OptLevel,
169                                       JITCodeEmitter &JCE) {
170   // FIXME: Move this to TargetJITInfo!
171   // On Darwin, do not override 64-bit setting made in X86TargetMachine().
172   if (DefRelocModel == Reloc::Default &&
173       (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
174     setRelocationModel(Reloc::Static);
175     Subtarget.setPICStyle(PICStyles::None);
176   }
177 
178 
179   PM.add(createX86JITCodeEmitterPass(*this, JCE));
180 
181   return false;
182 }
183 
184 void X86TargetMachine::setCodeModelForStatic() {
185 
186     if (getCodeModel() != CodeModel::Default) return;
187 
188     // For static codegen, if we're not already set, use Small codegen.
189     setCodeModel(CodeModel::Small);
190 }
191 
192 
193 void X86TargetMachine::setCodeModelForJIT() {
194 
195   if (getCodeModel() != CodeModel::Default) return;
196 
197   // 64-bit JIT places everything in the same buffer except external functions.
198   if (Subtarget.is64Bit())
199     setCodeModel(CodeModel::Large);
200   else
201     setCodeModel(CodeModel::Small);
202 }
203 
204 /// getLSDAEncoding - Returns the LSDA pointer encoding. The choices are 4-byte,
205 /// 8-byte, and target default. The CIE is hard-coded to indicate that the LSDA
206 /// pointer in the FDE section is an "sdata4", and should be encoded as a 4-byte
207 /// pointer by default. However, some systems may require a different size due
208 /// to bugs or other conditions. We will default to a 4-byte encoding unless the
209 /// system tells us otherwise.
210 ///
211 /// The issue is when the CIE says their is an LSDA. That mandates that every
212 /// FDE have an LSDA slot. But if the function does not need an LSDA. There
213 /// needs to be some way to signify there is none. The LSDA is encoded as
214 /// pc-rel. But you don't look for some magic value after adding the pc. You
215 /// have to look for a zero before adding the pc. The problem is that the size
216 /// of the zero to look for depends on the encoding. The unwinder bug in SL is
217 /// that it always checks for a pointer-size zero. So on x86_64 it looks for 8
218 /// bytes of zero. If you have an LSDA, it works fine since the 8-bytes are
219 /// non-zero so it goes ahead and then reads the value based on the encoding.
220 /// But if you use sdata4 and there is no LSDA, then the test for zero gives a
221 /// false negative and the unwinder thinks there is an LSDA.
222 ///
223 /// FIXME: This call-back isn't good! We should be using the correct encoding
224 /// regardless of the system. However, there are some systems which have bugs
225 /// that prevent this from occuring.
226 DwarfLSDAEncoding::Encoding X86TargetMachine::getLSDAEncoding() const {
227   if (Subtarget.isTargetDarwin() && Subtarget.getDarwinVers() != 10)
228     return DwarfLSDAEncoding::Default;
229 
230   return DwarfLSDAEncoding::EightByte;
231 }
232