1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86.h"
15 
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86RegisterBankInfo.h"
19 #include "X86Subtarget.h"
20 #include "MCTargetDesc/X86BaseInfo.h"
21 #include "X86TargetMachine.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
24 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
25 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
26 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
27 #include "llvm/IR/Attributes.h"
28 #include "llvm/IR/ConstantRange.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/GlobalValue.h"
31 #include "llvm/Support/Casting.h"
32 #include "llvm/Support/CodeGen.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/raw_ostream.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include <cassert>
39 #include <string>
40 
41 #if defined(_MSC_VER)
42 #include <intrin.h>
43 #endif
44 
45 using namespace llvm;
46 
47 #define DEBUG_TYPE "subtarget"
48 
49 #define GET_SUBTARGETINFO_TARGET_DESC
50 #define GET_SUBTARGETINFO_CTOR
51 #include "X86GenSubtargetInfo.inc"
52 
53 // Temporary option to control early if-conversion for x86 while adding machine
54 // models.
55 static cl::opt<bool>
56 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
57                cl::desc("Enable early if-conversion on X86"));
58 
59 
60 /// Classify a blockaddress reference for the current subtarget according to how
61 /// we should reference it in a non-pcrel context.
62 unsigned char X86Subtarget::classifyBlockAddressReference() const {
63   return classifyLocalReference(nullptr);
64 }
65 
66 /// Classify a global variable reference for the current subtarget according to
67 /// how we should reference it in a non-pcrel context.
68 unsigned char
69 X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {
70   return classifyGlobalReference(GV, *GV->getParent());
71 }
72 
73 unsigned char
74 X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
75   // 64 bits can use %rip addressing for anything local.
76   if (is64Bit())
77     return X86II::MO_NO_FLAG;
78 
79   // If this is for a position dependent executable, the static linker can
80   // figure it out.
81   if (!isPositionIndependent())
82     return X86II::MO_NO_FLAG;
83 
84   // The COFF dynamic linker just patches the executable sections.
85   if (isTargetCOFF())
86     return X86II::MO_NO_FLAG;
87 
88   if (isTargetDarwin()) {
89     // 32 bit macho has no relocation for a-b if a is undefined, even if
90     // b is in the section that is being relocated.
91     // This means we have to use o load even for GVs that are known to be
92     // local to the dso.
93     if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
94       return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
95 
96     return X86II::MO_PIC_BASE_OFFSET;
97   }
98 
99   return X86II::MO_GOTOFF;
100 }
101 
102 static bool shouldAssumeGlobalReferenceLocal(const X86Subtarget *ST,
103                                              const TargetMachine &TM,
104                                              const Module &M,
105                                              const GlobalValue *GV) {
106   if (!TM.shouldAssumeDSOLocal(M, GV))
107     return false;
108   // A weak reference can end up being 0. If the code can be more that 4g away
109   // from zero and we are using the small code model we have to treat it as non
110   // local.
111   if (GV && GV->hasExternalWeakLinkage() &&
112       TM.getCodeModel() == CodeModel::Small && TM.isPositionIndependent() &&
113       ST->is64Bit() && ST->isTargetELF())
114     return false;
115   return true;
116 }
117 
118 unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
119                                                     const Module &M) const {
120   // Large model never uses stubs.
121   if (TM.getCodeModel() == CodeModel::Large)
122     return X86II::MO_NO_FLAG;
123 
124   // Absolute symbols can be referenced directly.
125   if (GV) {
126     if (Optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {
127       // See if we can use the 8-bit immediate form. Note that some instructions
128       // will sign extend the immediate operand, so to be conservative we only
129       // accept the range [0,128).
130       if (CR->getUnsignedMax().ult(128))
131         return X86II::MO_ABS8;
132       else
133         return X86II::MO_NO_FLAG;
134     }
135   }
136 
137   if (shouldAssumeGlobalReferenceLocal(this, TM, M, GV))
138     return classifyLocalReference(GV);
139 
140   if (isTargetCOFF())
141     return X86II::MO_DLLIMPORT;
142 
143   if (is64Bit())
144     return X86II::MO_GOTPCREL;
145 
146   if (isTargetDarwin()) {
147     if (!isPositionIndependent())
148       return X86II::MO_DARWIN_NONLAZY;
149     return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
150   }
151 
152   return X86II::MO_GOT;
153 }
154 
155 unsigned char
156 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const {
157   return classifyGlobalFunctionReference(GV, *GV->getParent());
158 }
159 
160 unsigned char
161 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV,
162                                               const Module &M) const {
163   if (TM.shouldAssumeDSOLocal(M, GV))
164     return X86II::MO_NO_FLAG;
165 
166   if (isTargetCOFF()) {
167     assert(GV->hasDLLImportStorageClass() &&
168            "shouldAssumeDSOLocal gave inconsistent answer");
169     return X86II::MO_DLLIMPORT;
170   }
171 
172   const Function *F = dyn_cast_or_null<Function>(GV);
173 
174   if (isTargetELF()) {
175     if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
176       // According to psABI, PLT stub clobbers XMM8-XMM15.
177       // In Regcall calling convention those registers are used for passing
178       // parameters. Thus we need to prevent lazy binding in Regcall.
179       return X86II::MO_GOTPCREL;
180     return X86II::MO_PLT;
181   }
182 
183   if (is64Bit()) {
184     if (F && F->hasFnAttribute(Attribute::NonLazyBind))
185       // If the function is marked as non-lazy, generate an indirect call
186       // which loads from the GOT directly. This avoids runtime overhead
187       // at the cost of eager binding (and one extra byte of encoding).
188       return X86II::MO_GOTPCREL;
189     return X86II::MO_NO_FLAG;
190   }
191 
192   return X86II::MO_NO_FLAG;
193 }
194 
195 /// This function returns the name of a function which has an interface like
196 /// the non-standard bzero function, if such a function exists on the
197 /// current subtarget and it is considered preferable over memset with zero
198 /// passed as the second argument. Otherwise it returns null.
199 const char *X86Subtarget::getBZeroEntry() const {
200   // Darwin 10 has a __bzero entry point for this purpose.
201   if (getTargetTriple().isMacOSX() &&
202       !getTargetTriple().isMacOSXVersionLT(10, 6))
203     return "__bzero";
204 
205   return nullptr;
206 }
207 
208 bool X86Subtarget::hasSinCos() const {
209   if (getTargetTriple().isMacOSX()) {
210     return !getTargetTriple().isMacOSXVersionLT(10, 9) && is64Bit();
211   } else if (getTargetTriple().isOSFuchsia()) {
212     return true;
213   }
214   return false;
215 }
216 
217 /// Return true if the subtarget allows calls to immediate address.
218 bool X86Subtarget::isLegalToCallImmediateAddr() const {
219   // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
220   // but WinCOFFObjectWriter::RecordRelocation cannot emit them.  Once it does,
221   // the following check for Win32 should be removed.
222   if (In64BitMode || isTargetWin32())
223     return false;
224   return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
225 }
226 
227 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
228   std::string CPUName = CPU;
229   if (CPUName.empty())
230     CPUName = "generic";
231 
232   // Make sure 64-bit features are available in 64-bit mode. (But make sure
233   // SSE2 can be turned off explicitly.)
234   std::string FullFS = FS;
235   if (In64BitMode) {
236     if (!FullFS.empty())
237       FullFS = "+64bit,+sse2," + FullFS;
238     else
239       FullFS = "+64bit,+sse2";
240   }
241 
242   // LAHF/SAHF are always supported in non-64-bit mode.
243   if (!In64BitMode) {
244     if (!FullFS.empty())
245       FullFS = "+sahf," + FullFS;
246     else
247       FullFS = "+sahf";
248   }
249 
250   // Parse features string and set the CPU.
251   ParseSubtargetFeatures(CPUName, FullFS);
252 
253   // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
254   // 16-bytes and under that are reasonably fast. These features were
255   // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
256   // micro-architectures respectively.
257   if (hasSSE42() || hasSSE4A())
258     IsUAMem16Slow = false;
259 
260   InstrItins = getInstrItineraryForCPU(CPUName);
261 
262   // It's important to keep the MCSubtargetInfo feature bits in sync with
263   // target data structure which is shared with MC code emitter, etc.
264   if (In64BitMode)
265     ToggleFeature(X86::Mode64Bit);
266   else if (In32BitMode)
267     ToggleFeature(X86::Mode32Bit);
268   else if (In16BitMode)
269     ToggleFeature(X86::Mode16Bit);
270   else
271     llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
272 
273   DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
274                << ", 3DNowLevel " << X863DNowLevel
275                << ", 64bit " << HasX86_64 << "\n");
276   assert((!In64BitMode || HasX86_64) &&
277          "64-bit code requested on a subtarget that doesn't support it!");
278 
279   // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
280   // 32 and 64 bit) and for all 64-bit targets.
281   if (StackAlignOverride)
282     stackAlignment = StackAlignOverride;
283   else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
284            isTargetKFreeBSD() || In64BitMode)
285     stackAlignment = 16;
286 
287   // Gather is available since Haswell (AVX2 set). So technically, we can generate Gathers
288   // on all AVX2 processors. But the overhead on HSW is high. Skylake Client processor has
289   // faster Gathers than HSW and performance is similar to Skylake Server (AVX-512).
290   // The specified overhead is relative to the Load operation."2" is the number provided
291   // by Intel architects, This parameter is used for cost estimation of Gather Op and
292   // comparison with other alternatives.
293   if (X86ProcFamily == IntelSkylake || hasAVX512())
294     GatherOverhead = 2;
295   if (hasAVX512())
296     ScatterOverhead = 2;
297 }
298 
299 void X86Subtarget::initializeEnvironment() {
300   X86SSELevel = NoSSE;
301   X863DNowLevel = NoThreeDNow;
302   HasX87 = false;
303   HasCMov = false;
304   HasX86_64 = false;
305   HasPOPCNT = false;
306   HasSSE4A = false;
307   HasAES = false;
308   HasFXSR = false;
309   HasXSAVE = false;
310   HasXSAVEOPT = false;
311   HasXSAVEC = false;
312   HasXSAVES = false;
313   HasPCLMUL = false;
314   HasFMA = false;
315   HasFMA4 = false;
316   HasXOP = false;
317   HasTBM = false;
318   HasLWP = false;
319   HasMOVBE = false;
320   HasRDRAND = false;
321   HasF16C = false;
322   HasFSGSBase = false;
323   HasLZCNT = false;
324   HasBMI = false;
325   HasBMI2 = false;
326   HasVBMI = false;
327   HasIFMA = false;
328   HasRTM = false;
329   HasERI = false;
330   HasCDI = false;
331   HasPFI = false;
332   HasDQI = false;
333   HasVPOPCNTDQ = false;
334   HasBWI = false;
335   HasVLX = false;
336   HasADX = false;
337   HasPKU = false;
338   HasSHA = false;
339   HasPRFCHW = false;
340   HasRDSEED = false;
341   HasLAHFSAHF = false;
342   HasMWAITX = false;
343   HasCLZERO = false;
344   HasMPX = false;
345   HasSGX = false;
346   HasCLFLUSHOPT = false;
347   HasCLWB = false;
348   IsPMULLDSlow = false;
349   IsSHLDSlow = false;
350   IsUAMem16Slow = false;
351   IsUAMem32Slow = false;
352   HasSSEUnalignedMem = false;
353   HasCmpxchg16b = false;
354   UseLeaForSP = false;
355   HasFastPartialYMMorZMMWrite = false;
356   HasFastScalarFSQRT = false;
357   HasFastVectorFSQRT = false;
358   HasFastLZCNT = false;
359   HasFastSHLDRotate = false;
360   HasMacroFusion = false;
361   HasERMSB = false;
362   HasSlowDivide32 = false;
363   HasSlowDivide64 = false;
364   PadShortFunctions = false;
365   SlowTwoMemOps = false;
366   LEAUsesAG = false;
367   SlowLEA = false;
368   Slow3OpsLEA = false;
369   SlowIncDec = false;
370   stackAlignment = 4;
371   // FIXME: this is a known good value for Yonah. How about others?
372   MaxInlineSizeThreshold = 128;
373   UseSoftFloat = false;
374   X86ProcFamily = Others;
375   GatherOverhead = 1024;
376   ScatterOverhead = 1024;
377 }
378 
379 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
380                                                             StringRef FS) {
381   initializeEnvironment();
382   initSubtargetFeatures(CPU, FS);
383   return *this;
384 }
385 
386 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
387                            const X86TargetMachine &TM,
388                            unsigned StackAlignOverride)
389     : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
390       PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
391       StackAlignOverride(StackAlignOverride),
392       In64BitMode(TargetTriple.getArch() == Triple::x86_64),
393       In32BitMode(TargetTriple.getArch() == Triple::x86 &&
394                   TargetTriple.getEnvironment() != Triple::CODE16),
395       In16BitMode(TargetTriple.getArch() == Triple::x86 &&
396                   TargetTriple.getEnvironment() == Triple::CODE16),
397       InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
398       FrameLowering(*this, getStackAlignment()) {
399   // Determine the PICStyle based on the target selected.
400   if (!isPositionIndependent())
401     setPICStyle(PICStyles::None);
402   else if (is64Bit())
403     setPICStyle(PICStyles::RIPRel);
404   else if (isTargetCOFF())
405     setPICStyle(PICStyles::None);
406   else if (isTargetDarwin())
407     setPICStyle(PICStyles::StubPIC);
408   else if (isTargetELF())
409     setPICStyle(PICStyles::GOT);
410 
411   CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
412   Legalizer.reset(new X86LegalizerInfo(*this, TM));
413 
414   auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
415   RegBankInfo.reset(RBI);
416   InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
417 }
418 
419 const CallLowering *X86Subtarget::getCallLowering() const {
420   return CallLoweringInfo.get();
421 }
422 
423 const InstructionSelector *X86Subtarget::getInstructionSelector() const {
424   return InstSelector.get();
425 }
426 
427 const LegalizerInfo *X86Subtarget::getLegalizerInfo() const {
428   return Legalizer.get();
429 }
430 
431 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const {
432   return RegBankInfo.get();
433 }
434 
435 bool X86Subtarget::enableEarlyIfConversion() const {
436   return hasCMov() && X86EarlyIfConv;
437 }
438