1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the X86 specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "X86Subtarget.h" 15 #include "MCTargetDesc/X86BaseInfo.h" 16 #include "X86TargetMachine.h" 17 #include "llvm/ADT/Triple.h" 18 #include "llvm/IR/Attributes.h" 19 #include "llvm/IR/ConstantRange.h" 20 #include "llvm/IR/Function.h" 21 #include "llvm/IR/GlobalValue.h" 22 #include "llvm/Support/Casting.h" 23 #include "llvm/Support/CodeGen.h" 24 #include "llvm/Support/CommandLine.h" 25 #include "llvm/Support/Debug.h" 26 #include "llvm/Support/ErrorHandling.h" 27 #include "llvm/Support/raw_ostream.h" 28 #include "llvm/Target/TargetMachine.h" 29 #include <cassert> 30 #include <string> 31 32 #if defined(_MSC_VER) 33 #include <intrin.h> 34 #endif 35 36 using namespace llvm; 37 38 #define DEBUG_TYPE "subtarget" 39 40 #define GET_SUBTARGETINFO_TARGET_DESC 41 #define GET_SUBTARGETINFO_CTOR 42 #include "X86GenSubtargetInfo.inc" 43 44 // Temporary option to control early if-conversion for x86 while adding machine 45 // models. 46 static cl::opt<bool> 47 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, 48 cl::desc("Enable early if-conversion on X86")); 49 50 51 /// Classify a blockaddress reference for the current subtarget according to how 52 /// we should reference it in a non-pcrel context. 53 unsigned char X86Subtarget::classifyBlockAddressReference() const { 54 return classifyLocalReference(nullptr); 55 } 56 57 /// Classify a global variable reference for the current subtarget according to 58 /// how we should reference it in a non-pcrel context. 59 unsigned char 60 X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const { 61 return classifyGlobalReference(GV, *GV->getParent()); 62 } 63 64 unsigned char 65 X86Subtarget::classifyLocalReference(const GlobalValue *GV) const { 66 // 64 bits can use %rip addressing for anything local. 67 if (is64Bit()) 68 return X86II::MO_NO_FLAG; 69 70 // If this is for a position dependent executable, the static linker can 71 // figure it out. 72 if (!isPositionIndependent()) 73 return X86II::MO_NO_FLAG; 74 75 // The COFF dynamic linker just patches the executable sections. 76 if (isTargetCOFF()) 77 return X86II::MO_NO_FLAG; 78 79 if (isTargetDarwin()) { 80 // 32 bit macho has no relocation for a-b if a is undefined, even if 81 // b is in the section that is being relocated. 82 // This means we have to use o load even for GVs that are known to be 83 // local to the dso. 84 if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage())) 85 return X86II::MO_DARWIN_NONLAZY_PIC_BASE; 86 87 return X86II::MO_PIC_BASE_OFFSET; 88 } 89 90 return X86II::MO_GOTOFF; 91 } 92 93 unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV, 94 const Module &M) const { 95 // Large model never uses stubs. 96 if (TM.getCodeModel() == CodeModel::Large) 97 return X86II::MO_NO_FLAG; 98 99 // Absolute symbols can be referenced directly. 100 if (GV) { 101 if (Optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) { 102 // See if we can use the 8-bit immediate form. Note that some instructions 103 // will sign extend the immediate operand, so to be conservative we only 104 // accept the range [0,128). 105 if (CR->getUnsignedMax().ult(128)) 106 return X86II::MO_ABS8; 107 else 108 return X86II::MO_NO_FLAG; 109 } 110 } 111 112 if (TM.shouldAssumeDSOLocal(M, GV)) 113 return classifyLocalReference(GV); 114 115 if (isTargetCOFF()) 116 return X86II::MO_DLLIMPORT; 117 118 if (is64Bit()) 119 return X86II::MO_GOTPCREL; 120 121 if (isTargetDarwin()) { 122 if (!isPositionIndependent()) 123 return X86II::MO_DARWIN_NONLAZY; 124 return X86II::MO_DARWIN_NONLAZY_PIC_BASE; 125 } 126 127 return X86II::MO_GOT; 128 } 129 130 unsigned char 131 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const { 132 return classifyGlobalFunctionReference(GV, *GV->getParent()); 133 } 134 135 unsigned char 136 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV, 137 const Module &M) const { 138 if (TM.shouldAssumeDSOLocal(M, GV)) 139 return X86II::MO_NO_FLAG; 140 141 assert(!isTargetCOFF()); 142 const Function *F = dyn_cast_or_null<Function>(GV); 143 144 if (isTargetELF()) { 145 if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv())) 146 // According to psABI, PLT stub clobbers XMM8-XMM15. 147 // In Regcall calling convention those registers are used for passing 148 // parameters. Thus we need to prevent lazy binding in Regcall. 149 return X86II::MO_GOTPCREL; 150 return X86II::MO_PLT; 151 } 152 153 if (is64Bit()) { 154 if (F && F->hasFnAttribute(Attribute::NonLazyBind)) 155 // If the function is marked as non-lazy, generate an indirect call 156 // which loads from the GOT directly. This avoids runtime overhead 157 // at the cost of eager binding (and one extra byte of encoding). 158 return X86II::MO_GOTPCREL; 159 return X86II::MO_NO_FLAG; 160 } 161 162 return X86II::MO_NO_FLAG; 163 } 164 165 /// This function returns the name of a function which has an interface like 166 /// the non-standard bzero function, if such a function exists on the 167 /// current subtarget and it is considered preferable over memset with zero 168 /// passed as the second argument. Otherwise it returns null. 169 const char *X86Subtarget::getBZeroEntry() const { 170 // Darwin 10 has a __bzero entry point for this purpose. 171 if (getTargetTriple().isMacOSX() && 172 !getTargetTriple().isMacOSXVersionLT(10, 6)) 173 return "__bzero"; 174 175 return nullptr; 176 } 177 178 bool X86Subtarget::hasSinCos() const { 179 return getTargetTriple().isMacOSX() && 180 !getTargetTriple().isMacOSXVersionLT(10, 9) && 181 is64Bit(); 182 } 183 184 /// Return true if the subtarget allows calls to immediate address. 185 bool X86Subtarget::isLegalToCallImmediateAddr() const { 186 // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32 187 // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does, 188 // the following check for Win32 should be removed. 189 if (In64BitMode || isTargetWin32()) 190 return false; 191 return isTargetELF() || TM.getRelocationModel() == Reloc::Static; 192 } 193 194 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { 195 std::string CPUName = CPU; 196 if (CPUName.empty()) 197 CPUName = "generic"; 198 199 // Make sure 64-bit features are available in 64-bit mode. (But make sure 200 // SSE2 can be turned off explicitly.) 201 std::string FullFS = FS; 202 if (In64BitMode) { 203 if (!FullFS.empty()) 204 FullFS = "+64bit,+sse2," + FullFS; 205 else 206 FullFS = "+64bit,+sse2"; 207 } 208 209 // LAHF/SAHF are always supported in non-64-bit mode. 210 if (!In64BitMode) { 211 if (!FullFS.empty()) 212 FullFS = "+sahf," + FullFS; 213 else 214 FullFS = "+sahf"; 215 } 216 217 // Parse features string and set the CPU. 218 ParseSubtargetFeatures(CPUName, FullFS); 219 220 // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of 221 // 16-bytes and under that are reasonably fast. These features were 222 // introduced with Intel's Nehalem/Silvermont and AMD's Family10h 223 // micro-architectures respectively. 224 if (hasSSE42() || hasSSE4A()) 225 IsUAMem16Slow = false; 226 227 InstrItins = getInstrItineraryForCPU(CPUName); 228 229 // It's important to keep the MCSubtargetInfo feature bits in sync with 230 // target data structure which is shared with MC code emitter, etc. 231 if (In64BitMode) 232 ToggleFeature(X86::Mode64Bit); 233 else if (In32BitMode) 234 ToggleFeature(X86::Mode32Bit); 235 else if (In16BitMode) 236 ToggleFeature(X86::Mode16Bit); 237 else 238 llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!"); 239 240 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel 241 << ", 3DNowLevel " << X863DNowLevel 242 << ", 64bit " << HasX86_64 << "\n"); 243 assert((!In64BitMode || HasX86_64) && 244 "64-bit code requested on a subtarget that doesn't support it!"); 245 246 // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both 247 // 32 and 64 bit) and for all 64-bit targets. 248 if (StackAlignOverride) 249 stackAlignment = StackAlignOverride; 250 else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() || 251 isTargetKFreeBSD() || In64BitMode) 252 stackAlignment = 16; 253 } 254 255 void X86Subtarget::initializeEnvironment() { 256 X86SSELevel = NoSSE; 257 X863DNowLevel = NoThreeDNow; 258 HasX87 = false; 259 HasCMov = false; 260 HasX86_64 = false; 261 HasPOPCNT = false; 262 HasSSE4A = false; 263 HasAES = false; 264 HasFXSR = false; 265 HasXSAVE = false; 266 HasXSAVEOPT = false; 267 HasXSAVEC = false; 268 HasXSAVES = false; 269 HasPCLMUL = false; 270 HasFMA = false; 271 HasFMA4 = false; 272 HasXOP = false; 273 HasTBM = false; 274 HasLWP = false; 275 HasMOVBE = false; 276 HasRDRAND = false; 277 HasF16C = false; 278 HasFSGSBase = false; 279 HasLZCNT = false; 280 HasBMI = false; 281 HasBMI2 = false; 282 HasVBMI = false; 283 HasIFMA = false; 284 HasRTM = false; 285 HasERI = false; 286 HasCDI = false; 287 HasPFI = false; 288 HasDQI = false; 289 HasVPOPCNTDQ = false; 290 HasBWI = false; 291 HasVLX = false; 292 HasADX = false; 293 HasPKU = false; 294 HasSHA = false; 295 HasPRFCHW = false; 296 HasRDSEED = false; 297 HasLAHFSAHF = false; 298 HasMWAITX = false; 299 HasCLZERO = false; 300 HasMPX = false; 301 HasSGX = false; 302 HasCLFLUSHOPT = false; 303 HasCLWB = false; 304 IsBTMemSlow = false; 305 IsPMULLDSlow = false; 306 IsSHLDSlow = false; 307 IsUAMem16Slow = false; 308 IsUAMem32Slow = false; 309 HasSSEUnalignedMem = false; 310 HasCmpxchg16b = false; 311 UseLeaForSP = false; 312 HasFastPartialYMMorZMMWrite = false; 313 HasFastScalarFSQRT = false; 314 HasFastVectorFSQRT = false; 315 HasFastLZCNT = false; 316 HasFastSHLDRotate = false; 317 HasERMSB = false; 318 HasSlowDivide32 = false; 319 HasSlowDivide64 = false; 320 PadShortFunctions = false; 321 CallRegIndirect = false; 322 LEAUsesAG = false; 323 SlowLEA = false; 324 Slow3OpsLEA = false; 325 SlowIncDec = false; 326 stackAlignment = 4; 327 // FIXME: this is a known good value for Yonah. How about others? 328 MaxInlineSizeThreshold = 128; 329 UseSoftFloat = false; 330 } 331 332 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU, 333 StringRef FS) { 334 initializeEnvironment(); 335 initSubtargetFeatures(CPU, FS); 336 return *this; 337 } 338 339 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS, 340 const X86TargetMachine &TM, 341 unsigned StackAlignOverride) 342 : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others), 343 PICStyle(PICStyles::None), TM(TM), TargetTriple(TT), 344 StackAlignOverride(StackAlignOverride), 345 In64BitMode(TargetTriple.getArch() == Triple::x86_64), 346 In32BitMode(TargetTriple.getArch() == Triple::x86 && 347 TargetTriple.getEnvironment() != Triple::CODE16), 348 In16BitMode(TargetTriple.getArch() == Triple::x86 && 349 TargetTriple.getEnvironment() == Triple::CODE16), 350 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this), 351 FrameLowering(*this, getStackAlignment()) { 352 // Determine the PICStyle based on the target selected. 353 if (!isPositionIndependent()) 354 setPICStyle(PICStyles::None); 355 else if (is64Bit()) 356 setPICStyle(PICStyles::RIPRel); 357 else if (isTargetCOFF()) 358 setPICStyle(PICStyles::None); 359 else if (isTargetDarwin()) 360 setPICStyle(PICStyles::StubPIC); 361 else if (isTargetELF()) 362 setPICStyle(PICStyles::GOT); 363 } 364 365 const CallLowering *X86Subtarget::getCallLowering() const { 366 assert(GISel && "Access to GlobalISel APIs not set"); 367 return GISel->getCallLowering(); 368 } 369 370 const InstructionSelector *X86Subtarget::getInstructionSelector() const { 371 assert(GISel && "Access to GlobalISel APIs not set"); 372 return GISel->getInstructionSelector(); 373 } 374 375 const LegalizerInfo *X86Subtarget::getLegalizerInfo() const { 376 assert(GISel && "Access to GlobalISel APIs not set"); 377 return GISel->getLegalizerInfo(); 378 } 379 380 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const { 381 assert(GISel && "Access to GlobalISel APIs not set"); 382 return GISel->getRegBankInfo(); 383 } 384 385 bool X86Subtarget::enableEarlyIfConversion() const { 386 return hasCMov() && X86EarlyIfConv; 387 } 388