1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the X86 specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "X86Subtarget.h"
14 #include "MCTargetDesc/X86BaseInfo.h"
15 #include "X86.h"
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86MacroFusion.h"
19 #include "X86RegisterBankInfo.h"
20 #include "X86TargetMachine.h"
21 #include "llvm/ADT/Triple.h"
22 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
23 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
24 #include "llvm/IR/Attributes.h"
25 #include "llvm/IR/ConstantRange.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/IR/GlobalValue.h"
28 #include "llvm/Support/Casting.h"
29 #include "llvm/Support/CodeGen.h"
30 #include "llvm/Support/CommandLine.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/Support/ErrorHandling.h"
33 #include "llvm/Support/raw_ostream.h"
34 #include "llvm/Target/TargetMachine.h"
35 
36 #if defined(_MSC_VER)
37 #include <intrin.h>
38 #endif
39 
40 using namespace llvm;
41 
42 #define DEBUG_TYPE "subtarget"
43 
44 #define GET_SUBTARGETINFO_TARGET_DESC
45 #define GET_SUBTARGETINFO_CTOR
46 #include "X86GenSubtargetInfo.inc"
47 
48 // Temporary option to control early if-conversion for x86 while adding machine
49 // models.
50 static cl::opt<bool>
51 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
52                cl::desc("Enable early if-conversion on X86"));
53 
54 
55 /// Classify a blockaddress reference for the current subtarget according to how
56 /// we should reference it in a non-pcrel context.
57 unsigned char X86Subtarget::classifyBlockAddressReference() const {
58   return classifyLocalReference(nullptr);
59 }
60 
61 /// Classify a global variable reference for the current subtarget according to
62 /// how we should reference it in a non-pcrel context.
63 unsigned char
64 X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {
65   return classifyGlobalReference(GV, *GV->getParent());
66 }
67 
68 unsigned char
69 X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
70   // If we're not PIC, it's not very interesting.
71   if (!isPositionIndependent())
72     return X86II::MO_NO_FLAG;
73 
74   if (is64Bit()) {
75     // 64-bit ELF PIC local references may use GOTOFF relocations.
76     if (isTargetELF()) {
77       switch (TM.getCodeModel()) {
78       // 64-bit small code model is simple: All rip-relative.
79       case CodeModel::Tiny:
80         llvm_unreachable("Tiny codesize model not supported on X86");
81       case CodeModel::Small:
82       case CodeModel::Kernel:
83         return X86II::MO_NO_FLAG;
84 
85       // The large PIC code model uses GOTOFF.
86       case CodeModel::Large:
87         return X86II::MO_GOTOFF;
88 
89       // Medium is a hybrid: RIP-rel for code, GOTOFF for DSO local data.
90       case CodeModel::Medium:
91         // Constant pool and jump table handling pass a nullptr to this
92         // function so we need to use isa_and_nonnull.
93         if (isa_and_nonnull<Function>(GV))
94           return X86II::MO_NO_FLAG; // All code is RIP-relative
95         return X86II::MO_GOTOFF;    // Local symbols use GOTOFF.
96       }
97       llvm_unreachable("invalid code model");
98     }
99 
100     // Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
101     // both of which use MO_NO_FLAG.
102     return X86II::MO_NO_FLAG;
103   }
104 
105   // The COFF dynamic linker just patches the executable sections.
106   if (isTargetCOFF())
107     return X86II::MO_NO_FLAG;
108 
109   if (isTargetDarwin()) {
110     // 32 bit macho has no relocation for a-b if a is undefined, even if
111     // b is in the section that is being relocated.
112     // This means we have to use o load even for GVs that are known to be
113     // local to the dso.
114     if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
115       return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
116 
117     return X86II::MO_PIC_BASE_OFFSET;
118   }
119 
120   return X86II::MO_GOTOFF;
121 }
122 
123 unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
124                                                     const Module &M) const {
125   // The static large model never uses stubs.
126   if (TM.getCodeModel() == CodeModel::Large && !isPositionIndependent())
127     return X86II::MO_NO_FLAG;
128 
129   // Absolute symbols can be referenced directly.
130   if (GV) {
131     if (Optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {
132       // See if we can use the 8-bit immediate form. Note that some instructions
133       // will sign extend the immediate operand, so to be conservative we only
134       // accept the range [0,128).
135       if (CR->getUnsignedMax().ult(128))
136         return X86II::MO_ABS8;
137       else
138         return X86II::MO_NO_FLAG;
139     }
140   }
141 
142   if (TM.shouldAssumeDSOLocal(M, GV))
143     return classifyLocalReference(GV);
144 
145   if (isTargetCOFF()) {
146     // ExternalSymbolSDNode like _tls_index.
147     if (!GV)
148       return X86II::MO_NO_FLAG;
149     if (GV->hasDLLImportStorageClass())
150       return X86II::MO_DLLIMPORT;
151     return X86II::MO_COFFSTUB;
152   }
153   // Some JIT users use *-win32-elf triples; these shouldn't use GOT tables.
154   if (isOSWindows())
155     return X86II::MO_NO_FLAG;
156 
157   if (is64Bit()) {
158     // ELF supports a large, truly PIC code model with non-PC relative GOT
159     // references. Other object file formats do not. Use the no-flag, 64-bit
160     // reference for them.
161     if (TM.getCodeModel() == CodeModel::Large)
162       return isTargetELF() ? X86II::MO_GOT : X86II::MO_NO_FLAG;
163     return X86II::MO_GOTPCREL;
164   }
165 
166   if (isTargetDarwin()) {
167     if (!isPositionIndependent())
168       return X86II::MO_DARWIN_NONLAZY;
169     return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
170   }
171 
172   // 32-bit ELF references GlobalAddress directly in static relocation model.
173   // We cannot use MO_GOT because EBX may not be set up.
174   if (TM.getRelocationModel() == Reloc::Static)
175     return X86II::MO_NO_FLAG;
176   return X86II::MO_GOT;
177 }
178 
179 unsigned char
180 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const {
181   return classifyGlobalFunctionReference(GV, *GV->getParent());
182 }
183 
184 unsigned char
185 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV,
186                                               const Module &M) const {
187   if (TM.shouldAssumeDSOLocal(M, GV))
188     return X86II::MO_NO_FLAG;
189 
190   // Functions on COFF can be non-DSO local for three reasons:
191   // - They are intrinsic functions (!GV)
192   // - They are marked dllimport
193   // - They are extern_weak, and a stub is needed
194   if (isTargetCOFF()) {
195     if (!GV)
196       return X86II::MO_NO_FLAG;
197     if (GV->hasDLLImportStorageClass())
198       return X86II::MO_DLLIMPORT;
199     return X86II::MO_COFFSTUB;
200   }
201 
202   const Function *F = dyn_cast_or_null<Function>(GV);
203 
204   if (isTargetELF()) {
205     if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
206       // According to psABI, PLT stub clobbers XMM8-XMM15.
207       // In Regcall calling convention those registers are used for passing
208       // parameters. Thus we need to prevent lazy binding in Regcall.
209       return X86II::MO_GOTPCREL;
210     // If PLT must be avoided then the call should be via GOTPCREL.
211     if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
212          (!F && M.getRtLibUseGOT())) &&
213         is64Bit())
214        return X86II::MO_GOTPCREL;
215     // Reference ExternalSymbol directly in static relocation model.
216     if (!is64Bit() && !GV && TM.getRelocationModel() == Reloc::Static)
217       return X86II::MO_NO_FLAG;
218     return X86II::MO_PLT;
219   }
220 
221   if (is64Bit()) {
222     if (F && F->hasFnAttribute(Attribute::NonLazyBind))
223       // If the function is marked as non-lazy, generate an indirect call
224       // which loads from the GOT directly. This avoids runtime overhead
225       // at the cost of eager binding (and one extra byte of encoding).
226       return X86II::MO_GOTPCREL;
227     return X86II::MO_NO_FLAG;
228   }
229 
230   return X86II::MO_NO_FLAG;
231 }
232 
233 /// Return true if the subtarget allows calls to immediate address.
234 bool X86Subtarget::isLegalToCallImmediateAddr() const {
235   // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
236   // but WinCOFFObjectWriter::RecordRelocation cannot emit them.  Once it does,
237   // the following check for Win32 should be removed.
238   if (In64BitMode || isTargetWin32())
239     return false;
240   return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
241 }
242 
243 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
244                                          StringRef FS) {
245   if (CPU.empty())
246     CPU = "generic";
247 
248   if (TuneCPU.empty())
249     TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
250 
251   std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);
252   assert(!FullFS.empty() && "Failed to parse X86 triple");
253 
254   if (!FS.empty())
255     FullFS = (Twine(FullFS) + "," + FS).str();
256 
257   // Parse features string and set the CPU.
258   ParseSubtargetFeatures(CPU, TuneCPU, FullFS);
259 
260   // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
261   // 16-bytes and under that are reasonably fast. These features were
262   // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
263   // micro-architectures respectively.
264   if (hasSSE42() || hasSSE4A())
265     IsUAMem16Slow = false;
266 
267   LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
268                     << ", 3DNowLevel " << X863DNowLevel << ", 64bit "
269                     << HasX86_64 << "\n");
270   if (In64BitMode && !HasX86_64)
271     report_fatal_error("64-bit code requested on a subtarget that doesn't "
272                        "support it!");
273 
274   // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD, NaCl, and for all
275   // 64-bit targets.  On Solaris (32-bit), stack alignment is 4 bytes
276   // following the i386 psABI, while on Illumos it is always 16 bytes.
277   if (StackAlignOverride)
278     stackAlignment = *StackAlignOverride;
279   else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||
280            isTargetNaCl() || In64BitMode)
281     stackAlignment = Align(16);
282 
283   // Consume the vector width attribute or apply any target specific limit.
284   if (PreferVectorWidthOverride)
285     PreferVectorWidth = PreferVectorWidthOverride;
286   else if (Prefer128Bit)
287     PreferVectorWidth = 128;
288   else if (Prefer256Bit)
289     PreferVectorWidth = 256;
290 }
291 
292 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
293                                                             StringRef TuneCPU,
294                                                             StringRef FS) {
295   initSubtargetFeatures(CPU, TuneCPU, FS);
296   return *this;
297 }
298 
299 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU,
300                            StringRef FS, const X86TargetMachine &TM,
301                            MaybeAlign StackAlignOverride,
302                            unsigned PreferVectorWidthOverride,
303                            unsigned RequiredVectorWidth)
304     : X86GenSubtargetInfo(TT, CPU, TuneCPU, FS),
305       PICStyle(PICStyles::Style::None), TM(TM), TargetTriple(TT),
306       StackAlignOverride(StackAlignOverride),
307       PreferVectorWidthOverride(PreferVectorWidthOverride),
308       RequiredVectorWidth(RequiredVectorWidth),
309       InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
310       TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
311   // Determine the PICStyle based on the target selected.
312   if (!isPositionIndependent())
313     setPICStyle(PICStyles::Style::None);
314   else if (is64Bit())
315     setPICStyle(PICStyles::Style::RIPRel);
316   else if (isTargetCOFF())
317     setPICStyle(PICStyles::Style::None);
318   else if (isTargetDarwin())
319     setPICStyle(PICStyles::Style::StubPIC);
320   else if (isTargetELF())
321     setPICStyle(PICStyles::Style::GOT);
322 
323   CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
324   Legalizer.reset(new X86LegalizerInfo(*this, TM));
325 
326   auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
327   RegBankInfo.reset(RBI);
328   InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
329 }
330 
331 const CallLowering *X86Subtarget::getCallLowering() const {
332   return CallLoweringInfo.get();
333 }
334 
335 InstructionSelector *X86Subtarget::getInstructionSelector() const {
336   return InstSelector.get();
337 }
338 
339 const LegalizerInfo *X86Subtarget::getLegalizerInfo() const {
340   return Legalizer.get();
341 }
342 
343 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const {
344   return RegBankInfo.get();
345 }
346 
347 bool X86Subtarget::enableEarlyIfConversion() const {
348   return hasCMov() && X86EarlyIfConv;
349 }
350 
351 void X86Subtarget::getPostRAMutations(
352     std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
353   Mutations.push_back(createX86MacroFusionDAGMutation());
354 }
355 
356 bool X86Subtarget::isPositionIndependent() const {
357   return TM.isPositionIndependent();
358 }
359