1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86.h"
15 
16 #ifdef LLVM_BUILD_GLOBAL_ISEL
17 #include "X86CallLowering.h"
18 #include "X86LegalizerInfo.h"
19 #include "X86RegisterBankInfo.h"
20 #endif
21 #include "X86Subtarget.h"
22 #include "MCTargetDesc/X86BaseInfo.h"
23 #include "X86TargetMachine.h"
24 #include "llvm/ADT/Triple.h"
25 #ifdef LLVM_BUILD_GLOBAL_ISEL
26 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
27 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
28 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
29 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
30 #endif
31 #include "llvm/IR/Attributes.h"
32 #include "llvm/IR/ConstantRange.h"
33 #include "llvm/IR/Function.h"
34 #include "llvm/IR/GlobalValue.h"
35 #include "llvm/Support/Casting.h"
36 #include "llvm/Support/CodeGen.h"
37 #include "llvm/Support/CommandLine.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/raw_ostream.h"
41 #include "llvm/Target/TargetMachine.h"
42 #include <cassert>
43 #include <string>
44 
45 #if defined(_MSC_VER)
46 #include <intrin.h>
47 #endif
48 
49 using namespace llvm;
50 
51 #define DEBUG_TYPE "subtarget"
52 
53 #define GET_SUBTARGETINFO_TARGET_DESC
54 #define GET_SUBTARGETINFO_CTOR
55 #include "X86GenSubtargetInfo.inc"
56 
57 // Temporary option to control early if-conversion for x86 while adding machine
58 // models.
59 static cl::opt<bool>
60 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
61                cl::desc("Enable early if-conversion on X86"));
62 
63 
64 /// Classify a blockaddress reference for the current subtarget according to how
65 /// we should reference it in a non-pcrel context.
66 unsigned char X86Subtarget::classifyBlockAddressReference() const {
67   return classifyLocalReference(nullptr);
68 }
69 
70 /// Classify a global variable reference for the current subtarget according to
71 /// how we should reference it in a non-pcrel context.
72 unsigned char
73 X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {
74   return classifyGlobalReference(GV, *GV->getParent());
75 }
76 
77 unsigned char
78 X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
79   // 64 bits can use %rip addressing for anything local.
80   if (is64Bit())
81     return X86II::MO_NO_FLAG;
82 
83   // If this is for a position dependent executable, the static linker can
84   // figure it out.
85   if (!isPositionIndependent())
86     return X86II::MO_NO_FLAG;
87 
88   // The COFF dynamic linker just patches the executable sections.
89   if (isTargetCOFF())
90     return X86II::MO_NO_FLAG;
91 
92   if (isTargetDarwin()) {
93     // 32 bit macho has no relocation for a-b if a is undefined, even if
94     // b is in the section that is being relocated.
95     // This means we have to use o load even for GVs that are known to be
96     // local to the dso.
97     if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
98       return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
99 
100     return X86II::MO_PIC_BASE_OFFSET;
101   }
102 
103   return X86II::MO_GOTOFF;
104 }
105 
106 unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
107                                                     const Module &M) const {
108   // Large model never uses stubs.
109   if (TM.getCodeModel() == CodeModel::Large)
110     return X86II::MO_NO_FLAG;
111 
112   // Absolute symbols can be referenced directly.
113   if (GV) {
114     if (Optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {
115       // See if we can use the 8-bit immediate form. Note that some instructions
116       // will sign extend the immediate operand, so to be conservative we only
117       // accept the range [0,128).
118       if (CR->getUnsignedMax().ult(128))
119         return X86II::MO_ABS8;
120       else
121         return X86II::MO_NO_FLAG;
122     }
123   }
124 
125   if (TM.shouldAssumeDSOLocal(M, GV))
126     return classifyLocalReference(GV);
127 
128   if (isTargetCOFF())
129     return X86II::MO_DLLIMPORT;
130 
131   if (is64Bit())
132     return X86II::MO_GOTPCREL;
133 
134   if (isTargetDarwin()) {
135     if (!isPositionIndependent())
136       return X86II::MO_DARWIN_NONLAZY;
137     return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
138   }
139 
140   return X86II::MO_GOT;
141 }
142 
143 unsigned char
144 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const {
145   return classifyGlobalFunctionReference(GV, *GV->getParent());
146 }
147 
148 unsigned char
149 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV,
150                                               const Module &M) const {
151   if (TM.shouldAssumeDSOLocal(M, GV))
152     return X86II::MO_NO_FLAG;
153 
154   assert(!isTargetCOFF());
155   const Function *F = dyn_cast_or_null<Function>(GV);
156 
157   if (isTargetELF()) {
158     if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
159       // According to psABI, PLT stub clobbers XMM8-XMM15.
160       // In Regcall calling convention those registers are used for passing
161       // parameters. Thus we need to prevent lazy binding in Regcall.
162       return X86II::MO_GOTPCREL;
163     return X86II::MO_PLT;
164   }
165 
166   if (is64Bit()) {
167     if (F && F->hasFnAttribute(Attribute::NonLazyBind))
168       // If the function is marked as non-lazy, generate an indirect call
169       // which loads from the GOT directly. This avoids runtime overhead
170       // at the cost of eager binding (and one extra byte of encoding).
171       return X86II::MO_GOTPCREL;
172     return X86II::MO_NO_FLAG;
173   }
174 
175   return X86II::MO_NO_FLAG;
176 }
177 
178 /// This function returns the name of a function which has an interface like
179 /// the non-standard bzero function, if such a function exists on the
180 /// current subtarget and it is considered preferable over memset with zero
181 /// passed as the second argument. Otherwise it returns null.
182 const char *X86Subtarget::getBZeroEntry() const {
183   // Darwin 10 has a __bzero entry point for this purpose.
184   if (getTargetTriple().isMacOSX() &&
185       !getTargetTriple().isMacOSXVersionLT(10, 6))
186     return "__bzero";
187 
188   return nullptr;
189 }
190 
191 bool X86Subtarget::hasSinCos() const {
192   if (getTargetTriple().isMacOSX()) {
193     return !getTargetTriple().isMacOSXVersionLT(10, 9) && is64Bit();
194   } else if (getTargetTriple().isOSFuchsia()) {
195     return true;
196   }
197   return false;
198 }
199 
200 /// Return true if the subtarget allows calls to immediate address.
201 bool X86Subtarget::isLegalToCallImmediateAddr() const {
202   // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
203   // but WinCOFFObjectWriter::RecordRelocation cannot emit them.  Once it does,
204   // the following check for Win32 should be removed.
205   if (In64BitMode || isTargetWin32())
206     return false;
207   return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
208 }
209 
210 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
211   std::string CPUName = CPU;
212   if (CPUName.empty())
213     CPUName = "generic";
214 
215   // Make sure 64-bit features are available in 64-bit mode. (But make sure
216   // SSE2 can be turned off explicitly.)
217   std::string FullFS = FS;
218   if (In64BitMode) {
219     if (!FullFS.empty())
220       FullFS = "+64bit,+sse2," + FullFS;
221     else
222       FullFS = "+64bit,+sse2";
223   }
224 
225   // LAHF/SAHF are always supported in non-64-bit mode.
226   if (!In64BitMode) {
227     if (!FullFS.empty())
228       FullFS = "+sahf," + FullFS;
229     else
230       FullFS = "+sahf";
231   }
232 
233   // Parse features string and set the CPU.
234   ParseSubtargetFeatures(CPUName, FullFS);
235 
236   // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
237   // 16-bytes and under that are reasonably fast. These features were
238   // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
239   // micro-architectures respectively.
240   if (hasSSE42() || hasSSE4A())
241     IsUAMem16Slow = false;
242 
243   InstrItins = getInstrItineraryForCPU(CPUName);
244 
245   // It's important to keep the MCSubtargetInfo feature bits in sync with
246   // target data structure which is shared with MC code emitter, etc.
247   if (In64BitMode)
248     ToggleFeature(X86::Mode64Bit);
249   else if (In32BitMode)
250     ToggleFeature(X86::Mode32Bit);
251   else if (In16BitMode)
252     ToggleFeature(X86::Mode16Bit);
253   else
254     llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
255 
256   DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
257                << ", 3DNowLevel " << X863DNowLevel
258                << ", 64bit " << HasX86_64 << "\n");
259   assert((!In64BitMode || HasX86_64) &&
260          "64-bit code requested on a subtarget that doesn't support it!");
261 
262   // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
263   // 32 and 64 bit) and for all 64-bit targets.
264   if (StackAlignOverride)
265     stackAlignment = StackAlignOverride;
266   else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
267            isTargetKFreeBSD() || In64BitMode)
268     stackAlignment = 16;
269 }
270 
271 void X86Subtarget::initializeEnvironment() {
272   X86SSELevel = NoSSE;
273   X863DNowLevel = NoThreeDNow;
274   HasX87 = false;
275   HasCMov = false;
276   HasX86_64 = false;
277   HasPOPCNT = false;
278   HasSSE4A = false;
279   HasAES = false;
280   HasFXSR = false;
281   HasXSAVE = false;
282   HasXSAVEOPT = false;
283   HasXSAVEC = false;
284   HasXSAVES = false;
285   HasPCLMUL = false;
286   HasFMA = false;
287   HasFMA4 = false;
288   HasXOP = false;
289   HasTBM = false;
290   HasLWP = false;
291   HasMOVBE = false;
292   HasRDRAND = false;
293   HasF16C = false;
294   HasFSGSBase = false;
295   HasLZCNT = false;
296   HasBMI = false;
297   HasBMI2 = false;
298   HasVBMI = false;
299   HasIFMA = false;
300   HasRTM = false;
301   HasERI = false;
302   HasCDI = false;
303   HasPFI = false;
304   HasDQI = false;
305   HasVPOPCNTDQ = false;
306   HasBWI = false;
307   HasVLX = false;
308   HasADX = false;
309   HasPKU = false;
310   HasSHA = false;
311   HasPRFCHW = false;
312   HasRDSEED = false;
313   HasLAHFSAHF = false;
314   HasMWAITX = false;
315   HasCLZERO = false;
316   HasMPX = false;
317   HasSGX = false;
318   HasCLFLUSHOPT = false;
319   HasCLWB = false;
320   IsBTMemSlow = false;
321   IsPMULLDSlow = false;
322   IsSHLDSlow = false;
323   IsUAMem16Slow = false;
324   IsUAMem32Slow = false;
325   HasSSEUnalignedMem = false;
326   HasCmpxchg16b = false;
327   UseLeaForSP = false;
328   HasFastPartialYMMorZMMWrite = false;
329   HasFastScalarFSQRT = false;
330   HasFastVectorFSQRT = false;
331   HasFastLZCNT = false;
332   HasFastSHLDRotate = false;
333   HasERMSB = false;
334   HasSlowDivide32 = false;
335   HasSlowDivide64 = false;
336   PadShortFunctions = false;
337   CallRegIndirect = false;
338   LEAUsesAG = false;
339   SlowLEA = false;
340   Slow3OpsLEA = false;
341   SlowIncDec = false;
342   stackAlignment = 4;
343   // FIXME: this is a known good value for Yonah. How about others?
344   MaxInlineSizeThreshold = 128;
345   UseSoftFloat = false;
346 }
347 
348 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
349                                                             StringRef FS) {
350   initializeEnvironment();
351   initSubtargetFeatures(CPU, FS);
352   return *this;
353 }
354 
355 #ifdef LLVM_BUILD_GLOBAL_ISEL
356 namespace {
357 
358 struct X86GISelActualAccessor : public GISelAccessor {
359   std::unique_ptr<CallLowering> CallLoweringInfo;
360   std::unique_ptr<LegalizerInfo> Legalizer;
361   std::unique_ptr<RegisterBankInfo> RegBankInfo;
362   std::unique_ptr<InstructionSelector> InstSelector;
363 
364   const CallLowering *getCallLowering() const override {
365     return CallLoweringInfo.get();
366   }
367 
368   const InstructionSelector *getInstructionSelector() const override {
369     return InstSelector.get();
370   }
371 
372   const LegalizerInfo *getLegalizerInfo() const override {
373     return Legalizer.get();
374   }
375 
376   const RegisterBankInfo *getRegBankInfo() const override {
377     return RegBankInfo.get();
378   }
379 };
380 
381 } // end anonymous namespace
382 #endif
383 
384 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
385                            const X86TargetMachine &TM,
386                            unsigned StackAlignOverride)
387     : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
388       PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
389       StackAlignOverride(StackAlignOverride),
390       In64BitMode(TargetTriple.getArch() == Triple::x86_64),
391       In32BitMode(TargetTriple.getArch() == Triple::x86 &&
392                   TargetTriple.getEnvironment() != Triple::CODE16),
393       In16BitMode(TargetTriple.getArch() == Triple::x86 &&
394                   TargetTriple.getEnvironment() == Triple::CODE16),
395       InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
396       FrameLowering(*this, getStackAlignment()) {
397   // Determine the PICStyle based on the target selected.
398   if (!isPositionIndependent())
399     setPICStyle(PICStyles::None);
400   else if (is64Bit())
401     setPICStyle(PICStyles::RIPRel);
402   else if (isTargetCOFF())
403     setPICStyle(PICStyles::None);
404   else if (isTargetDarwin())
405     setPICStyle(PICStyles::StubPIC);
406   else if (isTargetELF())
407     setPICStyle(PICStyles::GOT);
408 #ifndef LLVM_BUILD_GLOBAL_ISEL
409   GISelAccessor *GISel = new GISelAccessor();
410 #else
411   X86GISelActualAccessor *GISel = new X86GISelActualAccessor();
412 
413   GISel->CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
414   GISel->Legalizer.reset(new X86LegalizerInfo(*this, TM));
415 
416   auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
417   GISel->RegBankInfo.reset(RBI);
418   GISel->InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
419 #endif
420   setGISelAccessor(*GISel);
421 }
422 
423 const CallLowering *X86Subtarget::getCallLowering() const {
424   assert(GISel && "Access to GlobalISel APIs not set");
425   return GISel->getCallLowering();
426 }
427 
428 const InstructionSelector *X86Subtarget::getInstructionSelector() const {
429   assert(GISel && "Access to GlobalISel APIs not set");
430   return GISel->getInstructionSelector();
431 }
432 
433 const LegalizerInfo *X86Subtarget::getLegalizerInfo() const {
434   assert(GISel && "Access to GlobalISel APIs not set");
435   return GISel->getLegalizerInfo();
436 }
437 
438 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const {
439   assert(GISel && "Access to GlobalISel APIs not set");
440   return GISel->getRegBankInfo();
441 }
442 
443 bool X86Subtarget::enableEarlyIfConversion() const {
444   return hasCMov() && X86EarlyIfConv;
445 }
446