1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the X86 specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #define DEBUG_TYPE "subtarget" 15 #include "X86Subtarget.h" 16 #include "X86InstrInfo.h" 17 #include "llvm/GlobalValue.h" 18 #include "llvm/Support/Debug.h" 19 #include "llvm/Support/ErrorHandling.h" 20 #include "llvm/Support/raw_ostream.h" 21 #include "llvm/Support/Host.h" 22 #include "llvm/Target/TargetMachine.h" 23 #include "llvm/Target/TargetOptions.h" 24 #include "llvm/ADT/SmallVector.h" 25 26 #define GET_SUBTARGETINFO_TARGET_DESC 27 #define GET_SUBTARGETINFO_CTOR 28 #include "X86GenSubtargetInfo.inc" 29 30 using namespace llvm; 31 32 #if defined(_MSC_VER) 33 #include <intrin.h> 34 #endif 35 36 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the 37 /// current subtarget according to how we should reference it in a non-pcrel 38 /// context. 39 unsigned char X86Subtarget:: 40 ClassifyBlockAddressReference() const { 41 if (isPICStyleGOT()) // 32-bit ELF targets. 42 return X86II::MO_GOTOFF; 43 44 if (isPICStyleStubPIC()) // Darwin/32 in PIC mode. 45 return X86II::MO_PIC_BASE_OFFSET; 46 47 // Direct static reference to label. 48 return X86II::MO_NO_FLAG; 49 } 50 51 /// ClassifyGlobalReference - Classify a global variable reference for the 52 /// current subtarget according to how we should reference it in a non-pcrel 53 /// context. 54 unsigned char X86Subtarget:: 55 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const { 56 // DLLImport only exists on windows, it is implemented as a load from a 57 // DLLIMPORT stub. 58 if (GV->hasDLLImportLinkage()) 59 return X86II::MO_DLLIMPORT; 60 61 // Determine whether this is a reference to a definition or a declaration. 62 // Materializable GVs (in JIT lazy compilation mode) do not require an extra 63 // load from stub. 64 bool isDecl = GV->hasAvailableExternallyLinkage(); 65 if (GV->isDeclaration() && !GV->isMaterializable()) 66 isDecl = true; 67 68 // X86-64 in PIC mode. 69 if (isPICStyleRIPRel()) { 70 // Large model never uses stubs. 71 if (TM.getCodeModel() == CodeModel::Large) 72 return X86II::MO_NO_FLAG; 73 74 if (isTargetDarwin()) { 75 // If symbol visibility is hidden, the extra load is not needed if 76 // target is x86-64 or the symbol is definitely defined in the current 77 // translation unit. 78 if (GV->hasDefaultVisibility() && 79 (isDecl || GV->isWeakForLinker())) 80 return X86II::MO_GOTPCREL; 81 } else if (!isTargetWin64()) { 82 assert(isTargetELF() && "Unknown rip-relative target"); 83 84 // Extra load is needed for all externally visible. 85 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility()) 86 return X86II::MO_GOTPCREL; 87 } 88 89 return X86II::MO_NO_FLAG; 90 } 91 92 if (isPICStyleGOT()) { // 32-bit ELF targets. 93 // Extra load is needed for all externally visible. 94 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility()) 95 return X86II::MO_GOTOFF; 96 return X86II::MO_GOT; 97 } 98 99 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode. 100 // Determine whether we have a stub reference and/or whether the reference 101 // is relative to the PIC base or not. 102 103 // If this is a strong reference to a definition, it is definitely not 104 // through a stub. 105 if (!isDecl && !GV->isWeakForLinker()) 106 return X86II::MO_PIC_BASE_OFFSET; 107 108 // Unless we have a symbol with hidden visibility, we have to go through a 109 // normal $non_lazy_ptr stub because this symbol might be resolved late. 110 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference. 111 return X86II::MO_DARWIN_NONLAZY_PIC_BASE; 112 113 // If symbol visibility is hidden, we have a stub for common symbol 114 // references and external declarations. 115 if (isDecl || GV->hasCommonLinkage()) { 116 // Hidden $non_lazy_ptr reference. 117 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE; 118 } 119 120 // Otherwise, no stub. 121 return X86II::MO_PIC_BASE_OFFSET; 122 } 123 124 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode. 125 // Determine whether we have a stub reference. 126 127 // If this is a strong reference to a definition, it is definitely not 128 // through a stub. 129 if (!isDecl && !GV->isWeakForLinker()) 130 return X86II::MO_NO_FLAG; 131 132 // Unless we have a symbol with hidden visibility, we have to go through a 133 // normal $non_lazy_ptr stub because this symbol might be resolved late. 134 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference. 135 return X86II::MO_DARWIN_NONLAZY; 136 137 // Otherwise, no stub. 138 return X86II::MO_NO_FLAG; 139 } 140 141 // Direct static reference to global. 142 return X86II::MO_NO_FLAG; 143 } 144 145 146 /// getBZeroEntry - This function returns the name of a function which has an 147 /// interface like the non-standard bzero function, if such a function exists on 148 /// the current subtarget and it is considered prefereable over memset with zero 149 /// passed as the second argument. Otherwise it returns null. 150 const char *X86Subtarget::getBZeroEntry() const { 151 // Darwin 10 has a __bzero entry point for this purpose. 152 if (getTargetTriple().isMacOSX() && 153 !getTargetTriple().isMacOSXVersionLT(10, 6)) 154 return "__bzero"; 155 156 return 0; 157 } 158 159 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls 160 /// to immediate address. 161 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const { 162 if (In64BitMode) 163 return false; 164 return isTargetELF() || TM.getRelocationModel() == Reloc::Static; 165 } 166 167 /// getSpecialAddressLatency - For targets where it is beneficial to 168 /// backschedule instructions that compute addresses, return a value 169 /// indicating the number of scheduling cycles of backscheduling that 170 /// should be attempted. 171 unsigned X86Subtarget::getSpecialAddressLatency() const { 172 // For x86 out-of-order targets, back-schedule address computations so 173 // that loads and stores aren't blocked. 174 // This value was chosen arbitrarily. 175 return 200; 176 } 177 178 void X86Subtarget::AutoDetectSubtargetFeatures() { 179 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; 180 union { 181 unsigned u[3]; 182 char c[12]; 183 } text; 184 185 if (X86_MC::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1)) 186 return; 187 188 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); 189 190 if ((EDX >> 15) & 1) HasCMov = true; ToggleFeature(X86::FeatureCMOV); 191 if ((EDX >> 23) & 1) X86SSELevel = MMX; ToggleFeature(X86::FeatureMMX); 192 if ((EDX >> 25) & 1) X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1); 193 if ((EDX >> 26) & 1) X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2); 194 if (ECX & 0x1) X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3); 195 if ((ECX >> 9) & 1) X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3); 196 if ((ECX >> 19) & 1) X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41); 197 if ((ECX >> 20) & 1) X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42); 198 // FIXME: AVX codegen support is not ready. 199 //if ((ECX >> 28) & 1) { HasAVX = true; } ToggleFeature(X86::FeatureAVX); 200 201 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0; 202 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0; 203 204 HasCLMUL = IsIntel && ((ECX >> 1) & 0x1); ToggleFeature(X86::FeatureCLMUL); 205 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1); ToggleFeature(X86::FeatureFMA3); 206 HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1); ToggleFeature(X86::FeaturePOPCNT); 207 HasAES = IsIntel && ((ECX >> 25) & 0x1); ToggleFeature(X86::FeatureAES); 208 HasCmpxchg16b = ((ECX >> 13) & 0x1); ToggleFeature(X86::FeatureCMPXCHG16B); 209 210 if (IsIntel || IsAMD) { 211 // Determine if bit test memory instructions are slow. 212 unsigned Family = 0; 213 unsigned Model = 0; 214 X86_MC::DetectFamilyModel(EAX, Family, Model); 215 if (IsAMD || (Family == 6 && Model >= 13)) { 216 IsBTMemSlow = true; 217 ToggleFeature(X86::FeatureSlowBTMem); 218 } 219 // If it's Nehalem, unaligned memory access is fast. 220 if (Family == 15 && Model == 26) { 221 IsUAMemFast = true; 222 ToggleFeature(X86::FeatureFastUAMem); 223 } 224 225 X86_MC::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); 226 if ((EDX >> 29) & 0x1) { 227 HasX86_64 = true; 228 ToggleFeature(X86::Feature64Bit); 229 } 230 if (IsAMD && ((ECX >> 6) & 0x1)) { 231 HasSSE4A = true; 232 ToggleFeature(X86::FeatureSSE4A); 233 } 234 if (IsAMD && ((ECX >> 16) & 0x1)) { 235 HasFMA4 = true; 236 ToggleFeature(X86::FeatureFMA4); 237 } 238 } 239 } 240 241 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, 242 const std::string &FS, 243 unsigned StackAlignOverride, bool is64Bit) 244 : X86GenSubtargetInfo(TT, CPU, FS) 245 , PICStyle(PICStyles::None) 246 , X86SSELevel(NoMMXSSE) 247 , X863DNowLevel(NoThreeDNow) 248 , HasCMov(false) 249 , HasX86_64(false) 250 , HasPOPCNT(false) 251 , HasSSE4A(false) 252 , HasAVX(false) 253 , HasAES(false) 254 , HasCLMUL(false) 255 , HasFMA3(false) 256 , HasFMA4(false) 257 , IsBTMemSlow(false) 258 , IsUAMemFast(false) 259 , HasVectorUAMem(false) 260 , HasCmpxchg16b(false) 261 , stackAlignment(8) 262 // FIXME: this is a known good value for Yonah. How about others? 263 , MaxInlineSizeThreshold(128) 264 , TargetTriple(TT) 265 , In64BitMode(is64Bit) 266 , InNaClMode(false) { 267 // Determine default and user specified characteristics 268 if (!FS.empty() || !CPU.empty()) { 269 std::string CPUName = CPU; 270 if (CPUName.empty()) { 271 #if defined (__x86_64__) || defined(__i386__) 272 CPUName = sys::getHostCPUName(); 273 #else 274 CPUName = "generic"; 275 #endif 276 } 277 278 // Make sure 64-bit features are available in 64-bit mode. (But make sure 279 // SSE2 can be turned off explicitly.) 280 std::string FullFS = FS; 281 if (In64BitMode) { 282 if (!FullFS.empty()) 283 FullFS = "+64bit,+sse2," + FullFS; 284 else 285 FullFS = "+64bit,+sse2"; 286 } 287 288 // If feature string is not empty, parse features string. 289 ParseSubtargetFeatures(CPUName, FullFS); 290 } else { 291 // Otherwise, use CPUID to auto-detect feature set. 292 AutoDetectSubtargetFeatures(); 293 294 // Make sure 64-bit features are available in 64-bit mode. 295 if (In64BitMode) { 296 HasX86_64 = true; ToggleFeature(X86::Feature64Bit); 297 HasCMov = true; ToggleFeature(X86::FeatureCMOV); 298 299 if (!HasAVX && X86SSELevel < SSE2) { 300 X86SSELevel = SSE2; 301 ToggleFeature(X86::FeatureSSE1); 302 ToggleFeature(X86::FeatureSSE2); 303 } 304 } 305 } 306 307 // It's important to keep the MCSubtargetInfo feature bits in sync with 308 // target data structure which is shared with MC code emitter, etc. 309 if (In64BitMode) 310 ToggleFeature(X86::Mode64Bit); 311 312 if (isTargetNaCl()) { 313 InNaClMode = true; 314 ToggleFeature(X86::ModeNaCl); 315 } 316 317 if (HasAVX) 318 X86SSELevel = NoMMXSSE; 319 320 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel 321 << ", 3DNowLevel " << X863DNowLevel 322 << ", 64bit " << HasX86_64 << "\n"); 323 assert((!In64BitMode || HasX86_64) && 324 "64-bit code requested on a subtarget that doesn't support it!"); 325 326 if(EnableSegmentedStacks && !isTargetELF()) 327 report_fatal_error("Segmented stacks are only implemented on ELF."); 328 329 // Stack alignment is 16 bytes on Darwin, FreeBSD, Linux and Solaris (both 330 // 32 and 64 bit) and for all 64-bit targets. 331 if (StackAlignOverride) 332 stackAlignment = StackAlignOverride; 333 else if (isTargetDarwin() || isTargetFreeBSD() || isTargetLinux() || 334 isTargetSolaris() || In64BitMode) 335 stackAlignment = 16; 336 } 337