1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This defines functionality used to emit comments about X86 instructions to
10 // an output stream for -fverbose-asm.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86InstComments.h"
15 #include "X86ATTInstPrinter.h"
16 #include "X86BaseInfo.h"
17 #include "X86MCTargetDesc.h"
18 #include "Utils/X86ShuffleDecode.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCInstrInfo.h"
21 #include "llvm/Support/raw_ostream.h"
22 
23 using namespace llvm;
24 
25 #define CASE_SSE_INS_COMMON(Inst, src)            \
26   case X86::Inst##src:
27 
28 #define CASE_AVX_INS_COMMON(Inst, Suffix, src)    \
29   case X86::V##Inst##Suffix##src:
30 
31 #define CASE_MASK_INS_COMMON(Inst, Suffix, src)   \
32   case X86::V##Inst##Suffix##src##k:
33 
34 #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src)  \
35   case X86::V##Inst##Suffix##src##kz:
36 
37 #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \
38   CASE_AVX_INS_COMMON(Inst, Suffix, src)          \
39   CASE_MASK_INS_COMMON(Inst, Suffix, src)         \
40   CASE_MASKZ_INS_COMMON(Inst, Suffix, src)
41 
42 #define CASE_MOVDUP(Inst, src)                    \
43   CASE_AVX512_INS_COMMON(Inst, Z, r##src)         \
44   CASE_AVX512_INS_COMMON(Inst, Z256, r##src)      \
45   CASE_AVX512_INS_COMMON(Inst, Z128, r##src)      \
46   CASE_AVX_INS_COMMON(Inst, , r##src)             \
47   CASE_AVX_INS_COMMON(Inst, Y, r##src)            \
48   CASE_SSE_INS_COMMON(Inst, r##src)
49 
50 #define CASE_MASK_MOVDUP(Inst, src)               \
51   CASE_MASK_INS_COMMON(Inst, Z, r##src)           \
52   CASE_MASK_INS_COMMON(Inst, Z256, r##src)        \
53   CASE_MASK_INS_COMMON(Inst, Z128, r##src)
54 
55 #define CASE_MASKZ_MOVDUP(Inst, src)              \
56   CASE_MASKZ_INS_COMMON(Inst, Z, r##src)          \
57   CASE_MASKZ_INS_COMMON(Inst, Z256, r##src)       \
58   CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)
59 
60 #define CASE_PMOVZX(Inst, src)                    \
61   CASE_AVX512_INS_COMMON(Inst, Z, r##src)         \
62   CASE_AVX512_INS_COMMON(Inst, Z256, r##src)      \
63   CASE_AVX512_INS_COMMON(Inst, Z128, r##src)      \
64   CASE_AVX_INS_COMMON(Inst, , r##src)             \
65   CASE_AVX_INS_COMMON(Inst, Y, r##src)            \
66   CASE_SSE_INS_COMMON(Inst, r##src)
67 
68 #define CASE_MASK_PMOVZX(Inst, src)               \
69   CASE_MASK_INS_COMMON(Inst, Z, r##src)           \
70   CASE_MASK_INS_COMMON(Inst, Z256, r##src)        \
71   CASE_MASK_INS_COMMON(Inst, Z128, r##src)
72 
73 #define CASE_MASKZ_PMOVZX(Inst, src)              \
74   CASE_MASKZ_INS_COMMON(Inst, Z, r##src)          \
75   CASE_MASKZ_INS_COMMON(Inst, Z256, r##src)       \
76   CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)
77 
78 #define CASE_UNPCK(Inst, src)                     \
79   CASE_AVX512_INS_COMMON(Inst, Z, r##src)         \
80   CASE_AVX512_INS_COMMON(Inst, Z256, r##src)      \
81   CASE_AVX512_INS_COMMON(Inst, Z128, r##src)      \
82   CASE_AVX_INS_COMMON(Inst, , r##src)             \
83   CASE_AVX_INS_COMMON(Inst, Y, r##src)            \
84   CASE_SSE_INS_COMMON(Inst, r##src)
85 
86 #define CASE_MASK_UNPCK(Inst, src)                \
87   CASE_MASK_INS_COMMON(Inst, Z, r##src)           \
88   CASE_MASK_INS_COMMON(Inst, Z256, r##src)        \
89   CASE_MASK_INS_COMMON(Inst, Z128, r##src)
90 
91 #define CASE_MASKZ_UNPCK(Inst, src)               \
92   CASE_MASKZ_INS_COMMON(Inst, Z, r##src)          \
93   CASE_MASKZ_INS_COMMON(Inst, Z256, r##src)       \
94   CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)
95 
96 #define CASE_SHUF(Inst, suf)                      \
97   CASE_AVX512_INS_COMMON(Inst, Z, suf)            \
98   CASE_AVX512_INS_COMMON(Inst, Z256, suf)         \
99   CASE_AVX512_INS_COMMON(Inst, Z128, suf)         \
100   CASE_AVX_INS_COMMON(Inst, , suf)                \
101   CASE_AVX_INS_COMMON(Inst, Y, suf)               \
102   CASE_SSE_INS_COMMON(Inst, suf)
103 
104 #define CASE_MASK_SHUF(Inst, src)                 \
105   CASE_MASK_INS_COMMON(Inst, Z, r##src##i)        \
106   CASE_MASK_INS_COMMON(Inst, Z256, r##src##i)     \
107   CASE_MASK_INS_COMMON(Inst, Z128, r##src##i)
108 
109 #define CASE_MASKZ_SHUF(Inst, src)                \
110   CASE_MASKZ_INS_COMMON(Inst, Z, r##src##i)       \
111   CASE_MASKZ_INS_COMMON(Inst, Z256, r##src##i)    \
112   CASE_MASKZ_INS_COMMON(Inst, Z128, r##src##i)
113 
114 #define CASE_VPERMILPI(Inst, src)                 \
115   CASE_AVX512_INS_COMMON(Inst, Z, src##i)         \
116   CASE_AVX512_INS_COMMON(Inst, Z256, src##i)      \
117   CASE_AVX512_INS_COMMON(Inst, Z128, src##i)      \
118   CASE_AVX_INS_COMMON(Inst, , src##i)             \
119   CASE_AVX_INS_COMMON(Inst, Y, src##i)
120 
121 #define CASE_MASK_VPERMILPI(Inst, src)            \
122   CASE_MASK_INS_COMMON(Inst, Z, src##i)           \
123   CASE_MASK_INS_COMMON(Inst, Z256, src##i)        \
124   CASE_MASK_INS_COMMON(Inst, Z128, src##i)
125 
126 #define CASE_MASKZ_VPERMILPI(Inst, src)           \
127   CASE_MASKZ_INS_COMMON(Inst, Z, src##i)          \
128   CASE_MASKZ_INS_COMMON(Inst, Z256, src##i)       \
129   CASE_MASKZ_INS_COMMON(Inst, Z128, src##i)
130 
131 #define CASE_VPERM(Inst, src)                     \
132   CASE_AVX512_INS_COMMON(Inst, Z, src##i)         \
133   CASE_AVX512_INS_COMMON(Inst, Z256, src##i)      \
134   CASE_AVX_INS_COMMON(Inst, Y, src##i)
135 
136 #define CASE_MASK_VPERM(Inst, src)                \
137   CASE_MASK_INS_COMMON(Inst, Z, src##i)           \
138   CASE_MASK_INS_COMMON(Inst, Z256, src##i)
139 
140 #define CASE_MASKZ_VPERM(Inst, src)               \
141   CASE_MASKZ_INS_COMMON(Inst, Z, src##i)          \
142   CASE_MASKZ_INS_COMMON(Inst, Z256, src##i)
143 
144 #define CASE_VSHUF(Inst, src)                          \
145   CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i)    \
146   CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i)    \
147   CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
148   CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
149 
150 #define CASE_MASK_VSHUF(Inst, src)                    \
151   CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i)     \
152   CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i)     \
153   CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i)  \
154   CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
155 
156 #define CASE_MASKZ_VSHUF(Inst, src)                   \
157   CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z, r##src##i)    \
158   CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z, r##src##i)    \
159   CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
160   CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
161 
162 #define CASE_AVX512_FMA(Inst, suf)                \
163   CASE_AVX512_INS_COMMON(Inst, Z, suf)            \
164   CASE_AVX512_INS_COMMON(Inst, Z256, suf)         \
165   CASE_AVX512_INS_COMMON(Inst, Z128, suf)
166 
167 #define CASE_FMA(Inst, suf)                       \
168   CASE_AVX512_FMA(Inst, suf)                      \
169   CASE_AVX_INS_COMMON(Inst, , suf)                \
170   CASE_AVX_INS_COMMON(Inst, Y, suf)
171 
172 #define CASE_FMA_PACKED_REG(Inst)                 \
173   CASE_FMA(Inst##PD, r)                           \
174   CASE_FMA(Inst##PS, r)
175 
176 #define CASE_FMA_PACKED_MEM(Inst)                 \
177   CASE_FMA(Inst##PD, m)                           \
178   CASE_FMA(Inst##PS, m)                           \
179   CASE_AVX512_FMA(Inst##PD, mb)                   \
180   CASE_AVX512_FMA(Inst##PS, mb)
181 
182 #define CASE_FMA_SCALAR_REG(Inst)                 \
183   CASE_AVX_INS_COMMON(Inst##SD, , r)              \
184   CASE_AVX_INS_COMMON(Inst##SS, , r)              \
185   CASE_AVX_INS_COMMON(Inst##SD, , r_Int)          \
186   CASE_AVX_INS_COMMON(Inst##SS, , r_Int)          \
187   CASE_AVX_INS_COMMON(Inst##SD, Z, r)             \
188   CASE_AVX_INS_COMMON(Inst##SS, Z, r)             \
189   CASE_AVX512_INS_COMMON(Inst##SD, Z, r_Int)      \
190   CASE_AVX512_INS_COMMON(Inst##SS, Z, r_Int)
191 
192 #define CASE_FMA_SCALAR_MEM(Inst)                 \
193   CASE_AVX_INS_COMMON(Inst##SD, , m)              \
194   CASE_AVX_INS_COMMON(Inst##SS, , m)              \
195   CASE_AVX_INS_COMMON(Inst##SD, , m_Int)          \
196   CASE_AVX_INS_COMMON(Inst##SS, , m_Int)          \
197   CASE_AVX_INS_COMMON(Inst##SD, Z, m)             \
198   CASE_AVX_INS_COMMON(Inst##SS, Z, m)             \
199   CASE_AVX512_INS_COMMON(Inst##SD, Z, m_Int)      \
200   CASE_AVX512_INS_COMMON(Inst##SS, Z, m_Int)
201 
202 #define CASE_FMA4(Inst, suf)                      \
203   CASE_AVX_INS_COMMON(Inst, 4, suf)               \
204   CASE_AVX_INS_COMMON(Inst, 4Y, suf)
205 
206 #define CASE_FMA4_PACKED_RR(Inst)                 \
207   CASE_FMA4(Inst##PD, rr)                         \
208   CASE_FMA4(Inst##PS, rr)
209 
210 #define CASE_FMA4_PACKED_RM(Inst)                 \
211   CASE_FMA4(Inst##PD, rm)                         \
212   CASE_FMA4(Inst##PS, rm)
213 
214 #define CASE_FMA4_PACKED_MR(Inst)                 \
215   CASE_FMA4(Inst##PD, mr)                         \
216   CASE_FMA4(Inst##PS, mr)
217 
218 #define CASE_FMA4_SCALAR_RR(Inst)                 \
219   CASE_AVX_INS_COMMON(Inst##SD4, , rr)            \
220   CASE_AVX_INS_COMMON(Inst##SS4, , rr)            \
221   CASE_AVX_INS_COMMON(Inst##SD4, , rr_Int)        \
222   CASE_AVX_INS_COMMON(Inst##SS4, , rr_Int)
223 
224 #define CASE_FMA4_SCALAR_RM(Inst)                 \
225   CASE_AVX_INS_COMMON(Inst##SD4, , rm)            \
226   CASE_AVX_INS_COMMON(Inst##SS4, , rm)            \
227   CASE_AVX_INS_COMMON(Inst##SD4, , rm_Int)        \
228   CASE_AVX_INS_COMMON(Inst##SS4, , rm_Int)
229 
230 #define CASE_FMA4_SCALAR_MR(Inst)                 \
231   CASE_AVX_INS_COMMON(Inst##SD4, , mr)            \
232   CASE_AVX_INS_COMMON(Inst##SS4, , mr)            \
233   CASE_AVX_INS_COMMON(Inst##SD4, , mr_Int)        \
234   CASE_AVX_INS_COMMON(Inst##SS4, , mr_Int)
235 
236 static unsigned getVectorRegSize(unsigned RegNo) {
237   if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31)
238     return 512;
239   if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31)
240     return 256;
241   if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31)
242     return 128;
243   if (X86::MM0 <= RegNo && RegNo <= X86::MM7)
244     return 64;
245 
246   llvm_unreachable("Unknown vector reg!");
247 }
248 
249 static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize,
250                                      unsigned OperandIndex) {
251   unsigned OpReg = MI->getOperand(OperandIndex).getReg();
252   return getVectorRegSize(OpReg) / ScalarSize;
253 }
254 
255 static const char *getRegName(unsigned Reg) {
256   return X86ATTInstPrinter::getRegisterName(Reg);
257 }
258 
259 /// Wraps the destination register name with AVX512 mask/maskz filtering.
260 static void printMasking(raw_ostream &OS, const MCInst *MI,
261                          const MCInstrInfo &MCII) {
262   const MCInstrDesc &Desc = MCII.get(MI->getOpcode());
263   uint64_t TSFlags = Desc.TSFlags;
264 
265   if (!(TSFlags & X86II::EVEX_K))
266     return;
267 
268   bool MaskWithZero = (TSFlags & X86II::EVEX_Z);
269   unsigned MaskOp = Desc.getNumDefs();
270 
271   if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1)
272     ++MaskOp;
273 
274   const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg());
275 
276   // MASK: zmmX {%kY}
277   OS << " {%" << MaskRegName << "}";
278 
279   // MASKZ: zmmX {%kY} {z}
280   if (MaskWithZero)
281     OS << " {z}";
282 }
283 
284 static bool printFMAComments(const MCInst *MI, raw_ostream &OS) {
285   const char *Mul1Name = nullptr, *Mul2Name = nullptr, *AccName = nullptr;
286   unsigned NumOperands = MI->getNumOperands();
287   bool RegForm = false;
288   bool Negate = false;
289   StringRef AccStr = "+";
290 
291   // The operands for FMA3 instructions without rounding fall into two forms:
292   //  dest, src1, src2, src3
293   //  dest, src1, mask, src2, src3
294   // Where src3 is either a register or 5 memory address operands. So to find
295   // dest and src1 we can index from the front. To find src2 and src3 we can
296   // index from the end by taking into account memory vs register form when
297   // finding src2.
298 
299   // The operands for FMA4 instructions:
300   //  dest, src1, src2, src3
301   // Where src2 OR src3 are either a register or 5 memory address operands. So
302   // to find dest and src1 we can index from the front, src2 (reg/mem) follows
303   // and then src3 (reg) will be at the end.
304 
305   switch (MI->getOpcode()) {
306   default:
307     return false;
308 
309   CASE_FMA4_PACKED_RR(FMADD)
310   CASE_FMA4_SCALAR_RR(FMADD)
311     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
312     LLVM_FALLTHROUGH;
313   CASE_FMA4_PACKED_RM(FMADD)
314   CASE_FMA4_SCALAR_RM(FMADD)
315     Mul2Name = getRegName(MI->getOperand(2).getReg());
316     Mul1Name = getRegName(MI->getOperand(1).getReg());
317     break;
318   CASE_FMA4_PACKED_MR(FMADD)
319   CASE_FMA4_SCALAR_MR(FMADD)
320     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
321     Mul1Name = getRegName(MI->getOperand(1).getReg());
322     break;
323 
324   CASE_FMA4_PACKED_RR(FMSUB)
325   CASE_FMA4_SCALAR_RR(FMSUB)
326     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
327     LLVM_FALLTHROUGH;
328   CASE_FMA4_PACKED_RM(FMSUB)
329   CASE_FMA4_SCALAR_RM(FMSUB)
330     Mul2Name = getRegName(MI->getOperand(2).getReg());
331     Mul1Name = getRegName(MI->getOperand(1).getReg());
332     AccStr = "-";
333     break;
334   CASE_FMA4_PACKED_MR(FMSUB)
335   CASE_FMA4_SCALAR_MR(FMSUB)
336     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
337     Mul1Name = getRegName(MI->getOperand(1).getReg());
338     AccStr = "-";
339     break;
340 
341   CASE_FMA4_PACKED_RR(FNMADD)
342   CASE_FMA4_SCALAR_RR(FNMADD)
343     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
344     LLVM_FALLTHROUGH;
345   CASE_FMA4_PACKED_RM(FNMADD)
346   CASE_FMA4_SCALAR_RM(FNMADD)
347     Mul2Name = getRegName(MI->getOperand(2).getReg());
348     Mul1Name = getRegName(MI->getOperand(1).getReg());
349     Negate = true;
350     break;
351   CASE_FMA4_PACKED_MR(FNMADD)
352   CASE_FMA4_SCALAR_MR(FNMADD)
353     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
354     Mul1Name = getRegName(MI->getOperand(1).getReg());
355     Negate = true;
356     break;
357 
358   CASE_FMA4_PACKED_RR(FNMSUB)
359   CASE_FMA4_SCALAR_RR(FNMSUB)
360     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
361     LLVM_FALLTHROUGH;
362   CASE_FMA4_PACKED_RM(FNMSUB)
363   CASE_FMA4_SCALAR_RM(FNMSUB)
364     Mul2Name = getRegName(MI->getOperand(2).getReg());
365     Mul1Name = getRegName(MI->getOperand(1).getReg());
366     AccStr = "-";
367     Negate = true;
368     break;
369   CASE_FMA4_PACKED_MR(FNMSUB)
370   CASE_FMA4_SCALAR_MR(FNMSUB)
371     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
372     Mul1Name = getRegName(MI->getOperand(1).getReg());
373     AccStr = "-";
374     Negate = true;
375     break;
376 
377   CASE_FMA4_PACKED_RR(FMADDSUB)
378     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
379     LLVM_FALLTHROUGH;
380   CASE_FMA4_PACKED_RM(FMADDSUB)
381     Mul2Name = getRegName(MI->getOperand(2).getReg());
382     Mul1Name = getRegName(MI->getOperand(1).getReg());
383     AccStr = "+/-";
384     break;
385   CASE_FMA4_PACKED_MR(FMADDSUB)
386     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
387     Mul1Name = getRegName(MI->getOperand(1).getReg());
388     AccStr = "+/-";
389     break;
390 
391   CASE_FMA4_PACKED_RR(FMSUBADD)
392     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
393     LLVM_FALLTHROUGH;
394   CASE_FMA4_PACKED_RM(FMSUBADD)
395     Mul2Name = getRegName(MI->getOperand(2).getReg());
396     Mul1Name = getRegName(MI->getOperand(1).getReg());
397     AccStr = "-/+";
398     break;
399   CASE_FMA4_PACKED_MR(FMSUBADD)
400     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
401     Mul1Name = getRegName(MI->getOperand(1).getReg());
402     AccStr = "-/+";
403     break;
404 
405   CASE_FMA_PACKED_REG(FMADD132)
406   CASE_FMA_SCALAR_REG(FMADD132)
407     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
408     RegForm = true;
409     LLVM_FALLTHROUGH;
410   CASE_FMA_PACKED_MEM(FMADD132)
411   CASE_FMA_SCALAR_MEM(FMADD132)
412     AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
413     Mul1Name = getRegName(MI->getOperand(1).getReg());
414     break;
415 
416   CASE_FMA_PACKED_REG(FMADD213)
417   CASE_FMA_SCALAR_REG(FMADD213)
418     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
419     RegForm = true;
420     LLVM_FALLTHROUGH;
421   CASE_FMA_PACKED_MEM(FMADD213)
422   CASE_FMA_SCALAR_MEM(FMADD213)
423     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
424     Mul2Name = getRegName(MI->getOperand(1).getReg());
425     break;
426 
427   CASE_FMA_PACKED_REG(FMADD231)
428   CASE_FMA_SCALAR_REG(FMADD231)
429     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
430     RegForm = true;
431     LLVM_FALLTHROUGH;
432   CASE_FMA_PACKED_MEM(FMADD231)
433   CASE_FMA_SCALAR_MEM(FMADD231)
434     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
435     AccName = getRegName(MI->getOperand(1).getReg());
436     break;
437 
438   CASE_FMA_PACKED_REG(FMSUB132)
439   CASE_FMA_SCALAR_REG(FMSUB132)
440     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
441     RegForm = true;
442     LLVM_FALLTHROUGH;
443   CASE_FMA_PACKED_MEM(FMSUB132)
444   CASE_FMA_SCALAR_MEM(FMSUB132)
445     AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
446     Mul1Name = getRegName(MI->getOperand(1).getReg());
447     AccStr = "-";
448     break;
449 
450   CASE_FMA_PACKED_REG(FMSUB213)
451   CASE_FMA_SCALAR_REG(FMSUB213)
452     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
453     RegForm = true;
454     LLVM_FALLTHROUGH;
455   CASE_FMA_PACKED_MEM(FMSUB213)
456   CASE_FMA_SCALAR_MEM(FMSUB213)
457     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
458     Mul2Name = getRegName(MI->getOperand(1).getReg());
459     AccStr = "-";
460     break;
461 
462   CASE_FMA_PACKED_REG(FMSUB231)
463   CASE_FMA_SCALAR_REG(FMSUB231)
464     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
465     RegForm = true;
466     LLVM_FALLTHROUGH;
467   CASE_FMA_PACKED_MEM(FMSUB231)
468   CASE_FMA_SCALAR_MEM(FMSUB231)
469     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
470     AccName = getRegName(MI->getOperand(1).getReg());
471     AccStr = "-";
472     break;
473 
474   CASE_FMA_PACKED_REG(FNMADD132)
475   CASE_FMA_SCALAR_REG(FNMADD132)
476     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
477     RegForm = true;
478     LLVM_FALLTHROUGH;
479   CASE_FMA_PACKED_MEM(FNMADD132)
480   CASE_FMA_SCALAR_MEM(FNMADD132)
481     AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
482     Mul1Name = getRegName(MI->getOperand(1).getReg());
483     Negate = true;
484     break;
485 
486   CASE_FMA_PACKED_REG(FNMADD213)
487   CASE_FMA_SCALAR_REG(FNMADD213)
488     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
489     RegForm = true;
490     LLVM_FALLTHROUGH;
491   CASE_FMA_PACKED_MEM(FNMADD213)
492   CASE_FMA_SCALAR_MEM(FNMADD213)
493     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
494     Mul2Name = getRegName(MI->getOperand(1).getReg());
495     Negate = true;
496     break;
497 
498   CASE_FMA_PACKED_REG(FNMADD231)
499   CASE_FMA_SCALAR_REG(FNMADD231)
500     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
501     RegForm = true;
502     LLVM_FALLTHROUGH;
503   CASE_FMA_PACKED_MEM(FNMADD231)
504   CASE_FMA_SCALAR_MEM(FNMADD231)
505     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
506     AccName = getRegName(MI->getOperand(1).getReg());
507     Negate = true;
508     break;
509 
510   CASE_FMA_PACKED_REG(FNMSUB132)
511   CASE_FMA_SCALAR_REG(FNMSUB132)
512     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
513     RegForm = true;
514     LLVM_FALLTHROUGH;
515   CASE_FMA_PACKED_MEM(FNMSUB132)
516   CASE_FMA_SCALAR_MEM(FNMSUB132)
517     AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
518     Mul1Name = getRegName(MI->getOperand(1).getReg());
519     AccStr = "-";
520     Negate = true;
521     break;
522 
523   CASE_FMA_PACKED_REG(FNMSUB213)
524   CASE_FMA_SCALAR_REG(FNMSUB213)
525     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
526     RegForm = true;
527     LLVM_FALLTHROUGH;
528   CASE_FMA_PACKED_MEM(FNMSUB213)
529   CASE_FMA_SCALAR_MEM(FNMSUB213)
530     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
531     Mul2Name = getRegName(MI->getOperand(1).getReg());
532     AccStr = "-";
533     Negate = true;
534     break;
535 
536   CASE_FMA_PACKED_REG(FNMSUB231)
537   CASE_FMA_SCALAR_REG(FNMSUB231)
538     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
539     RegForm = true;
540     LLVM_FALLTHROUGH;
541   CASE_FMA_PACKED_MEM(FNMSUB231)
542   CASE_FMA_SCALAR_MEM(FNMSUB231)
543     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
544     AccName = getRegName(MI->getOperand(1).getReg());
545     AccStr = "-";
546     Negate = true;
547     break;
548 
549   CASE_FMA_PACKED_REG(FMADDSUB132)
550     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
551     RegForm = true;
552     LLVM_FALLTHROUGH;
553   CASE_FMA_PACKED_MEM(FMADDSUB132)
554     AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
555     Mul1Name = getRegName(MI->getOperand(1).getReg());
556     AccStr = "+/-";
557     break;
558 
559   CASE_FMA_PACKED_REG(FMADDSUB213)
560     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
561     RegForm = true;
562     LLVM_FALLTHROUGH;
563   CASE_FMA_PACKED_MEM(FMADDSUB213)
564     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
565     Mul2Name = getRegName(MI->getOperand(1).getReg());
566     AccStr = "+/-";
567     break;
568 
569   CASE_FMA_PACKED_REG(FMADDSUB231)
570     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
571     RegForm = true;
572     LLVM_FALLTHROUGH;
573   CASE_FMA_PACKED_MEM(FMADDSUB231)
574     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
575     AccName = getRegName(MI->getOperand(1).getReg());
576     AccStr = "+/-";
577     break;
578 
579   CASE_FMA_PACKED_REG(FMSUBADD132)
580     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
581     RegForm = true;
582     LLVM_FALLTHROUGH;
583   CASE_FMA_PACKED_MEM(FMSUBADD132)
584     AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
585     Mul1Name = getRegName(MI->getOperand(1).getReg());
586     AccStr = "-/+";
587     break;
588 
589   CASE_FMA_PACKED_REG(FMSUBADD213)
590     AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
591     RegForm = true;
592     LLVM_FALLTHROUGH;
593   CASE_FMA_PACKED_MEM(FMSUBADD213)
594     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
595     Mul2Name = getRegName(MI->getOperand(1).getReg());
596     AccStr = "-/+";
597     break;
598 
599   CASE_FMA_PACKED_REG(FMSUBADD231)
600     Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
601     RegForm = true;
602     LLVM_FALLTHROUGH;
603   CASE_FMA_PACKED_MEM(FMSUBADD231)
604     Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
605     AccName = getRegName(MI->getOperand(1).getReg());
606     AccStr = "-/+";
607     break;
608   }
609 
610   const char *DestName = getRegName(MI->getOperand(0).getReg());
611 
612   if (!Mul1Name) Mul1Name = "mem";
613   if (!Mul2Name) Mul2Name = "mem";
614   if (!AccName)  AccName = "mem";
615 
616   OS << DestName << " = ";
617   // TODO: Print masking information?
618 
619   if (Negate)
620     OS << '-';
621 
622   OS << '(' << Mul1Name << " * " << Mul2Name << ") " << AccStr << ' '
623      << AccName;
624 
625   return true;
626 }
627 
628 
629 //===----------------------------------------------------------------------===//
630 // Top Level Entrypoint
631 //===----------------------------------------------------------------------===//
632 
633 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
634 /// newline terminated strings to the specified string if desired.  This
635 /// information is shown in disassembly dumps when verbose assembly is enabled.
636 bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
637                                   const MCInstrInfo &MCII) {
638   // If this is a shuffle operation, the switch should fill in this state.
639   SmallVector<int, 8> ShuffleMask;
640   const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
641   unsigned NumOperands = MI->getNumOperands();
642   bool RegForm = false;
643 
644   if (printFMAComments(MI, OS))
645     return true;
646 
647   switch (MI->getOpcode()) {
648   default:
649     // Not an instruction for which we can decode comments.
650     return false;
651 
652   case X86::BLENDPDrri:
653   case X86::VBLENDPDrri:
654   case X86::VBLENDPDYrri:
655     Src2Name = getRegName(MI->getOperand(2).getReg());
656     LLVM_FALLTHROUGH;
657   case X86::BLENDPDrmi:
658   case X86::VBLENDPDrmi:
659   case X86::VBLENDPDYrmi:
660     if (MI->getOperand(NumOperands - 1).isImm())
661       DecodeBLENDMask(getRegOperandNumElts(MI, 64, 0),
662                       MI->getOperand(NumOperands - 1).getImm(),
663                       ShuffleMask);
664     Src1Name = getRegName(MI->getOperand(1).getReg());
665     DestName = getRegName(MI->getOperand(0).getReg());
666     break;
667 
668   case X86::BLENDPSrri:
669   case X86::VBLENDPSrri:
670   case X86::VBLENDPSYrri:
671     Src2Name = getRegName(MI->getOperand(2).getReg());
672     LLVM_FALLTHROUGH;
673   case X86::BLENDPSrmi:
674   case X86::VBLENDPSrmi:
675   case X86::VBLENDPSYrmi:
676     if (MI->getOperand(NumOperands - 1).isImm())
677       DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0),
678                       MI->getOperand(NumOperands - 1).getImm(),
679                       ShuffleMask);
680     Src1Name = getRegName(MI->getOperand(1).getReg());
681     DestName = getRegName(MI->getOperand(0).getReg());
682     break;
683 
684   case X86::PBLENDWrri:
685   case X86::VPBLENDWrri:
686   case X86::VPBLENDWYrri:
687     Src2Name = getRegName(MI->getOperand(2).getReg());
688     LLVM_FALLTHROUGH;
689   case X86::PBLENDWrmi:
690   case X86::VPBLENDWrmi:
691   case X86::VPBLENDWYrmi:
692     if (MI->getOperand(NumOperands - 1).isImm())
693       DecodeBLENDMask(getRegOperandNumElts(MI, 16, 0),
694                       MI->getOperand(NumOperands - 1).getImm(),
695                       ShuffleMask);
696     Src1Name = getRegName(MI->getOperand(1).getReg());
697     DestName = getRegName(MI->getOperand(0).getReg());
698     break;
699 
700   case X86::VPBLENDDrri:
701   case X86::VPBLENDDYrri:
702     Src2Name = getRegName(MI->getOperand(2).getReg());
703     LLVM_FALLTHROUGH;
704   case X86::VPBLENDDrmi:
705   case X86::VPBLENDDYrmi:
706     if (MI->getOperand(NumOperands - 1).isImm())
707       DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0),
708                       MI->getOperand(NumOperands - 1).getImm(),
709                       ShuffleMask);
710     Src1Name = getRegName(MI->getOperand(1).getReg());
711     DestName = getRegName(MI->getOperand(0).getReg());
712     break;
713 
714   case X86::INSERTPSrr:
715   case X86::VINSERTPSrr:
716   case X86::VINSERTPSZrr:
717     Src2Name = getRegName(MI->getOperand(2).getReg());
718     LLVM_FALLTHROUGH;
719   case X86::INSERTPSrm:
720   case X86::VINSERTPSrm:
721   case X86::VINSERTPSZrm:
722     DestName = getRegName(MI->getOperand(0).getReg());
723     Src1Name = getRegName(MI->getOperand(1).getReg());
724     if (MI->getOperand(NumOperands - 1).isImm())
725       DecodeINSERTPSMask(MI->getOperand(NumOperands - 1).getImm(),
726                          ShuffleMask);
727     break;
728 
729   case X86::MOVLHPSrr:
730   case X86::VMOVLHPSrr:
731   case X86::VMOVLHPSZrr:
732     Src2Name = getRegName(MI->getOperand(2).getReg());
733     Src1Name = getRegName(MI->getOperand(1).getReg());
734     DestName = getRegName(MI->getOperand(0).getReg());
735     DecodeMOVLHPSMask(2, ShuffleMask);
736     break;
737 
738   case X86::MOVHLPSrr:
739   case X86::VMOVHLPSrr:
740   case X86::VMOVHLPSZrr:
741     Src2Name = getRegName(MI->getOperand(2).getReg());
742     Src1Name = getRegName(MI->getOperand(1).getReg());
743     DestName = getRegName(MI->getOperand(0).getReg());
744     DecodeMOVHLPSMask(2, ShuffleMask);
745     break;
746 
747   case X86::MOVHPDrm:
748   case X86::VMOVHPDrm:
749   case X86::VMOVHPDZ128rm:
750     Src1Name = getRegName(MI->getOperand(1).getReg());
751     DestName = getRegName(MI->getOperand(0).getReg());
752     DecodeInsertElementMask(2, 1, 1, ShuffleMask);
753     break;
754 
755   case X86::MOVHPSrm:
756   case X86::VMOVHPSrm:
757   case X86::VMOVHPSZ128rm:
758     Src1Name = getRegName(MI->getOperand(1).getReg());
759     DestName = getRegName(MI->getOperand(0).getReg());
760     DecodeInsertElementMask(4, 2, 2, ShuffleMask);
761     break;
762 
763   case X86::MOVLPDrm:
764   case X86::VMOVLPDrm:
765   case X86::VMOVLPDZ128rm:
766     Src1Name = getRegName(MI->getOperand(1).getReg());
767     DestName = getRegName(MI->getOperand(0).getReg());
768     DecodeInsertElementMask(2, 0, 1, ShuffleMask);
769     break;
770 
771   case X86::MOVLPSrm:
772   case X86::VMOVLPSrm:
773   case X86::VMOVLPSZ128rm:
774     Src1Name = getRegName(MI->getOperand(1).getReg());
775     DestName = getRegName(MI->getOperand(0).getReg());
776     DecodeInsertElementMask(4, 0, 2, ShuffleMask);
777     break;
778 
779   CASE_MOVDUP(MOVSLDUP, r)
780     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
781     LLVM_FALLTHROUGH;
782 
783   CASE_MOVDUP(MOVSLDUP, m)
784     DestName = getRegName(MI->getOperand(0).getReg());
785     DecodeMOVSLDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask);
786     break;
787 
788   CASE_MOVDUP(MOVSHDUP, r)
789     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
790     LLVM_FALLTHROUGH;
791 
792   CASE_MOVDUP(MOVSHDUP, m)
793     DestName = getRegName(MI->getOperand(0).getReg());
794     DecodeMOVSHDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask);
795     break;
796 
797   CASE_MOVDUP(MOVDDUP, r)
798     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
799     LLVM_FALLTHROUGH;
800 
801   CASE_MOVDUP(MOVDDUP, m)
802     DestName = getRegName(MI->getOperand(0).getReg());
803     DecodeMOVDDUPMask(getRegOperandNumElts(MI, 64, 0), ShuffleMask);
804     break;
805 
806   case X86::PSLLDQri:
807   case X86::VPSLLDQri:
808   case X86::VPSLLDQYri:
809   case X86::VPSLLDQZ128ri:
810   case X86::VPSLLDQZ256ri:
811   case X86::VPSLLDQZri:
812     Src1Name = getRegName(MI->getOperand(1).getReg());
813     LLVM_FALLTHROUGH;
814   case X86::VPSLLDQZ128mi:
815   case X86::VPSLLDQZ256mi:
816   case X86::VPSLLDQZmi:
817     DestName = getRegName(MI->getOperand(0).getReg());
818     if (MI->getOperand(NumOperands - 1).isImm())
819       DecodePSLLDQMask(getRegOperandNumElts(MI, 8, 0),
820                        MI->getOperand(NumOperands - 1).getImm(),
821                        ShuffleMask);
822     break;
823 
824   case X86::PSRLDQri:
825   case X86::VPSRLDQri:
826   case X86::VPSRLDQYri:
827   case X86::VPSRLDQZ128ri:
828   case X86::VPSRLDQZ256ri:
829   case X86::VPSRLDQZri:
830     Src1Name = getRegName(MI->getOperand(1).getReg());
831     LLVM_FALLTHROUGH;
832   case X86::VPSRLDQZ128mi:
833   case X86::VPSRLDQZ256mi:
834   case X86::VPSRLDQZmi:
835     DestName = getRegName(MI->getOperand(0).getReg());
836     if (MI->getOperand(NumOperands - 1).isImm())
837       DecodePSRLDQMask(getRegOperandNumElts(MI, 8, 0),
838                        MI->getOperand(NumOperands - 1).getImm(),
839                        ShuffleMask);
840     break;
841 
842   CASE_SHUF(PALIGNR, rri)
843     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
844     RegForm = true;
845     LLVM_FALLTHROUGH;
846 
847   CASE_SHUF(PALIGNR, rmi)
848     Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
849     DestName = getRegName(MI->getOperand(0).getReg());
850     if (MI->getOperand(NumOperands - 1).isImm())
851       DecodePALIGNRMask(getRegOperandNumElts(MI, 8, 0),
852                         MI->getOperand(NumOperands - 1).getImm(),
853                         ShuffleMask);
854     break;
855 
856   CASE_AVX512_INS_COMMON(ALIGNQ, Z, rri)
857   CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rri)
858   CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rri)
859     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
860     RegForm = true;
861     LLVM_FALLTHROUGH;
862 
863   CASE_AVX512_INS_COMMON(ALIGNQ, Z, rmi)
864   CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rmi)
865   CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rmi)
866     Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
867     DestName = getRegName(MI->getOperand(0).getReg());
868     if (MI->getOperand(NumOperands - 1).isImm())
869       DecodeVALIGNMask(getRegOperandNumElts(MI, 64, 0),
870                        MI->getOperand(NumOperands - 1).getImm(),
871                        ShuffleMask);
872     break;
873 
874   CASE_AVX512_INS_COMMON(ALIGND, Z, rri)
875   CASE_AVX512_INS_COMMON(ALIGND, Z256, rri)
876   CASE_AVX512_INS_COMMON(ALIGND, Z128, rri)
877     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
878     RegForm = true;
879     LLVM_FALLTHROUGH;
880 
881   CASE_AVX512_INS_COMMON(ALIGND, Z, rmi)
882   CASE_AVX512_INS_COMMON(ALIGND, Z256, rmi)
883   CASE_AVX512_INS_COMMON(ALIGND, Z128, rmi)
884     Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
885     DestName = getRegName(MI->getOperand(0).getReg());
886     if (MI->getOperand(NumOperands - 1).isImm())
887       DecodeVALIGNMask(getRegOperandNumElts(MI, 32, 0),
888                        MI->getOperand(NumOperands - 1).getImm(),
889                        ShuffleMask);
890     break;
891 
892   CASE_SHUF(PSHUFD, ri)
893     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
894     LLVM_FALLTHROUGH;
895 
896   CASE_SHUF(PSHUFD, mi)
897     DestName = getRegName(MI->getOperand(0).getReg());
898     if (MI->getOperand(NumOperands - 1).isImm())
899       DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32,
900                       MI->getOperand(NumOperands - 1).getImm(),
901                       ShuffleMask);
902     break;
903 
904   CASE_SHUF(PSHUFHW, ri)
905     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
906     LLVM_FALLTHROUGH;
907 
908   CASE_SHUF(PSHUFHW, mi)
909     DestName = getRegName(MI->getOperand(0).getReg());
910     if (MI->getOperand(NumOperands - 1).isImm())
911       DecodePSHUFHWMask(getRegOperandNumElts(MI, 16, 0),
912                         MI->getOperand(NumOperands - 1).getImm(),
913                         ShuffleMask);
914     break;
915 
916   CASE_SHUF(PSHUFLW, ri)
917     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
918     LLVM_FALLTHROUGH;
919 
920   CASE_SHUF(PSHUFLW, mi)
921     DestName = getRegName(MI->getOperand(0).getReg());
922     if (MI->getOperand(NumOperands - 1).isImm())
923       DecodePSHUFLWMask(getRegOperandNumElts(MI, 16, 0),
924                         MI->getOperand(NumOperands - 1).getImm(),
925                         ShuffleMask);
926     break;
927 
928   case X86::MMX_PSHUFWri:
929     Src1Name = getRegName(MI->getOperand(1).getReg());
930     LLVM_FALLTHROUGH;
931 
932   case X86::MMX_PSHUFWmi:
933     DestName = getRegName(MI->getOperand(0).getReg());
934     if (MI->getOperand(NumOperands - 1).isImm())
935       DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(),
936                       ShuffleMask);
937     break;
938 
939   case X86::PSWAPDrr:
940     Src1Name = getRegName(MI->getOperand(1).getReg());
941     LLVM_FALLTHROUGH;
942 
943   case X86::PSWAPDrm:
944     DestName = getRegName(MI->getOperand(0).getReg());
945     DecodePSWAPMask(2, ShuffleMask);
946     break;
947 
948   CASE_UNPCK(PUNPCKHBW, r)
949   case X86::MMX_PUNPCKHBWirr:
950     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
951     RegForm = true;
952     LLVM_FALLTHROUGH;
953 
954   CASE_UNPCK(PUNPCKHBW, m)
955   case X86::MMX_PUNPCKHBWirm:
956     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
957     DestName = getRegName(MI->getOperand(0).getReg());
958     DecodeUNPCKHMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask);
959     break;
960 
961   CASE_UNPCK(PUNPCKHWD, r)
962   case X86::MMX_PUNPCKHWDirr:
963     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
964     RegForm = true;
965     LLVM_FALLTHROUGH;
966 
967   CASE_UNPCK(PUNPCKHWD, m)
968   case X86::MMX_PUNPCKHWDirm:
969     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
970     DestName = getRegName(MI->getOperand(0).getReg());
971     DecodeUNPCKHMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask);
972     break;
973 
974   CASE_UNPCK(PUNPCKHDQ, r)
975   case X86::MMX_PUNPCKHDQirr:
976     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
977     RegForm = true;
978     LLVM_FALLTHROUGH;
979 
980   CASE_UNPCK(PUNPCKHDQ, m)
981   case X86::MMX_PUNPCKHDQirm:
982     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
983     DestName = getRegName(MI->getOperand(0).getReg());
984     DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
985     break;
986 
987   CASE_UNPCK(PUNPCKHQDQ, r)
988     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
989     RegForm = true;
990     LLVM_FALLTHROUGH;
991 
992   CASE_UNPCK(PUNPCKHQDQ, m)
993     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
994     DestName = getRegName(MI->getOperand(0).getReg());
995     DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
996     break;
997 
998   CASE_UNPCK(PUNPCKLBW, r)
999   case X86::MMX_PUNPCKLBWirr:
1000     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1001     RegForm = true;
1002     LLVM_FALLTHROUGH;
1003 
1004   CASE_UNPCK(PUNPCKLBW, m)
1005   case X86::MMX_PUNPCKLBWirm:
1006     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1007     DestName = getRegName(MI->getOperand(0).getReg());
1008     DecodeUNPCKLMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask);
1009     break;
1010 
1011   CASE_UNPCK(PUNPCKLWD, r)
1012   case X86::MMX_PUNPCKLWDirr:
1013     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1014     RegForm = true;
1015     LLVM_FALLTHROUGH;
1016 
1017   CASE_UNPCK(PUNPCKLWD, m)
1018   case X86::MMX_PUNPCKLWDirm:
1019     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1020     DestName = getRegName(MI->getOperand(0).getReg());
1021     DecodeUNPCKLMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask);
1022     break;
1023 
1024   CASE_UNPCK(PUNPCKLDQ, r)
1025   case X86::MMX_PUNPCKLDQirr:
1026     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1027     RegForm = true;
1028     LLVM_FALLTHROUGH;
1029 
1030   CASE_UNPCK(PUNPCKLDQ, m)
1031   case X86::MMX_PUNPCKLDQirm:
1032     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1033     DestName = getRegName(MI->getOperand(0).getReg());
1034     DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
1035     break;
1036 
1037   CASE_UNPCK(PUNPCKLQDQ, r)
1038     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1039     RegForm = true;
1040     LLVM_FALLTHROUGH;
1041 
1042   CASE_UNPCK(PUNPCKLQDQ, m)
1043     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1044     DestName = getRegName(MI->getOperand(0).getReg());
1045     DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
1046     break;
1047 
1048   CASE_SHUF(SHUFPD, rri)
1049     Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1050     RegForm = true;
1051     LLVM_FALLTHROUGH;
1052 
1053   CASE_SHUF(SHUFPD, rmi)
1054     if (MI->getOperand(NumOperands - 1).isImm())
1055       DecodeSHUFPMask(getRegOperandNumElts(MI, 64, 0), 64,
1056                       MI->getOperand(NumOperands - 1).getImm(), ShuffleMask);
1057     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
1058     DestName = getRegName(MI->getOperand(0).getReg());
1059     break;
1060 
1061   CASE_SHUF(SHUFPS, rri)
1062     Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1063     RegForm = true;
1064     LLVM_FALLTHROUGH;
1065 
1066   CASE_SHUF(SHUFPS, rmi)
1067     if (MI->getOperand(NumOperands - 1).isImm())
1068       DecodeSHUFPMask(getRegOperandNumElts(MI, 32, 0), 32,
1069                       MI->getOperand(NumOperands - 1).getImm(),
1070                       ShuffleMask);
1071     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
1072     DestName = getRegName(MI->getOperand(0).getReg());
1073     break;
1074 
1075   CASE_VSHUF(64X2, r)
1076     Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1077     RegForm = true;
1078     LLVM_FALLTHROUGH;
1079 
1080   CASE_VSHUF(64X2, m)
1081     decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 64, 0), 64,
1082                               MI->getOperand(NumOperands - 1).getImm(),
1083                               ShuffleMask);
1084     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
1085     DestName = getRegName(MI->getOperand(0).getReg());
1086     break;
1087 
1088   CASE_VSHUF(32X4, r)
1089     Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1090     RegForm = true;
1091     LLVM_FALLTHROUGH;
1092 
1093   CASE_VSHUF(32X4, m)
1094     decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 32, 0), 32,
1095                               MI->getOperand(NumOperands - 1).getImm(),
1096                               ShuffleMask);
1097     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg());
1098     DestName = getRegName(MI->getOperand(0).getReg());
1099     break;
1100 
1101   CASE_UNPCK(UNPCKLPD, r)
1102     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1103     RegForm = true;
1104     LLVM_FALLTHROUGH;
1105 
1106   CASE_UNPCK(UNPCKLPD, m)
1107     DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
1108     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1109     DestName = getRegName(MI->getOperand(0).getReg());
1110     break;
1111 
1112   CASE_UNPCK(UNPCKLPS, r)
1113     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1114     RegForm = true;
1115     LLVM_FALLTHROUGH;
1116 
1117   CASE_UNPCK(UNPCKLPS, m)
1118     DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
1119     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1120     DestName = getRegName(MI->getOperand(0).getReg());
1121     break;
1122 
1123   CASE_UNPCK(UNPCKHPD, r)
1124     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1125     RegForm = true;
1126     LLVM_FALLTHROUGH;
1127 
1128   CASE_UNPCK(UNPCKHPD, m)
1129     DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
1130     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1131     DestName = getRegName(MI->getOperand(0).getReg());
1132     break;
1133 
1134   CASE_UNPCK(UNPCKHPS, r)
1135     Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1136     RegForm = true;
1137     LLVM_FALLTHROUGH;
1138 
1139   CASE_UNPCK(UNPCKHPS, m)
1140     DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
1141     Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg());
1142     DestName = getRegName(MI->getOperand(0).getReg());
1143     break;
1144 
1145   CASE_VPERMILPI(PERMILPS, r)
1146     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1147     LLVM_FALLTHROUGH;
1148 
1149   CASE_VPERMILPI(PERMILPS, m)
1150     if (MI->getOperand(NumOperands - 1).isImm())
1151       DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32,
1152                       MI->getOperand(NumOperands - 1).getImm(),
1153                       ShuffleMask);
1154     DestName = getRegName(MI->getOperand(0).getReg());
1155     break;
1156 
1157   CASE_VPERMILPI(PERMILPD, r)
1158     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1159     LLVM_FALLTHROUGH;
1160 
1161   CASE_VPERMILPI(PERMILPD, m)
1162     if (MI->getOperand(NumOperands - 1).isImm())
1163       DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64,
1164                       MI->getOperand(NumOperands - 1).getImm(),
1165                       ShuffleMask);
1166     DestName = getRegName(MI->getOperand(0).getReg());
1167     break;
1168 
1169   case X86::VPERM2F128rr:
1170   case X86::VPERM2I128rr:
1171     Src2Name = getRegName(MI->getOperand(2).getReg());
1172     LLVM_FALLTHROUGH;
1173 
1174   case X86::VPERM2F128rm:
1175   case X86::VPERM2I128rm:
1176     // For instruction comments purpose, assume the 256-bit vector is v4i64.
1177     if (MI->getOperand(NumOperands - 1).isImm())
1178       DecodeVPERM2X128Mask(4, MI->getOperand(NumOperands - 1).getImm(),
1179                            ShuffleMask);
1180     Src1Name = getRegName(MI->getOperand(1).getReg());
1181     DestName = getRegName(MI->getOperand(0).getReg());
1182     break;
1183 
1184   CASE_VPERM(PERMPD, r)
1185     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1186     LLVM_FALLTHROUGH;
1187 
1188   CASE_VPERM(PERMPD, m)
1189     if (MI->getOperand(NumOperands - 1).isImm())
1190       DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0),
1191                       MI->getOperand(NumOperands - 1).getImm(),
1192                       ShuffleMask);
1193     DestName = getRegName(MI->getOperand(0).getReg());
1194     break;
1195 
1196   CASE_VPERM(PERMQ, r)
1197     Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1198     LLVM_FALLTHROUGH;
1199 
1200   CASE_VPERM(PERMQ, m)
1201     if (MI->getOperand(NumOperands - 1).isImm())
1202       DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0),
1203                       MI->getOperand(NumOperands - 1).getImm(),
1204                       ShuffleMask);
1205     DestName = getRegName(MI->getOperand(0).getReg());
1206     break;
1207 
1208   case X86::MOVSDrr:
1209   case X86::VMOVSDrr:
1210   case X86::VMOVSDZrr:
1211     Src2Name = getRegName(MI->getOperand(2).getReg());
1212     Src1Name = getRegName(MI->getOperand(1).getReg());
1213     LLVM_FALLTHROUGH;
1214 
1215   case X86::MOVSDrm_alt:
1216   case X86::MOVSDrm:
1217   case X86::VMOVSDrm_alt:
1218   case X86::VMOVSDrm:
1219   case X86::VMOVSDZrm:
1220   case X86::VMOVSDZrm_alt:
1221     DecodeScalarMoveMask(2, nullptr == Src2Name, ShuffleMask);
1222     DestName = getRegName(MI->getOperand(0).getReg());
1223     break;
1224 
1225   case X86::MOVSSrr:
1226   case X86::VMOVSSrr:
1227   case X86::VMOVSSZrr:
1228     Src2Name = getRegName(MI->getOperand(2).getReg());
1229     Src1Name = getRegName(MI->getOperand(1).getReg());
1230     LLVM_FALLTHROUGH;
1231 
1232   case X86::MOVSSrm:
1233   case X86::MOVSSrm_alt:
1234   case X86::VMOVSSrm:
1235   case X86::VMOVSSrm_alt:
1236   case X86::VMOVSSZrm:
1237   case X86::VMOVSSZrm_alt:
1238     DecodeScalarMoveMask(4, nullptr == Src2Name, ShuffleMask);
1239     DestName = getRegName(MI->getOperand(0).getReg());
1240     break;
1241 
1242   case X86::MOVPQI2QIrr:
1243   case X86::MOVZPQILo2PQIrr:
1244   case X86::VMOVPQI2QIrr:
1245   case X86::VMOVPQI2QIZrr:
1246   case X86::VMOVZPQILo2PQIrr:
1247   case X86::VMOVZPQILo2PQIZrr:
1248     Src1Name = getRegName(MI->getOperand(1).getReg());
1249     LLVM_FALLTHROUGH;
1250 
1251   case X86::MOVQI2PQIrm:
1252   case X86::VMOVQI2PQIrm:
1253   case X86::VMOVQI2PQIZrm:
1254     DecodeZeroMoveLowMask(2, ShuffleMask);
1255     DestName = getRegName(MI->getOperand(0).getReg());
1256     break;
1257 
1258   case X86::MOVDI2PDIrm:
1259   case X86::VMOVDI2PDIrm:
1260   case X86::VMOVDI2PDIZrm:
1261     DecodeZeroMoveLowMask(4, ShuffleMask);
1262     DestName = getRegName(MI->getOperand(0).getReg());
1263     break;
1264 
1265   case X86::EXTRQI:
1266     if (MI->getOperand(2).isImm() &&
1267         MI->getOperand(3).isImm())
1268       DecodeEXTRQIMask(16, 8, MI->getOperand(2).getImm(),
1269                        MI->getOperand(3).getImm(), ShuffleMask);
1270 
1271     DestName = getRegName(MI->getOperand(0).getReg());
1272     Src1Name = getRegName(MI->getOperand(1).getReg());
1273     break;
1274 
1275   case X86::INSERTQI:
1276     if (MI->getOperand(3).isImm() &&
1277         MI->getOperand(4).isImm())
1278       DecodeINSERTQIMask(16, 8, MI->getOperand(3).getImm(),
1279                          MI->getOperand(4).getImm(), ShuffleMask);
1280 
1281     DestName = getRegName(MI->getOperand(0).getReg());
1282     Src1Name = getRegName(MI->getOperand(1).getReg());
1283     Src2Name = getRegName(MI->getOperand(2).getReg());
1284     break;
1285 
1286   case X86::VBROADCASTF128:
1287   case X86::VBROADCASTI128:
1288   CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z128, rm)
1289   CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z128, rm)
1290     DecodeSubVectorBroadcast(4, 2, ShuffleMask);
1291     DestName = getRegName(MI->getOperand(0).getReg());
1292     break;
1293   CASE_AVX512_INS_COMMON(BROADCASTF64X2, , rm)
1294   CASE_AVX512_INS_COMMON(BROADCASTI64X2, , rm)
1295     DecodeSubVectorBroadcast(8, 2, ShuffleMask);
1296     DestName = getRegName(MI->getOperand(0).getReg());
1297     break;
1298   CASE_AVX512_INS_COMMON(BROADCASTF64X4, , rm)
1299   CASE_AVX512_INS_COMMON(BROADCASTI64X4, , rm)
1300     DecodeSubVectorBroadcast(8, 4, ShuffleMask);
1301     DestName = getRegName(MI->getOperand(0).getReg());
1302     break;
1303   CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z256, rm)
1304   CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z256, rm)
1305     DecodeSubVectorBroadcast(8, 4, ShuffleMask);
1306     DestName = getRegName(MI->getOperand(0).getReg());
1307     break;
1308   CASE_AVX512_INS_COMMON(BROADCASTF32X4, , rm)
1309   CASE_AVX512_INS_COMMON(BROADCASTI32X4, , rm)
1310     DecodeSubVectorBroadcast(16, 4, ShuffleMask);
1311     DestName = getRegName(MI->getOperand(0).getReg());
1312     break;
1313   CASE_AVX512_INS_COMMON(BROADCASTF32X8, , rm)
1314   CASE_AVX512_INS_COMMON(BROADCASTI32X8, , rm)
1315     DecodeSubVectorBroadcast(16, 8, ShuffleMask);
1316     DestName = getRegName(MI->getOperand(0).getReg());
1317     break;
1318   CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rr)
1319     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1320     LLVM_FALLTHROUGH;
1321   CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rm)
1322     DecodeSubVectorBroadcast(4, 2, ShuffleMask);
1323     DestName = getRegName(MI->getOperand(0).getReg());
1324     break;
1325   CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rr)
1326   CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rr)
1327     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1328     LLVM_FALLTHROUGH;
1329   CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rm)
1330   CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rm)
1331     DecodeSubVectorBroadcast(8, 2, ShuffleMask);
1332     DestName = getRegName(MI->getOperand(0).getReg());
1333     break;
1334   CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rr)
1335   CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rr)
1336     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1337     LLVM_FALLTHROUGH;
1338   CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rm)
1339   CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rm)
1340     DecodeSubVectorBroadcast(16, 2, ShuffleMask);
1341     DestName = getRegName(MI->getOperand(0).getReg());
1342     break;
1343 
1344   CASE_PMOVZX(PMOVZXBW, r)
1345     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1346     LLVM_FALLTHROUGH;
1347   CASE_PMOVZX(PMOVZXBW, m)
1348     DecodeZeroExtendMask(8, 16, getRegOperandNumElts(MI, 16, 0), false,
1349                          ShuffleMask);
1350     DestName = getRegName(MI->getOperand(0).getReg());
1351     break;
1352 
1353   CASE_PMOVZX(PMOVZXBD, r)
1354     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1355     LLVM_FALLTHROUGH;
1356   CASE_PMOVZX(PMOVZXBD, m)
1357     DecodeZeroExtendMask(8, 32, getRegOperandNumElts(MI, 32, 0), false,
1358                          ShuffleMask);
1359     DestName = getRegName(MI->getOperand(0).getReg());
1360     break;
1361 
1362   CASE_PMOVZX(PMOVZXBQ, r)
1363     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1364     LLVM_FALLTHROUGH;
1365   CASE_PMOVZX(PMOVZXBQ, m)
1366     DecodeZeroExtendMask(8, 64, getRegOperandNumElts(MI, 64, 0), false,
1367                          ShuffleMask);
1368     DestName = getRegName(MI->getOperand(0).getReg());
1369     break;
1370 
1371   CASE_PMOVZX(PMOVZXWD, r)
1372     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1373     LLVM_FALLTHROUGH;
1374   CASE_PMOVZX(PMOVZXWD, m)
1375     DecodeZeroExtendMask(16, 32, getRegOperandNumElts(MI, 32, 0), false,
1376                          ShuffleMask);
1377     DestName = getRegName(MI->getOperand(0).getReg());
1378     break;
1379 
1380   CASE_PMOVZX(PMOVZXWQ, r)
1381     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1382     LLVM_FALLTHROUGH;
1383   CASE_PMOVZX(PMOVZXWQ, m)
1384     DecodeZeroExtendMask(16, 64, getRegOperandNumElts(MI, 64, 0), false,
1385                          ShuffleMask);
1386     DestName = getRegName(MI->getOperand(0).getReg());
1387     break;
1388 
1389   CASE_PMOVZX(PMOVZXDQ, r)
1390     Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1391     LLVM_FALLTHROUGH;
1392   CASE_PMOVZX(PMOVZXDQ, m)
1393     DecodeZeroExtendMask(32, 64, getRegOperandNumElts(MI, 64, 0), false,
1394                          ShuffleMask);
1395     DestName = getRegName(MI->getOperand(0).getReg());
1396     break;
1397   }
1398 
1399   // The only comments we decode are shuffles, so give up if we were unable to
1400   // decode a shuffle mask.
1401   if (ShuffleMask.empty())
1402     return false;
1403 
1404   if (!DestName) DestName = Src1Name;
1405   if (DestName) {
1406     OS << DestName;
1407     printMasking(OS, MI, MCII);
1408   } else
1409     OS << "mem";
1410 
1411   OS << " = ";
1412 
1413   // If the two sources are the same, canonicalize the input elements to be
1414   // from the first src so that we get larger element spans.
1415   if (Src1Name == Src2Name) {
1416     for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
1417       if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
1418           ShuffleMask[i] >= (int)e)   // From second mask.
1419         ShuffleMask[i] -= e;
1420     }
1421   }
1422 
1423   // The shuffle mask specifies which elements of the src1/src2 fill in the
1424   // destination, with a few sentinel values.  Loop through and print them
1425   // out.
1426   for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
1427     if (i != 0)
1428       OS << ',';
1429     if (ShuffleMask[i] == SM_SentinelZero) {
1430       OS << "zero";
1431       continue;
1432     }
1433 
1434     // Otherwise, it must come from src1 or src2.  Print the span of elements
1435     // that comes from this src.
1436     bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
1437     const char *SrcName = isSrc1 ? Src1Name : Src2Name;
1438     OS << (SrcName ? SrcName : "mem") << '[';
1439     bool IsFirst = true;
1440     while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&
1441            (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
1442       if (!IsFirst)
1443         OS << ',';
1444       else
1445         IsFirst = false;
1446       if (ShuffleMask[i] == SM_SentinelUndef)
1447         OS << "u";
1448       else
1449         OS << ShuffleMask[i] % ShuffleMask.size();
1450       ++i;
1451     }
1452     OS << ']';
1453     --i; // For loop increments element #.
1454   }
1455   OS << '\n';
1456 
1457   // We successfully added a comment to this instruction.
1458   return true;
1459 }
1460