1 /*===-- X86DisassemblerDecoderInternal.h - Disassembler decoder ---*- C -*-===* 2 * 3 * The LLVM Compiler Infrastructure 4 * 5 * This file is distributed under the University of Illinois Open Source 6 * License. See LICENSE.TXT for details. 7 * 8 *===----------------------------------------------------------------------===* 9 * 10 * This file is part of the X86 Disassembler. 11 * It contains the public interface of the instruction decoder. 12 * Documentation for the disassembler can be found in X86Disassembler.h. 13 * 14 *===----------------------------------------------------------------------===*/ 15 16 #ifndef X86DISASSEMBLERDECODER_H 17 #define X86DISASSEMBLERDECODER_H 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 #define INSTRUCTION_SPECIFIER_FIELDS \ 24 uint16_t operands; 25 26 #define INSTRUCTION_IDS \ 27 uint16_t instructionIDs; 28 29 #include "X86DisassemblerDecoderCommon.h" 30 31 #undef INSTRUCTION_SPECIFIER_FIELDS 32 #undef INSTRUCTION_IDS 33 34 /* 35 * Accessor functions for various fields of an Intel instruction 36 */ 37 #define modFromModRM(modRM) (((modRM) & 0xc0) >> 6) 38 #define regFromModRM(modRM) (((modRM) & 0x38) >> 3) 39 #define rmFromModRM(modRM) ((modRM) & 0x7) 40 #define scaleFromSIB(sib) (((sib) & 0xc0) >> 6) 41 #define indexFromSIB(sib) (((sib) & 0x38) >> 3) 42 #define baseFromSIB(sib) ((sib) & 0x7) 43 #define wFromREX(rex) (((rex) & 0x8) >> 3) 44 #define rFromREX(rex) (((rex) & 0x4) >> 2) 45 #define xFromREX(rex) (((rex) & 0x2) >> 1) 46 #define bFromREX(rex) ((rex) & 0x1) 47 48 #define rFromEVEX2of4(evex) (((~(evex)) & 0x80) >> 7) 49 #define xFromEVEX2of4(evex) (((~(evex)) & 0x40) >> 6) 50 #define bFromEVEX2of4(evex) (((~(evex)) & 0x20) >> 5) 51 #define r2FromEVEX2of4(evex) (((~(evex)) & 0x10) >> 4) 52 #define mmFromEVEX2of4(evex) ((evex) & 0x3) 53 #define wFromEVEX3of4(evex) (((evex) & 0x80) >> 7) 54 #define vvvvFromEVEX3of4(evex) (((~(evex)) & 0x78) >> 3) 55 #define ppFromEVEX3of4(evex) ((evex) & 0x3) 56 #define zFromEVEX4of4(evex) (((evex) & 0x80) >> 7) 57 #define l2FromEVEX4of4(evex) (((evex) & 0x40) >> 6) 58 #define lFromEVEX4of4(evex) (((evex) & 0x20) >> 5) 59 #define bFromEVEX4of4(evex) (((evex) & 0x10) >> 4) 60 #define v2FromEVEX4of4(evex) (((~evex) & 0x8) >> 3) 61 #define aaaFromEVEX4of4(evex) ((evex) & 0x7) 62 63 #define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7) 64 #define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6) 65 #define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5) 66 #define mmmmmFromVEX2of3(vex) ((vex) & 0x1f) 67 #define wFromVEX3of3(vex) (((vex) & 0x80) >> 7) 68 #define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3) 69 #define lFromVEX3of3(vex) (((vex) & 0x4) >> 2) 70 #define ppFromVEX3of3(vex) ((vex) & 0x3) 71 72 #define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7) 73 #define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3) 74 #define lFromVEX2of2(vex) (((vex) & 0x4) >> 2) 75 #define ppFromVEX2of2(vex) ((vex) & 0x3) 76 77 #define rFromXOP2of3(xop) (((~(xop)) & 0x80) >> 7) 78 #define xFromXOP2of3(xop) (((~(xop)) & 0x40) >> 6) 79 #define bFromXOP2of3(xop) (((~(xop)) & 0x20) >> 5) 80 #define mmmmmFromXOP2of3(xop) ((xop) & 0x1f) 81 #define wFromXOP3of3(xop) (((xop) & 0x80) >> 7) 82 #define vvvvFromXOP3of3(vex) (((~(vex)) & 0x78) >> 3) 83 #define lFromXOP3of3(xop) (((xop) & 0x4) >> 2) 84 #define ppFromXOP3of3(xop) ((xop) & 0x3) 85 86 /* 87 * These enums represent Intel registers for use by the decoder. 88 */ 89 90 #define REGS_8BIT \ 91 ENTRY(AL) \ 92 ENTRY(CL) \ 93 ENTRY(DL) \ 94 ENTRY(BL) \ 95 ENTRY(AH) \ 96 ENTRY(CH) \ 97 ENTRY(DH) \ 98 ENTRY(BH) \ 99 ENTRY(R8B) \ 100 ENTRY(R9B) \ 101 ENTRY(R10B) \ 102 ENTRY(R11B) \ 103 ENTRY(R12B) \ 104 ENTRY(R13B) \ 105 ENTRY(R14B) \ 106 ENTRY(R15B) \ 107 ENTRY(SPL) \ 108 ENTRY(BPL) \ 109 ENTRY(SIL) \ 110 ENTRY(DIL) 111 112 #define EA_BASES_16BIT \ 113 ENTRY(BX_SI) \ 114 ENTRY(BX_DI) \ 115 ENTRY(BP_SI) \ 116 ENTRY(BP_DI) \ 117 ENTRY(SI) \ 118 ENTRY(DI) \ 119 ENTRY(BP) \ 120 ENTRY(BX) \ 121 ENTRY(R8W) \ 122 ENTRY(R9W) \ 123 ENTRY(R10W) \ 124 ENTRY(R11W) \ 125 ENTRY(R12W) \ 126 ENTRY(R13W) \ 127 ENTRY(R14W) \ 128 ENTRY(R15W) 129 130 #define REGS_16BIT \ 131 ENTRY(AX) \ 132 ENTRY(CX) \ 133 ENTRY(DX) \ 134 ENTRY(BX) \ 135 ENTRY(SP) \ 136 ENTRY(BP) \ 137 ENTRY(SI) \ 138 ENTRY(DI) \ 139 ENTRY(R8W) \ 140 ENTRY(R9W) \ 141 ENTRY(R10W) \ 142 ENTRY(R11W) \ 143 ENTRY(R12W) \ 144 ENTRY(R13W) \ 145 ENTRY(R14W) \ 146 ENTRY(R15W) 147 148 #define EA_BASES_32BIT \ 149 ENTRY(EAX) \ 150 ENTRY(ECX) \ 151 ENTRY(EDX) \ 152 ENTRY(EBX) \ 153 ENTRY(sib) \ 154 ENTRY(EBP) \ 155 ENTRY(ESI) \ 156 ENTRY(EDI) \ 157 ENTRY(R8D) \ 158 ENTRY(R9D) \ 159 ENTRY(R10D) \ 160 ENTRY(R11D) \ 161 ENTRY(R12D) \ 162 ENTRY(R13D) \ 163 ENTRY(R14D) \ 164 ENTRY(R15D) 165 166 #define REGS_32BIT \ 167 ENTRY(EAX) \ 168 ENTRY(ECX) \ 169 ENTRY(EDX) \ 170 ENTRY(EBX) \ 171 ENTRY(ESP) \ 172 ENTRY(EBP) \ 173 ENTRY(ESI) \ 174 ENTRY(EDI) \ 175 ENTRY(R8D) \ 176 ENTRY(R9D) \ 177 ENTRY(R10D) \ 178 ENTRY(R11D) \ 179 ENTRY(R12D) \ 180 ENTRY(R13D) \ 181 ENTRY(R14D) \ 182 ENTRY(R15D) 183 184 #define EA_BASES_64BIT \ 185 ENTRY(RAX) \ 186 ENTRY(RCX) \ 187 ENTRY(RDX) \ 188 ENTRY(RBX) \ 189 ENTRY(sib64) \ 190 ENTRY(RBP) \ 191 ENTRY(RSI) \ 192 ENTRY(RDI) \ 193 ENTRY(R8) \ 194 ENTRY(R9) \ 195 ENTRY(R10) \ 196 ENTRY(R11) \ 197 ENTRY(R12) \ 198 ENTRY(R13) \ 199 ENTRY(R14) \ 200 ENTRY(R15) 201 202 #define REGS_64BIT \ 203 ENTRY(RAX) \ 204 ENTRY(RCX) \ 205 ENTRY(RDX) \ 206 ENTRY(RBX) \ 207 ENTRY(RSP) \ 208 ENTRY(RBP) \ 209 ENTRY(RSI) \ 210 ENTRY(RDI) \ 211 ENTRY(R8) \ 212 ENTRY(R9) \ 213 ENTRY(R10) \ 214 ENTRY(R11) \ 215 ENTRY(R12) \ 216 ENTRY(R13) \ 217 ENTRY(R14) \ 218 ENTRY(R15) 219 220 #define REGS_MMX \ 221 ENTRY(MM0) \ 222 ENTRY(MM1) \ 223 ENTRY(MM2) \ 224 ENTRY(MM3) \ 225 ENTRY(MM4) \ 226 ENTRY(MM5) \ 227 ENTRY(MM6) \ 228 ENTRY(MM7) 229 230 #define REGS_XMM \ 231 ENTRY(XMM0) \ 232 ENTRY(XMM1) \ 233 ENTRY(XMM2) \ 234 ENTRY(XMM3) \ 235 ENTRY(XMM4) \ 236 ENTRY(XMM5) \ 237 ENTRY(XMM6) \ 238 ENTRY(XMM7) \ 239 ENTRY(XMM8) \ 240 ENTRY(XMM9) \ 241 ENTRY(XMM10) \ 242 ENTRY(XMM11) \ 243 ENTRY(XMM12) \ 244 ENTRY(XMM13) \ 245 ENTRY(XMM14) \ 246 ENTRY(XMM15) \ 247 ENTRY(XMM16) \ 248 ENTRY(XMM17) \ 249 ENTRY(XMM18) \ 250 ENTRY(XMM19) \ 251 ENTRY(XMM20) \ 252 ENTRY(XMM21) \ 253 ENTRY(XMM22) \ 254 ENTRY(XMM23) \ 255 ENTRY(XMM24) \ 256 ENTRY(XMM25) \ 257 ENTRY(XMM26) \ 258 ENTRY(XMM27) \ 259 ENTRY(XMM28) \ 260 ENTRY(XMM29) \ 261 ENTRY(XMM30) \ 262 ENTRY(XMM31) 263 264 #define REGS_YMM \ 265 ENTRY(YMM0) \ 266 ENTRY(YMM1) \ 267 ENTRY(YMM2) \ 268 ENTRY(YMM3) \ 269 ENTRY(YMM4) \ 270 ENTRY(YMM5) \ 271 ENTRY(YMM6) \ 272 ENTRY(YMM7) \ 273 ENTRY(YMM8) \ 274 ENTRY(YMM9) \ 275 ENTRY(YMM10) \ 276 ENTRY(YMM11) \ 277 ENTRY(YMM12) \ 278 ENTRY(YMM13) \ 279 ENTRY(YMM14) \ 280 ENTRY(YMM15) \ 281 ENTRY(YMM16) \ 282 ENTRY(YMM17) \ 283 ENTRY(YMM18) \ 284 ENTRY(YMM19) \ 285 ENTRY(YMM20) \ 286 ENTRY(YMM21) \ 287 ENTRY(YMM22) \ 288 ENTRY(YMM23) \ 289 ENTRY(YMM24) \ 290 ENTRY(YMM25) \ 291 ENTRY(YMM26) \ 292 ENTRY(YMM27) \ 293 ENTRY(YMM28) \ 294 ENTRY(YMM29) \ 295 ENTRY(YMM30) \ 296 ENTRY(YMM31) 297 298 #define REGS_ZMM \ 299 ENTRY(ZMM0) \ 300 ENTRY(ZMM1) \ 301 ENTRY(ZMM2) \ 302 ENTRY(ZMM3) \ 303 ENTRY(ZMM4) \ 304 ENTRY(ZMM5) \ 305 ENTRY(ZMM6) \ 306 ENTRY(ZMM7) \ 307 ENTRY(ZMM8) \ 308 ENTRY(ZMM9) \ 309 ENTRY(ZMM10) \ 310 ENTRY(ZMM11) \ 311 ENTRY(ZMM12) \ 312 ENTRY(ZMM13) \ 313 ENTRY(ZMM14) \ 314 ENTRY(ZMM15) \ 315 ENTRY(ZMM16) \ 316 ENTRY(ZMM17) \ 317 ENTRY(ZMM18) \ 318 ENTRY(ZMM19) \ 319 ENTRY(ZMM20) \ 320 ENTRY(ZMM21) \ 321 ENTRY(ZMM22) \ 322 ENTRY(ZMM23) \ 323 ENTRY(ZMM24) \ 324 ENTRY(ZMM25) \ 325 ENTRY(ZMM26) \ 326 ENTRY(ZMM27) \ 327 ENTRY(ZMM28) \ 328 ENTRY(ZMM29) \ 329 ENTRY(ZMM30) \ 330 ENTRY(ZMM31) 331 332 #define REGS_MASKS \ 333 ENTRY(K0) \ 334 ENTRY(K1) \ 335 ENTRY(K2) \ 336 ENTRY(K3) \ 337 ENTRY(K4) \ 338 ENTRY(K5) \ 339 ENTRY(K6) \ 340 ENTRY(K7) 341 342 #define REGS_SEGMENT \ 343 ENTRY(ES) \ 344 ENTRY(CS) \ 345 ENTRY(SS) \ 346 ENTRY(DS) \ 347 ENTRY(FS) \ 348 ENTRY(GS) 349 350 #define REGS_DEBUG \ 351 ENTRY(DR0) \ 352 ENTRY(DR1) \ 353 ENTRY(DR2) \ 354 ENTRY(DR3) \ 355 ENTRY(DR4) \ 356 ENTRY(DR5) \ 357 ENTRY(DR6) \ 358 ENTRY(DR7) 359 360 #define REGS_CONTROL \ 361 ENTRY(CR0) \ 362 ENTRY(CR1) \ 363 ENTRY(CR2) \ 364 ENTRY(CR3) \ 365 ENTRY(CR4) \ 366 ENTRY(CR5) \ 367 ENTRY(CR6) \ 368 ENTRY(CR7) \ 369 ENTRY(CR8) 370 371 #define ALL_EA_BASES \ 372 EA_BASES_16BIT \ 373 EA_BASES_32BIT \ 374 EA_BASES_64BIT 375 376 #define ALL_SIB_BASES \ 377 REGS_32BIT \ 378 REGS_64BIT 379 380 #define ALL_REGS \ 381 REGS_8BIT \ 382 REGS_16BIT \ 383 REGS_32BIT \ 384 REGS_64BIT \ 385 REGS_MMX \ 386 REGS_XMM \ 387 REGS_YMM \ 388 REGS_ZMM \ 389 REGS_MASKS \ 390 REGS_SEGMENT \ 391 REGS_DEBUG \ 392 REGS_CONTROL \ 393 ENTRY(RIP) 394 395 /* 396 * EABase - All possible values of the base field for effective-address 397 * computations, a.k.a. the Mod and R/M fields of the ModR/M byte. We 398 * distinguish between bases (EA_BASE_*) and registers that just happen to be 399 * referred to when Mod == 0b11 (EA_REG_*). 400 */ 401 typedef enum { 402 EA_BASE_NONE, 403 #define ENTRY(x) EA_BASE_##x, 404 ALL_EA_BASES 405 #undef ENTRY 406 #define ENTRY(x) EA_REG_##x, 407 ALL_REGS 408 #undef ENTRY 409 EA_max 410 } EABase; 411 412 /* 413 * SIBIndex - All possible values of the SIB index field. 414 * Borrows entries from ALL_EA_BASES with the special case that 415 * sib is synonymous with NONE. 416 * Vector SIB: index can be XMM or YMM. 417 */ 418 typedef enum { 419 SIB_INDEX_NONE, 420 #define ENTRY(x) SIB_INDEX_##x, 421 ALL_EA_BASES 422 REGS_XMM 423 REGS_YMM 424 REGS_ZMM 425 #undef ENTRY 426 SIB_INDEX_max 427 } SIBIndex; 428 429 /* 430 * SIBBase - All possible values of the SIB base field. 431 */ 432 typedef enum { 433 SIB_BASE_NONE, 434 #define ENTRY(x) SIB_BASE_##x, 435 ALL_SIB_BASES 436 #undef ENTRY 437 SIB_BASE_max 438 } SIBBase; 439 440 /* 441 * EADisplacement - Possible displacement types for effective-address 442 * computations. 443 */ 444 typedef enum { 445 EA_DISP_NONE, 446 EA_DISP_8, 447 EA_DISP_16, 448 EA_DISP_32 449 } EADisplacement; 450 451 /* 452 * Reg - All possible values of the reg field in the ModR/M byte. 453 */ 454 typedef enum { 455 #define ENTRY(x) MODRM_REG_##x, 456 ALL_REGS 457 #undef ENTRY 458 MODRM_REG_max 459 } Reg; 460 461 /* 462 * SegmentOverride - All possible segment overrides. 463 */ 464 typedef enum { 465 SEG_OVERRIDE_NONE, 466 SEG_OVERRIDE_CS, 467 SEG_OVERRIDE_SS, 468 SEG_OVERRIDE_DS, 469 SEG_OVERRIDE_ES, 470 SEG_OVERRIDE_FS, 471 SEG_OVERRIDE_GS, 472 SEG_OVERRIDE_max 473 } SegmentOverride; 474 475 /* 476 * VEXLeadingOpcodeByte - Possible values for the VEX.m-mmmm field 477 */ 478 479 typedef enum { 480 VEX_LOB_0F = 0x1, 481 VEX_LOB_0F38 = 0x2, 482 VEX_LOB_0F3A = 0x3 483 } VEXLeadingOpcodeByte; 484 485 typedef enum { 486 XOP_MAP_SELECT_8 = 0x8, 487 XOP_MAP_SELECT_9 = 0x9, 488 XOP_MAP_SELECT_A = 0xA 489 } XOPMapSelect; 490 491 /* 492 * VEXPrefixCode - Possible values for the VEX.pp/EVEX.pp field 493 */ 494 495 typedef enum { 496 VEX_PREFIX_NONE = 0x0, 497 VEX_PREFIX_66 = 0x1, 498 VEX_PREFIX_F3 = 0x2, 499 VEX_PREFIX_F2 = 0x3 500 } VEXPrefixCode; 501 502 typedef enum { 503 TYPE_NO_VEX_XOP = 0x0, 504 TYPE_VEX_2B = 0x1, 505 TYPE_VEX_3B = 0x2, 506 TYPE_EVEX = 0x3, 507 TYPE_XOP = 0x4 508 } VectorExtensionType; 509 510 typedef uint8_t BOOL; 511 512 /* 513 * byteReader_t - Type for the byte reader that the consumer must provide to 514 * the decoder. Reads a single byte from the instruction's address space. 515 * @param arg - A baton that the consumer can associate with any internal 516 * state that it needs. 517 * @param byte - A pointer to a single byte in memory that should be set to 518 * contain the value at address. 519 * @param address - The address in the instruction's address space that should 520 * be read from. 521 * @return - -1 if the byte cannot be read for any reason; 0 otherwise. 522 */ 523 typedef int (*byteReader_t)(const void* arg, uint8_t* byte, uint64_t address); 524 525 /* 526 * dlog_t - Type for the logging function that the consumer can provide to 527 * get debugging output from the decoder. 528 * @param arg - A baton that the consumer can associate with any internal 529 * state that it needs. 530 * @param log - A string that contains the message. Will be reused after 531 * the logger returns. 532 */ 533 typedef void (*dlog_t)(void* arg, const char *log); 534 535 /* 536 * The x86 internal instruction, which is produced by the decoder. 537 */ 538 struct InternalInstruction { 539 /* Reader interface (C) */ 540 byteReader_t reader; 541 /* Opaque value passed to the reader */ 542 const void* readerArg; 543 /* The address of the next byte to read via the reader */ 544 uint64_t readerCursor; 545 546 /* Logger interface (C) */ 547 dlog_t dlog; 548 /* Opaque value passed to the logger */ 549 void* dlogArg; 550 551 /* General instruction information */ 552 553 /* The mode to disassemble for (64-bit, protected, real) */ 554 DisassemblerMode mode; 555 /* The start of the instruction, usable with the reader */ 556 uint64_t startLocation; 557 /* The length of the instruction, in bytes */ 558 size_t length; 559 560 /* Prefix state */ 561 562 /* 1 if the prefix byte corresponding to the entry is present; 0 if not */ 563 uint8_t prefixPresent[0x100]; 564 /* contains the location (for use with the reader) of the prefix byte */ 565 uint64_t prefixLocations[0x100]; 566 /* The value of the vector extension prefix(EVEX/VEX/XOP), if present */ 567 uint8_t vectorExtensionPrefix[4]; 568 /* The type of the vector extension prefix */ 569 VectorExtensionType vectorExtensionType; 570 /* The value of the REX prefix, if present */ 571 uint8_t rexPrefix; 572 /* The location where a mandatory prefix would have to be (i.e., right before 573 the opcode, or right before the REX prefix if one is present) */ 574 uint64_t necessaryPrefixLocation; 575 /* The segment override type */ 576 SegmentOverride segmentOverride; 577 /* 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease */ 578 BOOL xAcquireRelease; 579 580 /* Sizes of various critical pieces of data, in bytes */ 581 uint8_t registerSize; 582 uint8_t addressSize; 583 uint8_t displacementSize; 584 uint8_t immediateSize; 585 586 /* Offsets from the start of the instruction to the pieces of data, which is 587 needed to find relocation entries for adding symbolic operands */ 588 uint8_t displacementOffset; 589 uint8_t immediateOffset; 590 591 /* opcode state */ 592 593 /* The last byte of the opcode, not counting any ModR/M extension */ 594 uint8_t opcode; 595 /* The ModR/M byte of the instruction, if it is an opcode extension */ 596 uint8_t modRMExtension; 597 598 /* decode state */ 599 600 /* The type of opcode, used for indexing into the array of decode tables */ 601 OpcodeType opcodeType; 602 /* The instruction ID, extracted from the decode table */ 603 uint16_t instructionID; 604 /* The specifier for the instruction, from the instruction info table */ 605 const struct InstructionSpecifier *spec; 606 607 /* state for additional bytes, consumed during operand decode. Pattern: 608 consumed___ indicates that the byte was already consumed and does not 609 need to be consumed again */ 610 611 /* The VEX.vvvv field, which contains a third register operand for some AVX 612 instructions */ 613 Reg vvvv; 614 615 /* The writemask for AVX-512 instructions which is contained in EVEX.aaa */ 616 Reg writemask; 617 618 /* The ModR/M byte, which contains most register operands and some portion of 619 all memory operands */ 620 BOOL consumedModRM; 621 uint8_t modRM; 622 623 /* The SIB byte, used for more complex 32- or 64-bit memory operands */ 624 BOOL consumedSIB; 625 uint8_t sib; 626 627 /* The displacement, used for memory operands */ 628 BOOL consumedDisplacement; 629 int32_t displacement; 630 631 /* Immediates. There can be two in some cases */ 632 uint8_t numImmediatesConsumed; 633 uint8_t numImmediatesTranslated; 634 uint64_t immediates[2]; 635 636 /* A register or immediate operand encoded into the opcode */ 637 Reg opcodeRegister; 638 639 /* Portions of the ModR/M byte */ 640 641 /* These fields determine the allowable values for the ModR/M fields, which 642 depend on operand and address widths */ 643 EABase eaBaseBase; 644 EABase eaRegBase; 645 Reg regBase; 646 647 /* The Mod and R/M fields can encode a base for an effective address, or a 648 register. These are separated into two fields here */ 649 EABase eaBase; 650 EADisplacement eaDisplacement; 651 /* The reg field always encodes a register */ 652 Reg reg; 653 654 /* SIB state */ 655 SIBIndex sibIndex; 656 uint8_t sibScale; 657 SIBBase sibBase; 658 659 const struct OperandSpecifier *operands; 660 }; 661 662 /* decodeInstruction - Decode one instruction and store the decoding results in 663 * a buffer provided by the consumer. 664 * @param insn - The buffer to store the instruction in. Allocated by the 665 * consumer. 666 * @param reader - The byteReader_t for the bytes to be read. 667 * @param readerArg - An argument to pass to the reader for storing context 668 * specific to the consumer. May be NULL. 669 * @param logger - The dlog_t to be used in printing status messages from the 670 * disassembler. May be NULL. 671 * @param loggerArg - An argument to pass to the logger for storing context 672 * specific to the logger. May be NULL. 673 * @param startLoc - The address (in the reader's address space) of the first 674 * byte in the instruction. 675 * @param mode - The mode (16-bit, 32-bit, 64-bit) to decode in. 676 * @return - Nonzero if there was an error during decode, 0 otherwise. 677 */ 678 int decodeInstruction(struct InternalInstruction* insn, 679 byteReader_t reader, 680 const void* readerArg, 681 dlog_t logger, 682 void* loggerArg, 683 const void* miiArg, 684 uint64_t startLoc, 685 DisassemblerMode mode); 686 687 /* x86DisassemblerDebug - C-accessible function for printing a message to 688 * debugs() 689 * @param file - The name of the file printing the debug message. 690 * @param line - The line number that printed the debug message. 691 * @param s - The message to print. 692 */ 693 694 void x86DisassemblerDebug(const char *file, 695 unsigned line, 696 const char *s); 697 698 const char *x86DisassemblerGetInstrName(unsigned Opcode, const void *mii); 699 700 #ifdef __cplusplus 701 } 702 #endif 703 704 #endif 705