1 //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file defines the WebAssembly-specific subclass of TargetMachine.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "WebAssemblyTargetMachine.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "WebAssembly.h"
18 #include "WebAssemblyTargetObjectFile.h"
19 #include "WebAssemblyTargetTransformInfo.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/RegAllocRegistry.h"
23 #include "llvm/CodeGen/TargetPassConfig.h"
24 #include "llvm/IR/Function.h"
25 #include "llvm/Support/TargetRegistry.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Transforms/Scalar.h"
28 #include "llvm/Transforms/Utils.h"
29 using namespace llvm;
30 
31 #define DEBUG_TYPE "wasm"
32 
33 // Emscripten's asm.js-style exception handling
34 static cl::opt<bool> EnableEmException(
35     "enable-emscripten-cxx-exceptions",
36     cl::desc("WebAssembly Emscripten-style exception handling"),
37     cl::init(false));
38 
39 // Emscripten's asm.js-style setjmp/longjmp handling
40 static cl::opt<bool> EnableEmSjLj(
41     "enable-emscripten-sjlj",
42     cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
43     cl::init(false));
44 
45 extern "C" void LLVMInitializeWebAssemblyTarget() {
46   // Register the target.
47   RegisterTargetMachine<WebAssemblyTargetMachine> X(
48       getTheWebAssemblyTarget32());
49   RegisterTargetMachine<WebAssemblyTargetMachine> Y(
50       getTheWebAssemblyTarget64());
51 
52   // Register backend passes
53   auto &PR = *PassRegistry::getPassRegistry();
54   initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
55   initializeLowerGlobalDtorsPass(PR);
56   initializeFixFunctionBitcastsPass(PR);
57   initializeOptimizeReturnedPass(PR);
58   initializeWebAssemblyArgumentMovePass(PR);
59   initializeWebAssemblySetP2AlignOperandsPass(PR);
60   initializeWebAssemblyReplacePhysRegsPass(PR);
61   initializeWebAssemblyPrepareForLiveIntervalsPass(PR);
62   initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
63   initializeWebAssemblyStoreResultsPass(PR);
64   initializeWebAssemblyRegStackifyPass(PR);
65   initializeWebAssemblyRegColoringPass(PR);
66   initializeWebAssemblyExplicitLocalsPass(PR);
67   initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
68   initializeWebAssemblyLateEHPreparePass(PR);
69   initializeWebAssemblyExceptionInfoPass(PR);
70   initializeWebAssemblyCFGSortPass(PR);
71   initializeWebAssemblyCFGStackifyPass(PR);
72   initializeWebAssemblyLowerBrUnlessPass(PR);
73   initializeWebAssemblyRegNumberingPass(PR);
74   initializeWebAssemblyPeepholePass(PR);
75   initializeWebAssemblyCallIndirectFixupPass(PR);
76 }
77 
78 //===----------------------------------------------------------------------===//
79 // WebAssembly Lowering public interface.
80 //===----------------------------------------------------------------------===//
81 
82 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
83   if (!RM.hasValue())
84     return Reloc::PIC_;
85   return *RM;
86 }
87 
88 /// Create an WebAssembly architecture model.
89 ///
90 WebAssemblyTargetMachine::WebAssemblyTargetMachine(
91     const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
92     const TargetOptions &Options, Optional<Reloc::Model> RM,
93     Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
94     : LLVMTargetMachine(T,
95                         TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
96                                          : "e-m:e-p:32:32-i64:64-n32:64-S128",
97                         TT, CPU, FS, Options, getEffectiveRelocModel(RM),
98                         CM ? *CM : CodeModel::Large, OL),
99       TLOF(TT.isOSBinFormatELF() ?
100               static_cast<TargetLoweringObjectFile*>(
101                   new WebAssemblyTargetObjectFileELF()) :
102               static_cast<TargetLoweringObjectFile*>(
103                   new WebAssemblyTargetObjectFile())) {
104   // WebAssembly type-checks instructions, but a noreturn function with a return
105   // type that doesn't match the context will cause a check failure. So we lower
106   // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
107   // 'unreachable' instructions which is meant for that case.
108   this->Options.TrapUnreachable = true;
109 
110   // WebAssembly treats each function as an independent unit. Force
111   // -ffunction-sections, effectively, so that we can emit them independently.
112   if (!TT.isOSBinFormatELF()) {
113     this->Options.FunctionSections = true;
114     this->Options.DataSections = true;
115     this->Options.UniqueSectionNames = true;
116   }
117 
118   initAsmInfo();
119 
120   // Note that we don't use setRequiresStructuredCFG(true). It disables
121   // optimizations than we're ok with, and want, such as critical edge
122   // splitting and tail merging.
123 }
124 
125 WebAssemblyTargetMachine::~WebAssemblyTargetMachine() {}
126 
127 const WebAssemblySubtarget *
128 WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
129   Attribute CPUAttr = F.getFnAttribute("target-cpu");
130   Attribute FSAttr = F.getFnAttribute("target-features");
131 
132   std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
133                         ? CPUAttr.getValueAsString().str()
134                         : TargetCPU;
135   std::string FS = !FSAttr.hasAttribute(Attribute::None)
136                        ? FSAttr.getValueAsString().str()
137                        : TargetFS;
138 
139   auto &I = SubtargetMap[CPU + FS];
140   if (!I) {
141     // This needs to be done before we create a new subtarget since any
142     // creation will depend on the TM and the code generation flags on the
143     // function that reside in TargetOptions.
144     resetTargetOptions(F);
145     I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
146   }
147   return I.get();
148 }
149 
150 namespace {
151 class StripThreadLocal final : public ModulePass {
152   // The default thread model for wasm is single, where thread-local variables
153   // are identical to regular globals and should be treated the same. So this
154   // pass just converts all GlobalVariables to NotThreadLocal
155   static char ID;
156 
157  public:
158   StripThreadLocal() : ModulePass(ID) {}
159   bool runOnModule(Module &M) override {
160     for (auto &GV : M.globals())
161       GV.setThreadLocalMode(GlobalValue::ThreadLocalMode::NotThreadLocal);
162     return true;
163   }
164 };
165 char StripThreadLocal::ID = 0;
166 
167 /// WebAssembly Code Generator Pass Configuration Options.
168 class WebAssemblyPassConfig final : public TargetPassConfig {
169 public:
170   WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
171       : TargetPassConfig(TM, PM) {}
172 
173   WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
174     return getTM<WebAssemblyTargetMachine>();
175   }
176 
177   FunctionPass *createTargetRegisterAllocator(bool) override;
178 
179   void addIRPasses() override;
180   bool addInstSelector() override;
181   void addPostRegAlloc() override;
182   bool addGCPasses() override { return false; }
183   void addPreEmitPass() override;
184 };
185 } // end anonymous namespace
186 
187 TargetTransformInfo
188 WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) {
189   return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
190 }
191 
192 TargetPassConfig *
193 WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
194   return new WebAssemblyPassConfig(*this, PM);
195 }
196 
197 FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
198   return nullptr; // No reg alloc
199 }
200 
201 //===----------------------------------------------------------------------===//
202 // The following functions are called from lib/CodeGen/Passes.cpp to modify
203 // the CodeGen pass sequence.
204 //===----------------------------------------------------------------------===//
205 
206 void WebAssemblyPassConfig::addIRPasses() {
207   if (TM->Options.ThreadModel == ThreadModel::Single) {
208     // In "single" mode, atomics get lowered to non-atomics.
209     addPass(createLowerAtomicPass());
210     addPass(new StripThreadLocal());
211   } else {
212     // Expand some atomic operations. WebAssemblyTargetLowering has hooks which
213     // control specifically what gets lowered.
214     addPass(createAtomicExpandPass());
215   }
216 
217   // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
218   addPass(createWebAssemblyLowerGlobalDtors());
219 
220   // Fix function bitcasts, as WebAssembly requires caller and callee signatures
221   // to match.
222   addPass(createWebAssemblyFixFunctionBitcasts());
223 
224   // Optimize "returned" function attributes.
225   if (getOptLevel() != CodeGenOpt::None)
226     addPass(createWebAssemblyOptimizeReturned());
227 
228   // If exception handling is not enabled and setjmp/longjmp handling is
229   // enabled, we lower invokes into calls and delete unreachable landingpad
230   // blocks. Lowering invokes when there is no EH support is done in
231   // TargetPassConfig::addPassesToHandleExceptions, but this runs after this
232   // function and SjLj handling expects all invokes to be lowered before.
233   if (!EnableEmException &&
234       TM->Options.ExceptionModel == ExceptionHandling::None) {
235     addPass(createLowerInvokePass());
236     // The lower invoke pass may create unreachable code. Remove it in order not
237     // to process dead blocks in setjmp/longjmp handling.
238     addPass(createUnreachableBlockEliminationPass());
239   }
240 
241   // Handle exceptions and setjmp/longjmp if enabled.
242   if (EnableEmException || EnableEmSjLj)
243     addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException,
244                                                    EnableEmSjLj));
245 
246   TargetPassConfig::addIRPasses();
247 }
248 
249 bool WebAssemblyPassConfig::addInstSelector() {
250   (void)TargetPassConfig::addInstSelector();
251   addPass(
252       createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
253   // Run the argument-move pass immediately after the ScheduleDAG scheduler
254   // so that we can fix up the ARGUMENT instructions before anything else
255   // sees them in the wrong place.
256   addPass(createWebAssemblyArgumentMove());
257   // Set the p2align operands. This information is present during ISel, however
258   // it's inconvenient to collect. Collect it now, and update the immediate
259   // operands.
260   addPass(createWebAssemblySetP2AlignOperands());
261   return false;
262 }
263 
264 void WebAssemblyPassConfig::addPostRegAlloc() {
265   // TODO: The following CodeGen passes don't currently support code containing
266   // virtual registers. Consider removing their restrictions and re-enabling
267   // them.
268 
269   // These functions all require the NoVRegs property.
270   disablePass(&MachineCopyPropagationID);
271   disablePass(&PostRAMachineSinkingID);
272   disablePass(&PostRASchedulerID);
273   disablePass(&FuncletLayoutID);
274   disablePass(&StackMapLivenessID);
275   disablePass(&LiveDebugValuesID);
276   disablePass(&PatchableFunctionID);
277   disablePass(&ShrinkWrapID);
278 
279   TargetPassConfig::addPostRegAlloc();
280 }
281 
282 void WebAssemblyPassConfig::addPreEmitPass() {
283   TargetPassConfig::addPreEmitPass();
284 
285   // Now that we have a prologue and epilogue and all frame indices are
286   // rewritten, eliminate SP and FP. This allows them to be stackified,
287   // colored, and numbered with the rest of the registers.
288   addPass(createWebAssemblyReplacePhysRegs());
289 
290   // Rewrite pseudo call_indirect instructions as real instructions.
291   // This needs to run before register stackification, because we change the
292   // order of the arguments.
293   addPass(createWebAssemblyCallIndirectFixup());
294 
295   if (getOptLevel() != CodeGenOpt::None) {
296     // LiveIntervals isn't commonly run this late. Re-establish preconditions.
297     addPass(createWebAssemblyPrepareForLiveIntervals());
298 
299     // Depend on LiveIntervals and perform some optimizations on it.
300     addPass(createWebAssemblyOptimizeLiveIntervals());
301 
302     // Prepare store instructions for register stackifying.
303     addPass(createWebAssemblyStoreResults());
304 
305     // Mark registers as representing wasm's value stack. This is a key
306     // code-compression technique in WebAssembly. We run this pass (and
307     // StoreResults above) very late, so that it sees as much code as possible,
308     // including code emitted by PEI and expanded by late tail duplication.
309     addPass(createWebAssemblyRegStackify());
310 
311     // Run the register coloring pass to reduce the total number of registers.
312     // This runs after stackification so that it doesn't consider registers
313     // that become stackified.
314     addPass(createWebAssemblyRegColoring());
315   }
316 
317   // Eliminate multiple-entry loops. Do this before inserting explicit get_local
318   // and set_local operators because we create a new variable that we want
319   // converted into a local.
320   addPass(createWebAssemblyFixIrreducibleControlFlow());
321 
322   // Insert explicit get_local and set_local operators.
323   addPass(createWebAssemblyExplicitLocals());
324 
325   // Do various transformations for exception handling
326   addPass(createWebAssemblyLateEHPrepare());
327 
328   // Sort the blocks of the CFG into topological order, a prerequisite for
329   // BLOCK and LOOP markers.
330   addPass(createWebAssemblyCFGSort());
331 
332   // Insert BLOCK and LOOP markers.
333   addPass(createWebAssemblyCFGStackify());
334 
335   // Lower br_unless into br_if.
336   addPass(createWebAssemblyLowerBrUnless());
337 
338   // Perform the very last peephole optimizations on the code.
339   if (getOptLevel() != CodeGenOpt::None)
340     addPass(createWebAssemblyPeephole());
341 
342   // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
343   addPass(createWebAssemblyRegNumbering());
344 }
345