1//WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*-
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This file describes the WebAssembly register classes and some nominal
12/// physical registers.
13///
14//===----------------------------------------------------------------------===//
15
16class WebAssemblyReg<string n> : Register<n> {
17  let Namespace = "WebAssembly";
18}
19
20class WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList>
21     : RegisterClass<"WebAssembly", regTypes, alignment, regList>;
22
23//===----------------------------------------------------------------------===//
24// Registers
25//===----------------------------------------------------------------------===//
26
27// Special registers used as the frame and stack pointer.
28//
29// WebAssembly may someday supports mixed 32-bit and 64-bit heaps in the same
30// application, which requires separate width FP and SP.
31def FP32 : WebAssemblyReg<"%FP32">;
32def FP64 : WebAssemblyReg<"%FP64">;
33def SP32 : WebAssemblyReg<"%SP32">;
34def SP64 : WebAssemblyReg<"%SP64">;
35
36// TODO(jfb) The following comes from NVPTX. Is it really needed, or can we do
37//           away with it? Try deleting once the backend works.
38// WebAssembly uses virtual registers, but the backend defines a few physical
39// registers here to keep SDAG and the MachineInstr layers happy.
40foreach i = 0-4 in {
41  def I#i : WebAssemblyReg<"%i."#i>; // i32
42  def L#i : WebAssemblyReg<"%l."#i>; // i64
43  def F#i : WebAssemblyReg<"%f."#i>; // f32
44  def D#i : WebAssemblyReg<"%d."#i>; // f64
45}
46
47//===----------------------------------------------------------------------===//
48//  Register classes
49//===----------------------------------------------------------------------===//
50
51def I32 : WebAssemblyRegClass<[i32], 32, (add (sequence "I%u", 0, 4), SP32)>;
52def I64 : WebAssemblyRegClass<[i64], 64, (add (sequence "L%u", 0, 4), SP64)>;
53def F32 : WebAssemblyRegClass<[f32], 32, (add (sequence "F%u", 0, 4))>;
54def F64 : WebAssemblyRegClass<[f64], 64, (add (sequence "D%u", 0, 4))>;
55