1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*- 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// This file declares WebAssembly-specific per-machine-function 12 /// information. 13 /// 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H 17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H 18 19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 20 #include "llvm/CodeGen/MachineRegisterInfo.h" 21 22 namespace llvm { 23 24 /// This class is derived from MachineFunctionInfo and contains private 25 /// WebAssembly-specific information for each MachineFunction. 26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo { 27 MachineFunction &MF; 28 29 std::vector<MVT> Params; 30 std::vector<MVT> Results; 31 std::vector<MVT> Locals; 32 33 /// A mapping from CodeGen vreg index to WebAssembly register number. 34 std::vector<unsigned> WARegs; 35 36 /// A mapping from CodeGen vreg index to a boolean value indicating whether 37 /// the given register is considered to be "stackified", meaning it has been 38 /// determined or made to meet the stack requirements: 39 /// - single use (per path) 40 /// - single def (per path) 41 /// - defined and used in LIFO order with other stack registers 42 BitVector VRegStackified; 43 44 // A virtual register holding the pointer to the vararg buffer for vararg 45 // functions. It is created and set in TLI::LowerFormalArguments and read by 46 // TLI::LowerVASTART 47 unsigned VarargVreg = -1U; 48 49 // A virtual register holding the base pointer for functions that have 50 // overaligned values on the user stack. 51 unsigned BasePtrVreg = -1U; 52 53 public: 54 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {} 55 ~WebAssemblyFunctionInfo() override; 56 57 void addParam(MVT VT) { Params.push_back(VT); } 58 const std::vector<MVT> &getParams() const { return Params; } 59 60 void addResult(MVT VT) { Results.push_back(VT); } 61 const std::vector<MVT> &getResults() const { return Results; } 62 63 void clearParamsAndResults() { 64 Params.clear(); 65 Results.clear(); 66 } 67 68 void setNumLocals(size_t NumLocals) { Locals.resize(NumLocals, MVT::i32); } 69 void setLocal(size_t i, MVT VT) { Locals[i] = VT; } 70 void addLocal(MVT VT) { Locals.push_back(VT); } 71 const std::vector<MVT> &getLocals() const { return Locals; } 72 73 unsigned getVarargBufferVreg() const { 74 assert(VarargVreg != -1U && "Vararg vreg hasn't been set"); 75 return VarargVreg; 76 } 77 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; } 78 79 unsigned getBasePointerVreg() const { 80 assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set"); 81 return BasePtrVreg; 82 } 83 void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; } 84 85 static const unsigned UnusedReg = -1u; 86 87 void stackifyVReg(unsigned VReg) { 88 assert(MF.getRegInfo().getUniqueVRegDef(VReg)); 89 auto I = TargetRegisterInfo::virtReg2Index(VReg); 90 if (I >= VRegStackified.size()) 91 VRegStackified.resize(I + 1); 92 VRegStackified.set(I); 93 } 94 bool isVRegStackified(unsigned VReg) const { 95 auto I = TargetRegisterInfo::virtReg2Index(VReg); 96 if (I >= VRegStackified.size()) 97 return false; 98 return VRegStackified.test(I); 99 } 100 101 void initWARegs(); 102 void setWAReg(unsigned VReg, unsigned WAReg) { 103 assert(WAReg != UnusedReg); 104 auto I = TargetRegisterInfo::virtReg2Index(VReg); 105 assert(I < WARegs.size()); 106 WARegs[I] = WAReg; 107 } 108 unsigned getWAReg(unsigned VReg) const { 109 auto I = TargetRegisterInfo::virtReg2Index(VReg); 110 assert(I < WARegs.size()); 111 return WARegs[I]; 112 } 113 114 // For a given stackified WAReg, return the id number to print with push/pop. 115 static unsigned getWARegStackId(unsigned Reg) { 116 assert(Reg & INT32_MIN); 117 return Reg & INT32_MAX; 118 } 119 }; 120 121 void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM, Type *Ty, 122 SmallVectorImpl<MVT> &ValueVTs); 123 124 void ComputeSignatureVTs(const Function &F, const TargetMachine &TM, 125 SmallVectorImpl<MVT> &Params, 126 SmallVectorImpl<MVT> &Results); 127 128 } // end namespace llvm 129 130 #endif 131