1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file declares WebAssembly-specific per-machine-function
12 /// information.
13 ///
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
18 
19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 
22 namespace llvm {
23 
24 /// This class is derived from MachineFunctionInfo and contains private
25 /// WebAssembly-specific information for each MachineFunction.
26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
27   MachineFunction &MF;
28 
29   std::vector<MVT> Params;
30 
31   /// A mapping from CodeGen vreg index to WebAssembly register number.
32   std::vector<unsigned> WARegs;
33 
34   /// A mapping from CodeGen vreg index to a boolean value indicating whether
35   /// the given register is considered to be "stackified", meaning it has been
36   /// determined or made to meet the stack requirements:
37   ///   - single use (per path)
38   ///   - single def (per path)
39   ///   - defined and used in LIFO order with other stack registers
40   BitVector VRegStackified;
41 
42   // One entry for each possible target reg. we expect it to be small.
43   std::vector<unsigned> PhysRegs;
44 
45   // A virtual register holding the pointer to the vararg buffer for vararg
46   // functions. It is created and set in TLI::LowerFormalArguments and read by
47   // TLI::LowerVASTART
48   unsigned VarargVreg = -1U;
49 
50  public:
51   explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {
52     PhysRegs.resize(WebAssembly::NUM_TARGET_REGS, -1U);
53   }
54   ~WebAssemblyFunctionInfo() override;
55 
56   void addParam(MVT VT) { Params.push_back(VT); }
57   const std::vector<MVT> &getParams() const { return Params; }
58 
59   unsigned getVarargBufferVreg() const {
60     assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
61     return VarargVreg;
62   }
63   void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
64 
65   static const unsigned UnusedReg = -1u;
66 
67   void stackifyVReg(unsigned VReg) {
68     if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
69       VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
70     VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
71   }
72   void unstackifyVReg(unsigned VReg) {
73     if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
74       return;
75     VRegStackified.reset(TargetRegisterInfo::virtReg2Index(VReg));
76   }
77   bool isVRegStackified(unsigned VReg) const {
78     if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
79       return false;
80     return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
81   }
82 
83   void initWARegs();
84   void setWAReg(unsigned VReg, unsigned WAReg) {
85     assert(WAReg != UnusedReg);
86     assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
87     WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
88   }
89   unsigned getWAReg(unsigned Reg) const {
90     if (TargetRegisterInfo::isVirtualRegister(Reg)) {
91       assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
92       return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
93     }
94     return PhysRegs[Reg];
95   }
96   // If new virtual registers are created after initWARegs has been called,
97   // this function can be used to add WebAssembly register mappings for them.
98   void addWAReg(unsigned VReg, unsigned WAReg) {
99     assert(VReg = WARegs.size());
100     WARegs.push_back(WAReg);
101   }
102 
103   void addPReg(unsigned PReg, unsigned WAReg) {
104     assert(PReg < WebAssembly::NUM_TARGET_REGS);
105     assert(WAReg < -1U);
106     PhysRegs[PReg] = WAReg;
107   }
108   const std::vector<unsigned> &getPhysRegs() const { return PhysRegs; }
109 };
110 
111 } // end namespace llvm
112 
113 #endif
114