1// WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// WebAssembly SIMD operand code-gen constructs.
12///
13//===----------------------------------------------------------------------===//
14
15// constrained immediate argument types
16foreach SIZE = [8, 16] in
17def ImmI#SIZE : ImmLeaf<i32, "return (Imm & ((1UL << "#SIZE#") - 1)) == Imm;">;
18foreach SIZE = [2, 4, 8, 16, 32] in
19def LaneIdx#SIZE : ImmLeaf<i32, "return 0 <= Imm && Imm < "#SIZE#";">;
20
21// const vectors
22multiclass ConstVec<ValueType vec_t, dag ops, dag pat, string args> {
23  defm CONST_V128_#vec_t : SIMD_I<(outs V128:$dst), ops, (outs), ops,
24                                  [(set V128:$dst, (vec_t pat))],
25                                  "v128.const\t$dst, "#args,
26                                  "v128.const\t"#args, 0>;
27}
28multiclass ExtractLane<ValueType vec_t, string vec, ImmLeaf imm_t,
29                       WebAssemblyRegClass reg_t, bits<32> simdop,
30                       string suffix = "", SDNode extract = vector_extract> {
31  defm EXTRACT_LANE_#vec_t#suffix :
32      SIMD_I<(outs reg_t:$dst), (ins V128:$vec, i32imm_op:$idx),
33             (outs), (ins i32imm_op:$idx),
34             [(set reg_t:$dst, (extract (vec_t V128:$vec), (i32 imm_t:$idx)))],
35             vec#".extract_lane"#suffix#"\t$dst, $vec, $idx",
36             vec#".extract_lane"#suffix#"\t$idx", simdop>;
37}
38multiclass ExtractPat<ValueType lane_t, int mask> {
39  def _s : PatFrag<(ops node:$vec, node:$idx),
40                   (i32 (sext_inreg
41                     (i32 (vector_extract
42                       node:$vec,
43                       node:$idx
44                     )),
45                     lane_t
46                   ))>;
47  def _u : PatFrag<(ops node:$vec, node:$idx),
48                   (i32 (and
49                     (i32 (vector_extract
50                       node:$vec,
51                       node:$idx
52                     )),
53                     (i32 mask)
54                   ))>;
55}
56defm extract_i8x16 : ExtractPat<i8, 0xff>;
57defm extract_i16x8 : ExtractPat<i16, 0xffff>;
58multiclass ExtractLaneExtended<string sign, bits<32> baseInst> {
59  defm "" : ExtractLane<v16i8, "i8x16", LaneIdx16, I32,  baseInst, sign,
60                        !cast<PatFrag>("extract_i8x16"#sign)>;
61  defm "" : ExtractLane<v8i16, "i16x8", LaneIdx8, I32, !add(baseInst, 2), sign,
62                        !cast<PatFrag>("extract_i16x8"#sign)>;
63}
64multiclass ReplaceLane<ValueType vec_t, string vec, ImmLeaf imm_t,
65                       WebAssemblyRegClass reg_t, ValueType lane_t,
66                       bits<32> simdop> {
67  defm REPLACE_LANE_#vec_t :
68      SIMD_I<(outs V128:$dst), (ins V128:$vec, i32imm_op:$idx, reg_t:$x),
69             (outs), (ins i32imm_op:$idx),
70             [(set V128:$dst, (vector_insert
71               (vec_t V128:$vec), (lane_t reg_t:$x), (i32 imm_t:$idx)))],
72             vec#".replace_lane\t$dst, $vec, $idx, $x",
73             vec#".replace_lane\t$idx", simdop>;
74}
75def splat2 : PatFrag<(ops node:$x), (build_vector node:$x, node:$x)>;
76def splat4 : PatFrag<(ops node:$x), (build_vector
77                       node:$x, node:$x, node:$x, node:$x)>;
78def splat8 : PatFrag<(ops node:$x), (build_vector
79                       node:$x, node:$x, node:$x, node:$x,
80                       node:$x, node:$x, node:$x, node:$x)>;
81def splat16 : PatFrag<(ops node:$x), (build_vector
82                        node:$x, node:$x, node:$x, node:$x,
83                        node:$x, node:$x, node:$x, node:$x,
84                        node:$x, node:$x, node:$x, node:$x,
85                        node:$x, node:$x, node:$x, node:$x)>;
86multiclass Splat<ValueType vec_t, string vec, WebAssemblyRegClass reg_t,
87                 PatFrag splat_pat, bits<32> simdop> {
88  // Prefer splats over v128.const for const splats (65 is lowest that works)
89  let AddedComplexity = 65 in
90  defm SPLAT_#vec_t : SIMD_I<(outs V128:$dst), (ins reg_t:$x), (outs), (ins),
91                             [(set (vec_t V128:$dst), (splat_pat reg_t:$x))],
92                             vec#".splat\t$dst, $x", vec#".splat", simdop>;
93}
94multiclass SIMDBinary<ValueType vec_t, string vec, SDNode node, string name,
95                      bits<32> simdop> {
96  defm _#vec_t : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
97                        (outs), (ins),
98                        [(set (vec_t V128:$dst), (node V128:$lhs, V128:$rhs))],
99                        vec#"."#name#"\t$dst, $lhs, $rhs", vec#"."#name,
100                        simdop>;
101}
102multiclass SIMDBinaryIntNoI64x2<SDNode node, string name, bits<32> baseInst> {
103  defm "" : SIMDBinary<v16i8, "i8x16", node, name, baseInst>;
104  defm "" : SIMDBinary<v8i16, "i16x8", node, name, !add(baseInst, 1)>;
105  defm "" : SIMDBinary<v4i32, "i32x4", node, name, !add(baseInst, 2)>;
106}
107multiclass SIMDBinaryInt<SDNode node, string name, bits<32> baseInst> {
108  defm "" : SIMDBinaryIntNoI64x2<node, name, baseInst>;
109  defm "" : SIMDBinary<v2i64, "i64x2", node, name, !add(baseInst, 3)>;
110}
111multiclass SIMDBinaryFP<SDNode node, string name, bits<32> baseInst> {
112  defm "" : SIMDBinary<v4f32, "f32x4", node, name, baseInst>;
113  defm "" : SIMDBinary<v2f64, "f64x2", node, name, !add(baseInst, 1)>;
114}
115multiclass SIMDBitwise<SDNode node, string name, bits<32> simdop> {
116  defm "" : SIMDBinary<v16i8, "v128", node, name, simdop>;
117  defm "" : SIMDBinary<v8i16, "v128", node, name, simdop>;
118  defm "" : SIMDBinary<v4i32, "v128", node, name, simdop>;
119  defm "" : SIMDBinary<v2i64, "v128", node, name, simdop>;
120}
121multiclass SIMDNot<ValueType vec_t, PatFrag splat_pat, ValueType lane_t> {
122  defm NOT_#vec_t : SIMD_I<(outs V128:$dst), (ins V128:$vec),
123                           (outs), (ins),
124                           [(set
125                             (vec_t V128:$dst),
126                             (vec_t (xor
127                               (vec_t V128:$vec),
128                               (vec_t (splat_pat (lane_t -1)))
129                             ))
130                           )],
131                           "v128.not\t$dst, $vec", "v128.not", 62>;
132}
133
134let Defs = [ARGUMENTS] in {
135defm "" : ConstVec<v16i8,
136                   (ins vec_i8imm_op:$i0, vec_i8imm_op:$i1,
137                        vec_i8imm_op:$i2, vec_i8imm_op:$i3,
138                        vec_i8imm_op:$i4, vec_i8imm_op:$i5,
139                        vec_i8imm_op:$i6, vec_i8imm_op:$i7,
140                        vec_i8imm_op:$i8, vec_i8imm_op:$i9,
141                        vec_i8imm_op:$iA, vec_i8imm_op:$iB,
142                        vec_i8imm_op:$iC, vec_i8imm_op:$iD,
143                        vec_i8imm_op:$iE, vec_i8imm_op:$iF),
144                   (build_vector ImmI8:$i0, ImmI8:$i1, ImmI8:$i2, ImmI8:$i3,
145                                 ImmI8:$i4, ImmI8:$i5, ImmI8:$i6, ImmI8:$i7,
146                                 ImmI8:$i8, ImmI8:$i9, ImmI8:$iA, ImmI8:$iB,
147                                 ImmI8:$iC, ImmI8:$iD, ImmI8:$iE, ImmI8:$iF),
148                   !strconcat("$i0, $i1, $i2, $i3, $i4, $i5, $i6, $i7, ",
149                              "$i8, $i9, $iA, $iB, $iC, $iD, $iE, $iF")>;
150defm "" : ConstVec<v8i16,
151                   (ins vec_i16imm_op:$i0, vec_i16imm_op:$i1,
152                        vec_i16imm_op:$i2, vec_i16imm_op:$i3,
153                        vec_i16imm_op:$i4, vec_i16imm_op:$i5,
154                        vec_i16imm_op:$i6, vec_i16imm_op:$i7),
155                   (build_vector
156                     ImmI16:$i0, ImmI16:$i1, ImmI16:$i2, ImmI16:$i3,
157                     ImmI16:$i4, ImmI16:$i5, ImmI16:$i6, ImmI16:$i7),
158                   "$i0, $i1, $i2, $i3, $i4, $i5, $i6, $i7">;
159defm "" : ConstVec<v4i32,
160                   (ins vec_i32imm_op:$i0, vec_i32imm_op:$i1,
161                        vec_i32imm_op:$i2, vec_i32imm_op:$i3),
162                   (build_vector (i32 imm:$i0), (i32 imm:$i1),
163                                 (i32 imm:$i2), (i32 imm:$i3)),
164                   "$i0, $i1, $i2, $i3">;
165defm "" : ConstVec<v2i64,
166                  (ins vec_i64imm_op:$i0, vec_i64imm_op:$i1),
167                  (build_vector (i64 imm:$i0), (i64 imm:$i1)),
168                  "$i0, $i1">;
169defm "" : ConstVec<v4f32,
170                   (ins f32imm_op:$i0, f32imm_op:$i1,
171                        f32imm_op:$i2, f32imm_op:$i3),
172                   (build_vector (f32 fpimm:$i0), (f32 fpimm:$i1),
173                                 (f32 fpimm:$i2), (f32 fpimm:$i3)),
174                   "$i0, $i1, $i2, $i3">;
175defm "" : ConstVec<v2f64,
176                  (ins f64imm_op:$i0, f64imm_op:$i1),
177                  (build_vector (f64 fpimm:$i0), (f64 fpimm:$i1)),
178                  "$i0, $i1">;
179
180defm "" : ExtractLaneExtended<"_s", 9>;
181defm "" : ExtractLaneExtended<"_u", 10>;
182defm "" : ExtractLane<v4i32, "i32x4", LaneIdx4, I32, 13>;
183defm "" : ExtractLane<v2i64, "i64x2", LaneIdx2, I64, 14>;
184defm "" : ExtractLane<v4f32, "f32x4", LaneIdx4, F32, 15>;
185defm "" : ExtractLane<v2f64, "f64x2", LaneIdx2, F64, 16>;
186
187defm "" : ReplaceLane<v16i8, "i8x16", LaneIdx16, I32, i32, 17>;
188defm "" : ReplaceLane<v8i16, "i16x8", LaneIdx8, I32, i32, 18>;
189defm "" : ReplaceLane<v4i32, "i32x4", LaneIdx4, I32, i32, 19>;
190defm "" : ReplaceLane<v2i64, "i64x2", LaneIdx2, I64, i64, 20>;
191defm "" : ReplaceLane<v4f32, "f32x4", LaneIdx4, F32, f32, 21>;
192defm "" : ReplaceLane<v2f64, "f64x2", LaneIdx2, F64, f64, 22>;
193
194defm "" : Splat<v16i8, "i8x16", I32, splat16, 3>;
195defm "" : Splat<v8i16, "i16x8", I32, splat8, 4>;
196defm "" : Splat<v4i32, "i32x4", I32, splat4, 5>;
197defm "" : Splat<v2i64, "i64x2", I64, splat2, 6>;
198defm "" : Splat<v4f32, "f32x4", F32, splat4, 7>;
199defm "" : Splat<v2f64, "f64x2", F64, splat2, 8>;
200
201let isCommutable = 1 in {
202defm ADD : SIMDBinaryInt<add, "add", 24>;
203defm ADD : SIMDBinaryFP<fadd, "add", 122>;
204defm MUL : SIMDBinaryIntNoI64x2<mul, "mul", 32>;
205defm MUL : SIMDBinaryFP<fmul, "mul", 128>;
206} // isCommutable = 1
207
208defm SUB : SIMDBinaryInt<sub, "sub", 28>;
209defm SUB : SIMDBinaryFP<fsub, "sub", 124>;
210defm DIV : SIMDBinaryFP<fdiv, "div", 126>;
211
212let isCommutable = 1 in {
213defm AND : SIMDBitwise<and, "and", 59>;
214defm OR : SIMDBitwise<or, "or", 60>;
215defm XOR : SIMDBitwise<xor, "xor", 61>;
216} // isCommutable = 1
217
218defm "" : SIMDNot<v16i8, splat16, i32>;
219defm "" : SIMDNot<v8i16, splat8, i32>;
220defm "" : SIMDNot<v4i32, splat4, i32>;
221defm "" : SIMDNot<v2i64, splat2, i64>;
222
223} // Defs = [ARGUMENTS]
224
225// follow convention of making implicit expansions unsigned
226def : Pat<(i32 (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx))),
227          (EXTRACT_LANE_v16i8_u V128:$vec, (i32 LaneIdx16:$idx))>;
228def : Pat<(i32 (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx))),
229          (EXTRACT_LANE_v8i16_u V128:$vec, (i32 LaneIdx8:$idx))>;
230
231// arbitrary other BUILD_VECTOR patterns
232def : Pat<(v16i8 (build_vector
233            (i32 I32:$x0), (i32 I32:$x1), (i32 I32:$x2), (i32 I32:$x3),
234            (i32 I32:$x4), (i32 I32:$x5), (i32 I32:$x6), (i32 I32:$x7),
235            (i32 I32:$x8), (i32 I32:$x9), (i32 I32:$x10), (i32 I32:$x11),
236            (i32 I32:$x12), (i32 I32:$x13), (i32 I32:$x14), (i32 I32:$x15)
237          )),
238          (v16i8 (REPLACE_LANE_v16i8
239            (v16i8 (REPLACE_LANE_v16i8
240              (v16i8 (REPLACE_LANE_v16i8
241                (v16i8 (REPLACE_LANE_v16i8
242                  (v16i8 (REPLACE_LANE_v16i8
243                    (v16i8 (REPLACE_LANE_v16i8
244                      (v16i8 (REPLACE_LANE_v16i8
245                        (v16i8 (REPLACE_LANE_v16i8
246                          (v16i8 (REPLACE_LANE_v16i8
247                            (v16i8 (REPLACE_LANE_v16i8
248                              (v16i8 (REPLACE_LANE_v16i8
249                                (v16i8 (REPLACE_LANE_v16i8
250                                  (v16i8 (REPLACE_LANE_v16i8
251                                    (v16i8 (REPLACE_LANE_v16i8
252                                      (v16i8 (REPLACE_LANE_v16i8
253                                        (v16i8 (SPLAT_v16i8 (i32 I32:$x0))),
254                                        1, I32:$x1
255                                      )),
256                                      2, I32:$x2
257                                    )),
258                                    3, I32:$x3
259                                  )),
260                                  4, I32:$x4
261                                )),
262                                5, I32:$x5
263                              )),
264                              6, I32:$x6
265                            )),
266                            7, I32:$x7
267                          )),
268                          8, I32:$x8
269                        )),
270                        9, I32:$x9
271                      )),
272                      10, I32:$x10
273                    )),
274                    11, I32:$x11
275                  )),
276                  12, I32:$x12
277                )),
278                13, I32:$x13
279              )),
280              14, I32:$x14
281            )),
282            15, I32:$x15
283          ))>;
284def : Pat<(v8i16 (build_vector
285            (i32 I32:$x0), (i32 I32:$x1), (i32 I32:$x2), (i32 I32:$x3),
286            (i32 I32:$x4), (i32 I32:$x5), (i32 I32:$x6), (i32 I32:$x7)
287          )),
288          (v8i16 (REPLACE_LANE_v8i16
289            (v8i16 (REPLACE_LANE_v8i16
290              (v8i16 (REPLACE_LANE_v8i16
291                (v8i16 (REPLACE_LANE_v8i16
292                  (v8i16 (REPLACE_LANE_v8i16
293                    (v8i16 (REPLACE_LANE_v8i16
294                      (v8i16 (REPLACE_LANE_v8i16
295                        (v8i16 (SPLAT_v8i16 (i32 I32:$x0))),
296                        1, I32:$x1
297                      )),
298                      2, I32:$x2
299                    )),
300                    3, I32:$x3
301                  )),
302                  4, I32:$x4
303                )),
304                5, I32:$x5
305              )),
306              6, I32:$x6
307            )),
308            7, I32:$x7
309          ))>;
310def : Pat<(v4i32 (build_vector
311            (i32 I32:$x0), (i32 I32:$x1), (i32 I32:$x2), (i32 I32:$x3)
312          )),
313          (v4i32 (REPLACE_LANE_v4i32
314            (v4i32 (REPLACE_LANE_v4i32
315              (v4i32 (REPLACE_LANE_v4i32
316                (v4i32 (SPLAT_v4i32 (i32 I32:$x0))),
317                1, I32:$x1
318              )),
319              2, I32:$x2
320            )),
321            3, I32:$x3
322          ))>;
323def : Pat<(v2i64 (build_vector (i64 I64:$x0), (i64 I64:$x1))),
324          (v2i64 (REPLACE_LANE_v2i64
325            (v2i64 (SPLAT_v2i64 (i64 I64:$x0))), 1, I64:$x1))>;
326def : Pat<(v4f32 (build_vector
327            (f32 F32:$x0), (f32 F32:$x1), (f32 F32:$x2), (f32 F32:$x3)
328          )),
329          (v4f32 (REPLACE_LANE_v4f32
330            (v4f32 (REPLACE_LANE_v4f32
331              (v4f32 (REPLACE_LANE_v4f32
332                (v4f32 (SPLAT_v4f32 (f32 F32:$x0))),
333                1, F32:$x1
334              )),
335              2, F32:$x2
336            )),
337            3, F32:$x3
338          ))>;
339def : Pat<(v2f64 (build_vector (f64 F64:$x0), (f64 F64:$x1))),
340          (v2f64 (REPLACE_LANE_v2f64
341            (v2f64 (SPLAT_v2f64 (f64 F64:$x0))), 1, F64:$x1))>;
342