1// WebAssemblyInstrMemory.td-WebAssembly Memory codegen support -*- tablegen -*- 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// \brief WebAssembly Memory operand code-gen constructs. 12/// 13//===----------------------------------------------------------------------===// 14 15// FIXME: 16// - HasAddr64 17// - WebAssemblyTargetLowering::isLegalAddressingMode 18// - WebAssemblyTargetLowering having to do with atomics 19// - Each has optional alignment and immediate byte offset. 20 21// WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16 22// local types. These memory-only types instead zero- or sign-extend into local 23// types when loading, and truncate when storing. 24 25// Basic load. 26def LOAD_I32 : I<(outs I32:$dst), (ins I32:$addr), 27 [(set I32:$dst, (load I32:$addr))], 28 "i32.load $dst, $addr">; 29def LOAD_I64 : I<(outs I64:$dst), (ins I32:$addr), 30 [(set I64:$dst, (load I32:$addr))], 31 "i64.load $dst, $addr">; 32def LOAD_F32 : I<(outs F32:$dst), (ins I32:$addr), 33 [(set F32:$dst, (load I32:$addr))], 34 "f32.load $dst, $addr">; 35def LOAD_F64 : I<(outs F64:$dst), (ins I32:$addr), 36 [(set F64:$dst, (load I32:$addr))], 37 "f64.load $dst, $addr">; 38 39// Extending load. 40def LOAD8_S_I32 : I<(outs I32:$dst), (ins I32:$addr), 41 [(set I32:$dst, (sextloadi8 I32:$addr))], 42 "i32.load8_s $dst, $addr">; 43def LOAD8_U_I32 : I<(outs I32:$dst), (ins I32:$addr), 44 [(set I32:$dst, (zextloadi8 I32:$addr))], 45 "i32.load8_u $dst, $addr">; 46def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$addr), 47 [(set I32:$dst, (sextloadi16 I32:$addr))], 48 "i32.load16_s $dst, $addr">; 49def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$addr), 50 [(set I32:$dst, (zextloadi16 I32:$addr))], 51 "i32.load16_u $dst, $addr">; 52def LOAD8_S_I64 : I<(outs I64:$dst), (ins I32:$addr), 53 [(set I64:$dst, (sextloadi8 I32:$addr))], 54 "i64.load8_s $dst, $addr">; 55def LOAD8_U_I64 : I<(outs I64:$dst), (ins I32:$addr), 56 [(set I64:$dst, (zextloadi8 I32:$addr))], 57 "i64.load8_u $dst, $addr">; 58def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$addr), 59 [(set I64:$dst, (sextloadi16 I32:$addr))], 60 "i64.load16_s $dst, $addr">; 61def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$addr), 62 [(set I64:$dst, (zextloadi16 I32:$addr))], 63 "i64.load16_u $dst, $addr">; 64def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$addr), 65 [(set I64:$dst, (sextloadi32 I32:$addr))], 66 "i64.load32_s $dst, $addr">; 67def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$addr), 68 [(set I64:$dst, (zextloadi32 I32:$addr))], 69 "i64.load32_u $dst, $addr">; 70 71// "Don't care" extending load become zero-extending load. 72def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 $addr)>; 73def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD16_U_I32 $addr)>; 74def : Pat<(i64 (extloadi8 I32:$addr)), (LOAD8_U_I64 $addr)>; 75def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD16_U_I64 $addr)>; 76def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 $addr)>; 77 78// Basic store. 79// Note: WebAssembly inverts SelectionDAG's usual operand order. 80def STORE_I32 : I<(outs), (ins I32:$addr, I32:$val), 81 [(store i32:$val, I32:$addr)], 82 "i32.store $addr, $val">; 83def STORE_I64 : I<(outs), (ins I32:$addr, I64:$val), 84 [(store i64:$val, I32:$addr)], 85 "i64.store $addr, $val">; 86def STORE_F32 : I<(outs), (ins I32:$addr, F32:$val), 87 [(store f32:$val, I32:$addr)], 88 "f32.store $addr, $val">; 89def STORE_F64 : I<(outs), (ins I32:$addr, F64:$val), 90 [(store f64:$val, I32:$addr)], 91 "f64.store $addr, $val">; 92 93// Truncating store. 94def STORE8_I32 : I<(outs), (ins I32:$addr, I32:$val), 95 [(truncstorei8 I32:$val, I32:$addr)], 96 "i32.store8 $addr, $val">; 97def STORE16_I32 : I<(outs), (ins I32:$addr, I32:$val), 98 [(truncstorei16 I32:$val, I32:$addr)], 99 "i32.store16 $addr, $val">; 100def STORE8_I64 : I<(outs), (ins I32:$addr, I64:$val), 101 [(truncstorei8 I64:$val, I32:$addr)], 102 "i64.store8 $addr, $val">; 103def STORE16_I64 : I<(outs), (ins I32:$addr, I64:$val), 104 [(truncstorei16 I64:$val, I32:$addr)], 105 "i64.store16 $addr, $val">; 106def STORE32_I64 : I<(outs), (ins I32:$addr, I64:$val), 107 [(truncstorei32 I64:$val, I32:$addr)], 108 "i64.store32 $addr, $val">; 109 110// Memory size. 111def memory_size_I32 : I<(outs I32:$dst), (ins), 112 [(set I32:$dst, (int_wasm_memory_size))], 113 "i32.memory_size $dst">, 114 Requires<[HasAddr32]>; 115def memory_size_I64 : I<(outs I64:$dst), (ins), 116 [(set I64:$dst, (int_wasm_memory_size))], 117 "i64.memory_size $dst">, 118 Requires<[HasAddr64]>; 119 120// Grow memory. 121def grow_memory_I32 : I<(outs), (ins I32:$delta), 122 [(int_wasm_grow_memory I32:$delta)], 123 "i32.grow_memory $delta">, 124 Requires<[HasAddr32]>; 125def grow_memory_I64 : I<(outs), (ins I64:$delta), 126 [(int_wasm_grow_memory I64:$delta)], 127 "i64.grow_memory $delta">, 128 Requires<[HasAddr64]>; 129