1// WebAssemblyInstrMemory.td-WebAssembly Memory codegen support -*- tablegen -*- 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// \brief WebAssembly Memory operand code-gen constructs. 12/// 13//===----------------------------------------------------------------------===// 14 15// FIXME: 16// - HasAddr64 17// - WebAssemblyTargetLowering::isLegalAddressingMode 18// - WebAssemblyTargetLowering having to do with atomics 19// - Each has optional alignment and immediate byte offset. 20 21// WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16 22// local types. These memory-only types instead zero- or sign-extend into local 23// types when loading, and truncate when storing. 24 25// Basic load. 26def LOAD_I32 : I<(outs I32:$dst), (ins I32:$addr), 27 [(set I32:$dst, (load I32:$addr))]>; 28def LOAD_I64 : I<(outs I64:$dst), (ins I32:$addr), 29 [(set I64:$dst, (load I32:$addr))]>; 30def LOAD_F32 : I<(outs F32:$dst), (ins I32:$addr), 31 [(set F32:$dst, (load I32:$addr))]>; 32def LOAD_F64 : I<(outs F64:$dst), (ins I32:$addr), 33 [(set F64:$dst, (load I32:$addr))]>; 34 35// Extending load. 36def LOAD8_S_I32 : I<(outs I32:$dst), (ins I32:$addr), 37 [(set I32:$dst, (sextloadi8 I32:$addr))]>; 38def LOAD8_U_I32 : I<(outs I32:$dst), (ins I32:$addr), 39 [(set I32:$dst, (zextloadi8 I32:$addr))]>; 40def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$addr), 41 [(set I32:$dst, (sextloadi16 I32:$addr))]>; 42def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$addr), 43 [(set I32:$dst, (zextloadi16 I32:$addr))]>; 44def LOAD8_S_I64 : I<(outs I64:$dst), (ins I32:$addr), 45 [(set I64:$dst, (sextloadi8 I32:$addr))]>; 46def LOAD8_U_I64 : I<(outs I64:$dst), (ins I32:$addr), 47 [(set I64:$dst, (zextloadi8 I32:$addr))]>; 48def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$addr), 49 [(set I64:$dst, (sextloadi16 I32:$addr))]>; 50def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$addr), 51 [(set I64:$dst, (zextloadi16 I32:$addr))]>; 52def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$addr), 53 [(set I64:$dst, (sextloadi32 I32:$addr))]>; 54def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$addr), 55 [(set I64:$dst, (zextloadi32 I32:$addr))]>; 56 57// "Don't care" extending load become zero-extending load. 58def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 $addr)>; 59def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD16_U_I32 $addr)>; 60def : Pat<(i64 (extloadi8 I32:$addr)), (LOAD8_U_I64 $addr)>; 61def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD16_U_I64 $addr)>; 62def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 $addr)>; 63 64// Basic store. 65// Note: WebAssembly inverts SelectionDAG's usual operand order. 66def STORE_I32 : I<(outs), (ins I32:$addr, I32:$val), 67 [(store i32:$val, I32:$addr)]>; 68def STORE_I64 : I<(outs), (ins I32:$addr, I64:$val), 69 [(store i64:$val, I32:$addr)]>; 70def STORE_F32 : I<(outs), (ins I32:$addr, F32:$val), 71 [(store f32:$val, I32:$addr)]>; 72def STORE_F64 : I<(outs), (ins I32:$addr, F64:$val), 73 [(store f64:$val, I32:$addr)]>; 74 75// Truncating store. 76def STORE8_I32 : I<(outs), (ins I32:$addr, I32:$val), 77 [(truncstorei8 I32:$val, I32:$addr)]>; 78def STORE16_I32 : I<(outs), (ins I32:$addr, I32:$val), 79 [(truncstorei16 I32:$val, I32:$addr)]>; 80def STORE8_I64 : I<(outs), (ins I32:$addr, I64:$val), 81 [(truncstorei8 I64:$val, I32:$addr)]>; 82def STORE16_I64 : I<(outs), (ins I32:$addr, I64:$val), 83 [(truncstorei16 I64:$val, I32:$addr)]>; 84def STORE32_I64 : I<(outs), (ins I32:$addr, I64:$val), 85 [(truncstorei32 I64:$val, I32:$addr)]>; 86 87// Page size. 88def page_size_I32 : I<(outs I32:$dst), (ins), 89 [(set I32:$dst, (int_wasm_page_size))]>, 90 Requires<[HasAddr32]>; 91def page_size_I64 : I<(outs I64:$dst), (ins), 92 [(set I64:$dst, (int_wasm_page_size))]>, 93 Requires<[HasAddr64]>; 94 95// Memory size. 96def memory_size_I32 : I<(outs I32:$dst), (ins), 97 [(set I32:$dst, (int_wasm_memory_size))]>, 98 Requires<[HasAddr32]>; 99def memory_size_I64 : I<(outs I64:$dst), (ins), 100 [(set I64:$dst, (int_wasm_memory_size))]>, 101 Requires<[HasAddr64]>; 102 103// Resize memory. 104def resize_memory_I32 : I<(outs), (ins I32:$delta), 105 [(int_wasm_resize_memory I32:$delta)]>, 106 Requires<[HasAddr32]>; 107def resize_memory_I64 : I<(outs), (ins I64:$delta), 108 [(int_wasm_resize_memory I64:$delta)]>, 109 Requires<[HasAddr64]>; 110