1 //- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// This file defines the interfaces that WebAssembly uses to lower LLVM 12 /// code into a selection DAG. 13 /// 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H 17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H 18 19 #include "llvm/CodeGen/TargetLowering.h" 20 21 namespace llvm { 22 23 namespace WebAssemblyISD { 24 25 enum NodeType : unsigned { 26 FIRST_NUMBER = ISD::BUILTIN_OP_END, 27 #define HANDLE_NODETYPE(NODE) NODE, 28 #include "WebAssemblyISD.def" 29 #undef HANDLE_NODETYPE 30 }; 31 32 } // end namespace WebAssemblyISD 33 34 class WebAssemblySubtarget; 35 class WebAssemblyTargetMachine; 36 37 class WebAssemblyTargetLowering final : public TargetLowering { 38 public: 39 WebAssemblyTargetLowering(const TargetMachine &TM, 40 const WebAssemblySubtarget &STI); 41 42 private: 43 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the 44 /// right decision when generating code for different targets. 45 const WebAssemblySubtarget *Subtarget; 46 47 AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override; 48 FastISel *createFastISel(FunctionLoweringInfo &FuncInfo, 49 const TargetLibraryInfo *LibInfo) const override; 50 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; 51 MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override; 52 MachineBasicBlock * 53 EmitInstrWithCustomInserter(MachineInstr &MI, 54 MachineBasicBlock *MBB) const override; 55 const char *getTargetNodeName(unsigned Opcode) const override; 56 std::pair<unsigned, const TargetRegisterClass *> 57 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, 58 StringRef Constraint, MVT VT) const override; 59 bool isCheapToSpeculateCttz() const override; 60 bool isCheapToSpeculateCtlz() const override; 61 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, 62 unsigned AS, 63 Instruction *I = nullptr) const override; 64 bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, unsigned Align, 65 bool *Fast) const override; 66 bool isIntDivCheap(EVT VT, AttributeList Attr) const override; 67 68 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, 69 EVT VT) const override; 70 bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, 71 MachineFunction &MF, 72 unsigned Intrinsic) const override; 73 74 SDValue LowerCall(CallLoweringInfo &CLI, 75 SmallVectorImpl<SDValue> &InVals) const override; 76 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, 77 bool isVarArg, 78 const SmallVectorImpl<ISD::OutputArg> &Outs, 79 LLVMContext &Context) const override; 80 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 81 const SmallVectorImpl<ISD::OutputArg> &Outs, 82 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, 83 SelectionDAG &DAG) const override; 84 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 85 bool IsVarArg, 86 const SmallVectorImpl<ISD::InputArg> &Ins, 87 const SDLoc &DL, SelectionDAG &DAG, 88 SmallVectorImpl<SDValue> &InVals) const override; 89 90 // Custom lowering hooks. 91 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 92 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const; 93 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 94 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 95 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; 96 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 97 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 98 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; 99 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const; 100 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; 101 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const; 102 SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const; 103 }; 104 105 namespace WebAssembly { 106 FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 107 const TargetLibraryInfo *libInfo); 108 } // end namespace WebAssembly 109 110 } // end namespace llvm 111 112 #endif 113