1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file defines an instruction selector for the WebAssembly target.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
16 #include "WebAssembly.h"
17 #include "WebAssemblyTargetMachine.h"
18 #include "llvm/CodeGen/SelectionDAGISel.h"
19 #include "llvm/IR/Function.h" // To access function attributes.
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/KnownBits.h"
22 #include "llvm/Support/MathExtras.h"
23 #include "llvm/Support/raw_ostream.h"
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "wasm-isel"
27 
28 extern cl::opt<bool> EnableUnimplementedWasmSIMDInstrs;
29 
30 //===--------------------------------------------------------------------===//
31 /// WebAssembly-specific code to select WebAssembly machine instructions for
32 /// SelectionDAG operations.
33 ///
34 namespace {
35 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
36   /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
37   /// right decision when generating code for different targets.
38   const WebAssemblySubtarget *Subtarget;
39 
40   bool ForCodeSize;
41 
42 public:
43   WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &tm,
44                           CodeGenOpt::Level OptLevel)
45       : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
46   }
47 
48   StringRef getPassName() const override {
49     return "WebAssembly Instruction Selection";
50   }
51 
52   bool runOnMachineFunction(MachineFunction &MF) override {
53     ForCodeSize = MF.getFunction().hasFnAttribute(Attribute::OptimizeForSize) ||
54                   MF.getFunction().hasFnAttribute(Attribute::MinSize);
55     Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
56     return SelectionDAGISel::runOnMachineFunction(MF);
57   }
58 
59   void Select(SDNode *Node) override;
60 
61   bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
62                                     std::vector<SDValue> &OutOps) override;
63 
64 // Include the pieces autogenerated from the target description.
65 #include "WebAssemblyGenDAGISel.inc"
66 
67 private:
68   // add select functions here...
69 };
70 } // end anonymous namespace
71 
72 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
73   // If we have a custom node, we already have selected!
74   if (Node->isMachineOpcode()) {
75     LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
76     Node->setNodeId(-1);
77     return;
78   }
79 
80   // Few custom selection stuff. If we need WebAssembly-specific selection,
81   // uncomment this block add corresponding case statements.
82   /*
83   switch (Node->getOpcode()) {
84   default:
85     break;
86   }
87   */
88 
89   // Select the default instruction.
90   SelectCode(Node);
91 }
92 
93 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
94     const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
95   switch (ConstraintID) {
96   case InlineAsm::Constraint_i:
97   case InlineAsm::Constraint_m:
98     // We just support simple memory operands that just have a single address
99     // operand and need no special handling.
100     OutOps.push_back(Op);
101     return false;
102   default:
103     break;
104   }
105 
106   return true;
107 }
108 
109 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
110 /// for instruction scheduling.
111 FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
112                                              CodeGenOpt::Level OptLevel) {
113   return new WebAssemblyDAGToDAGISel(TM, OptLevel);
114 }
115