1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// This file defines an instruction selector for the WebAssembly target. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 16 #include "WebAssembly.h" 17 #include "WebAssemblyTargetMachine.h" 18 #include "llvm/CodeGen/SelectionDAGISel.h" 19 #include "llvm/IR/Function.h" // To access function attributes. 20 #include "llvm/Support/Debug.h" 21 #include "llvm/Support/KnownBits.h" 22 #include "llvm/Support/MathExtras.h" 23 #include "llvm/Support/raw_ostream.h" 24 using namespace llvm; 25 26 #define DEBUG_TYPE "wasm-isel" 27 28 extern cl::opt<bool> EnableUnimplementedWasmSIMDInstrs; 29 30 //===--------------------------------------------------------------------===// 31 /// WebAssembly-specific code to select WebAssembly machine instructions for 32 /// SelectionDAG operations. 33 /// 34 namespace { 35 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel { 36 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the 37 /// right decision when generating code for different targets. 38 const WebAssemblySubtarget *Subtarget; 39 40 bool ForCodeSize; 41 42 public: 43 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &tm, 44 CodeGenOpt::Level OptLevel) 45 : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) { 46 } 47 48 StringRef getPassName() const override { 49 return "WebAssembly Instruction Selection"; 50 } 51 52 bool runOnMachineFunction(MachineFunction &MF) override { 53 LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n" 54 "********** Function: " 55 << MF.getName() << '\n'); 56 57 ForCodeSize = MF.getFunction().hasFnAttribute(Attribute::OptimizeForSize) || 58 MF.getFunction().hasFnAttribute(Attribute::MinSize); 59 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>(); 60 return SelectionDAGISel::runOnMachineFunction(MF); 61 } 62 63 void Select(SDNode *Node) override; 64 65 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 66 std::vector<SDValue> &OutOps) override; 67 68 // Include the pieces autogenerated from the target description. 69 #include "WebAssemblyGenDAGISel.inc" 70 71 private: 72 // add select functions here... 73 }; 74 } // end anonymous namespace 75 76 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) { 77 // If we have a custom node, we already have selected! 78 if (Node->isMachineOpcode()) { 79 LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n"); 80 Node->setNodeId(-1); 81 return; 82 } 83 84 // Few custom selection stuff. If we need WebAssembly-specific selection, 85 // uncomment this block add corresponding case statements. 86 /* 87 switch (Node->getOpcode()) { 88 default: 89 break; 90 } 91 */ 92 93 // Select the default instruction. 94 SelectCode(Node); 95 } 96 97 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand( 98 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { 99 switch (ConstraintID) { 100 case InlineAsm::Constraint_i: 101 case InlineAsm::Constraint_m: 102 // We just support simple memory operands that just have a single address 103 // operand and need no special handling. 104 OutOps.push_back(Op); 105 return false; 106 default: 107 break; 108 } 109 110 return true; 111 } 112 113 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready 114 /// for instruction scheduling. 115 FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, 116 CodeGenOpt::Level OptLevel) { 117 return new WebAssemblyDAGToDAGISel(TM, OptLevel); 118 } 119