1 //===-- WebAssemblyExplicitLocals.cpp - Make Locals Explicit --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file converts any remaining registers into WebAssembly locals.
11 ///
12 /// After register stackification and register coloring, convert non-stackified
13 /// registers into locals, inserting explicit local.get and local.set
14 /// instructions.
15 ///
16 //===----------------------------------------------------------------------===//
17 
18 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
19 #include "WebAssembly.h"
20 #include "WebAssemblyDebugValueManager.h"
21 #include "WebAssemblyMachineFunctionInfo.h"
22 #include "WebAssemblySubtarget.h"
23 #include "WebAssemblyUtilities.h"
24 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/Passes.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/raw_ostream.h"
30 using namespace llvm;
31 
32 #define DEBUG_TYPE "wasm-explicit-locals"
33 
34 // A command-line option to disable this pass, and keep implicit locals
35 // for the purpose of testing with lit/llc ONLY.
36 // This produces output which is not valid WebAssembly, and is not supported
37 // by assemblers/disassemblers and other MC based tools.
38 static cl::opt<bool> WasmDisableExplicitLocals(
39     "wasm-disable-explicit-locals", cl::Hidden,
40     cl::desc("WebAssembly: output implicit locals in"
41              " instruction output for test purposes only."),
42     cl::init(false));
43 
44 namespace {
45 class WebAssemblyExplicitLocals final : public MachineFunctionPass {
46   StringRef getPassName() const override {
47     return "WebAssembly Explicit Locals";
48   }
49 
50   void getAnalysisUsage(AnalysisUsage &AU) const override {
51     AU.setPreservesCFG();
52     AU.addPreserved<MachineBlockFrequencyInfo>();
53     MachineFunctionPass::getAnalysisUsage(AU);
54   }
55 
56   bool runOnMachineFunction(MachineFunction &MF) override;
57 
58 public:
59   static char ID; // Pass identification, replacement for typeid
60   WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {}
61 };
62 } // end anonymous namespace
63 
64 char WebAssemblyExplicitLocals::ID = 0;
65 INITIALIZE_PASS(WebAssemblyExplicitLocals, DEBUG_TYPE,
66                 "Convert registers to WebAssembly locals", false, false)
67 
68 FunctionPass *llvm::createWebAssemblyExplicitLocals() {
69   return new WebAssemblyExplicitLocals();
70 }
71 
72 /// Return a local id number for the given register, assigning it a new one
73 /// if it doesn't yet have one.
74 static unsigned getLocalId(DenseMap<unsigned, unsigned> &Reg2Local,
75                            WebAssemblyFunctionInfo &MFI, unsigned &CurLocal,
76                            unsigned Reg) {
77   auto P = Reg2Local.insert(std::make_pair(Reg, CurLocal));
78   if (P.second) {
79     // Mark the local allocated for the frame base vreg.
80     if (MFI.isFrameBaseVirtual() && Reg == MFI.getFrameBaseVreg()) {
81       LLVM_DEBUG({
82         dbgs() << "Allocating local " << CurLocal << "for VReg "
83                << Register::virtReg2Index(Reg) << '\n';
84       });
85       MFI.setFrameBaseLocal(CurLocal);
86     }
87     ++CurLocal;
88   }
89   return P.first->second;
90 }
91 
92 /// Get the appropriate drop opcode for the given register class.
93 static unsigned getDropOpcode(const TargetRegisterClass *RC) {
94   if (RC == &WebAssembly::I32RegClass)
95     return WebAssembly::DROP_I32;
96   if (RC == &WebAssembly::I64RegClass)
97     return WebAssembly::DROP_I64;
98   if (RC == &WebAssembly::F32RegClass)
99     return WebAssembly::DROP_F32;
100   if (RC == &WebAssembly::F64RegClass)
101     return WebAssembly::DROP_F64;
102   if (RC == &WebAssembly::V128RegClass)
103     return WebAssembly::DROP_V128;
104   if (RC == &WebAssembly::EXNREFRegClass)
105     return WebAssembly::DROP_EXNREF;
106   llvm_unreachable("Unexpected register class");
107 }
108 
109 /// Get the appropriate local.get opcode for the given register class.
110 static unsigned getLocalGetOpcode(const TargetRegisterClass *RC) {
111   if (RC == &WebAssembly::I32RegClass)
112     return WebAssembly::LOCAL_GET_I32;
113   if (RC == &WebAssembly::I64RegClass)
114     return WebAssembly::LOCAL_GET_I64;
115   if (RC == &WebAssembly::F32RegClass)
116     return WebAssembly::LOCAL_GET_F32;
117   if (RC == &WebAssembly::F64RegClass)
118     return WebAssembly::LOCAL_GET_F64;
119   if (RC == &WebAssembly::V128RegClass)
120     return WebAssembly::LOCAL_GET_V128;
121   if (RC == &WebAssembly::EXNREFRegClass)
122     return WebAssembly::LOCAL_GET_EXNREF;
123   llvm_unreachable("Unexpected register class");
124 }
125 
126 /// Get the appropriate local.set opcode for the given register class.
127 static unsigned getLocalSetOpcode(const TargetRegisterClass *RC) {
128   if (RC == &WebAssembly::I32RegClass)
129     return WebAssembly::LOCAL_SET_I32;
130   if (RC == &WebAssembly::I64RegClass)
131     return WebAssembly::LOCAL_SET_I64;
132   if (RC == &WebAssembly::F32RegClass)
133     return WebAssembly::LOCAL_SET_F32;
134   if (RC == &WebAssembly::F64RegClass)
135     return WebAssembly::LOCAL_SET_F64;
136   if (RC == &WebAssembly::V128RegClass)
137     return WebAssembly::LOCAL_SET_V128;
138   if (RC == &WebAssembly::EXNREFRegClass)
139     return WebAssembly::LOCAL_SET_EXNREF;
140   llvm_unreachable("Unexpected register class");
141 }
142 
143 /// Get the appropriate local.tee opcode for the given register class.
144 static unsigned getLocalTeeOpcode(const TargetRegisterClass *RC) {
145   if (RC == &WebAssembly::I32RegClass)
146     return WebAssembly::LOCAL_TEE_I32;
147   if (RC == &WebAssembly::I64RegClass)
148     return WebAssembly::LOCAL_TEE_I64;
149   if (RC == &WebAssembly::F32RegClass)
150     return WebAssembly::LOCAL_TEE_F32;
151   if (RC == &WebAssembly::F64RegClass)
152     return WebAssembly::LOCAL_TEE_F64;
153   if (RC == &WebAssembly::V128RegClass)
154     return WebAssembly::LOCAL_TEE_V128;
155   if (RC == &WebAssembly::EXNREFRegClass)
156     return WebAssembly::LOCAL_TEE_EXNREF;
157   llvm_unreachable("Unexpected register class");
158 }
159 
160 /// Get the type associated with the given register class.
161 static MVT typeForRegClass(const TargetRegisterClass *RC) {
162   if (RC == &WebAssembly::I32RegClass)
163     return MVT::i32;
164   if (RC == &WebAssembly::I64RegClass)
165     return MVT::i64;
166   if (RC == &WebAssembly::F32RegClass)
167     return MVT::f32;
168   if (RC == &WebAssembly::F64RegClass)
169     return MVT::f64;
170   if (RC == &WebAssembly::V128RegClass)
171     return MVT::v16i8;
172   if (RC == &WebAssembly::EXNREFRegClass)
173     return MVT::exnref;
174   llvm_unreachable("unrecognized register class");
175 }
176 
177 /// Given a MachineOperand of a stackified vreg, return the instruction at the
178 /// start of the expression tree.
179 static MachineInstr *findStartOfTree(MachineOperand &MO,
180                                      MachineRegisterInfo &MRI,
181                                      WebAssemblyFunctionInfo &MFI) {
182   Register Reg = MO.getReg();
183   assert(MFI.isVRegStackified(Reg));
184   MachineInstr *Def = MRI.getVRegDef(Reg);
185 
186   // Find the first stackified use and proceed from there.
187   for (MachineOperand &DefMO : Def->explicit_uses()) {
188     if (!DefMO.isReg())
189       continue;
190     return findStartOfTree(DefMO, MRI, MFI);
191   }
192 
193   // If there were no stackified uses, we've reached the start.
194   return Def;
195 }
196 
197 bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
198   LLVM_DEBUG(dbgs() << "********** Make Locals Explicit **********\n"
199                        "********** Function: "
200                     << MF.getName() << '\n');
201 
202   // Disable this pass if directed to do so.
203   if (WasmDisableExplicitLocals)
204     return false;
205 
206   bool Changed = false;
207   MachineRegisterInfo &MRI = MF.getRegInfo();
208   WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
209   const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
210 
211   // Map non-stackified virtual registers to their local ids.
212   DenseMap<unsigned, unsigned> Reg2Local;
213 
214   // Handle ARGUMENTS first to ensure that they get the designated numbers.
215   for (MachineBasicBlock::iterator I = MF.begin()->begin(),
216                                    E = MF.begin()->end();
217        I != E;) {
218     MachineInstr &MI = *I++;
219     if (!WebAssembly::isArgument(MI.getOpcode()))
220       break;
221     Register Reg = MI.getOperand(0).getReg();
222     assert(!MFI.isVRegStackified(Reg));
223     Reg2Local[Reg] = static_cast<unsigned>(MI.getOperand(1).getImm());
224     MI.eraseFromParent();
225     Changed = true;
226   }
227 
228   // Start assigning local numbers after the last parameter.
229   unsigned CurLocal = static_cast<unsigned>(MFI.getParams().size());
230 
231   // Precompute the set of registers that are unused, so that we can insert
232   // drops to their defs.
233   BitVector UseEmpty(MRI.getNumVirtRegs());
234   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I)
235     UseEmpty[I] = MRI.use_empty(Register::index2VirtReg(I));
236 
237   // Visit each instruction in the function.
238   for (MachineBasicBlock &MBB : MF) {
239     for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
240       MachineInstr &MI = *I++;
241       assert(!WebAssembly::isArgument(MI.getOpcode()));
242 
243       if (MI.isDebugInstr() || MI.isLabel())
244         continue;
245 
246       // Replace tee instructions with local.tee. The difference is that tee
247       // instructions have two defs, while local.tee instructions have one def
248       // and an index of a local to write to.
249       if (WebAssembly::isTee(MI.getOpcode())) {
250         assert(MFI.isVRegStackified(MI.getOperand(0).getReg()));
251         assert(!MFI.isVRegStackified(MI.getOperand(1).getReg()));
252         Register OldReg = MI.getOperand(2).getReg();
253         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
254 
255         // Stackify the input if it isn't stackified yet.
256         if (!MFI.isVRegStackified(OldReg)) {
257           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
258           Register NewReg = MRI.createVirtualRegister(RC);
259           unsigned Opc = getLocalGetOpcode(RC);
260           BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg)
261               .addImm(LocalId);
262           MI.getOperand(2).setReg(NewReg);
263           MFI.stackifyVReg(NewReg);
264         }
265 
266         // Replace the TEE with a LOCAL_TEE.
267         unsigned LocalId =
268             getLocalId(Reg2Local, MFI, CurLocal, MI.getOperand(1).getReg());
269         unsigned Opc = getLocalTeeOpcode(RC);
270         BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
271                 MI.getOperand(0).getReg())
272             .addImm(LocalId)
273             .addReg(MI.getOperand(2).getReg());
274 
275         WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId);
276 
277         MI.eraseFromParent();
278         Changed = true;
279         continue;
280       }
281 
282       // Insert local.sets for any defs that aren't stackified yet. Currently
283       // we handle at most one def.
284       assert(MI.getDesc().getNumDefs() <= 1);
285       if (MI.getDesc().getNumDefs() == 1) {
286         Register OldReg = MI.getOperand(0).getReg();
287         if (!MFI.isVRegStackified(OldReg)) {
288           const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
289           Register NewReg = MRI.createVirtualRegister(RC);
290           auto InsertPt = std::next(MI.getIterator());
291           if (MI.getOpcode() == WebAssembly::IMPLICIT_DEF) {
292             MI.eraseFromParent();
293             Changed = true;
294             continue;
295           }
296           if (UseEmpty[Register::virtReg2Index(OldReg)]) {
297             unsigned Opc = getDropOpcode(RC);
298             MachineInstr *Drop =
299                 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
300                     .addReg(NewReg);
301             // After the drop instruction, this reg operand will not be used
302             Drop->getOperand(0).setIsKill();
303           } else {
304             unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
305             unsigned Opc = getLocalSetOpcode(RC);
306 
307             WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId);
308 
309             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
310                 .addImm(LocalId)
311                 .addReg(NewReg);
312           }
313           MI.getOperand(0).setReg(NewReg);
314           // This register operand of the original instruction is now being used
315           // by the inserted drop or local.set instruction, so make it not dead
316           // yet.
317           MI.getOperand(0).setIsDead(false);
318           MFI.stackifyVReg(NewReg);
319           Changed = true;
320         }
321       }
322 
323       // Insert local.gets for any uses that aren't stackified yet.
324       MachineInstr *InsertPt = &MI;
325       for (MachineOperand &MO : reverse(MI.explicit_uses())) {
326         if (!MO.isReg())
327           continue;
328 
329         Register OldReg = MO.getReg();
330 
331         // Inline asm may have a def in the middle of the operands. Our contract
332         // with inline asm register operands is to provide local indices as
333         // immediates.
334         if (MO.isDef()) {
335           assert(MI.isInlineAsm());
336           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
337           // If this register operand is tied to another operand, we can't
338           // change it to an immediate. Untie it first.
339           MI.untieRegOperand(MI.getOperandNo(&MO));
340           MO.ChangeToImmediate(LocalId);
341           continue;
342         }
343 
344         // If we see a stackified register, prepare to insert subsequent
345         // local.gets before the start of its tree.
346         if (MFI.isVRegStackified(OldReg)) {
347           InsertPt = findStartOfTree(MO, MRI, MFI);
348           continue;
349         }
350 
351         // Our contract with inline asm register operands is to provide local
352         // indices as immediates.
353         if (MI.isInlineAsm()) {
354           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
355           // Untie it first if this reg operand is tied to another operand.
356           MI.untieRegOperand(MI.getOperandNo(&MO));
357           MO.ChangeToImmediate(LocalId);
358           continue;
359         }
360 
361         // Insert a local.get.
362         unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
363         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
364         Register NewReg = MRI.createVirtualRegister(RC);
365         unsigned Opc = getLocalGetOpcode(RC);
366         InsertPt =
367             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg)
368                 .addImm(LocalId);
369         MO.setReg(NewReg);
370         MFI.stackifyVReg(NewReg);
371         Changed = true;
372       }
373 
374       // Coalesce and eliminate COPY instructions.
375       if (WebAssembly::isCopy(MI.getOpcode())) {
376         MRI.replaceRegWith(MI.getOperand(1).getReg(),
377                            MI.getOperand(0).getReg());
378         MI.eraseFromParent();
379         Changed = true;
380       }
381     }
382   }
383 
384   // Define the locals.
385   // TODO: Sort the locals for better compression.
386   MFI.setNumLocals(CurLocal - MFI.getParams().size());
387   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
388     unsigned Reg = Register::index2VirtReg(I);
389     auto RL = Reg2Local.find(Reg);
390     if (RL == Reg2Local.end() || RL->second < MFI.getParams().size())
391       continue;
392 
393     MFI.setLocal(RL->second - MFI.getParams().size(),
394                  typeForRegClass(MRI.getRegClass(Reg)));
395     Changed = true;
396   }
397 
398 #ifndef NDEBUG
399   // Assert that all registers have been stackified at this point.
400   for (const MachineBasicBlock &MBB : MF) {
401     for (const MachineInstr &MI : MBB) {
402       if (MI.isDebugInstr() || MI.isLabel())
403         continue;
404       for (const MachineOperand &MO : MI.explicit_operands()) {
405         assert(
406             (!MO.isReg() || MRI.use_empty(MO.getReg()) ||
407              MFI.isVRegStackified(MO.getReg())) &&
408             "WebAssemblyExplicitLocals failed to stackify a register operand");
409       }
410     }
411   }
412 #endif
413 
414   return Changed;
415 }
416