1 //===-- WebAssemblyExplicitLocals.cpp - Make Locals Explicit --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file converts any remaining registers into WebAssembly locals.
11 ///
12 /// After register stackification and register coloring, convert non-stackified
13 /// registers into locals, inserting explicit local.get and local.set
14 /// instructions.
15 ///
16 //===----------------------------------------------------------------------===//
17 
18 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
19 #include "WebAssembly.h"
20 #include "WebAssemblyDebugValueManager.h"
21 #include "WebAssemblyMachineFunctionInfo.h"
22 #include "WebAssemblySubtarget.h"
23 #include "WebAssemblyUtilities.h"
24 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/Passes.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/raw_ostream.h"
30 using namespace llvm;
31 
32 #define DEBUG_TYPE "wasm-explicit-locals"
33 
34 namespace {
35 class WebAssemblyExplicitLocals final : public MachineFunctionPass {
36   StringRef getPassName() const override {
37     return "WebAssembly Explicit Locals";
38   }
39 
40   void getAnalysisUsage(AnalysisUsage &AU) const override {
41     AU.setPreservesCFG();
42     AU.addPreserved<MachineBlockFrequencyInfo>();
43     MachineFunctionPass::getAnalysisUsage(AU);
44   }
45 
46   bool runOnMachineFunction(MachineFunction &MF) override;
47 
48 public:
49   static char ID; // Pass identification, replacement for typeid
50   WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {}
51 };
52 } // end anonymous namespace
53 
54 char WebAssemblyExplicitLocals::ID = 0;
55 INITIALIZE_PASS(WebAssemblyExplicitLocals, DEBUG_TYPE,
56                 "Convert registers to WebAssembly locals", false, false)
57 
58 FunctionPass *llvm::createWebAssemblyExplicitLocals() {
59   return new WebAssemblyExplicitLocals();
60 }
61 
62 static void checkFrameBase(WebAssemblyFunctionInfo &MFI, unsigned Local,
63                            unsigned Reg) {
64   // Mark a local for the frame base vreg.
65   if (MFI.isFrameBaseVirtual() && Reg == MFI.getFrameBaseVreg()) {
66     LLVM_DEBUG({
67       dbgs() << "Allocating local " << Local << "for VReg "
68              << Register::virtReg2Index(Reg) << '\n';
69     });
70     MFI.setFrameBaseLocal(Local);
71   }
72 }
73 
74 /// Return a local id number for the given register, assigning it a new one
75 /// if it doesn't yet have one.
76 static unsigned getLocalId(DenseMap<unsigned, unsigned> &Reg2Local,
77                            WebAssemblyFunctionInfo &MFI, unsigned &CurLocal,
78                            unsigned Reg) {
79   auto P = Reg2Local.insert(std::make_pair(Reg, CurLocal));
80   if (P.second) {
81     checkFrameBase(MFI, CurLocal, Reg);
82     ++CurLocal;
83   }
84   return P.first->second;
85 }
86 
87 /// Get the appropriate drop opcode for the given register class.
88 static unsigned getDropOpcode(const TargetRegisterClass *RC) {
89   if (RC == &WebAssembly::I32RegClass)
90     return WebAssembly::DROP_I32;
91   if (RC == &WebAssembly::I64RegClass)
92     return WebAssembly::DROP_I64;
93   if (RC == &WebAssembly::F32RegClass)
94     return WebAssembly::DROP_F32;
95   if (RC == &WebAssembly::F64RegClass)
96     return WebAssembly::DROP_F64;
97   if (RC == &WebAssembly::V128RegClass)
98     return WebAssembly::DROP_V128;
99   if (RC == &WebAssembly::FUNCREFRegClass)
100     return WebAssembly::DROP_FUNCREF;
101   if (RC == &WebAssembly::EXTERNREFRegClass)
102     return WebAssembly::DROP_EXTERNREF;
103   if (RC == &WebAssembly::EXNREFRegClass)
104     return WebAssembly::DROP_EXNREF;
105   llvm_unreachable("Unexpected register class");
106 }
107 
108 /// Get the appropriate local.get opcode for the given register class.
109 static unsigned getLocalGetOpcode(const TargetRegisterClass *RC) {
110   if (RC == &WebAssembly::I32RegClass)
111     return WebAssembly::LOCAL_GET_I32;
112   if (RC == &WebAssembly::I64RegClass)
113     return WebAssembly::LOCAL_GET_I64;
114   if (RC == &WebAssembly::F32RegClass)
115     return WebAssembly::LOCAL_GET_F32;
116   if (RC == &WebAssembly::F64RegClass)
117     return WebAssembly::LOCAL_GET_F64;
118   if (RC == &WebAssembly::V128RegClass)
119     return WebAssembly::LOCAL_GET_V128;
120   if (RC == &WebAssembly::EXNREFRegClass)
121     return WebAssembly::LOCAL_GET_EXNREF;
122   if (RC == &WebAssembly::FUNCREFRegClass)
123     return WebAssembly::LOCAL_GET_FUNCREF;
124   if (RC == &WebAssembly::EXTERNREFRegClass)
125     return WebAssembly::LOCAL_GET_EXTERNREF;
126   llvm_unreachable("Unexpected register class");
127 }
128 
129 /// Get the appropriate local.set opcode for the given register class.
130 static unsigned getLocalSetOpcode(const TargetRegisterClass *RC) {
131   if (RC == &WebAssembly::I32RegClass)
132     return WebAssembly::LOCAL_SET_I32;
133   if (RC == &WebAssembly::I64RegClass)
134     return WebAssembly::LOCAL_SET_I64;
135   if (RC == &WebAssembly::F32RegClass)
136     return WebAssembly::LOCAL_SET_F32;
137   if (RC == &WebAssembly::F64RegClass)
138     return WebAssembly::LOCAL_SET_F64;
139   if (RC == &WebAssembly::V128RegClass)
140     return WebAssembly::LOCAL_SET_V128;
141   if (RC == &WebAssembly::EXNREFRegClass)
142     return WebAssembly::LOCAL_SET_EXNREF;
143   if (RC == &WebAssembly::FUNCREFRegClass)
144     return WebAssembly::LOCAL_SET_FUNCREF;
145   if (RC == &WebAssembly::EXTERNREFRegClass)
146     return WebAssembly::LOCAL_SET_EXTERNREF;
147   llvm_unreachable("Unexpected register class");
148 }
149 
150 /// Get the appropriate local.tee opcode for the given register class.
151 static unsigned getLocalTeeOpcode(const TargetRegisterClass *RC) {
152   if (RC == &WebAssembly::I32RegClass)
153     return WebAssembly::LOCAL_TEE_I32;
154   if (RC == &WebAssembly::I64RegClass)
155     return WebAssembly::LOCAL_TEE_I64;
156   if (RC == &WebAssembly::F32RegClass)
157     return WebAssembly::LOCAL_TEE_F32;
158   if (RC == &WebAssembly::F64RegClass)
159     return WebAssembly::LOCAL_TEE_F64;
160   if (RC == &WebAssembly::V128RegClass)
161     return WebAssembly::LOCAL_TEE_V128;
162   if (RC == &WebAssembly::EXNREFRegClass)
163     return WebAssembly::LOCAL_TEE_EXNREF;
164   if (RC == &WebAssembly::FUNCREFRegClass)
165     return WebAssembly::LOCAL_TEE_FUNCREF;
166   if (RC == &WebAssembly::EXTERNREFRegClass)
167     return WebAssembly::LOCAL_TEE_EXTERNREF;
168   llvm_unreachable("Unexpected register class");
169 }
170 
171 /// Get the type associated with the given register class.
172 static MVT typeForRegClass(const TargetRegisterClass *RC) {
173   if (RC == &WebAssembly::I32RegClass)
174     return MVT::i32;
175   if (RC == &WebAssembly::I64RegClass)
176     return MVT::i64;
177   if (RC == &WebAssembly::F32RegClass)
178     return MVT::f32;
179   if (RC == &WebAssembly::F64RegClass)
180     return MVT::f64;
181   if (RC == &WebAssembly::V128RegClass)
182     return MVT::v16i8;
183   if (RC == &WebAssembly::EXNREFRegClass)
184     return MVT::exnref;
185   if (RC == &WebAssembly::FUNCREFRegClass)
186     return MVT::funcref;
187   if (RC == &WebAssembly::EXTERNREFRegClass)
188     return MVT::externref;
189   llvm_unreachable("unrecognized register class");
190 }
191 
192 /// Given a MachineOperand of a stackified vreg, return the instruction at the
193 /// start of the expression tree.
194 static MachineInstr *findStartOfTree(MachineOperand &MO,
195                                      MachineRegisterInfo &MRI,
196                                      const WebAssemblyFunctionInfo &MFI) {
197   Register Reg = MO.getReg();
198   assert(MFI.isVRegStackified(Reg));
199   MachineInstr *Def = MRI.getVRegDef(Reg);
200 
201   // If this instruction has any non-stackified defs, it is the start
202   for (auto DefReg : Def->defs()) {
203     if (!MFI.isVRegStackified(DefReg.getReg())) {
204       return Def;
205     }
206   }
207 
208   // Find the first stackified use and proceed from there.
209   for (MachineOperand &DefMO : Def->explicit_uses()) {
210     if (!DefMO.isReg())
211       continue;
212     return findStartOfTree(DefMO, MRI, MFI);
213   }
214 
215   // If there were no stackified uses, we've reached the start.
216   return Def;
217 }
218 
219 bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
220   LLVM_DEBUG(dbgs() << "********** Make Locals Explicit **********\n"
221                        "********** Function: "
222                     << MF.getName() << '\n');
223 
224   bool Changed = false;
225   MachineRegisterInfo &MRI = MF.getRegInfo();
226   WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
227   const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
228 
229   // Map non-stackified virtual registers to their local ids.
230   DenseMap<unsigned, unsigned> Reg2Local;
231 
232   // Handle ARGUMENTS first to ensure that they get the designated numbers.
233   for (MachineBasicBlock::iterator I = MF.begin()->begin(),
234                                    E = MF.begin()->end();
235        I != E;) {
236     MachineInstr &MI = *I++;
237     if (!WebAssembly::isArgument(MI.getOpcode()))
238       break;
239     Register Reg = MI.getOperand(0).getReg();
240     assert(!MFI.isVRegStackified(Reg));
241     auto Local = static_cast<unsigned>(MI.getOperand(1).getImm());
242     Reg2Local[Reg] = Local;
243     checkFrameBase(MFI, Local, Reg);
244     MI.eraseFromParent();
245     Changed = true;
246   }
247 
248   // Start assigning local numbers after the last parameter.
249   unsigned CurLocal = static_cast<unsigned>(MFI.getParams().size());
250 
251   // Precompute the set of registers that are unused, so that we can insert
252   // drops to their defs.
253   BitVector UseEmpty(MRI.getNumVirtRegs());
254   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I)
255     UseEmpty[I] = MRI.use_empty(Register::index2VirtReg(I));
256 
257   // Visit each instruction in the function.
258   for (MachineBasicBlock &MBB : MF) {
259     for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
260       MachineInstr &MI = *I++;
261       assert(!WebAssembly::isArgument(MI.getOpcode()));
262 
263       if (MI.isDebugInstr() || MI.isLabel())
264         continue;
265 
266       if (MI.getOpcode() == WebAssembly::IMPLICIT_DEF) {
267         MI.eraseFromParent();
268         Changed = true;
269         continue;
270       }
271 
272       // Replace tee instructions with local.tee. The difference is that tee
273       // instructions have two defs, while local.tee instructions have one def
274       // and an index of a local to write to.
275       if (WebAssembly::isTee(MI.getOpcode())) {
276         assert(MFI.isVRegStackified(MI.getOperand(0).getReg()));
277         assert(!MFI.isVRegStackified(MI.getOperand(1).getReg()));
278         Register OldReg = MI.getOperand(2).getReg();
279         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
280 
281         // Stackify the input if it isn't stackified yet.
282         if (!MFI.isVRegStackified(OldReg)) {
283           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
284           Register NewReg = MRI.createVirtualRegister(RC);
285           unsigned Opc = getLocalGetOpcode(RC);
286           BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg)
287               .addImm(LocalId);
288           MI.getOperand(2).setReg(NewReg);
289           MFI.stackifyVReg(MRI, NewReg);
290         }
291 
292         // Replace the TEE with a LOCAL_TEE.
293         unsigned LocalId =
294             getLocalId(Reg2Local, MFI, CurLocal, MI.getOperand(1).getReg());
295         unsigned Opc = getLocalTeeOpcode(RC);
296         BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
297                 MI.getOperand(0).getReg())
298             .addImm(LocalId)
299             .addReg(MI.getOperand(2).getReg());
300 
301         WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId);
302 
303         MI.eraseFromParent();
304         Changed = true;
305         continue;
306       }
307 
308       // Insert local.sets for any defs that aren't stackified yet.
309       for (auto &Def : MI.defs()) {
310         Register OldReg = Def.getReg();
311         if (!MFI.isVRegStackified(OldReg)) {
312           const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
313           Register NewReg = MRI.createVirtualRegister(RC);
314           auto InsertPt = std::next(MI.getIterator());
315           if (UseEmpty[Register::virtReg2Index(OldReg)]) {
316             unsigned Opc = getDropOpcode(RC);
317             MachineInstr *Drop =
318                 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
319                     .addReg(NewReg);
320             // After the drop instruction, this reg operand will not be used
321             Drop->getOperand(0).setIsKill();
322             if (MFI.isFrameBaseVirtual() && OldReg == MFI.getFrameBaseVreg())
323               MFI.clearFrameBaseVreg();
324           } else {
325             unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
326             unsigned Opc = getLocalSetOpcode(RC);
327 
328             WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId);
329 
330             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
331                 .addImm(LocalId)
332                 .addReg(NewReg);
333           }
334           // This register operand of the original instruction is now being used
335           // by the inserted drop or local.set instruction, so make it not dead
336           // yet.
337           Def.setReg(NewReg);
338           Def.setIsDead(false);
339           MFI.stackifyVReg(MRI, NewReg);
340           Changed = true;
341         }
342       }
343 
344       // Insert local.gets for any uses that aren't stackified yet.
345       MachineInstr *InsertPt = &MI;
346       for (MachineOperand &MO : reverse(MI.explicit_uses())) {
347         if (!MO.isReg())
348           continue;
349 
350         Register OldReg = MO.getReg();
351 
352         // Inline asm may have a def in the middle of the operands. Our contract
353         // with inline asm register operands is to provide local indices as
354         // immediates.
355         if (MO.isDef()) {
356           assert(MI.isInlineAsm());
357           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
358           // If this register operand is tied to another operand, we can't
359           // change it to an immediate. Untie it first.
360           MI.untieRegOperand(MI.getOperandNo(&MO));
361           MO.ChangeToImmediate(LocalId);
362           continue;
363         }
364 
365         // If we see a stackified register, prepare to insert subsequent
366         // local.gets before the start of its tree.
367         if (MFI.isVRegStackified(OldReg)) {
368           InsertPt = findStartOfTree(MO, MRI, MFI);
369           continue;
370         }
371 
372         // Our contract with inline asm register operands is to provide local
373         // indices as immediates.
374         if (MI.isInlineAsm()) {
375           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
376           // Untie it first if this reg operand is tied to another operand.
377           MI.untieRegOperand(MI.getOperandNo(&MO));
378           MO.ChangeToImmediate(LocalId);
379           continue;
380         }
381 
382         // Insert a local.get.
383         unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
384         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
385         Register NewReg = MRI.createVirtualRegister(RC);
386         unsigned Opc = getLocalGetOpcode(RC);
387         InsertPt =
388             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg)
389                 .addImm(LocalId);
390         MO.setReg(NewReg);
391         MFI.stackifyVReg(MRI, NewReg);
392         Changed = true;
393       }
394 
395       // Coalesce and eliminate COPY instructions.
396       if (WebAssembly::isCopy(MI.getOpcode())) {
397         MRI.replaceRegWith(MI.getOperand(1).getReg(),
398                            MI.getOperand(0).getReg());
399         MI.eraseFromParent();
400         Changed = true;
401       }
402     }
403   }
404 
405   // Define the locals.
406   // TODO: Sort the locals for better compression.
407   MFI.setNumLocals(CurLocal - MFI.getParams().size());
408   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
409     unsigned Reg = Register::index2VirtReg(I);
410     auto RL = Reg2Local.find(Reg);
411     if (RL == Reg2Local.end() || RL->second < MFI.getParams().size())
412       continue;
413 
414     MFI.setLocal(RL->second - MFI.getParams().size(),
415                  typeForRegClass(MRI.getRegClass(Reg)));
416     Changed = true;
417   }
418 
419 #ifndef NDEBUG
420   // Assert that all registers have been stackified at this point.
421   for (const MachineBasicBlock &MBB : MF) {
422     for (const MachineInstr &MI : MBB) {
423       if (MI.isDebugInstr() || MI.isLabel())
424         continue;
425       for (const MachineOperand &MO : MI.explicit_operands()) {
426         assert(
427             (!MO.isReg() || MRI.use_empty(MO.getReg()) ||
428              MFI.isVRegStackified(MO.getReg())) &&
429             "WebAssemblyExplicitLocals failed to stackify a register operand");
430       }
431     }
432   }
433 #endif
434 
435   return Changed;
436 }
437