14fc4e42dSDan Gohman //===-- WebAssemblyExplicitLocals.cpp - Make Locals Explicit --------------===// 24fc4e42dSDan Gohman // 34fc4e42dSDan Gohman // The LLVM Compiler Infrastructure 44fc4e42dSDan Gohman // 54fc4e42dSDan Gohman // This file is distributed under the University of Illinois Open Source 64fc4e42dSDan Gohman // License. See LICENSE.TXT for details. 74fc4e42dSDan Gohman // 84fc4e42dSDan Gohman //===----------------------------------------------------------------------===// 94fc4e42dSDan Gohman /// 104fc4e42dSDan Gohman /// \file 114fc4e42dSDan Gohman /// \brief This file converts any remaining registers into WebAssembly locals. 124fc4e42dSDan Gohman /// 134fc4e42dSDan Gohman /// After register stackification and register coloring, convert non-stackified 144fc4e42dSDan Gohman /// registers into locals, inserting explicit get_local and set_local 154fc4e42dSDan Gohman /// instructions. 164fc4e42dSDan Gohman /// 174fc4e42dSDan Gohman //===----------------------------------------------------------------------===// 184fc4e42dSDan Gohman 194fc4e42dSDan Gohman #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 204fc4e42dSDan Gohman #include "WebAssembly.h" 214fc4e42dSDan Gohman #include "WebAssemblyMachineFunctionInfo.h" 224fc4e42dSDan Gohman #include "WebAssemblySubtarget.h" 234fc4e42dSDan Gohman #include "WebAssemblyUtilities.h" 244fc4e42dSDan Gohman #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" 254fc4e42dSDan Gohman #include "llvm/CodeGen/MachineInstrBuilder.h" 264fc4e42dSDan Gohman #include "llvm/CodeGen/MachineRegisterInfo.h" 274fc4e42dSDan Gohman #include "llvm/CodeGen/Passes.h" 284fc4e42dSDan Gohman #include "llvm/Support/Debug.h" 294fc4e42dSDan Gohman #include "llvm/Support/raw_ostream.h" 304fc4e42dSDan Gohman using namespace llvm; 314fc4e42dSDan Gohman 324fc4e42dSDan Gohman #define DEBUG_TYPE "wasm-explicit-locals" 334fc4e42dSDan Gohman 347d7409e5SDan Gohman // A command-line option to disable this pass. Note that this produces output 357d7409e5SDan Gohman // which is not valid WebAssembly, though it may be more convenient for writing 367d7409e5SDan Gohman // LLVM unit tests with. 377d7409e5SDan Gohman static cl::opt<bool> DisableWebAssemblyExplicitLocals( 387d7409e5SDan Gohman "disable-wasm-explicit-locals", cl::ReallyHidden, 397d7409e5SDan Gohman cl::desc("WebAssembly: Disable emission of get_local/set_local."), 407d7409e5SDan Gohman cl::init(false)); 417d7409e5SDan Gohman 424fc4e42dSDan Gohman namespace { 434fc4e42dSDan Gohman class WebAssemblyExplicitLocals final : public MachineFunctionPass { 444fc4e42dSDan Gohman StringRef getPassName() const override { 454fc4e42dSDan Gohman return "WebAssembly Explicit Locals"; 464fc4e42dSDan Gohman } 474fc4e42dSDan Gohman 484fc4e42dSDan Gohman void getAnalysisUsage(AnalysisUsage &AU) const override { 494fc4e42dSDan Gohman AU.setPreservesCFG(); 504fc4e42dSDan Gohman AU.addPreserved<MachineBlockFrequencyInfo>(); 514fc4e42dSDan Gohman MachineFunctionPass::getAnalysisUsage(AU); 524fc4e42dSDan Gohman } 534fc4e42dSDan Gohman 544fc4e42dSDan Gohman bool runOnMachineFunction(MachineFunction &MF) override; 554fc4e42dSDan Gohman 564fc4e42dSDan Gohman public: 574fc4e42dSDan Gohman static char ID; // Pass identification, replacement for typeid 584fc4e42dSDan Gohman WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {} 594fc4e42dSDan Gohman }; 604fc4e42dSDan Gohman } // end anonymous namespace 614fc4e42dSDan Gohman 624fc4e42dSDan Gohman char WebAssemblyExplicitLocals::ID = 0; 634fc4e42dSDan Gohman FunctionPass *llvm::createWebAssemblyExplicitLocals() { 644fc4e42dSDan Gohman return new WebAssemblyExplicitLocals(); 654fc4e42dSDan Gohman } 664fc4e42dSDan Gohman 674fc4e42dSDan Gohman /// Return a local id number for the given register, assigning it a new one 684fc4e42dSDan Gohman /// if it doesn't yet have one. 694fc4e42dSDan Gohman static unsigned getLocalId(DenseMap<unsigned, unsigned> &Reg2Local, 704fc4e42dSDan Gohman unsigned &CurLocal, unsigned Reg) { 71d934cb88SDan Gohman auto P = Reg2Local.insert(std::make_pair(Reg, CurLocal)); 72d934cb88SDan Gohman if (P.second) 73d934cb88SDan Gohman ++CurLocal; 74d934cb88SDan Gohman return P.first->second; 75d934cb88SDan Gohman } 76d934cb88SDan Gohman 77d934cb88SDan Gohman /// Get the appropriate drop opcode for the given register class. 78d934cb88SDan Gohman static unsigned getDropOpcode(const TargetRegisterClass *RC) { 79d934cb88SDan Gohman if (RC == &WebAssembly::I32RegClass) 80d934cb88SDan Gohman return WebAssembly::DROP_I32; 81d934cb88SDan Gohman if (RC == &WebAssembly::I64RegClass) 82d934cb88SDan Gohman return WebAssembly::DROP_I64; 83d934cb88SDan Gohman if (RC == &WebAssembly::F32RegClass) 84d934cb88SDan Gohman return WebAssembly::DROP_F32; 85d934cb88SDan Gohman if (RC == &WebAssembly::F64RegClass) 86d934cb88SDan Gohman return WebAssembly::DROP_F64; 87d934cb88SDan Gohman if (RC == &WebAssembly::V128RegClass) 88d934cb88SDan Gohman return WebAssembly::DROP_V128; 89*0de58729SHeejin Ahn if (RC == &WebAssembly::EXCEPT_REFRegClass) 90*0de58729SHeejin Ahn return WebAssembly::DROP_EXCEPT_REF; 91d934cb88SDan Gohman llvm_unreachable("Unexpected register class"); 924fc4e42dSDan Gohman } 934fc4e42dSDan Gohman 944fc4e42dSDan Gohman /// Get the appropriate get_local opcode for the given register class. 954fc4e42dSDan Gohman static unsigned getGetLocalOpcode(const TargetRegisterClass *RC) { 964fc4e42dSDan Gohman if (RC == &WebAssembly::I32RegClass) 974fc4e42dSDan Gohman return WebAssembly::GET_LOCAL_I32; 984fc4e42dSDan Gohman if (RC == &WebAssembly::I64RegClass) 994fc4e42dSDan Gohman return WebAssembly::GET_LOCAL_I64; 1004fc4e42dSDan Gohman if (RC == &WebAssembly::F32RegClass) 1014fc4e42dSDan Gohman return WebAssembly::GET_LOCAL_F32; 1024fc4e42dSDan Gohman if (RC == &WebAssembly::F64RegClass) 1034fc4e42dSDan Gohman return WebAssembly::GET_LOCAL_F64; 1044fc4e42dSDan Gohman if (RC == &WebAssembly::V128RegClass) 1054fc4e42dSDan Gohman return WebAssembly::GET_LOCAL_V128; 106*0de58729SHeejin Ahn if (RC == &WebAssembly::EXCEPT_REFRegClass) 107*0de58729SHeejin Ahn return WebAssembly::GET_LOCAL_EXCEPT_REF; 1084fc4e42dSDan Gohman llvm_unreachable("Unexpected register class"); 1094fc4e42dSDan Gohman } 1104fc4e42dSDan Gohman 1114fc4e42dSDan Gohman /// Get the appropriate set_local opcode for the given register class. 1124fc4e42dSDan Gohman static unsigned getSetLocalOpcode(const TargetRegisterClass *RC) { 1134fc4e42dSDan Gohman if (RC == &WebAssembly::I32RegClass) 1144fc4e42dSDan Gohman return WebAssembly::SET_LOCAL_I32; 1154fc4e42dSDan Gohman if (RC == &WebAssembly::I64RegClass) 1164fc4e42dSDan Gohman return WebAssembly::SET_LOCAL_I64; 1174fc4e42dSDan Gohman if (RC == &WebAssembly::F32RegClass) 1184fc4e42dSDan Gohman return WebAssembly::SET_LOCAL_F32; 1194fc4e42dSDan Gohman if (RC == &WebAssembly::F64RegClass) 1204fc4e42dSDan Gohman return WebAssembly::SET_LOCAL_F64; 1214fc4e42dSDan Gohman if (RC == &WebAssembly::V128RegClass) 1224fc4e42dSDan Gohman return WebAssembly::SET_LOCAL_V128; 123*0de58729SHeejin Ahn if (RC == &WebAssembly::EXCEPT_REFRegClass) 124*0de58729SHeejin Ahn return WebAssembly::SET_LOCAL_EXCEPT_REF; 1254fc4e42dSDan Gohman llvm_unreachable("Unexpected register class"); 1264fc4e42dSDan Gohman } 1274fc4e42dSDan Gohman 1284fc4e42dSDan Gohman /// Get the appropriate tee_local opcode for the given register class. 1294fc4e42dSDan Gohman static unsigned getTeeLocalOpcode(const TargetRegisterClass *RC) { 1304fc4e42dSDan Gohman if (RC == &WebAssembly::I32RegClass) 1314fc4e42dSDan Gohman return WebAssembly::TEE_LOCAL_I32; 1324fc4e42dSDan Gohman if (RC == &WebAssembly::I64RegClass) 1334fc4e42dSDan Gohman return WebAssembly::TEE_LOCAL_I64; 1344fc4e42dSDan Gohman if (RC == &WebAssembly::F32RegClass) 1354fc4e42dSDan Gohman return WebAssembly::TEE_LOCAL_F32; 1364fc4e42dSDan Gohman if (RC == &WebAssembly::F64RegClass) 1374fc4e42dSDan Gohman return WebAssembly::TEE_LOCAL_F64; 1384fc4e42dSDan Gohman if (RC == &WebAssembly::V128RegClass) 1394fc4e42dSDan Gohman return WebAssembly::TEE_LOCAL_V128; 140*0de58729SHeejin Ahn if (RC == &WebAssembly::EXCEPT_REFRegClass) 141*0de58729SHeejin Ahn return WebAssembly::TEE_LOCAL_EXCEPT_REF; 1424fc4e42dSDan Gohman llvm_unreachable("Unexpected register class"); 1434fc4e42dSDan Gohman } 1444fc4e42dSDan Gohman 1454fc4e42dSDan Gohman /// Get the type associated with the given register class. 1463acb187dSDan Gohman static MVT typeForRegClass(const TargetRegisterClass *RC) { 1474fc4e42dSDan Gohman if (RC == &WebAssembly::I32RegClass) 1483acb187dSDan Gohman return MVT::i32; 1494fc4e42dSDan Gohman if (RC == &WebAssembly::I64RegClass) 1503acb187dSDan Gohman return MVT::i64; 1514fc4e42dSDan Gohman if (RC == &WebAssembly::F32RegClass) 1523acb187dSDan Gohman return MVT::f32; 1534fc4e42dSDan Gohman if (RC == &WebAssembly::F64RegClass) 1543acb187dSDan Gohman return MVT::f64; 155*0de58729SHeejin Ahn if (RC == &WebAssembly::EXCEPT_REFRegClass) 156*0de58729SHeejin Ahn return MVT::ExceptRef; 1574fc4e42dSDan Gohman llvm_unreachable("unrecognized register class"); 1584fc4e42dSDan Gohman } 1594fc4e42dSDan Gohman 1604fc4e42dSDan Gohman /// Given a MachineOperand of a stackified vreg, return the instruction at the 1614fc4e42dSDan Gohman /// start of the expression tree. 1624fc4e42dSDan Gohman static MachineInstr *FindStartOfTree(MachineOperand &MO, 1634fc4e42dSDan Gohman MachineRegisterInfo &MRI, 1644fc4e42dSDan Gohman WebAssemblyFunctionInfo &MFI) { 1654fc4e42dSDan Gohman unsigned Reg = MO.getReg(); 1664fc4e42dSDan Gohman assert(MFI.isVRegStackified(Reg)); 1674fc4e42dSDan Gohman MachineInstr *Def = MRI.getVRegDef(Reg); 1684fc4e42dSDan Gohman 1694fc4e42dSDan Gohman // Find the first stackified use and proceed from there. 1704fc4e42dSDan Gohman for (MachineOperand &DefMO : Def->explicit_uses()) { 1714fc4e42dSDan Gohman if (!DefMO.isReg()) 1724fc4e42dSDan Gohman continue; 1734fc4e42dSDan Gohman return FindStartOfTree(DefMO, MRI, MFI); 1744fc4e42dSDan Gohman } 1754fc4e42dSDan Gohman 1764fc4e42dSDan Gohman // If there were no stackified uses, we've reached the start. 1774fc4e42dSDan Gohman return Def; 1784fc4e42dSDan Gohman } 1794fc4e42dSDan Gohman 1804fc4e42dSDan Gohman bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) { 1814fc4e42dSDan Gohman DEBUG(dbgs() << "********** Make Locals Explicit **********\n" 1824fc4e42dSDan Gohman "********** Function: " 1834fc4e42dSDan Gohman << MF.getName() << '\n'); 1844fc4e42dSDan Gohman 1857d7409e5SDan Gohman // Disable this pass if directed to do so. 1867d7409e5SDan Gohman if (DisableWebAssemblyExplicitLocals) 1877d7409e5SDan Gohman return false; 1887d7409e5SDan Gohman 18966caac57SDan Gohman // Disable this pass if we aren't doing direct wasm object emission. 19066caac57SDan Gohman if (MF.getSubtarget<WebAssemblySubtarget>() 19166caac57SDan Gohman .getTargetTriple().isOSBinFormatELF()) 19266caac57SDan Gohman return false; 19366caac57SDan Gohman 1944fc4e42dSDan Gohman bool Changed = false; 1954fc4e42dSDan Gohman MachineRegisterInfo &MRI = MF.getRegInfo(); 1964fc4e42dSDan Gohman WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>(); 1974fc4e42dSDan Gohman const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo(); 1984fc4e42dSDan Gohman 1994fc4e42dSDan Gohman // Map non-stackified virtual registers to their local ids. 2004fc4e42dSDan Gohman DenseMap<unsigned, unsigned> Reg2Local; 2014fc4e42dSDan Gohman 2024fc4e42dSDan Gohman // Handle ARGUMENTS first to ensure that they get the designated numbers. 2034fc4e42dSDan Gohman for (MachineBasicBlock::iterator I = MF.begin()->begin(), 2044fc4e42dSDan Gohman E = MF.begin()->end(); 2054fc4e42dSDan Gohman I != E;) { 2064fc4e42dSDan Gohman MachineInstr &MI = *I++; 2074fc4e42dSDan Gohman if (!WebAssembly::isArgument(MI)) 2084fc4e42dSDan Gohman break; 2094fc4e42dSDan Gohman unsigned Reg = MI.getOperand(0).getReg(); 2104fc4e42dSDan Gohman assert(!MFI.isVRegStackified(Reg)); 2114fc4e42dSDan Gohman Reg2Local[Reg] = MI.getOperand(1).getImm(); 2124fc4e42dSDan Gohman MI.eraseFromParent(); 2134fc4e42dSDan Gohman Changed = true; 2144fc4e42dSDan Gohman } 2154fc4e42dSDan Gohman 2164fc4e42dSDan Gohman // Start assigning local numbers after the last parameter. 2174fc4e42dSDan Gohman unsigned CurLocal = MFI.getParams().size(); 2184fc4e42dSDan Gohman 219d934cb88SDan Gohman // Precompute the set of registers that are unused, so that we can insert 220d934cb88SDan Gohman // drops to their defs. 221d934cb88SDan Gohman BitVector UseEmpty(MRI.getNumVirtRegs()); 222d934cb88SDan Gohman for (unsigned i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) 223d934cb88SDan Gohman UseEmpty[i] = MRI.use_empty(TargetRegisterInfo::index2VirtReg(i)); 224d934cb88SDan Gohman 2254fc4e42dSDan Gohman // Visit each instruction in the function. 2264fc4e42dSDan Gohman for (MachineBasicBlock &MBB : MF) { 2274fc4e42dSDan Gohman for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) { 2284fc4e42dSDan Gohman MachineInstr &MI = *I++; 2294fc4e42dSDan Gohman assert(!WebAssembly::isArgument(MI)); 2304fc4e42dSDan Gohman 2314fc4e42dSDan Gohman if (MI.isDebugValue() || MI.isLabel()) 2324fc4e42dSDan Gohman continue; 2334fc4e42dSDan Gohman 2344fc4e42dSDan Gohman // Replace tee instructions with tee_local. The difference is that tee 2354fc4e42dSDan Gohman // instructins have two defs, while tee_local instructions have one def 2364fc4e42dSDan Gohman // and an index of a local to write to. 2374fc4e42dSDan Gohman if (WebAssembly::isTee(MI)) { 2384fc4e42dSDan Gohman assert(MFI.isVRegStackified(MI.getOperand(0).getReg())); 2394fc4e42dSDan Gohman assert(!MFI.isVRegStackified(MI.getOperand(1).getReg())); 2404fc4e42dSDan Gohman unsigned OldReg = MI.getOperand(2).getReg(); 2414fc4e42dSDan Gohman const TargetRegisterClass *RC = MRI.getRegClass(OldReg); 2424fc4e42dSDan Gohman 2434fc4e42dSDan Gohman // Stackify the input if it isn't stackified yet. 2444fc4e42dSDan Gohman if (!MFI.isVRegStackified(OldReg)) { 2454fc4e42dSDan Gohman unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); 2464fc4e42dSDan Gohman unsigned NewReg = MRI.createVirtualRegister(RC); 2474fc4e42dSDan Gohman unsigned Opc = getGetLocalOpcode(RC); 2484fc4e42dSDan Gohman BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg) 2494fc4e42dSDan Gohman .addImm(LocalId); 2504fc4e42dSDan Gohman MI.getOperand(2).setReg(NewReg); 2514fc4e42dSDan Gohman MFI.stackifyVReg(NewReg); 2524fc4e42dSDan Gohman } 2534fc4e42dSDan Gohman 2544fc4e42dSDan Gohman // Replace the TEE with a TEE_LOCAL. 2554fc4e42dSDan Gohman unsigned LocalId = 2564fc4e42dSDan Gohman getLocalId(Reg2Local, CurLocal, MI.getOperand(1).getReg()); 2574fc4e42dSDan Gohman unsigned Opc = getTeeLocalOpcode(RC); 2584fc4e42dSDan Gohman BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), 2594fc4e42dSDan Gohman MI.getOperand(0).getReg()) 2604fc4e42dSDan Gohman .addImm(LocalId) 2614fc4e42dSDan Gohman .addReg(MI.getOperand(2).getReg()); 2624fc4e42dSDan Gohman 2634fc4e42dSDan Gohman MI.eraseFromParent(); 2644fc4e42dSDan Gohman Changed = true; 2654fc4e42dSDan Gohman continue; 2664fc4e42dSDan Gohman } 2674fc4e42dSDan Gohman 2684fc4e42dSDan Gohman // Insert set_locals for any defs that aren't stackified yet. Currently 2694fc4e42dSDan Gohman // we handle at most one def. 2704fc4e42dSDan Gohman assert(MI.getDesc().getNumDefs() <= 1); 2714fc4e42dSDan Gohman if (MI.getDesc().getNumDefs() == 1) { 2724fc4e42dSDan Gohman unsigned OldReg = MI.getOperand(0).getReg(); 273d934cb88SDan Gohman if (!MFI.isVRegStackified(OldReg)) { 2744fc4e42dSDan Gohman const TargetRegisterClass *RC = MRI.getRegClass(OldReg); 2754fc4e42dSDan Gohman unsigned NewReg = MRI.createVirtualRegister(RC); 2764fc4e42dSDan Gohman auto InsertPt = std::next(MachineBasicBlock::iterator(&MI)); 277d934cb88SDan Gohman if (MI.getOpcode() == WebAssembly::IMPLICIT_DEF) { 278d934cb88SDan Gohman MI.eraseFromParent(); 279d934cb88SDan Gohman Changed = true; 280d934cb88SDan Gohman continue; 281d934cb88SDan Gohman } 282d934cb88SDan Gohman if (UseEmpty[TargetRegisterInfo::virtReg2Index(OldReg)]) { 283d934cb88SDan Gohman unsigned Opc = getDropOpcode(RC); 284d934cb88SDan Gohman BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc)) 285d934cb88SDan Gohman .addReg(NewReg); 286d934cb88SDan Gohman } else { 287d934cb88SDan Gohman unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); 2884fc4e42dSDan Gohman unsigned Opc = getSetLocalOpcode(RC); 2894fc4e42dSDan Gohman BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc)) 2904fc4e42dSDan Gohman .addImm(LocalId) 2914fc4e42dSDan Gohman .addReg(NewReg); 292d934cb88SDan Gohman } 2934fc4e42dSDan Gohman MI.getOperand(0).setReg(NewReg); 2944fc4e42dSDan Gohman MFI.stackifyVReg(NewReg); 2954fc4e42dSDan Gohman Changed = true; 2964fc4e42dSDan Gohman } 2974fc4e42dSDan Gohman } 2984fc4e42dSDan Gohman 2994fc4e42dSDan Gohman // Insert get_locals for any uses that aren't stackified yet. 3004fc4e42dSDan Gohman MachineInstr *InsertPt = &MI; 3014fc4e42dSDan Gohman for (MachineOperand &MO : reverse(MI.explicit_uses())) { 3024fc4e42dSDan Gohman if (!MO.isReg()) 3034fc4e42dSDan Gohman continue; 3044fc4e42dSDan Gohman 3054fc4e42dSDan Gohman unsigned OldReg = MO.getReg(); 3064fc4e42dSDan Gohman 307b465aa05SDan Gohman // Inline asm may have a def in the middle of the operands. Our contract 308b465aa05SDan Gohman // with inline asm register operands is to provide local indices as 309b465aa05SDan Gohman // immediates. 310b465aa05SDan Gohman if (MO.isDef()) { 311b465aa05SDan Gohman assert(MI.getOpcode() == TargetOpcode::INLINEASM); 312b465aa05SDan Gohman unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); 313b465aa05SDan Gohman MRI.removeRegOperandFromUseList(&MO); 314b465aa05SDan Gohman MO = MachineOperand::CreateImm(LocalId); 315b465aa05SDan Gohman continue; 316b465aa05SDan Gohman } 317b465aa05SDan Gohman 3184fc4e42dSDan Gohman // If we see a stackified register, prepare to insert subsequent 3194fc4e42dSDan Gohman // get_locals before the start of its tree. 3204fc4e42dSDan Gohman if (MFI.isVRegStackified(OldReg)) { 3214fc4e42dSDan Gohman InsertPt = FindStartOfTree(MO, MRI, MFI); 3224fc4e42dSDan Gohman continue; 3234fc4e42dSDan Gohman } 3244fc4e42dSDan Gohman 325b465aa05SDan Gohman // Our contract with inline asm register operands is to provide local 326b465aa05SDan Gohman // indices as immediates. 327b465aa05SDan Gohman if (MI.getOpcode() == TargetOpcode::INLINEASM) { 328b465aa05SDan Gohman unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); 329b465aa05SDan Gohman MRI.removeRegOperandFromUseList(&MO); 330b465aa05SDan Gohman MO = MachineOperand::CreateImm(LocalId); 331b465aa05SDan Gohman continue; 332b465aa05SDan Gohman } 333b465aa05SDan Gohman 3344fc4e42dSDan Gohman // Insert a get_local. 3354fc4e42dSDan Gohman unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); 3364fc4e42dSDan Gohman const TargetRegisterClass *RC = MRI.getRegClass(OldReg); 3374fc4e42dSDan Gohman unsigned NewReg = MRI.createVirtualRegister(RC); 3384fc4e42dSDan Gohman unsigned Opc = getGetLocalOpcode(RC); 3394fc4e42dSDan Gohman InsertPt = 3404fc4e42dSDan Gohman BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg) 3414fc4e42dSDan Gohman .addImm(LocalId); 3424fc4e42dSDan Gohman MO.setReg(NewReg); 3434fc4e42dSDan Gohman MFI.stackifyVReg(NewReg); 3444fc4e42dSDan Gohman Changed = true; 3454fc4e42dSDan Gohman } 3464fc4e42dSDan Gohman 3474fc4e42dSDan Gohman // Coalesce and eliminate COPY instructions. 3484fc4e42dSDan Gohman if (WebAssembly::isCopy(MI)) { 3494fc4e42dSDan Gohman MRI.replaceRegWith(MI.getOperand(1).getReg(), 3504fc4e42dSDan Gohman MI.getOperand(0).getReg()); 3514fc4e42dSDan Gohman MI.eraseFromParent(); 3524fc4e42dSDan Gohman Changed = true; 3534fc4e42dSDan Gohman } 3544fc4e42dSDan Gohman } 3554fc4e42dSDan Gohman } 3564fc4e42dSDan Gohman 3573acb187dSDan Gohman // Define the locals. 358d934cb88SDan Gohman // TODO: Sort the locals for better compression. 359d934cb88SDan Gohman MFI.setNumLocals(CurLocal - MFI.getParams().size()); 3604fc4e42dSDan Gohman for (size_t i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) { 3614fc4e42dSDan Gohman unsigned Reg = TargetRegisterInfo::index2VirtReg(i); 3624fc4e42dSDan Gohman auto I = Reg2Local.find(Reg); 3634fc4e42dSDan Gohman if (I == Reg2Local.end() || I->second < MFI.getParams().size()) 3644fc4e42dSDan Gohman continue; 3654fc4e42dSDan Gohman 366d934cb88SDan Gohman MFI.setLocal(I->second - MFI.getParams().size(), 367d934cb88SDan Gohman typeForRegClass(MRI.getRegClass(Reg))); 3684fc4e42dSDan Gohman Changed = true; 3694fc4e42dSDan Gohman } 3704fc4e42dSDan Gohman 3714fc4e42dSDan Gohman #ifndef NDEBUG 3724fc4e42dSDan Gohman // Assert that all registers have been stackified at this point. 3734fc4e42dSDan Gohman for (const MachineBasicBlock &MBB : MF) { 3744fc4e42dSDan Gohman for (const MachineInstr &MI : MBB) { 3754fc4e42dSDan Gohman if (MI.isDebugValue() || MI.isLabel()) 3764fc4e42dSDan Gohman continue; 3774fc4e42dSDan Gohman for (const MachineOperand &MO : MI.explicit_operands()) { 3784fc4e42dSDan Gohman assert( 3794fc4e42dSDan Gohman (!MO.isReg() || MRI.use_empty(MO.getReg()) || 3804fc4e42dSDan Gohman MFI.isVRegStackified(MO.getReg())) && 3814fc4e42dSDan Gohman "WebAssemblyExplicitLocals failed to stackify a register operand"); 3824fc4e42dSDan Gohman } 3834fc4e42dSDan Gohman } 3844fc4e42dSDan Gohman } 3854fc4e42dSDan Gohman #endif 3864fc4e42dSDan Gohman 3874fc4e42dSDan Gohman return Changed; 3884fc4e42dSDan Gohman } 389