1//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This is a target description file for the WebAssembly architecture,
12/// which is also known as "wasm".
13///
14//===----------------------------------------------------------------------===//
15
16//===----------------------------------------------------------------------===//
17// Target-independent interfaces which we are implementing
18//===----------------------------------------------------------------------===//
19
20include "llvm/Target/Target.td"
21
22//===----------------------------------------------------------------------===//
23// WebAssembly Subtarget features.
24//===----------------------------------------------------------------------===//
25
26def FeatureSIMD128 : SubtargetFeature<"simd128", "HasSIMD128", "true",
27                                      "Enable 128-bit SIMD">;
28def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true",
29                                      "Enable Atomics">;
30
31//===----------------------------------------------------------------------===//
32// Architectures.
33//===----------------------------------------------------------------------===//
34
35//===----------------------------------------------------------------------===//
36// Register File Description
37//===----------------------------------------------------------------------===//
38
39include "WebAssemblyRegisterInfo.td"
40
41//===----------------------------------------------------------------------===//
42// Instruction Descriptions
43//===----------------------------------------------------------------------===//
44
45include "WebAssemblyInstrInfo.td"
46
47def WebAssemblyInstrInfo : InstrInfo;
48
49//===----------------------------------------------------------------------===//
50// WebAssembly Processors supported.
51//===----------------------------------------------------------------------===//
52
53// Minimal Viable Product.
54def : ProcessorModel<"mvp", NoSchedModel, []>;
55
56// Generic processor: latest stable version.
57def : ProcessorModel<"generic", NoSchedModel, []>;
58
59// Latest and greatest experimental version of WebAssembly. Bugs included!
60def : ProcessorModel<"bleeding-edge", NoSchedModel,
61                      [FeatureSIMD128, FeatureAtomics]>;
62
63//===----------------------------------------------------------------------===//
64// Target Declaration
65//===----------------------------------------------------------------------===//
66
67def WebAssembly : Target {
68  let InstructionSet = WebAssemblyInstrInfo;
69}
70