1 //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file provides WebAssembly-specific target descriptions. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H 16 #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H 17 18 #include "llvm/MC/MCInstrDesc.h" 19 #include "llvm/Support/DataTypes.h" 20 21 namespace llvm { 22 23 class MCAsmBackend; 24 class MCCodeEmitter; 25 class MCContext; 26 class MCInstrInfo; 27 class MCObjectWriter; 28 class MCSubtargetInfo; 29 class MVT; 30 class Target; 31 class Triple; 32 class raw_pwrite_stream; 33 34 Target &getTheWebAssemblyTarget32(); 35 Target &getTheWebAssemblyTarget64(); 36 37 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII, 38 MCContext &Ctx); 39 40 MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT); 41 42 MCObjectWriter *createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS, 43 bool Is64Bit, uint8_t OSABI); 44 45 MCObjectWriter *createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS, 46 bool Is64Bit); 47 48 namespace WebAssembly { 49 enum OperandType { 50 /// Basic block label in a branch construct. 51 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET, 52 /// Local index. 53 OPERAND_LOCAL, 54 /// Global index. 55 OPERAND_GLOBAL, 56 /// 32-bit integer immediates. 57 OPERAND_I32IMM, 58 /// 64-bit integer immediates. 59 OPERAND_I64IMM, 60 /// 32-bit floating-point immediates. 61 OPERAND_F32IMM, 62 /// 64-bit floating-point immediates. 63 OPERAND_F64IMM, 64 /// 32-bit unsigned function indices. 65 OPERAND_FUNCTION32, 66 /// 32-bit unsigned memory offsets. 67 OPERAND_OFFSET32, 68 /// p2align immediate for load and store address alignment. 69 OPERAND_P2ALIGN, 70 /// signature immediate for block/loop. 71 OPERAND_SIGNATURE 72 }; 73 } // end namespace WebAssembly 74 75 namespace WebAssemblyII { 76 enum { 77 // For variadic instructions, this flag indicates whether an operand 78 // in the variable_ops range is an immediate value. 79 VariableOpIsImmediate = (1 << 0), 80 // For immediate values in the variable_ops range, this flag indicates 81 // whether the value represents a control-flow label. 82 VariableOpImmediateIsLabel = (1 << 1) 83 }; 84 } // end namespace WebAssemblyII 85 86 } // end namespace llvm 87 88 // Defines symbolic names for WebAssembly registers. This defines a mapping from 89 // register name to register number. 90 // 91 #define GET_REGINFO_ENUM 92 #include "WebAssemblyGenRegisterInfo.inc" 93 94 // Defines symbolic names for the WebAssembly instructions. 95 // 96 #define GET_INSTRINFO_ENUM 97 #include "WebAssemblyGenInstrInfo.inc" 98 99 #define GET_SUBTARGETINFO_ENUM 100 #include "WebAssemblyGenSubtargetInfo.inc" 101 102 namespace llvm { 103 namespace WebAssembly { 104 105 /// Return the default p2align value for a load or store with the given opcode. 106 inline unsigned GetDefaultP2Align(unsigned Opcode) { 107 switch (Opcode) { 108 case WebAssembly::LOAD8_S_I32: 109 case WebAssembly::LOAD8_U_I32: 110 case WebAssembly::LOAD8_S_I64: 111 case WebAssembly::LOAD8_U_I64: 112 case WebAssembly::STORE8_I32: 113 case WebAssembly::STORE8_I64: 114 return 0; 115 case WebAssembly::LOAD16_S_I32: 116 case WebAssembly::LOAD16_U_I32: 117 case WebAssembly::LOAD16_S_I64: 118 case WebAssembly::LOAD16_U_I64: 119 case WebAssembly::STORE16_I32: 120 case WebAssembly::STORE16_I64: 121 return 1; 122 case WebAssembly::LOAD_I32: 123 case WebAssembly::LOAD_F32: 124 case WebAssembly::STORE_I32: 125 case WebAssembly::STORE_F32: 126 case WebAssembly::LOAD32_S_I64: 127 case WebAssembly::LOAD32_U_I64: 128 case WebAssembly::STORE32_I64: 129 return 2; 130 case WebAssembly::LOAD_I64: 131 case WebAssembly::LOAD_F64: 132 case WebAssembly::STORE_I64: 133 case WebAssembly::STORE_F64: 134 return 3; 135 default: 136 llvm_unreachable("Only loads and stores have p2align values"); 137 } 138 } 139 140 /// The operand number of the load or store address in load/store instructions. 141 static const unsigned LoadAddressOperandNo = 3; 142 static const unsigned StoreAddressOperandNo = 2; 143 144 /// The operand number of the load or store p2align in load/store instructions. 145 static const unsigned LoadP2AlignOperandNo = 1; 146 static const unsigned StoreP2AlignOperandNo = 0; 147 148 /// This is used to indicate block signatures. 149 enum class ExprType { 150 Void = 0x40, 151 I32 = 0x7f, 152 I64 = 0x7e, 153 F32 = 0x7d, 154 F64 = 0x7c, 155 I8x16 = 0x7b, 156 I16x8 = 0x7a, 157 I32x4 = 0x79, 158 F32x4 = 0x78, 159 B8x16 = 0x77, 160 B16x8 = 0x76, 161 B32x4 = 0x75 162 }; 163 164 /// This is used to indicate local types. 165 enum class ValType { 166 I32 = 0x7f, 167 I64 = 0x7e, 168 F32 = 0x7d, 169 F64 = 0x7c, 170 I8x16 = 0x7b, 171 I16x8 = 0x7a, 172 I32x4 = 0x79, 173 F32x4 = 0x78, 174 B8x16 = 0x77, 175 B16x8 = 0x76, 176 B32x4 = 0x75 177 }; 178 179 /// Instruction opcodes emitted via means other than CodeGen. 180 static const unsigned Nop = 0x01; 181 static const unsigned End = 0x0b; 182 183 ValType toValType(const MVT &Ty); 184 185 } // end namespace WebAssembly 186 } // end namespace llvm 187 188 #endif 189