1 //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file provides WebAssembly-specific target descriptions. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H 16 #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H 17 18 #include "llvm/MC/MCInstrDesc.h" 19 #include "llvm/Support/DataTypes.h" 20 21 namespace llvm { 22 23 class MCAsmBackend; 24 class MCCodeEmitter; 25 class MCContext; 26 class MCInstrInfo; 27 class MCObjectWriter; 28 class MCSubtargetInfo; 29 class MVT; 30 class Target; 31 class Triple; 32 class raw_pwrite_stream; 33 34 Target &getTheWebAssemblyTarget32(); 35 Target &getTheWebAssemblyTarget64(); 36 37 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII); 38 39 MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT); 40 41 MCObjectWriter *createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS, 42 bool Is64Bit, uint8_t OSABI); 43 44 namespace WebAssembly { 45 enum OperandType { 46 /// Basic block label in a branch construct. 47 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET, 48 /// Local index. 49 OPERAND_LOCAL, 50 /// 32-bit integer immediates. 51 OPERAND_I32IMM, 52 /// 64-bit integer immediates. 53 OPERAND_I64IMM, 54 /// 32-bit floating-point immediates. 55 OPERAND_F32IMM, 56 /// 64-bit floating-point immediates. 57 OPERAND_F64IMM, 58 /// 32-bit unsigned function indices. 59 OPERAND_FUNCTION32, 60 /// 32-bit unsigned memory offsets. 61 OPERAND_OFFSET32, 62 /// p2align immediate for load and store address alignment. 63 OPERAND_P2ALIGN, 64 /// signature immediate for block/loop. 65 OPERAND_SIGNATURE 66 }; 67 } // end namespace WebAssembly 68 69 namespace WebAssemblyII { 70 enum { 71 // For variadic instructions, this flag indicates whether an operand 72 // in the variable_ops range is an immediate value. 73 VariableOpIsImmediate = (1 << 0), 74 // For immediate values in the variable_ops range, this flag indicates 75 // whether the value represents a control-flow label. 76 VariableOpImmediateIsLabel = (1 << 1) 77 }; 78 } // end namespace WebAssemblyII 79 80 } // end namespace llvm 81 82 // Defines symbolic names for WebAssembly registers. This defines a mapping from 83 // register name to register number. 84 // 85 #define GET_REGINFO_ENUM 86 #include "WebAssemblyGenRegisterInfo.inc" 87 88 // Defines symbolic names for the WebAssembly instructions. 89 // 90 #define GET_INSTRINFO_ENUM 91 #include "WebAssemblyGenInstrInfo.inc" 92 93 #define GET_SUBTARGETINFO_ENUM 94 #include "WebAssemblyGenSubtargetInfo.inc" 95 96 namespace llvm { 97 namespace WebAssembly { 98 99 /// Return the default p2align value for a load or store with the given opcode. 100 inline unsigned GetDefaultP2Align(unsigned Opcode) { 101 switch (Opcode) { 102 case WebAssembly::LOAD8_S_I32: 103 case WebAssembly::LOAD8_U_I32: 104 case WebAssembly::LOAD8_S_I64: 105 case WebAssembly::LOAD8_U_I64: 106 case WebAssembly::STORE8_I32: 107 case WebAssembly::STORE8_I64: 108 return 0; 109 case WebAssembly::LOAD16_S_I32: 110 case WebAssembly::LOAD16_U_I32: 111 case WebAssembly::LOAD16_S_I64: 112 case WebAssembly::LOAD16_U_I64: 113 case WebAssembly::STORE16_I32: 114 case WebAssembly::STORE16_I64: 115 return 1; 116 case WebAssembly::LOAD_I32: 117 case WebAssembly::LOAD_F32: 118 case WebAssembly::STORE_I32: 119 case WebAssembly::STORE_F32: 120 case WebAssembly::LOAD32_S_I64: 121 case WebAssembly::LOAD32_U_I64: 122 case WebAssembly::STORE32_I64: 123 return 2; 124 case WebAssembly::LOAD_I64: 125 case WebAssembly::LOAD_F64: 126 case WebAssembly::STORE_I64: 127 case WebAssembly::STORE_F64: 128 return 3; 129 default: 130 llvm_unreachable("Only loads and stores have p2align values"); 131 } 132 } 133 134 /// The operand number of the load or store address in load/store instructions. 135 static const unsigned LoadAddressOperandNo = 3; 136 static const unsigned StoreAddressOperandNo = 2; 137 138 /// The operand number of the load or store p2align in load/store instructions. 139 static const unsigned LoadP2AlignOperandNo = 1; 140 static const unsigned StoreP2AlignOperandNo = 0; 141 142 /// This is used to indicate block signatures. 143 enum class ExprType { 144 Void = 0x40, 145 I32 = 0x7f, 146 I64 = 0x7e, 147 F32 = 0x7d, 148 F64 = 0x7c, 149 I8x16 = 0x7b, 150 I16x8 = 0x7a, 151 I32x4 = 0x79, 152 F32x4 = 0x78, 153 B8x16 = 0x77, 154 B16x8 = 0x76, 155 B32x4 = 0x75 156 }; 157 158 /// This is used to indicate local types. 159 enum class ValType { 160 I32 = 0x7f, 161 I64 = 0x7e, 162 F32 = 0x7d, 163 F64 = 0x7c, 164 I8x16 = 0x7b, 165 I16x8 = 0x7a, 166 I32x4 = 0x79, 167 F32x4 = 0x78, 168 B8x16 = 0x77, 169 B16x8 = 0x76, 170 B32x4 = 0x75 171 }; 172 173 /// Instruction opcodes emitted via means other than CodeGen. 174 static const unsigned Nop = 0x01; 175 static const unsigned End = 0x0b; 176 177 ValType toValType(const MVT &Ty); 178 179 } // end namespace WebAssembly 180 } // end namespace llvm 181 182 #endif 183