1 //=- WebAssemblyMCCodeEmitter.cpp - Convert WebAssembly code to machine code -//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file implements the WebAssemblyMCCodeEmitter class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "MCTargetDesc/WebAssemblyFixupKinds.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "llvm/ADT/STLExtras.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/MC/MCCodeEmitter.h"
20 #include "llvm/MC/MCFixup.h"
21 #include "llvm/MC/MCInst.h"
22 #include "llvm/MC/MCInstrInfo.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24 #include "llvm/MC/MCSubtargetInfo.h"
25 #include "llvm/MC/MCSymbol.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/EndianStream.h"
28 #include "llvm/Support/LEB128.h"
29 #include "llvm/Support/raw_ostream.h"
30 
31 using namespace llvm;
32 
33 #define DEBUG_TYPE "mccodeemitter"
34 
35 STATISTIC(MCNumEmitted, "Number of MC instructions emitted.");
36 STATISTIC(MCNumFixups, "Number of MC fixups created.");
37 
38 namespace {
39 class WebAssemblyMCCodeEmitter final : public MCCodeEmitter {
40   const MCInstrInfo &MCII;
41 
42   // Implementation generated by tablegen.
43   uint64_t getBinaryCodeForInstr(const MCInst &MI,
44                                  SmallVectorImpl<MCFixup> &Fixups,
45                                  const MCSubtargetInfo &STI) const;
46 
47   void encodeInstruction(const MCInst &MI, raw_ostream &OS,
48                          SmallVectorImpl<MCFixup> &Fixups,
49                          const MCSubtargetInfo &STI) const override;
50 
51 public:
52   WebAssemblyMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
53 };
54 } // end anonymous namespace
55 
56 MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) {
57   return new WebAssemblyMCCodeEmitter(MCII);
58 }
59 
60 void WebAssemblyMCCodeEmitter::encodeInstruction(
61     const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
62     const MCSubtargetInfo &STI) const {
63   uint64_t Start = OS.tell();
64 
65   uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI);
66   if (Binary <= UINT8_MAX) {
67     OS << uint8_t(Binary);
68   } else {
69     assert(Binary <= UINT16_MAX && "Several-byte opcodes not supported yet");
70     OS << uint8_t(Binary >> 8);
71     encodeULEB128(uint8_t(Binary), OS);
72   }
73 
74   // For br_table instructions, encode the size of the table. In the MCInst,
75   // there's an index operand (if not a stack instruction), one operand for
76   // each table entry, and the default operand.
77   if (MI.getOpcode() == WebAssembly::BR_TABLE_I32_S ||
78       MI.getOpcode() == WebAssembly::BR_TABLE_I64_S)
79     encodeULEB128(MI.getNumOperands() - 1, OS);
80   if (MI.getOpcode() == WebAssembly::BR_TABLE_I32 ||
81       MI.getOpcode() == WebAssembly::BR_TABLE_I64)
82     encodeULEB128(MI.getNumOperands() - 2, OS);
83 
84   const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
85   for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) {
86     const MCOperand &MO = MI.getOperand(i);
87     if (MO.isReg()) {
88       /* nothing to encode */
89 
90     } else if (MO.isImm()) {
91       if (i < Desc.getNumOperands()) {
92         assert(Desc.TSFlags == 0 &&
93                "WebAssembly non-variable_ops don't use TSFlags");
94         const MCOperandInfo &Info = Desc.OpInfo[i];
95         LLVM_DEBUG(dbgs() << "Encoding immediate: type="
96                           << int(Info.OperandType) << "\n");
97         switch (Info.OperandType) {
98         case WebAssembly::OPERAND_I32IMM:
99           encodeSLEB128(int32_t(MO.getImm()), OS);
100           break;
101         case WebAssembly::OPERAND_OFFSET32:
102           encodeULEB128(uint32_t(MO.getImm()), OS);
103           break;
104         case WebAssembly::OPERAND_I64IMM:
105           encodeSLEB128(int64_t(MO.getImm()), OS);
106           break;
107         case WebAssembly::OPERAND_SIGNATURE:
108           OS << uint8_t(MO.getImm());
109           break;
110         case WebAssembly::OPERAND_VEC_I8IMM:
111           support::endian::write<uint8_t>(OS, MO.getImm(), support::little);
112           break;
113         case WebAssembly::OPERAND_VEC_I16IMM:
114           support::endian::write<uint16_t>(OS, MO.getImm(), support::little);
115           break;
116         case WebAssembly::OPERAND_VEC_I32IMM:
117           support::endian::write<uint32_t>(OS, MO.getImm(), support::little);
118           break;
119         case WebAssembly::OPERAND_VEC_I64IMM:
120           support::endian::write<uint64_t>(OS, MO.getImm(), support::little);
121           break;
122         case WebAssembly::OPERAND_GLOBAL:
123           llvm_unreachable("wasm globals should only be accessed symbolicly");
124         default:
125           encodeULEB128(uint64_t(MO.getImm()), OS);
126         }
127       } else {
128         assert(Desc.TSFlags == (WebAssemblyII::VariableOpIsImmediate |
129                                 WebAssemblyII::VariableOpImmediateIsLabel));
130         encodeULEB128(uint64_t(MO.getImm()), OS);
131       }
132 
133     } else if (MO.isFPImm()) {
134       assert(i < Desc.getNumOperands() &&
135              "Unexpected floating-point immediate as a non-fixed operand");
136       assert(Desc.TSFlags == 0 &&
137              "WebAssembly variable_ops floating point ops don't use TSFlags");
138       const MCOperandInfo &Info = Desc.OpInfo[i];
139       if (Info.OperandType == WebAssembly::OPERAND_F32IMM) {
140         // TODO: MC converts all floating point immediate operands to double.
141         // This is fine for numeric values, but may cause NaNs to change bits.
142         float f = float(MO.getFPImm());
143         support::endian::write<float>(OS, f, support::little);
144       } else {
145         assert(Info.OperandType == WebAssembly::OPERAND_F64IMM);
146         double d = MO.getFPImm();
147         support::endian::write<double>(OS, d, support::little);
148       }
149 
150     } else if (MO.isExpr()) {
151       const MCOperandInfo &Info = Desc.OpInfo[i];
152       llvm::MCFixupKind FixupKind;
153       size_t PaddedSize = 5;
154       switch (Info.OperandType) {
155       case WebAssembly::OPERAND_I32IMM:
156         FixupKind = MCFixupKind(WebAssembly::fixup_code_sleb128_i32);
157         break;
158       case WebAssembly::OPERAND_I64IMM:
159         FixupKind = MCFixupKind(WebAssembly::fixup_code_sleb128_i64);
160         PaddedSize = 10;
161         break;
162       case WebAssembly::OPERAND_FUNCTION32:
163       case WebAssembly::OPERAND_OFFSET32:
164       case WebAssembly::OPERAND_TYPEINDEX:
165       case WebAssembly::OPERAND_GLOBAL:
166       case WebAssembly::OPERAND_EVENT:
167         FixupKind = MCFixupKind(WebAssembly::fixup_code_uleb128_i32);
168         break;
169       default:
170         llvm_unreachable("unexpected symbolic operand kind");
171       }
172       Fixups.push_back(MCFixup::create(OS.tell() - Start, MO.getExpr(),
173                                        FixupKind, MI.getLoc()));
174       ++MCNumFixups;
175       encodeULEB128(0, OS, PaddedSize);
176     } else {
177       llvm_unreachable("unexpected operand kind");
178     }
179   }
180 
181   ++MCNumEmitted; // Keep track of the # of mi's emitted.
182 }
183 
184 #include "WebAssemblyGenMCCodeEmitter.inc"
185