1 //===-- VERegisterInfo.cpp - VE Register Information ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the VE implementation of the TargetRegisterInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "VERegisterInfo.h"
14 #include "VE.h"
15 #include "VESubtarget.h"
16 #include "llvm/ADT/BitVector.h"
17 #include "llvm/ADT/STLExtras.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/TargetInstrInfo.h"
23 #include "llvm/IR/Type.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ErrorHandling.h"
26 
27 using namespace llvm;
28 
29 #define GET_REGINFO_TARGET_DESC
30 #include "VEGenRegisterInfo.inc"
31 
32 // VE uses %s10 == %lp to keep return address
33 VERegisterInfo::VERegisterInfo() : VEGenRegisterInfo(VE::SX10) {}
34 
35 const MCPhysReg *
36 VERegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
37   return CSR_SaveList;
38 }
39 
40 const uint32_t *VERegisterInfo::getCallPreservedMask(const MachineFunction &MF,
41                                                      CallingConv::ID CC) const {
42   return CSR_RegMask;
43 }
44 
45 const uint32_t *VERegisterInfo::getNoPreservedMask() const {
46   return CSR_NoRegs_RegMask;
47 }
48 
49 BitVector VERegisterInfo::getReservedRegs(const MachineFunction &MF) const {
50   BitVector Reserved(getNumRegs());
51 
52   const Register ReservedRegs[] = {
53       VE::SX8,  // Stack limit
54       VE::SX9,  // Frame pointer
55       VE::SX10, // Link register (return address)
56       VE::SX11, // Stack pointer
57 
58       // FIXME: maybe not need to be reserved
59       VE::SX12, // Outer register
60       VE::SX13, // Id register for dynamic linker
61 
62       VE::SX14, // Thread pointer
63       VE::SX15, // Global offset table register
64       VE::SX16, // Procedure linkage table register
65       VE::SX17, // Linkage-area register
66                 // sx18-sx33 are callee-saved registers
67                 // sx34-sx63 are temporary registers
68   };
69 
70   for (auto R : ReservedRegs)
71     for (MCRegAliasIterator ItAlias(R, this, true); ItAlias.isValid();
72          ++ItAlias)
73       Reserved.set(*ItAlias);
74 
75   return Reserved;
76 }
77 
78 bool VERegisterInfo::isConstantPhysReg(unsigned PhysReg) const { return false; }
79 
80 const TargetRegisterClass *
81 VERegisterInfo::getPointerRegClass(const MachineFunction &MF,
82                                    unsigned Kind) const {
83   return &VE::I64RegClass;
84 }
85 
86 static void replaceFI(MachineFunction &MF, MachineBasicBlock::iterator II,
87                       MachineInstr &MI, const DebugLoc &dl,
88                       unsigned FIOperandNum, int Offset, unsigned FramePtr) {
89   // Replace frame index with a frame pointer reference directly.
90   // VE has 32 bit offset field, so no need to expand a target instruction.
91   // Directly encode it.
92   MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false);
93   MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
94 }
95 
96 void VERegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
97                                          int SPAdj, unsigned FIOperandNum,
98                                          RegScavenger *RS) const {
99   assert(SPAdj == 0 && "Unexpected");
100 
101   MachineInstr &MI = *II;
102   DebugLoc dl = MI.getDebugLoc();
103   int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
104   MachineFunction &MF = *MI.getParent()->getParent();
105   const VEFrameLowering *TFI = getFrameLowering(MF);
106 
107   unsigned FrameReg;
108   int Offset;
109   Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
110 
111   Offset += MI.getOperand(FIOperandNum + 1).getImm();
112 
113   replaceFI(MF, II, MI, dl, FIOperandNum, Offset, FrameReg);
114 }
115 
116 Register VERegisterInfo::getFrameRegister(const MachineFunction &MF) const {
117   return VE::SX9;
118 }
119 
120 // VE has no architectural need for stack realignment support,
121 // except that LLVM unfortunately currently implements overaligned
122 // stack objects by depending upon stack realignment support.
123 // If that ever changes, this can probably be deleted.
124 bool VERegisterInfo::canRealignStack(const MachineFunction &MF) const {
125   if (!TargetRegisterInfo::canRealignStack(MF))
126     return false;
127 
128   // VE always has a fixed frame pointer register, so don't need to
129   // worry about needing to reserve it. [even if we don't have a frame
130   // pointer for our frame, it still cannot be used for other things,
131   // or register window traps will be SADNESS.]
132 
133   // If there's a reserved call frame, we can use VE to access locals.
134   if (getFrameLowering(MF)->hasReservedCallFrame(MF))
135     return true;
136 
137   // Otherwise, we'd need a base pointer, but those aren't implemented
138   // for VE at the moment.
139 
140   return false;
141 }
142