1 //===-- VEMCInstLower.cpp - Convert VE MachineInstr to MCInst -------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains code to lower VE MachineInstrs to their corresponding 10 // MCInst records. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MCTargetDesc/VEMCExpr.h" 15 #include "VE.h" 16 #include "llvm/CodeGen/AsmPrinter.h" 17 #include "llvm/CodeGen/MachineFunction.h" 18 #include "llvm/CodeGen/MachineInstr.h" 19 #include "llvm/CodeGen/MachineOperand.h" 20 #include "llvm/IR/Mangler.h" 21 #include "llvm/MC/MCAsmInfo.h" 22 #include "llvm/MC/MCContext.h" 23 #include "llvm/MC/MCExpr.h" 24 #include "llvm/MC/MCInst.h" 25 26 using namespace llvm; 27 28 static MCOperand LowerSymbolOperand(const MachineInstr *MI, 29 const MachineOperand &MO, 30 const MCSymbol *Symbol, AsmPrinter &AP) { 31 VEMCExpr::VariantKind Kind = (VEMCExpr::VariantKind)MO.getTargetFlags(); 32 33 const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Symbol, AP.OutContext); 34 const VEMCExpr *expr = VEMCExpr::create(Kind, MCSym, AP.OutContext); 35 return MCOperand::createExpr(expr); 36 } 37 38 static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO, 39 AsmPrinter &AP) { 40 switch (MO.getType()) { 41 default: 42 report_fatal_error("unsupported operand type"); 43 44 case MachineOperand::MO_Register: 45 if (MO.isImplicit()) 46 break; 47 return MCOperand::createReg(MO.getReg()); 48 49 case MachineOperand::MO_GlobalAddress: 50 return LowerSymbolOperand(MI, MO, AP.getSymbol(MO.getGlobal()), AP); 51 case MachineOperand::MO_Immediate: 52 return MCOperand::createImm(MO.getImm()); 53 54 case MachineOperand::MO_MachineBasicBlock: 55 return LowerSymbolOperand(MI, MO, MO.getMBB()->getSymbol(), AP); 56 57 case MachineOperand::MO_RegisterMask: 58 break; 59 } 60 return MCOperand(); 61 } 62 63 void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 64 AsmPrinter &AP) { 65 OutMI.setOpcode(MI->getOpcode()); 66 67 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 68 const MachineOperand &MO = MI->getOperand(i); 69 MCOperand MCOp = LowerOperand(MI, MO, AP); 70 71 if (MCOp.isValid()) 72 OutMI.addOperand(MCOp); 73 } 74 } 75